arduino_ci 0.1.3 → 0.1.4

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Files changed (295) hide show
  1. checksums.yaml +4 -4
  2. data/README.md +77 -1
  3. data/cpp/arduino/Arduino.cpp +17 -7
  4. data/cpp/arduino/Arduino.h +151 -5
  5. data/cpp/arduino/ArduinoDefines.h +90 -0
  6. data/cpp/arduino/AvrMath.h +18 -28
  7. data/cpp/arduino/Godmode.cpp +62 -0
  8. data/cpp/arduino/Godmode.h +74 -0
  9. data/cpp/arduino/HardwareSerial.h +81 -0
  10. data/cpp/arduino/Print.h +67 -0
  11. data/cpp/arduino/Stream.h +210 -0
  12. data/cpp/arduino/WCharacter.h +96 -0
  13. data/cpp/arduino/WString.h +164 -0
  14. data/cpp/arduino/binary.h +518 -0
  15. data/cpp/arduino/include/README.md +3 -0
  16. data/cpp/arduino/include/common.h +333 -0
  17. data/cpp/arduino/include/fuse.h +274 -0
  18. data/cpp/arduino/include/io.h +643 -0
  19. data/cpp/arduino/include/io1200.h +274 -0
  20. data/cpp/arduino/include/io2313.h +385 -0
  21. data/cpp/arduino/include/io2323.h +210 -0
  22. data/cpp/arduino/include/io2333.h +461 -0
  23. data/cpp/arduino/include/io2343.h +214 -0
  24. data/cpp/arduino/include/io43u32x.h +440 -0
  25. data/cpp/arduino/include/io43u35x.h +432 -0
  26. data/cpp/arduino/include/io4414.h +500 -0
  27. data/cpp/arduino/include/io4433.h +489 -0
  28. data/cpp/arduino/include/io4434.h +588 -0
  29. data/cpp/arduino/include/io76c711.h +499 -0
  30. data/cpp/arduino/include/io8515.h +501 -0
  31. data/cpp/arduino/include/io8534.h +217 -0
  32. data/cpp/arduino/include/io8535.h +589 -0
  33. data/cpp/arduino/include/io86r401.h +309 -0
  34. data/cpp/arduino/include/io90pwm1.h +1157 -0
  35. data/cpp/arduino/include/io90pwm161.h +918 -0
  36. data/cpp/arduino/include/io90pwm216.h +1225 -0
  37. data/cpp/arduino/include/io90pwm2b.h +1466 -0
  38. data/cpp/arduino/include/io90pwm316.h +1272 -0
  39. data/cpp/arduino/include/io90pwm3b.h +1466 -0
  40. data/cpp/arduino/include/io90pwm81.h +1036 -0
  41. data/cpp/arduino/include/io90pwmx.h +1415 -0
  42. data/cpp/arduino/include/io90scr100.h +1719 -0
  43. data/cpp/arduino/include/ioa5272.h +803 -0
  44. data/cpp/arduino/include/ioa5505.h +803 -0
  45. data/cpp/arduino/include/ioa5702m322.h +2591 -0
  46. data/cpp/arduino/include/ioa5782.h +1843 -0
  47. data/cpp/arduino/include/ioa5790.h +907 -0
  48. data/cpp/arduino/include/ioa5790n.h +922 -0
  49. data/cpp/arduino/include/ioa5791.h +923 -0
  50. data/cpp/arduino/include/ioa5795.h +756 -0
  51. data/cpp/arduino/include/ioa5831.h +1949 -0
  52. data/cpp/arduino/include/ioa6285.h +740 -0
  53. data/cpp/arduino/include/ioa6286.h +740 -0
  54. data/cpp/arduino/include/ioa6289.h +847 -0
  55. data/cpp/arduino/include/ioa6612c.h +795 -0
  56. data/cpp/arduino/include/ioa6613c.h +795 -0
  57. data/cpp/arduino/include/ioa6614q.h +798 -0
  58. data/cpp/arduino/include/ioa6616c.h +865 -0
  59. data/cpp/arduino/include/ioa6617c.h +865 -0
  60. data/cpp/arduino/include/ioa664251.h +857 -0
  61. data/cpp/arduino/include/ioa8210.h +1843 -0
  62. data/cpp/arduino/include/ioa8510.h +1949 -0
  63. data/cpp/arduino/include/ioat94k.h +565 -0
  64. data/cpp/arduino/include/iocan128.h +100 -0
  65. data/cpp/arduino/include/iocan32.h +100 -0
  66. data/cpp/arduino/include/iocan64.h +100 -0
  67. data/cpp/arduino/include/iocanxx.h +2020 -0
  68. data/cpp/arduino/include/iom103.h +735 -0
  69. data/cpp/arduino/include/iom128.h +1299 -0
  70. data/cpp/arduino/include/iom1280.h +101 -0
  71. data/cpp/arduino/include/iom1281.h +101 -0
  72. data/cpp/arduino/include/iom1284.h +1099 -0
  73. data/cpp/arduino/include/iom1284p.h +1219 -0
  74. data/cpp/arduino/include/iom1284rfr2.h +2690 -0
  75. data/cpp/arduino/include/iom128a.h +1070 -0
  76. data/cpp/arduino/include/iom128rfa1.h +5385 -0
  77. data/cpp/arduino/include/iom128rfr2.h +2706 -0
  78. data/cpp/arduino/include/iom16.h +676 -0
  79. data/cpp/arduino/include/iom161.h +726 -0
  80. data/cpp/arduino/include/iom162.h +1022 -0
  81. data/cpp/arduino/include/iom163.h +686 -0
  82. data/cpp/arduino/include/iom164.h +101 -0
  83. data/cpp/arduino/include/iom164a.h +34 -0
  84. data/cpp/arduino/include/iom164p.h +34 -0
  85. data/cpp/arduino/include/iom164pa.h +1016 -0
  86. data/cpp/arduino/include/iom165.h +887 -0
  87. data/cpp/arduino/include/iom165a.h +832 -0
  88. data/cpp/arduino/include/iom165p.h +889 -0
  89. data/cpp/arduino/include/iom165pa.h +948 -0
  90. data/cpp/arduino/include/iom168.h +97 -0
  91. data/cpp/arduino/include/iom168a.h +35 -0
  92. data/cpp/arduino/include/iom168p.h +942 -0
  93. data/cpp/arduino/include/iom168pa.h +843 -0
  94. data/cpp/arduino/include/iom168pb.h +899 -0
  95. data/cpp/arduino/include/iom169.h +1174 -0
  96. data/cpp/arduino/include/iom169a.h +44 -0
  97. data/cpp/arduino/include/iom169p.h +1097 -0
  98. data/cpp/arduino/include/iom169pa.h +1485 -0
  99. data/cpp/arduino/include/iom16a.h +923 -0
  100. data/cpp/arduino/include/iom16hva.h +80 -0
  101. data/cpp/arduino/include/iom16hva2.h +883 -0
  102. data/cpp/arduino/include/iom16hvb.h +1052 -0
  103. data/cpp/arduino/include/iom16hvbrevb.h +1052 -0
  104. data/cpp/arduino/include/iom16m1.h +1571 -0
  105. data/cpp/arduino/include/iom16u2.h +1000 -0
  106. data/cpp/arduino/include/iom16u4.h +1423 -0
  107. data/cpp/arduino/include/iom2560.h +101 -0
  108. data/cpp/arduino/include/iom2561.h +101 -0
  109. data/cpp/arduino/include/iom2564rfr2.h +2691 -0
  110. data/cpp/arduino/include/iom256rfr2.h +2707 -0
  111. data/cpp/arduino/include/iom3000.h +237 -0
  112. data/cpp/arduino/include/iom32.h +755 -0
  113. data/cpp/arduino/include/iom323.h +744 -0
  114. data/cpp/arduino/include/iom324a.h +1014 -0
  115. data/cpp/arduino/include/iom324p.h +1016 -0
  116. data/cpp/arduino/include/iom324pa.h +1372 -0
  117. data/cpp/arduino/include/iom325.h +886 -0
  118. data/cpp/arduino/include/iom3250.h +982 -0
  119. data/cpp/arduino/include/iom3250a.h +34 -0
  120. data/cpp/arduino/include/iom3250p.h +34 -0
  121. data/cpp/arduino/include/iom3250pa.h +1042 -0
  122. data/cpp/arduino/include/iom325a.h +34 -0
  123. data/cpp/arduino/include/iom325p.h +34 -0
  124. data/cpp/arduino/include/iom325pa.h +937 -0
  125. data/cpp/arduino/include/iom328.h +34 -0
  126. data/cpp/arduino/include/iom328p.h +948 -0
  127. data/cpp/arduino/include/iom329.h +1069 -0
  128. data/cpp/arduino/include/iom3290.h +1227 -0
  129. data/cpp/arduino/include/iom3290a.h +34 -0
  130. data/cpp/arduino/include/iom3290pa.h +1123 -0
  131. data/cpp/arduino/include/iom329a.h +34 -0
  132. data/cpp/arduino/include/iom329p.h +1164 -0
  133. data/cpp/arduino/include/iom329pa.h +34 -0
  134. data/cpp/arduino/include/iom32a.h +686 -0
  135. data/cpp/arduino/include/iom32c1.h +1320 -0
  136. data/cpp/arduino/include/iom32hvb.h +1052 -0
  137. data/cpp/arduino/include/iom32hvbrevb.h +953 -0
  138. data/cpp/arduino/include/iom32m1.h +1625 -0
  139. data/cpp/arduino/include/iom32u2.h +1000 -0
  140. data/cpp/arduino/include/iom32u4.h +1512 -0
  141. data/cpp/arduino/include/iom32u6.h +1431 -0
  142. data/cpp/arduino/include/iom406.h +783 -0
  143. data/cpp/arduino/include/iom48.h +93 -0
  144. data/cpp/arduino/include/iom48a.h +35 -0
  145. data/cpp/arduino/include/iom48p.h +936 -0
  146. data/cpp/arduino/include/iom48pa.h +839 -0
  147. data/cpp/arduino/include/iom48pb.h +890 -0
  148. data/cpp/arduino/include/iom64.h +1311 -0
  149. data/cpp/arduino/include/iom640.h +101 -0
  150. data/cpp/arduino/include/iom644.h +101 -0
  151. data/cpp/arduino/include/iom644a.h +34 -0
  152. data/cpp/arduino/include/iom644p.h +101 -0
  153. data/cpp/arduino/include/iom644pa.h +1387 -0
  154. data/cpp/arduino/include/iom644rfr2.h +2685 -0
  155. data/cpp/arduino/include/iom645.h +881 -0
  156. data/cpp/arduino/include/iom6450.h +978 -0
  157. data/cpp/arduino/include/iom6450a.h +34 -0
  158. data/cpp/arduino/include/iom6450p.h +34 -0
  159. data/cpp/arduino/include/iom645a.h +34 -0
  160. data/cpp/arduino/include/iom645p.h +34 -0
  161. data/cpp/arduino/include/iom649.h +1061 -0
  162. data/cpp/arduino/include/iom6490.h +1182 -0
  163. data/cpp/arduino/include/iom6490a.h +34 -0
  164. data/cpp/arduino/include/iom6490p.h +34 -0
  165. data/cpp/arduino/include/iom649a.h +34 -0
  166. data/cpp/arduino/include/iom649p.h +1490 -0
  167. data/cpp/arduino/include/iom64a.h +1084 -0
  168. data/cpp/arduino/include/iom64c1.h +1321 -0
  169. data/cpp/arduino/include/iom64hve.h +1034 -0
  170. data/cpp/arduino/include/iom64hve2.h +767 -0
  171. data/cpp/arduino/include/iom64m1.h +1572 -0
  172. data/cpp/arduino/include/iom64rfr2.h +2701 -0
  173. data/cpp/arduino/include/iom8.h +665 -0
  174. data/cpp/arduino/include/iom8515.h +687 -0
  175. data/cpp/arduino/include/iom8535.h +772 -0
  176. data/cpp/arduino/include/iom88.h +97 -0
  177. data/cpp/arduino/include/iom88a.h +35 -0
  178. data/cpp/arduino/include/iom88p.h +941 -0
  179. data/cpp/arduino/include/iom88pa.h +1185 -0
  180. data/cpp/arduino/include/iom88pb.h +899 -0
  181. data/cpp/arduino/include/iom8a.h +621 -0
  182. data/cpp/arduino/include/iom8hva.h +76 -0
  183. data/cpp/arduino/include/iom8u2.h +997 -0
  184. data/cpp/arduino/include/iomx8.h +808 -0
  185. data/cpp/arduino/include/iomxx0_1.h +1692 -0
  186. data/cpp/arduino/include/iomxx4.h +954 -0
  187. data/cpp/arduino/include/iomxxhva.h +550 -0
  188. data/cpp/arduino/include/iotn10.h +512 -0
  189. data/cpp/arduino/include/iotn11.h +255 -0
  190. data/cpp/arduino/include/iotn12.h +288 -0
  191. data/cpp/arduino/include/iotn13.h +395 -0
  192. data/cpp/arduino/include/iotn13a.h +394 -0
  193. data/cpp/arduino/include/iotn15.h +363 -0
  194. data/cpp/arduino/include/iotn1634.h +914 -0
  195. data/cpp/arduino/include/iotn167.h +883 -0
  196. data/cpp/arduino/include/iotn20.h +776 -0
  197. data/cpp/arduino/include/iotn22.h +221 -0
  198. data/cpp/arduino/include/iotn2313.h +702 -0
  199. data/cpp/arduino/include/iotn2313a.h +812 -0
  200. data/cpp/arduino/include/iotn24.h +94 -0
  201. data/cpp/arduino/include/iotn24a.h +846 -0
  202. data/cpp/arduino/include/iotn25.h +93 -0
  203. data/cpp/arduino/include/iotn26.h +422 -0
  204. data/cpp/arduino/include/iotn261.h +93 -0
  205. data/cpp/arduino/include/iotn261a.h +987 -0
  206. data/cpp/arduino/include/iotn28.h +297 -0
  207. data/cpp/arduino/include/iotn4.h +477 -0
  208. data/cpp/arduino/include/iotn40.h +767 -0
  209. data/cpp/arduino/include/iotn4313.h +813 -0
  210. data/cpp/arduino/include/iotn43u.h +604 -0
  211. data/cpp/arduino/include/iotn44.h +94 -0
  212. data/cpp/arduino/include/iotn441.h +903 -0
  213. data/cpp/arduino/include/iotn44a.h +844 -0
  214. data/cpp/arduino/include/iotn45.h +93 -0
  215. data/cpp/arduino/include/iotn461.h +94 -0
  216. data/cpp/arduino/include/iotn461a.h +987 -0
  217. data/cpp/arduino/include/iotn48.h +806 -0
  218. data/cpp/arduino/include/iotn5.h +512 -0
  219. data/cpp/arduino/include/iotn828.h +911 -0
  220. data/cpp/arduino/include/iotn84.h +94 -0
  221. data/cpp/arduino/include/iotn841.h +903 -0
  222. data/cpp/arduino/include/iotn84a.h +844 -0
  223. data/cpp/arduino/include/iotn85.h +93 -0
  224. data/cpp/arduino/include/iotn861.h +94 -0
  225. data/cpp/arduino/include/iotn861a.h +988 -0
  226. data/cpp/arduino/include/iotn87.h +859 -0
  227. data/cpp/arduino/include/iotn88.h +806 -0
  228. data/cpp/arduino/include/iotn9.h +477 -0
  229. data/cpp/arduino/include/iotnx4.h +482 -0
  230. data/cpp/arduino/include/iotnx5.h +442 -0
  231. data/cpp/arduino/include/iotnx61.h +541 -0
  232. data/cpp/arduino/include/iousb1286.h +101 -0
  233. data/cpp/arduino/include/iousb1287.h +101 -0
  234. data/cpp/arduino/include/iousb162.h +101 -0
  235. data/cpp/arduino/include/iousb646.h +102 -0
  236. data/cpp/arduino/include/iousb647.h +102 -0
  237. data/cpp/arduino/include/iousb82.h +95 -0
  238. data/cpp/arduino/include/iousbxx2.h +807 -0
  239. data/cpp/arduino/include/iousbxx6_7.h +1336 -0
  240. data/cpp/arduino/include/iox128a1.h +7236 -0
  241. data/cpp/arduino/include/iox128a1u.h +8305 -0
  242. data/cpp/arduino/include/iox128a3.h +6987 -0
  243. data/cpp/arduino/include/iox128a3u.h +7697 -0
  244. data/cpp/arduino/include/iox128a4u.h +7309 -0
  245. data/cpp/arduino/include/iox128b1.h +6872 -0
  246. data/cpp/arduino/include/iox128b3.h +6288 -0
  247. data/cpp/arduino/include/iox128c3.h +6264 -0
  248. data/cpp/arduino/include/iox128d3.h +5749 -0
  249. data/cpp/arduino/include/iox128d4.h +5562 -0
  250. data/cpp/arduino/include/iox16a4.h +6748 -0
  251. data/cpp/arduino/include/iox16a4u.h +7309 -0
  252. data/cpp/arduino/include/iox16c4.h +6078 -0
  253. data/cpp/arduino/include/iox16d4.h +5717 -0
  254. data/cpp/arduino/include/iox16e5.h +7699 -0
  255. data/cpp/arduino/include/iox192a3.h +6987 -0
  256. data/cpp/arduino/include/iox192a3u.h +7697 -0
  257. data/cpp/arduino/include/iox192c3.h +6264 -0
  258. data/cpp/arduino/include/iox192d3.h +5749 -0
  259. data/cpp/arduino/include/iox256a3.h +6987 -0
  260. data/cpp/arduino/include/iox256a3b.h +6983 -0
  261. data/cpp/arduino/include/iox256a3bu.h +7706 -0
  262. data/cpp/arduino/include/iox256a3u.h +7697 -0
  263. data/cpp/arduino/include/iox256c3.h +6264 -0
  264. data/cpp/arduino/include/iox256d3.h +5709 -0
  265. data/cpp/arduino/include/iox32a4.h +6747 -0
  266. data/cpp/arduino/include/iox32a4u.h +7309 -0
  267. data/cpp/arduino/include/iox32c3.h +6264 -0
  268. data/cpp/arduino/include/iox32c4.h +6078 -0
  269. data/cpp/arduino/include/iox32d3.h +5105 -0
  270. data/cpp/arduino/include/iox32d4.h +5685 -0
  271. data/cpp/arduino/include/iox32e5.h +7699 -0
  272. data/cpp/arduino/include/iox384c3.h +6849 -0
  273. data/cpp/arduino/include/iox384d3.h +5833 -0
  274. data/cpp/arduino/include/iox64a1.h +7236 -0
  275. data/cpp/arduino/include/iox64a1u.h +8305 -0
  276. data/cpp/arduino/include/iox64a3.h +6987 -0
  277. data/cpp/arduino/include/iox64a3u.h +7697 -0
  278. data/cpp/arduino/include/iox64a4u.h +7309 -0
  279. data/cpp/arduino/include/iox64b1.h +6454 -0
  280. data/cpp/arduino/include/iox64b3.h +6288 -0
  281. data/cpp/arduino/include/iox64c3.h +6264 -0
  282. data/cpp/arduino/include/iox64d3.h +5764 -0
  283. data/cpp/arduino/include/iox64d4.h +5555 -0
  284. data/cpp/arduino/include/iox8e5.h +7699 -0
  285. data/cpp/arduino/include/lock.h +239 -0
  286. data/cpp/arduino/include/portpins.h +549 -0
  287. data/cpp/arduino/include/version.h +90 -0
  288. data/cpp/arduino/include/xmega.h +71 -0
  289. data/cpp/unittest/Assertion.h +9 -4
  290. data/cpp/unittest/Compare.h +93 -0
  291. data/lib/arduino_ci/arduino_installation.rb +1 -1
  292. data/lib/arduino_ci/cpp_library.rb +4 -1
  293. data/lib/arduino_ci/version.rb +1 -1
  294. data/misc/default.yaml +7 -0
  295. metadata +285 -2
@@ -0,0 +1,1321 @@
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+ /* Copyright (c) 2009 Atmel Corporation
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+ All rights reserved.
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+
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+ Redistribution and use in source and binary forms, with or without
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+ modification, are permitted provided that the following conditions are met:
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+
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+ * Redistributions of source code must retain the above copyright
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+ notice, this list of conditions and the following disclaimer.
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+
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+ * Redistributions in binary form must reproduce the above copyright
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+ notice, this list of conditions and the following disclaimer in
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+ the documentation and/or other materials provided with the
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+ distribution.
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+
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+ * Neither the name of the copyright holders nor the names of
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+ contributors may be used to endorse or promote products derived
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+ from this software without specific prior written permission.
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+
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+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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+ POSSIBILITY OF SUCH DAMAGE. */
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+
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+ /* $Id: iom64c1.h 2183 2010-09-21 05:37:46Z aboyapati $ */
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+
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+ /* avr/iom64c1.h - definitions for ATmega64C1 */
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+
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+ /* This file should only be included from <avr/io.h>, never directly. */
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+
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+ #ifndef _AVR_IO_H_
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+ # error "Include <avr/io.h> instead of this file."
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+ #endif
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+
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+ #ifndef _AVR_IOXXX_H_
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+ # define _AVR_IOXXX_H_ "iom64c1.h"
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+ #else
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+ # error "Attempt to include more than one <avr/ioXXX.h> file."
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+ #endif
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+
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+
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+ #ifndef _AVR_ATmega64C1_H_
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+ #define _AVR_ATmega64C1_H_ 1
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+
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+
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+ /* Registers and associated bit numbers. */
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+
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+ #define PINB _SFR_IO8(0x03)
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+ #define PINB0 0
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+ #define PINB1 1
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+ #define PINB2 2
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+ #define PINB3 3
59
+ #define PINB4 4
60
+ #define PINB5 5
61
+ #define PINB6 6
62
+ #define PINB7 7
63
+
64
+ #define DDRB _SFR_IO8(0x04)
65
+ #define DDB0 0
66
+ #define DDB1 1
67
+ #define DDB2 2
68
+ #define DDB3 3
69
+ #define DDB4 4
70
+ #define DDB5 5
71
+ #define DDB6 6
72
+ #define DDB7 7
73
+
74
+ #define PORTB _SFR_IO8(0x05)
75
+ #define PORTB0 0
76
+ #define PORTB1 1
77
+ #define PORTB2 2
78
+ #define PORTB3 3
79
+ #define PORTB4 4
80
+ #define PORTB5 5
81
+ #define PORTB6 6
82
+ #define PORTB7 7
83
+
84
+ #define PINC _SFR_IO8(0x06)
85
+ #define PINC0 0
86
+ #define PINC1 1
87
+ #define PINC2 2
88
+ #define PINC3 3
89
+ #define PINC4 4
90
+ #define PINC5 5
91
+ #define PINC6 6
92
+ #define PINC7 7
93
+
94
+ #define DDRC _SFR_IO8(0x07)
95
+ #define DDC0 0
96
+ #define DDC1 1
97
+ #define DDC2 2
98
+ #define DDC3 3
99
+ #define DDC4 4
100
+ #define DDC5 5
101
+ #define DDC6 6
102
+ #define DDC7 7
103
+
104
+ #define PORTC _SFR_IO8(0x08)
105
+ #define PORTC0 0
106
+ #define PORTC1 1
107
+ #define PORTC2 2
108
+ #define PORTC3 3
109
+ #define PORTC4 4
110
+ #define PORTC5 5
111
+ #define PORTC6 6
112
+ #define PORTC7 7
113
+
114
+ #define PIND _SFR_IO8(0x09)
115
+ #define PIND0 0
116
+ #define PIND1 1
117
+ #define PIND2 2
118
+ #define PIND3 3
119
+ #define PIND4 4
120
+ #define PIND5 5
121
+ #define PIND6 6
122
+ #define PIND7 7
123
+
124
+ #define DDRD _SFR_IO8(0x0A)
125
+ #define DDD0 0
126
+ #define DDD1 1
127
+ #define DDD2 2
128
+ #define DDD3 3
129
+ #define DDD4 4
130
+ #define DDD5 5
131
+ #define DDD6 6
132
+ #define DDD7 7
133
+
134
+ #define PORTD _SFR_IO8(0x0B)
135
+ #define PORTD0 0
136
+ #define PORTD1 1
137
+ #define PORTD2 2
138
+ #define PORTD3 3
139
+ #define PORTD4 4
140
+ #define PORTD5 5
141
+ #define PORTD6 6
142
+ #define PORTD7 7
143
+
144
+ #define PINE _SFR_IO8(0x0C)
145
+ #define PINE0 0
146
+ #define PINE1 1
147
+ #define PINE2 2
148
+
149
+ #define DDRE _SFR_IO8(0x0D)
150
+ #define DDE0 0
151
+ #define DDE1 1
152
+ #define DDE2 2
153
+
154
+ #define PORTE _SFR_IO8(0x0E)
155
+ #define PORTE0 0
156
+ #define PORTE1 1
157
+ #define PORTE2 2
158
+
159
+ #define TIFR0 _SFR_IO8(0x15)
160
+ #define TOV0 0
161
+ #define OCF0A 1
162
+ #define OCF0B 2
163
+
164
+ #define TIFR1 _SFR_IO8(0x16)
165
+ #define TOV1 0
166
+ #define OCF1A 1
167
+ #define OCF1B 2
168
+ #define ICF1 5
169
+
170
+ #define GPIOR1 _SFR_IO8(0x19)
171
+ #define GPIOR10 0
172
+ #define GPIOR11 1
173
+ #define GPIOR12 2
174
+ #define GPIOR13 3
175
+ #define GPIOR14 4
176
+ #define GPIOR15 5
177
+ #define GPIOR16 6
178
+ #define GPIOR17 7
179
+
180
+ #define GPIOR2 _SFR_IO8(0x1A)
181
+ #define GPIOR20 0
182
+ #define GPIOR21 1
183
+ #define GPIOR22 2
184
+ #define GPIOR23 3
185
+ #define GPIOR24 4
186
+ #define GPIOR25 5
187
+ #define GPIOR26 6
188
+ #define GPIOR27 7
189
+
190
+ #define PCIFR _SFR_IO8(0x1B)
191
+ #define PCIF0 0
192
+ #define PCIF1 1
193
+ #define PCIF2 2
194
+ #define PCIF3 3
195
+
196
+ #define EIFR _SFR_IO8(0x1C)
197
+ #define INTF0 0
198
+ #define INTF1 1
199
+ #define INTF2 2
200
+ #define INTF3 3
201
+
202
+ #define EIMSK _SFR_IO8(0x1D)
203
+ #define INT0 0
204
+ #define INT1 1
205
+ #define INT2 2
206
+ #define INT3 3
207
+
208
+ #define GPIOR0 _SFR_IO8(0x1E)
209
+ #define GPIOR00 0
210
+ #define GPIOR01 1
211
+ #define GPIOR02 2
212
+ #define GPIOR03 3
213
+ #define GPIOR04 4
214
+ #define GPIOR05 5
215
+ #define GPIOR06 6
216
+ #define GPIOR07 7
217
+
218
+ #define EECR _SFR_IO8(0x1F)
219
+ #define EERE 0
220
+ #define EEWE 1
221
+ #define EEMWE 2
222
+ #define EERIE 3
223
+ #define EEPM0 4
224
+ #define EEPM1 5
225
+
226
+ #define EEDR _SFR_IO8(0x20)
227
+ #define EEDR0 0
228
+ #define EEDR1 1
229
+ #define EEDR2 2
230
+ #define EEDR3 3
231
+ #define EEDR4 4
232
+ #define EEDR5 5
233
+ #define EEDR6 6
234
+ #define EEDR7 7
235
+
236
+ #define EEAR _SFR_IO16(0x21)
237
+
238
+ #define EEARL _SFR_IO8(0x21)
239
+ #define EEAR0 0
240
+ #define EEAR1 1
241
+ #define EEAR2 2
242
+ #define EEAR3 3
243
+ #define EEAR4 4
244
+ #define EEAR5 5
245
+ #define EEAR6 6
246
+ #define EEAR7 7
247
+
248
+ #define EEARH _SFR_IO8(0x22)
249
+ #define EEAR8 0
250
+ #define EEAR9 1
251
+ #define EEAR10 2
252
+
253
+ #define GTCCR _SFR_IO8(0x23)
254
+ #define PSR10 0
255
+ #define PSRSYNC 0
256
+ #define ICPSEL1 6
257
+ #define TSM 7
258
+
259
+ #define TCCR0A _SFR_IO8(0x24)
260
+ #define WGM00 0
261
+ #define WGM01 1
262
+ #define COM0B0 4
263
+ #define COM0B1 5
264
+ #define COM0A0 6
265
+ #define COM0A1 7
266
+
267
+ #define TCCR0B _SFR_IO8(0x25)
268
+ #define CS00 0
269
+ #define CS01 1
270
+ #define CS02 2
271
+ #define WGM02 3
272
+ #define FOC0B 6
273
+ #define FOC0A 7
274
+
275
+ #define TCNT0 _SFR_IO8(0x26)
276
+ #define TCNT0_0 0
277
+ #define TCNT0_1 1
278
+ #define TCNT0_2 2
279
+ #define TCNT0_3 3
280
+ #define TCNT0_4 4
281
+ #define TCNT0_5 5
282
+ #define TCNT0_6 6
283
+ #define TCNT0_7 7
284
+
285
+ #define OCR0A _SFR_IO8(0x27)
286
+ #define OCR0A_0 0
287
+ #define OCR0A_1 1
288
+ #define OCR0A_2 2
289
+ #define OCR0A_3 3
290
+ #define OCR0A_4 4
291
+ #define OCR0A_5 5
292
+ #define OCR0A_6 6
293
+ #define OCR0A_7 7
294
+
295
+ #define OCR0B _SFR_IO8(0x28)
296
+ #define OCR0B_0 0
297
+ #define OCR0B_1 1
298
+ #define OCR0B_2 2
299
+ #define OCR0B_3 3
300
+ #define OCR0B_4 4
301
+ #define OCR0B_5 5
302
+ #define OCR0B_6 6
303
+ #define OCR0B_7 7
304
+
305
+ #define PLLCSR _SFR_IO8(0x29)
306
+ #define PLOCK 0
307
+ #define PLLE 1
308
+ #define PLLF 2
309
+
310
+ #define SPCR _SFR_IO8(0x2C)
311
+ #define SPR0 0
312
+ #define SPR1 1
313
+ #define CPHA 2
314
+ #define CPOL 3
315
+ #define MSTR 4
316
+ #define DORD 5
317
+ #define SPE 6
318
+ #define SPIE 7
319
+
320
+ #define SPSR _SFR_IO8(0x2D)
321
+ #define SPI2X 0
322
+ #define WCOL 6
323
+ #define SPIF 7
324
+
325
+ #define SPDR _SFR_IO8(0x2E)
326
+ #define SPDR0 0
327
+ #define SPDR1 1
328
+ #define SPDR2 2
329
+ #define SPDR3 3
330
+ #define SPDR4 4
331
+ #define SPDR5 5
332
+ #define SPDR6 6
333
+ #define SPDR7 7
334
+
335
+ #define ACSR _SFR_IO8(0x30)
336
+ #define AC0O 0
337
+ #define AC1O 1
338
+ #define AC2O 2
339
+ #define AC3O 3
340
+ #define AC0IF 4
341
+ #define AC1IF 5
342
+ #define AC2IF 6
343
+ #define AC3IF 7
344
+
345
+ #define DWDR _SFR_IO8(0x31)
346
+
347
+ #define SMCR _SFR_IO8(0x33)
348
+ #define SE 0
349
+ #define SM0 1
350
+ #define SM1 2
351
+ #define SM2 3
352
+
353
+ #define MCUSR _SFR_IO8(0x34)
354
+ #define PORF 0
355
+ #define EXTRF 1
356
+ #define BORF 2
357
+ #define WDRF 3
358
+
359
+ #define MCUCR _SFR_IO8(0x35)
360
+ #define IVCE 0
361
+ #define IVSEL 1
362
+ #define PUD 4
363
+ #define SPIPS 7
364
+
365
+ #define SPMCSR _SFR_IO8(0x37)
366
+ #define SPMEN 0
367
+ #define PGERS 1
368
+ #define PGWRT 2
369
+ #define BLBSET 3
370
+ #define RWWSRE 4
371
+ #define SIGRD 5
372
+ #define RWWSB 6
373
+ #define SPMIE 7
374
+
375
+ #define WDTCSR _SFR_MEM8(0x60)
376
+ #define WDP0 0
377
+ #define WDP1 1
378
+ #define WDP2 2
379
+ #define WDE 3
380
+ #define WDCE 4
381
+ #define WDP3 5
382
+ #define WDIE 6
383
+ #define WDIF 7
384
+
385
+ #define CLKPR _SFR_MEM8(0x61)
386
+ #define CLKPS0 0
387
+ #define CLKPS1 1
388
+ #define CLKPS2 2
389
+ #define CLKPS3 3
390
+ #define CLKPCE 7
391
+
392
+ #define PRR _SFR_MEM8(0x64)
393
+ #define PRADC 0
394
+ #define PRLIN 1
395
+ #define PRSPI 2
396
+ #define PRTIM0 3
397
+ #define PRTIM1 4
398
+ #define PRPSC 5
399
+ #define PRCAN 6
400
+
401
+ #define __AVR_HAVE_PRR ((1<<PRADC)|(1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC)|(1<<PRCAN))
402
+ #define __AVR_HAVE_PRR_PRADC
403
+ #define __AVR_HAVE_PRR_PRLIN
404
+ #define __AVR_HAVE_PRR_PRSPI
405
+ #define __AVR_HAVE_PRR_PRTIM0
406
+ #define __AVR_HAVE_PRR_PRTIM1
407
+ #define __AVR_HAVE_PRR_PRPSC
408
+ #define __AVR_HAVE_PRR_PRCAN
409
+
410
+ #define OSCCAL _SFR_MEM8(0x66)
411
+ #define CAL0 0
412
+ #define CAL1 1
413
+ #define CAL2 2
414
+ #define CAL3 3
415
+ #define CAL4 4
416
+ #define CAL5 5
417
+ #define CAL6 6
418
+
419
+ #define PCICR _SFR_MEM8(0x68)
420
+ #define PCIE0 0
421
+ #define PCIE1 1
422
+ #define PCIE2 2
423
+ #define PCIE3 3
424
+
425
+ #define EICRA _SFR_MEM8(0x69)
426
+ #define ISC00 0
427
+ #define ISC01 1
428
+ #define ISC10 2
429
+ #define ISC11 3
430
+ #define ISC20 4
431
+ #define ISC21 5
432
+ #define ISC30 6
433
+ #define ISC31 7
434
+
435
+ #define PCMSK0 _SFR_MEM8(0x6A)
436
+ #define PCINT0 0
437
+ #define PCINT1 1
438
+ #define PCINT2 2
439
+ #define PCINT3 3
440
+ #define PCINT4 4
441
+ #define PCINT5 5
442
+ #define PCINT6 6
443
+ #define PCINT7 7
444
+
445
+ #define PCMSK1 _SFR_MEM8(0x6B)
446
+ #define PCINT8 0
447
+ #define PCINT9 1
448
+ #define PCINT10 2
449
+ #define PCINT11 3
450
+ #define PCINT12 4
451
+ #define PCINT13 5
452
+ #define PCINT14 6
453
+ #define PCINT15 7
454
+
455
+ #define PCMSK2 _SFR_MEM8(0x6C)
456
+ #define PCINT16 0
457
+ #define PCINT17 1
458
+ #define PCINT18 2
459
+ #define PCINT19 3
460
+ #define PCINT20 4
461
+ #define PCINT21 5
462
+ #define PCINT22 6
463
+ #define PCINT23 7
464
+
465
+ #define PCMSK3 _SFR_MEM8(0x6D)
466
+ #define PCINT24 0
467
+ #define PCINT25 1
468
+ #define PCINT26 2
469
+
470
+ #define TIMSK0 _SFR_MEM8(0x6E)
471
+ #define TOIE0 0
472
+ #define OCIE0A 1
473
+ #define OCIE0B 2
474
+
475
+ #define TIMSK1 _SFR_MEM8(0x6F)
476
+ #define TOIE1 0
477
+ #define OCIE1A 1
478
+ #define OCIE1B 2
479
+ #define ICIE1 5
480
+
481
+ #define AMP0CSR _SFR_MEM8(0x75)
482
+ #define AMP0TS0 0
483
+ #define AMP0TS1 1
484
+ #define AMP0TS2 2
485
+ #define AMPCMP0 3
486
+ #define AMP0G0 4
487
+ #define AMP0G1 5
488
+ #define AMP0IS 6
489
+ #define AMP0EN 7
490
+
491
+ #define AMP1CSR _SFR_MEM8(0x76)
492
+ #define AMP1TS0 0
493
+ #define AMP1TS1 1
494
+ #define AMP1TS2 2
495
+ #define AMPCMP1 3
496
+ #define AMP1G0 4
497
+ #define AMP1G1 5
498
+ #define AMP1IS 6
499
+ #define AMP1EN 7
500
+
501
+ #define AMP2CSR _SFR_MEM8(0x77)
502
+ #define AMP2TS0 0
503
+ #define AMP2TS1 1
504
+ #define AMP2TS2 2
505
+ #define AMPCMP2 3
506
+ #define AMP2G0 4
507
+ #define AMP2G1 5
508
+ #define AMP2IS 6
509
+ #define AMP2EN 7
510
+
511
+ #ifndef __ASSEMBLER__
512
+ #define ADC _SFR_MEM16(0x78)
513
+ #endif
514
+ #define ADCW _SFR_MEM16(0x78)
515
+
516
+ #define ADCL _SFR_MEM8(0x78)
517
+ #define ADCL0 0
518
+ #define ADCL1 1
519
+ #define ADCL2 2
520
+ #define ADCL3 3
521
+ #define ADCL4 4
522
+ #define ADCL5 5
523
+ #define ADCL6 6
524
+ #define ADCL7 7
525
+
526
+ #define ADCH _SFR_MEM8(0x79)
527
+ #define ADCH0 0
528
+ #define ADCH1 1
529
+ #define ADCH2 2
530
+ #define ADCH3 3
531
+ #define ADCH4 4
532
+ #define ADCH5 5
533
+ #define ADCH6 6
534
+ #define ADCH7 7
535
+
536
+ #define ADCSRA _SFR_MEM8(0x7A)
537
+ #define ADPS0 0
538
+ #define ADPS1 1
539
+ #define ADPS2 2
540
+ #define ADIE 3
541
+ #define ADIF 4
542
+ #define ADATE 5
543
+ #define ADSC 6
544
+ #define ADEN 7
545
+
546
+ #define ADCSRB _SFR_MEM8(0x7B)
547
+ #define ADTS0 0
548
+ #define ADTS1 1
549
+ #define ADTS2 2
550
+ #define ADTS3 3
551
+ #define AREFEN 5
552
+ #define ISRCEN 6
553
+ #define ADHSM 7
554
+
555
+ #define ADMUX _SFR_MEM8(0x7C)
556
+ #define MUX0 0
557
+ #define MUX1 1
558
+ #define MUX2 2
559
+ #define MUX3 3
560
+ #define MUX4 4
561
+ #define ADLAR 5
562
+ #define REFS0 6
563
+ #define REFS1 7
564
+
565
+ #define DIDR0 _SFR_MEM8(0x7E)
566
+ #define ADC0D 0
567
+ #define ADC1D 1
568
+ #define ADC2D 2
569
+ #define ADC3D 3
570
+ #define ADC4D 4
571
+ #define ADC5D 5
572
+ #define ADC6D 6
573
+ #define ADC7D 7
574
+
575
+ #define DIDR1 _SFR_MEM8(0x7F)
576
+ #define ADC8D 0
577
+ #define ADC9D 1
578
+ #define ADC10D 2
579
+ #define AMP0ND 3
580
+ #define AMP0PD 4
581
+ #define ACMP0D 5
582
+ #define AMP2PD 6
583
+
584
+ #define TCCR1A _SFR_MEM8(0x80)
585
+ #define WGM10 0
586
+ #define WGM11 1
587
+ #define COM1B0 4
588
+ #define COM1B1 5
589
+ #define COM1A0 6
590
+ #define COM1A1 7
591
+
592
+ #define TCCR1B _SFR_MEM8(0x81)
593
+ #define CS10 0
594
+ #define CS11 1
595
+ #define CS12 2
596
+ #define WGM12 3
597
+ #define WGM13 4
598
+ #define ICES1 6
599
+ #define ICNC1 7
600
+
601
+ #define TCCR1C _SFR_MEM8(0x82)
602
+ #define FOC1B 6
603
+ #define FOC1A 7
604
+
605
+ #define TCNT1 _SFR_MEM16(0x84)
606
+
607
+ #define TCNT1L _SFR_MEM8(0x84)
608
+ #define TCNT1L0 0
609
+ #define TCNT1L1 1
610
+ #define TCNT1L2 2
611
+ #define TCNT1L3 3
612
+ #define TCNT1L4 4
613
+ #define TCNT1L5 5
614
+ #define TCNT1L6 6
615
+ #define TCNT1L7 7
616
+
617
+ #define TCNT1H _SFR_MEM8(0x85)
618
+ #define TCNT1H0 0
619
+ #define TCNT1H1 1
620
+ #define TCNT1H2 2
621
+ #define TCNT1H3 3
622
+ #define TCNT1H4 4
623
+ #define TCNT1H5 5
624
+ #define TCNT1H6 6
625
+ #define TCNT1H7 7
626
+
627
+ #define ICR1 _SFR_MEM16(0x86)
628
+
629
+ #define ICR1L _SFR_MEM8(0x86)
630
+ #define ICR1L0 0
631
+ #define ICR1L1 1
632
+ #define ICR1L2 2
633
+ #define ICR1L3 3
634
+ #define ICR1L4 4
635
+ #define ICR1L5 5
636
+ #define ICR1L6 6
637
+ #define ICR1L7 7
638
+
639
+ #define ICR1H _SFR_MEM8(0x87)
640
+ #define ICR1H0 0
641
+ #define ICR1H1 1
642
+ #define ICR1H2 2
643
+ #define ICR1H3 3
644
+ #define ICR1H4 4
645
+ #define ICR1H5 5
646
+ #define ICR1H6 6
647
+ #define ICR1H7 7
648
+
649
+ #define OCR1A _SFR_MEM16(0x88)
650
+
651
+ #define OCR1AL _SFR_MEM8(0x88)
652
+ #define OCR1AL0 0
653
+ #define OCR1AL1 1
654
+ #define OCR1AL2 2
655
+ #define OCR1AL3 3
656
+ #define OCR1AL4 4
657
+ #define OCR1AL5 5
658
+ #define OCR1AL6 6
659
+ #define OCR1AL7 7
660
+
661
+ #define OCR1AH _SFR_MEM8(0x89)
662
+ #define OCR1AH0 0
663
+ #define OCR1AH1 1
664
+ #define OCR1AH2 2
665
+ #define OCR1AH3 3
666
+ #define OCR1AH4 4
667
+ #define OCR1AH5 5
668
+ #define OCR1AH6 6
669
+ #define OCR1AH7 7
670
+
671
+ #define OCR1B _SFR_MEM16(0x8A)
672
+
673
+ #define OCR1BL _SFR_MEM8(0x8A)
674
+ #define OCR1BL0 0
675
+ #define OCR1BL1 1
676
+ #define OCR1BL2 2
677
+ #define OCR1BL3 3
678
+ #define OCR1BL4 4
679
+ #define OCR1BL5 5
680
+ #define OCR1BL6 6
681
+ #define OCR1BL7 7
682
+
683
+ #define OCR1BH _SFR_MEM8(0x8B)
684
+ #define OCR1BH0 0
685
+ #define OCR1BH1 1
686
+ #define OCR1BH2 2
687
+ #define OCR1BH3 3
688
+ #define OCR1BH4 4
689
+ #define OCR1BH5 5
690
+ #define OCR1BH6 6
691
+ #define OCR1BH7 7
692
+
693
+ #define DACON _SFR_MEM8(0x90)
694
+ #define DAEN 0
695
+ #define DAOE 1
696
+ #define DALA 2
697
+ #define DATS0 4
698
+ #define DATS1 5
699
+ #define DATS2 6
700
+ #define DAATE 7
701
+
702
+ #define DAC _SFR_MEM16(0x91)
703
+
704
+ #define DACL _SFR_MEM8(0x91)
705
+ #define DACL0 0
706
+ #define DACL1 1
707
+ #define DACL2 2
708
+ #define DACL3 3
709
+ #define DACL4 4
710
+ #define DACL5 5
711
+ #define DACL6 6
712
+ #define DACL7 7
713
+
714
+ #define DACH _SFR_MEM8(0x92)
715
+ #define DACH0 0
716
+ #define DACH1 1
717
+ #define DACH2 2
718
+ #define DACH3 3
719
+ #define DACH4 4
720
+ #define DACH5 5
721
+ #define DACH6 6
722
+ #define DACH7 7
723
+
724
+ #define AC0CON _SFR_MEM8(0x94)
725
+ #define AC0M0 0
726
+ #define AC0M1 1
727
+ #define AC0M2 2
728
+ #define ACCKSEL 3
729
+ #define AC0IS0 4
730
+ #define AC0IS1 5
731
+ #define AC0IE 6
732
+ #define AC0EN 7
733
+
734
+ #define AC1CON _SFR_MEM8(0x95)
735
+ #define AC1M0 0
736
+ #define AC1M1 1
737
+ #define AC1M2 2
738
+ #define AC1ICE 3
739
+ #define AC1IS0 4
740
+ #define AC1IS1 5
741
+ #define AC1IE 6
742
+ #define AC1EN 7
743
+
744
+ #define AC2CON _SFR_MEM8(0x96)
745
+ #define AC2M0 0
746
+ #define AC2M1 1
747
+ #define AC2M2 2
748
+ #define AC2IS0 4
749
+ #define AC2IS1 5
750
+ #define AC2IE 6
751
+ #define AC2EN 7
752
+
753
+ #define AC3CON _SFR_MEM8(0x97)
754
+ #define AC3M0 0
755
+ #define AC3M1 1
756
+ #define AC3M2 2
757
+ #define AC3IS0 4
758
+ #define AC3IS1 5
759
+ #define AC3IE 6
760
+ #define AC3EN 7
761
+
762
+ #define LINCR _SFR_MEM8(0xC8)
763
+ #define LCMD0 0
764
+ #define LCMD1 1
765
+ #define LCMD2 2
766
+ #define LENA 3
767
+ #define LCONF0 4
768
+ #define LCONF1 5
769
+ #define LIN13 6
770
+ #define LSWRES 7
771
+
772
+ #define LINSIR _SFR_MEM8(0xC9)
773
+ #define LRXOK 0
774
+ #define LTXOK 1
775
+ #define LIDOK 2
776
+ #define LERR 3
777
+ #define LBUSY 4
778
+ #define LIDST0 5
779
+ #define LIDST1 6
780
+ #define LIDST2 7
781
+
782
+ #define LINENIR _SFR_MEM8(0xCA)
783
+ #define LENRXOK 0
784
+ #define LENTXOK 1
785
+ #define LENIDOK 2
786
+ #define LENERR 3
787
+
788
+ #define LINERR _SFR_MEM8(0xCB)
789
+ #define LBERR 0
790
+ #define LCERR 1
791
+ #define LPERR 2
792
+ #define LSERR 3
793
+ #define LFERR 4
794
+ #define LOVERR 5
795
+ #define LTOERR 6
796
+ #define LABORT 7
797
+
798
+ #define LINBTR _SFR_MEM8(0xCC)
799
+ #define LBT0 0
800
+ #define LBT1 1
801
+ #define LBT2 2
802
+ #define LBT3 3
803
+ #define LBT4 4
804
+ #define LBT5 5
805
+ #define LDISR 7
806
+
807
+ #define LINBRR _SFR_MEM16(0xCD)
808
+
809
+ #define LINBRRL _SFR_MEM8(0xCD)
810
+ #define LDIV0 0
811
+ #define LDIV1 1
812
+ #define LDIV2 2
813
+ #define LDIV3 3
814
+ #define LDIV4 4
815
+ #define LDIV5 5
816
+ #define LDIV6 6
817
+ #define LDIV7 7
818
+
819
+ #define LINBRRH _SFR_MEM8(0xCE)
820
+ #define LDIV8 0
821
+ #define LDIV9 1
822
+ #define LDIV10 2
823
+ #define LDIV11 3
824
+
825
+ #define LINDLR _SFR_MEM8(0xCF)
826
+ #define LRXDL0 0
827
+ #define LRXDL1 1
828
+ #define LRXDL2 2
829
+ #define LRXDL3 3
830
+ #define LTXDL0 4
831
+ #define LTXDL1 5
832
+ #define LTXDL2 6
833
+ #define LTXDL3 7
834
+
835
+ #define LINIDR _SFR_MEM8(0xD0)
836
+ #define LID0 0
837
+ #define LID1 1
838
+ #define LID2 2
839
+ #define LID3 3
840
+ #define LID4 4
841
+ #define LID5 5
842
+ #define LP0 6
843
+ #define LP1 7
844
+
845
+ #define LINSEL _SFR_MEM8(0xD1)
846
+ #define LINDX0 0
847
+ #define LINDX1 1
848
+ #define LINDX2 2
849
+ #define LAINC 3
850
+
851
+ #define LINDAT _SFR_MEM8(0xD2)
852
+ #define LDATA0 0
853
+ #define LDATA1 1
854
+ #define LDATA2 2
855
+ #define LDATA3 3
856
+ #define LDATA4 4
857
+ #define LDATA5 5
858
+ #define LDATA6 6
859
+ #define LDATA7 7
860
+
861
+ #define CANGCON _SFR_MEM8(0xD8)
862
+ #define SWRES 0
863
+ #define ENASTB 1
864
+ #define TEST 2
865
+ #define LISTEN 3
866
+ #define SYNTTC 4
867
+ #define TTC 5
868
+ #define OVRQ 6
869
+ #define ABRQ 7
870
+
871
+ #define CANGSTA _SFR_MEM8(0xD9)
872
+ #define ERRP 0
873
+ #define BOFF 1
874
+ #define ENFG 2
875
+ #define RXBSY 3
876
+ #define TXBSY 4
877
+ #define OVFG 6
878
+
879
+ #define CANGIT _SFR_MEM8(0xDA)
880
+ #define AERG 0
881
+ #define FERG 1
882
+ #define CERG 2
883
+ #define SERG 3
884
+ #define BXOK 4
885
+ #define OVRTIM 5
886
+ #define BOFFIT 6
887
+ #define CANIT 7
888
+
889
+ #define CANGIE _SFR_MEM8(0xDB)
890
+ #define ENOVRT 0
891
+ #define ENERG 1
892
+ #define ENBX 2
893
+ #define ENERR 3
894
+ #define ENTX 4
895
+ #define ENRX 5
896
+ #define ENBOFF 6
897
+ #define ENIT 7
898
+
899
+ #define CANEN2 _SFR_MEM8(0xDC)
900
+ #define ENMOB0 0
901
+ #define ENMOB1 1
902
+ #define ENMOB2 2
903
+ #define ENMOB3 3
904
+ #define ENMOB4 4
905
+ #define ENMOB5 5
906
+
907
+ #define CANEN1 _SFR_MEM8(0xDD)
908
+
909
+ #define CANIE2 _SFR_MEM8(0xDE)
910
+ #define IEMOB0 0
911
+ #define IEMOB1 1
912
+ #define IEMOB2 2
913
+ #define IEMOB3 3
914
+ #define IEMOB4 4
915
+ #define IEMOB5 5
916
+
917
+ #define CANIE1 _SFR_MEM8(0xDF)
918
+
919
+ /* RegDef: CAN Status Interrupt MOb Register*/
920
+ #define CANSIT _SFR_MEM16(0xE0)
921
+
922
+ #define CANSIT2 _SFR_MEM8(0xE0)
923
+ #define SIT0 0
924
+ #define SIT1 1
925
+ #define SIT2 2
926
+ #define SIT3 3
927
+ #define SIT4 4
928
+ #define SIT5 5
929
+
930
+ #define CANSIT1 _SFR_MEM8(0xE1)
931
+
932
+ #define CANBT1 _SFR_MEM8(0xE2)
933
+ #define BRP0 1
934
+ #define BRP1 2
935
+ #define BRP2 3
936
+ #define BRP3 4
937
+ #define BRP4 5
938
+ #define BRP5 6
939
+
940
+ #define CANBT2 _SFR_MEM8(0xE3)
941
+ #define PRS0 1
942
+ #define PRS1 2
943
+ #define PRS2 3
944
+ #define SJW0 5
945
+ #define SJW1 6
946
+
947
+ #define CANBT3 _SFR_MEM8(0xE4)
948
+ #define SMP 0
949
+ #define PHS10 1
950
+ #define PHS11 2
951
+ #define PHS12 3
952
+ #define PHS20 4
953
+ #define PHS21 5
954
+ #define PHS22 6
955
+
956
+ #define CANTCON _SFR_MEM8(0xE5)
957
+ #define TPRSC0 0
958
+ #define TPRSC1 1
959
+ #define TPRSC2 2
960
+ #define TPRSC3 3
961
+ #define TPRSC4 4
962
+ #define TPRSC5 5
963
+ #define TPRSC6 6
964
+ #define TPRSC7 7
965
+
966
+ #define CANTIM _SFR_MEM16(0xE6)
967
+
968
+ #define CANTIML _SFR_MEM8(0xE6)
969
+ #define CANTIM0 0
970
+ #define CANTIM1 1
971
+ #define CANTIM2 2
972
+ #define CANTIM3 3
973
+ #define CANTIM4 4
974
+ #define CANTIM5 5
975
+ #define CANTIM6 6
976
+ #define CANTIM7 7
977
+
978
+ #define CANTIMH _SFR_MEM8(0xE7)
979
+ #define CANTIM8 0
980
+ #define CANTIM9 1
981
+ #define CANTIM10 2
982
+ #define CANTIM11 3
983
+ #define CANTIM12 4
984
+ #define CANTIM13 5
985
+ #define CANTIM14 6
986
+ #define CANTIM15 7
987
+
988
+ #define CANTTC _SFR_MEM16(0xE8)
989
+
990
+ #define CANTTCL _SFR_MEM8(0xE8)
991
+ #define TIMTCC0 0
992
+ #define TIMTCC1 1
993
+ #define TIMTCC2 2
994
+ #define TIMTCC3 3
995
+ #define TIMTCC4 4
996
+ #define TIMTCC5 5
997
+ #define TIMTCC6 6
998
+ #define TIMTCC7 7
999
+
1000
+ #define CANTTCH _SFR_MEM8(0xE9)
1001
+ #define TIMTCC8 0
1002
+ #define TIMTCC9 1
1003
+ #define TIMTCC10 2
1004
+ #define TIMTCC11 3
1005
+ #define TIMTCC12 4
1006
+ #define TIMTCC13 5
1007
+ #define TIMTCC14 6
1008
+ #define TIMTCC15 7
1009
+
1010
+ #define CANTEC _SFR_MEM8(0xEA)
1011
+ #define TEC0 0
1012
+ #define TEC1 1
1013
+ #define TEC2 2
1014
+ #define TEC3 3
1015
+ #define TEC4 4
1016
+ #define TEC5 5
1017
+ #define TEC6 6
1018
+ #define TEC7 7
1019
+
1020
+ #define CANREC _SFR_MEM8(0xEB)
1021
+ #define REC0 0
1022
+ #define REC1 1
1023
+ #define REC2 2
1024
+ #define REC3 3
1025
+ #define REC4 4
1026
+ #define REC5 5
1027
+ #define REC6 6
1028
+ #define REC7 7
1029
+
1030
+ #define CANHPMOB _SFR_MEM8(0xEC)
1031
+ #define CGP0 0
1032
+ #define CGP1 1
1033
+ #define CGP2 2
1034
+ #define CGP3 3
1035
+ #define HPMOB0 4
1036
+ #define HPMOB1 5
1037
+ #define HPMOB2 6
1038
+ #define HPMOB3 7
1039
+
1040
+ #define CANPAGE _SFR_MEM8(0xED)
1041
+ #define INDX0 0
1042
+ #define INDX1 1
1043
+ #define INDX2 2
1044
+ #define AINC 3
1045
+ #define MOBNB0 4
1046
+ #define MOBNB1 5
1047
+ #define MOBNB2 6
1048
+ #define MOBNB3 7
1049
+
1050
+ #define CANSTMOB _SFR_MEM8(0xEE)
1051
+ #define AERR 0
1052
+ #define FERR 1
1053
+ #define CERR 2
1054
+ #define SERR 3
1055
+ #define BERR 4
1056
+ #define RXOK 5
1057
+ #define TXOK 6
1058
+ #define DLCW 7
1059
+
1060
+ #define CANCDMOB _SFR_MEM8(0xEF)
1061
+ #define DLC0 0
1062
+ #define DLC1 1
1063
+ #define DLC2 2
1064
+ #define DLC3 3
1065
+ #define IDE 4
1066
+ #define RPLV 5
1067
+ #define CONMOB0 6
1068
+ #define CONMOB1 7
1069
+
1070
+ /* RegDef: CAN Identifier Tag Registers*/
1071
+ #define CANIDT _SFR_MEM32(0xF0)
1072
+
1073
+ #define CANIDT4 _SFR_MEM8(0xF0)
1074
+ #define RB0TAG 0
1075
+ #define RB1TAG 1
1076
+ #define RTRTAG 2
1077
+ #define IDT0 3
1078
+ #define IDT1 4
1079
+ #define IDT2 5
1080
+ #define IDT3 6
1081
+ #define IDT4 7
1082
+
1083
+ #define CANIDT3 _SFR_MEM8(0xF1)
1084
+ #define IDT5 0
1085
+ #define IDT6 1
1086
+ #define IDT7 2
1087
+ #define IDT8 3
1088
+ #define IDT9 4
1089
+ #define IDT10 5
1090
+ #define IDT11 6
1091
+ #define IDT12 7
1092
+
1093
+ #define CANIDT2 _SFR_MEM8(0xF2)
1094
+ #define IDT13 0
1095
+ #define IDT14 1
1096
+ #define IDT15 2
1097
+ #define IDT16 3
1098
+ #define IDT17 4
1099
+ #define IDT18 5
1100
+ #define IDT19 6
1101
+ #define IDT20 7
1102
+
1103
+ #define CANIDT1 _SFR_MEM8(0xF3)
1104
+ #define IDT21 0
1105
+ #define IDT22 1
1106
+ #define IDT23 2
1107
+ #define IDT24 3
1108
+ #define IDT25 4
1109
+ #define IDT26 5
1110
+ #define IDT27 6
1111
+ #define IDT28 7
1112
+
1113
+ /* RegDef: CAN Identifier Mask Registers */
1114
+ #define CANIDM _SFR_MEM32(0xF4)
1115
+
1116
+ #define CANIDM4 _SFR_MEM8(0xF4)
1117
+ #define IDEMSK 0
1118
+ #define RTRMSK 2
1119
+ #define IDMSK0 3
1120
+ #define IDMSK1 4
1121
+ #define IDMSK2 5
1122
+ #define IDMSK3 6
1123
+ #define IDMSK4 7
1124
+
1125
+ #define CANIDM3 _SFR_MEM8(0xF5)
1126
+ #define IDMSK5 0
1127
+ #define IDMSK6 1
1128
+ #define IDMSK7 2
1129
+ #define IDMSK8 3
1130
+ #define IDMSK9 4
1131
+ #define IDMSK10 5
1132
+ #define IDMSK11 6
1133
+ #define IDMSK12 7
1134
+
1135
+ #define CANIDM2 _SFR_MEM8(0xF6)
1136
+ #define IDMSK13 0
1137
+ #define IDMSK14 1
1138
+ #define IDMSK15 2
1139
+ #define IDMSK16 3
1140
+ #define IDMSK17 4
1141
+ #define IDMSK18 5
1142
+ #define IDMSK19 6
1143
+ #define IDMSK20 7
1144
+
1145
+ #define CANIDM1 _SFR_MEM8(0xF7)
1146
+ #define IDMSK21 0
1147
+ #define IDMSK22 1
1148
+ #define IDMSK23 2
1149
+ #define IDMSK24 3
1150
+ #define IDMSK25 4
1151
+ #define IDMSK26 5
1152
+ #define IDMSK27 6
1153
+ #define IDMSK28 7
1154
+
1155
+ #define CANSTM _SFR_MEM16(0xF8)
1156
+
1157
+ #define CANSTML _SFR_MEM8(0xF8)
1158
+ #define TIMSTM0 0
1159
+ #define TIMSTM1 1
1160
+ #define TIMSTM2 2
1161
+ #define TIMSTM3 3
1162
+ #define TIMSTM4 4
1163
+ #define TIMSTM5 5
1164
+ #define TIMSTM6 6
1165
+ #define TIMSTM7 7
1166
+
1167
+ #define CANSTMH _SFR_MEM8(0xF9)
1168
+ #define TIMSTM8 0
1169
+ #define TIMSTM9 1
1170
+ #define TIMSTM10 2
1171
+ #define TIMSTM11 3
1172
+ #define TIMSTM12 4
1173
+ #define TIMSTM13 5
1174
+ #define TIMSTM14 6
1175
+ #define TIMSTM15 7
1176
+
1177
+ #define CANMSG _SFR_MEM8(0xFA)
1178
+ #define MSG0 0
1179
+ #define MSG1 1
1180
+ #define MSG2 2
1181
+ #define MSG3 3
1182
+ #define MSG4 4
1183
+ #define MSG5 5
1184
+ #define MSG6 6
1185
+ #define MSG7 7
1186
+
1187
+
1188
+ /* Interrupt vectors */
1189
+ /* Vector 0 is the reset vector */
1190
+ #define ANACOMP0_vect_num 1
1191
+ #define ANACOMP0_vect _VECTOR(1) /* Analog Comparator 0 */
1192
+ #define ANACOMP1_vect_num 2
1193
+ #define ANACOMP1_vect _VECTOR(2) /* Analog Comparator 1 */
1194
+ #define ANACOMP2_vect_num 3
1195
+ #define ANACOMP2_vect _VECTOR(3) /* Analog Comparator 2 */
1196
+ #define ANACOMP3_vect_num 4
1197
+ #define ANACOMP3_vect _VECTOR(4) /* Analog Comparator 3 */
1198
+ #define PSC_FAULT_vect_num 5
1199
+ #define PSC_FAULT_vect _VECTOR(5) /* PSC Fault */
1200
+ #define PSC_EC_vect_num 6
1201
+ #define PSC_EC_vect _VECTOR(6) /* PSC End of Cycle */
1202
+ #define INT0_vect_num 7
1203
+ #define INT0_vect _VECTOR(7) /* External Interrupt Request 0 */
1204
+ #define INT1_vect_num 8
1205
+ #define INT1_vect _VECTOR(8) /* External Interrupt Request 1 */
1206
+ #define INT2_vect_num 9
1207
+ #define INT2_vect _VECTOR(9) /* External Interrupt Request 2 */
1208
+ #define INT3_vect_num 10
1209
+ #define INT3_vect _VECTOR(10) /* External Interrupt Request 3 */
1210
+ #define TIMER1_CAPT_vect_num 11
1211
+ #define TIMER1_CAPT_vect _VECTOR(11) /* Timer/Counter1 Capture Event */
1212
+ #define TIMER1_COMPA_vect_num 12
1213
+ #define TIMER1_COMPA_vect _VECTOR(12) /* Timer/Counter1 Compare Match A */
1214
+ #define TIMER1_COMPB_vect_num 13
1215
+ #define TIMER1_COMPB_vect _VECTOR(13) /* Timer/Counter1 Compare Match B */
1216
+ #define TIMER1_OVF_vect_num 14
1217
+ #define TIMER1_OVF_vect _VECTOR(14) /* Timer1/Counter1 Overflow */
1218
+ #define TIMER0_COMPA_vect_num 15
1219
+ #define TIMER0_COMPA_vect _VECTOR(15) /* Timer/Counter0 Compare Match A */
1220
+ #define TIMER0_COMPB_vect_num 16
1221
+ #define TIMER0_COMPB_vect _VECTOR(16) /* Timer/Counter0 Compare Match B */
1222
+ #define TIMER0_OVF_vect_num 17
1223
+ #define TIMER0_OVF_vect _VECTOR(17) /* Timer/Counter0 Overflow */
1224
+ #define CAN_INT_vect_num 18
1225
+ #define CAN_INT_vect _VECTOR(18) /* CAN MOB, Burst, General Errors */
1226
+ #define CAN_TOVF_vect_num 19
1227
+ #define CAN_TOVF_vect _VECTOR(19) /* CAN Timer Overflow */
1228
+ #define LIN_TC_vect_num 20
1229
+ #define LIN_TC_vect _VECTOR(20) /* LIN Transfer Complete */
1230
+ #define LIN_ERR_vect_num 21
1231
+ #define LIN_ERR_vect _VECTOR(21) /* LIN Error */
1232
+ #define PCINT0_vect_num 22
1233
+ #define PCINT0_vect _VECTOR(22) /* Pin Change Interrupt Request 0 */
1234
+ #define PCINT1_vect_num 23
1235
+ #define PCINT1_vect _VECTOR(23) /* Pin Change Interrupt Request 1 */
1236
+ #define PCINT2_vect_num 24
1237
+ #define PCINT2_vect _VECTOR(24) /* Pin Change Interrupt Request 2 */
1238
+ #define PCINT3_vect_num 25
1239
+ #define PCINT3_vect _VECTOR(25) /* Pin Change Interrupt Request 3 */
1240
+ #define SPI_STC_vect_num 26
1241
+ #define SPI_STC_vect _VECTOR(26) /* SPI Serial Transfer Complete */
1242
+ #define ADC_vect_num 27
1243
+ #define ADC_vect _VECTOR(27) /* ADC Conversion Complete */
1244
+ #define WDT_vect_num 28
1245
+ #define WDT_vect _VECTOR(28) /* Watchdog Time-Out Interrupt */
1246
+ #define EE_READY_vect_num 29
1247
+ #define EE_READY_vect _VECTOR(29) /* EEPROM Ready */
1248
+ #define SPM_READY_vect_num 30
1249
+ #define SPM_READY_vect _VECTOR(30) /* Store Program Memory Read */
1250
+
1251
+ #define _VECTOR_SIZE 4 /* Size of individual vector. */
1252
+ #define _VECTORS_SIZE (31 * _VECTOR_SIZE)
1253
+
1254
+
1255
+ /* Constants */
1256
+ #define SPM_PAGESIZE (256)
1257
+ #define RAMSTART (0x0100)
1258
+ #define RAMSIZE (4096)
1259
+ #define RAMEND (RAMSTART + RAMSIZE - 1)
1260
+ #define XRAMSTART (0x0)
1261
+ #define XRAMSIZE (0)
1262
+ #define XRAMEND (RAMEND)
1263
+ #define E2END (0x7FF)
1264
+ #define E2PAGESIZE (8)
1265
+ #define FLASHEND (0xFFFF)
1266
+
1267
+
1268
+ /* Fuses */
1269
+ #define FUSE_MEMORY_SIZE 3
1270
+
1271
+ /* Low Fuse Byte */
1272
+ #define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */
1273
+ #define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */
1274
+ #define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */
1275
+ #define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */
1276
+ #define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */
1277
+ #define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */
1278
+ #define FUSE_CKOUT (unsigned char)~_BV(6) /* Oscillator output option */
1279
+ #define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */
1280
+ #define LFUSE_DEFAULT (FUSE_CKDIV8 & FUSE_SUT1 & FUSE_SUT0 & FUSE_CKSEL3 & FUSE_CKSEL2 & FUSE_CKSEL1)
1281
+
1282
+ /* High Fuse Byte */
1283
+ #define FUSE_BOOTRST (unsigned char)~_BV(0) /* Select Reset Vector */
1284
+ #define FUSE_BOOTSZ0 (unsigned char)~_BV(1) /* Select Boot Size */
1285
+ #define FUSE_BOOTSZ1 (unsigned char)~_BV(2) /* Select Boot Size */
1286
+ #define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */
1287
+ #define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog timer always on */
1288
+ #define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */
1289
+ #define FUSE_DWEN (unsigned char)~_BV(6) /* DebugWIRE Enable */
1290
+ #define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External Reset Disable */
1291
+ #define HFUSE_DEFAULT (FUSE_SPIEN & FUSE_BOOTSZ1 & FUSE_BOOTSZ0)
1292
+
1293
+ /* Extended Fuse Byte */
1294
+ #define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector Trigger Level */
1295
+ #define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector Trigger Level */
1296
+ #define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector Trigger Level */
1297
+ #define FUSE_PSCRVB (unsigned char)~_BV(3) /* PSC Outputs xB Reset Value */
1298
+ #define FUSE_PSCRVA (unsigned char)~_BV(4) /* PSC Outputs xA Reset Value */
1299
+ #define FUSE_PSCRB (unsigned char)~_BV(5) /* PSC Reset Behavior */
1300
+ #define EFUSE_DEFAULT (FUSE_BODLEVEL2 & FUSE_BODLEVEL1)
1301
+
1302
+
1303
+ /* Lock Bits */
1304
+ #define __LOCK_BITS_EXIST
1305
+ #define __BOOT_LOCK_BITS_0_EXIST
1306
+ #define __BOOT_LOCK_BITS_1_EXIST
1307
+
1308
+
1309
+ /* Signature */
1310
+ #define SIGNATURE_0 0x1E
1311
+ #define SIGNATURE_1 0x96
1312
+ #define SIGNATURE_2 0x86
1313
+
1314
+
1315
+ #define SLEEP_MODE_IDLE (0x00<<1)
1316
+ #define SLEEP_MODE_ADC (0x01<<1)
1317
+ #define SLEEP_MODE_PWR_DOWN (0x02<<1)
1318
+ #define SLEEP_MODE_STANDBY (0x06<<1)
1319
+
1320
+ #endif /* _AVR_ATmega64C1_H_ */
1321
+