arduino_ci 0.1.3 → 0.1.4

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Files changed (295) hide show
  1. checksums.yaml +4 -4
  2. data/README.md +77 -1
  3. data/cpp/arduino/Arduino.cpp +17 -7
  4. data/cpp/arduino/Arduino.h +151 -5
  5. data/cpp/arduino/ArduinoDefines.h +90 -0
  6. data/cpp/arduino/AvrMath.h +18 -28
  7. data/cpp/arduino/Godmode.cpp +62 -0
  8. data/cpp/arduino/Godmode.h +74 -0
  9. data/cpp/arduino/HardwareSerial.h +81 -0
  10. data/cpp/arduino/Print.h +67 -0
  11. data/cpp/arduino/Stream.h +210 -0
  12. data/cpp/arduino/WCharacter.h +96 -0
  13. data/cpp/arduino/WString.h +164 -0
  14. data/cpp/arduino/binary.h +518 -0
  15. data/cpp/arduino/include/README.md +3 -0
  16. data/cpp/arduino/include/common.h +333 -0
  17. data/cpp/arduino/include/fuse.h +274 -0
  18. data/cpp/arduino/include/io.h +643 -0
  19. data/cpp/arduino/include/io1200.h +274 -0
  20. data/cpp/arduino/include/io2313.h +385 -0
  21. data/cpp/arduino/include/io2323.h +210 -0
  22. data/cpp/arduino/include/io2333.h +461 -0
  23. data/cpp/arduino/include/io2343.h +214 -0
  24. data/cpp/arduino/include/io43u32x.h +440 -0
  25. data/cpp/arduino/include/io43u35x.h +432 -0
  26. data/cpp/arduino/include/io4414.h +500 -0
  27. data/cpp/arduino/include/io4433.h +489 -0
  28. data/cpp/arduino/include/io4434.h +588 -0
  29. data/cpp/arduino/include/io76c711.h +499 -0
  30. data/cpp/arduino/include/io8515.h +501 -0
  31. data/cpp/arduino/include/io8534.h +217 -0
  32. data/cpp/arduino/include/io8535.h +589 -0
  33. data/cpp/arduino/include/io86r401.h +309 -0
  34. data/cpp/arduino/include/io90pwm1.h +1157 -0
  35. data/cpp/arduino/include/io90pwm161.h +918 -0
  36. data/cpp/arduino/include/io90pwm216.h +1225 -0
  37. data/cpp/arduino/include/io90pwm2b.h +1466 -0
  38. data/cpp/arduino/include/io90pwm316.h +1272 -0
  39. data/cpp/arduino/include/io90pwm3b.h +1466 -0
  40. data/cpp/arduino/include/io90pwm81.h +1036 -0
  41. data/cpp/arduino/include/io90pwmx.h +1415 -0
  42. data/cpp/arduino/include/io90scr100.h +1719 -0
  43. data/cpp/arduino/include/ioa5272.h +803 -0
  44. data/cpp/arduino/include/ioa5505.h +803 -0
  45. data/cpp/arduino/include/ioa5702m322.h +2591 -0
  46. data/cpp/arduino/include/ioa5782.h +1843 -0
  47. data/cpp/arduino/include/ioa5790.h +907 -0
  48. data/cpp/arduino/include/ioa5790n.h +922 -0
  49. data/cpp/arduino/include/ioa5791.h +923 -0
  50. data/cpp/arduino/include/ioa5795.h +756 -0
  51. data/cpp/arduino/include/ioa5831.h +1949 -0
  52. data/cpp/arduino/include/ioa6285.h +740 -0
  53. data/cpp/arduino/include/ioa6286.h +740 -0
  54. data/cpp/arduino/include/ioa6289.h +847 -0
  55. data/cpp/arduino/include/ioa6612c.h +795 -0
  56. data/cpp/arduino/include/ioa6613c.h +795 -0
  57. data/cpp/arduino/include/ioa6614q.h +798 -0
  58. data/cpp/arduino/include/ioa6616c.h +865 -0
  59. data/cpp/arduino/include/ioa6617c.h +865 -0
  60. data/cpp/arduino/include/ioa664251.h +857 -0
  61. data/cpp/arduino/include/ioa8210.h +1843 -0
  62. data/cpp/arduino/include/ioa8510.h +1949 -0
  63. data/cpp/arduino/include/ioat94k.h +565 -0
  64. data/cpp/arduino/include/iocan128.h +100 -0
  65. data/cpp/arduino/include/iocan32.h +100 -0
  66. data/cpp/arduino/include/iocan64.h +100 -0
  67. data/cpp/arduino/include/iocanxx.h +2020 -0
  68. data/cpp/arduino/include/iom103.h +735 -0
  69. data/cpp/arduino/include/iom128.h +1299 -0
  70. data/cpp/arduino/include/iom1280.h +101 -0
  71. data/cpp/arduino/include/iom1281.h +101 -0
  72. data/cpp/arduino/include/iom1284.h +1099 -0
  73. data/cpp/arduino/include/iom1284p.h +1219 -0
  74. data/cpp/arduino/include/iom1284rfr2.h +2690 -0
  75. data/cpp/arduino/include/iom128a.h +1070 -0
  76. data/cpp/arduino/include/iom128rfa1.h +5385 -0
  77. data/cpp/arduino/include/iom128rfr2.h +2706 -0
  78. data/cpp/arduino/include/iom16.h +676 -0
  79. data/cpp/arduino/include/iom161.h +726 -0
  80. data/cpp/arduino/include/iom162.h +1022 -0
  81. data/cpp/arduino/include/iom163.h +686 -0
  82. data/cpp/arduino/include/iom164.h +101 -0
  83. data/cpp/arduino/include/iom164a.h +34 -0
  84. data/cpp/arduino/include/iom164p.h +34 -0
  85. data/cpp/arduino/include/iom164pa.h +1016 -0
  86. data/cpp/arduino/include/iom165.h +887 -0
  87. data/cpp/arduino/include/iom165a.h +832 -0
  88. data/cpp/arduino/include/iom165p.h +889 -0
  89. data/cpp/arduino/include/iom165pa.h +948 -0
  90. data/cpp/arduino/include/iom168.h +97 -0
  91. data/cpp/arduino/include/iom168a.h +35 -0
  92. data/cpp/arduino/include/iom168p.h +942 -0
  93. data/cpp/arduino/include/iom168pa.h +843 -0
  94. data/cpp/arduino/include/iom168pb.h +899 -0
  95. data/cpp/arduino/include/iom169.h +1174 -0
  96. data/cpp/arduino/include/iom169a.h +44 -0
  97. data/cpp/arduino/include/iom169p.h +1097 -0
  98. data/cpp/arduino/include/iom169pa.h +1485 -0
  99. data/cpp/arduino/include/iom16a.h +923 -0
  100. data/cpp/arduino/include/iom16hva.h +80 -0
  101. data/cpp/arduino/include/iom16hva2.h +883 -0
  102. data/cpp/arduino/include/iom16hvb.h +1052 -0
  103. data/cpp/arduino/include/iom16hvbrevb.h +1052 -0
  104. data/cpp/arduino/include/iom16m1.h +1571 -0
  105. data/cpp/arduino/include/iom16u2.h +1000 -0
  106. data/cpp/arduino/include/iom16u4.h +1423 -0
  107. data/cpp/arduino/include/iom2560.h +101 -0
  108. data/cpp/arduino/include/iom2561.h +101 -0
  109. data/cpp/arduino/include/iom2564rfr2.h +2691 -0
  110. data/cpp/arduino/include/iom256rfr2.h +2707 -0
  111. data/cpp/arduino/include/iom3000.h +237 -0
  112. data/cpp/arduino/include/iom32.h +755 -0
  113. data/cpp/arduino/include/iom323.h +744 -0
  114. data/cpp/arduino/include/iom324a.h +1014 -0
  115. data/cpp/arduino/include/iom324p.h +1016 -0
  116. data/cpp/arduino/include/iom324pa.h +1372 -0
  117. data/cpp/arduino/include/iom325.h +886 -0
  118. data/cpp/arduino/include/iom3250.h +982 -0
  119. data/cpp/arduino/include/iom3250a.h +34 -0
  120. data/cpp/arduino/include/iom3250p.h +34 -0
  121. data/cpp/arduino/include/iom3250pa.h +1042 -0
  122. data/cpp/arduino/include/iom325a.h +34 -0
  123. data/cpp/arduino/include/iom325p.h +34 -0
  124. data/cpp/arduino/include/iom325pa.h +937 -0
  125. data/cpp/arduino/include/iom328.h +34 -0
  126. data/cpp/arduino/include/iom328p.h +948 -0
  127. data/cpp/arduino/include/iom329.h +1069 -0
  128. data/cpp/arduino/include/iom3290.h +1227 -0
  129. data/cpp/arduino/include/iom3290a.h +34 -0
  130. data/cpp/arduino/include/iom3290pa.h +1123 -0
  131. data/cpp/arduino/include/iom329a.h +34 -0
  132. data/cpp/arduino/include/iom329p.h +1164 -0
  133. data/cpp/arduino/include/iom329pa.h +34 -0
  134. data/cpp/arduino/include/iom32a.h +686 -0
  135. data/cpp/arduino/include/iom32c1.h +1320 -0
  136. data/cpp/arduino/include/iom32hvb.h +1052 -0
  137. data/cpp/arduino/include/iom32hvbrevb.h +953 -0
  138. data/cpp/arduino/include/iom32m1.h +1625 -0
  139. data/cpp/arduino/include/iom32u2.h +1000 -0
  140. data/cpp/arduino/include/iom32u4.h +1512 -0
  141. data/cpp/arduino/include/iom32u6.h +1431 -0
  142. data/cpp/arduino/include/iom406.h +783 -0
  143. data/cpp/arduino/include/iom48.h +93 -0
  144. data/cpp/arduino/include/iom48a.h +35 -0
  145. data/cpp/arduino/include/iom48p.h +936 -0
  146. data/cpp/arduino/include/iom48pa.h +839 -0
  147. data/cpp/arduino/include/iom48pb.h +890 -0
  148. data/cpp/arduino/include/iom64.h +1311 -0
  149. data/cpp/arduino/include/iom640.h +101 -0
  150. data/cpp/arduino/include/iom644.h +101 -0
  151. data/cpp/arduino/include/iom644a.h +34 -0
  152. data/cpp/arduino/include/iom644p.h +101 -0
  153. data/cpp/arduino/include/iom644pa.h +1387 -0
  154. data/cpp/arduino/include/iom644rfr2.h +2685 -0
  155. data/cpp/arduino/include/iom645.h +881 -0
  156. data/cpp/arduino/include/iom6450.h +978 -0
  157. data/cpp/arduino/include/iom6450a.h +34 -0
  158. data/cpp/arduino/include/iom6450p.h +34 -0
  159. data/cpp/arduino/include/iom645a.h +34 -0
  160. data/cpp/arduino/include/iom645p.h +34 -0
  161. data/cpp/arduino/include/iom649.h +1061 -0
  162. data/cpp/arduino/include/iom6490.h +1182 -0
  163. data/cpp/arduino/include/iom6490a.h +34 -0
  164. data/cpp/arduino/include/iom6490p.h +34 -0
  165. data/cpp/arduino/include/iom649a.h +34 -0
  166. data/cpp/arduino/include/iom649p.h +1490 -0
  167. data/cpp/arduino/include/iom64a.h +1084 -0
  168. data/cpp/arduino/include/iom64c1.h +1321 -0
  169. data/cpp/arduino/include/iom64hve.h +1034 -0
  170. data/cpp/arduino/include/iom64hve2.h +767 -0
  171. data/cpp/arduino/include/iom64m1.h +1572 -0
  172. data/cpp/arduino/include/iom64rfr2.h +2701 -0
  173. data/cpp/arduino/include/iom8.h +665 -0
  174. data/cpp/arduino/include/iom8515.h +687 -0
  175. data/cpp/arduino/include/iom8535.h +772 -0
  176. data/cpp/arduino/include/iom88.h +97 -0
  177. data/cpp/arduino/include/iom88a.h +35 -0
  178. data/cpp/arduino/include/iom88p.h +941 -0
  179. data/cpp/arduino/include/iom88pa.h +1185 -0
  180. data/cpp/arduino/include/iom88pb.h +899 -0
  181. data/cpp/arduino/include/iom8a.h +621 -0
  182. data/cpp/arduino/include/iom8hva.h +76 -0
  183. data/cpp/arduino/include/iom8u2.h +997 -0
  184. data/cpp/arduino/include/iomx8.h +808 -0
  185. data/cpp/arduino/include/iomxx0_1.h +1692 -0
  186. data/cpp/arduino/include/iomxx4.h +954 -0
  187. data/cpp/arduino/include/iomxxhva.h +550 -0
  188. data/cpp/arduino/include/iotn10.h +512 -0
  189. data/cpp/arduino/include/iotn11.h +255 -0
  190. data/cpp/arduino/include/iotn12.h +288 -0
  191. data/cpp/arduino/include/iotn13.h +395 -0
  192. data/cpp/arduino/include/iotn13a.h +394 -0
  193. data/cpp/arduino/include/iotn15.h +363 -0
  194. data/cpp/arduino/include/iotn1634.h +914 -0
  195. data/cpp/arduino/include/iotn167.h +883 -0
  196. data/cpp/arduino/include/iotn20.h +776 -0
  197. data/cpp/arduino/include/iotn22.h +221 -0
  198. data/cpp/arduino/include/iotn2313.h +702 -0
  199. data/cpp/arduino/include/iotn2313a.h +812 -0
  200. data/cpp/arduino/include/iotn24.h +94 -0
  201. data/cpp/arduino/include/iotn24a.h +846 -0
  202. data/cpp/arduino/include/iotn25.h +93 -0
  203. data/cpp/arduino/include/iotn26.h +422 -0
  204. data/cpp/arduino/include/iotn261.h +93 -0
  205. data/cpp/arduino/include/iotn261a.h +987 -0
  206. data/cpp/arduino/include/iotn28.h +297 -0
  207. data/cpp/arduino/include/iotn4.h +477 -0
  208. data/cpp/arduino/include/iotn40.h +767 -0
  209. data/cpp/arduino/include/iotn4313.h +813 -0
  210. data/cpp/arduino/include/iotn43u.h +604 -0
  211. data/cpp/arduino/include/iotn44.h +94 -0
  212. data/cpp/arduino/include/iotn441.h +903 -0
  213. data/cpp/arduino/include/iotn44a.h +844 -0
  214. data/cpp/arduino/include/iotn45.h +93 -0
  215. data/cpp/arduino/include/iotn461.h +94 -0
  216. data/cpp/arduino/include/iotn461a.h +987 -0
  217. data/cpp/arduino/include/iotn48.h +806 -0
  218. data/cpp/arduino/include/iotn5.h +512 -0
  219. data/cpp/arduino/include/iotn828.h +911 -0
  220. data/cpp/arduino/include/iotn84.h +94 -0
  221. data/cpp/arduino/include/iotn841.h +903 -0
  222. data/cpp/arduino/include/iotn84a.h +844 -0
  223. data/cpp/arduino/include/iotn85.h +93 -0
  224. data/cpp/arduino/include/iotn861.h +94 -0
  225. data/cpp/arduino/include/iotn861a.h +988 -0
  226. data/cpp/arduino/include/iotn87.h +859 -0
  227. data/cpp/arduino/include/iotn88.h +806 -0
  228. data/cpp/arduino/include/iotn9.h +477 -0
  229. data/cpp/arduino/include/iotnx4.h +482 -0
  230. data/cpp/arduino/include/iotnx5.h +442 -0
  231. data/cpp/arduino/include/iotnx61.h +541 -0
  232. data/cpp/arduino/include/iousb1286.h +101 -0
  233. data/cpp/arduino/include/iousb1287.h +101 -0
  234. data/cpp/arduino/include/iousb162.h +101 -0
  235. data/cpp/arduino/include/iousb646.h +102 -0
  236. data/cpp/arduino/include/iousb647.h +102 -0
  237. data/cpp/arduino/include/iousb82.h +95 -0
  238. data/cpp/arduino/include/iousbxx2.h +807 -0
  239. data/cpp/arduino/include/iousbxx6_7.h +1336 -0
  240. data/cpp/arduino/include/iox128a1.h +7236 -0
  241. data/cpp/arduino/include/iox128a1u.h +8305 -0
  242. data/cpp/arduino/include/iox128a3.h +6987 -0
  243. data/cpp/arduino/include/iox128a3u.h +7697 -0
  244. data/cpp/arduino/include/iox128a4u.h +7309 -0
  245. data/cpp/arduino/include/iox128b1.h +6872 -0
  246. data/cpp/arduino/include/iox128b3.h +6288 -0
  247. data/cpp/arduino/include/iox128c3.h +6264 -0
  248. data/cpp/arduino/include/iox128d3.h +5749 -0
  249. data/cpp/arduino/include/iox128d4.h +5562 -0
  250. data/cpp/arduino/include/iox16a4.h +6748 -0
  251. data/cpp/arduino/include/iox16a4u.h +7309 -0
  252. data/cpp/arduino/include/iox16c4.h +6078 -0
  253. data/cpp/arduino/include/iox16d4.h +5717 -0
  254. data/cpp/arduino/include/iox16e5.h +7699 -0
  255. data/cpp/arduino/include/iox192a3.h +6987 -0
  256. data/cpp/arduino/include/iox192a3u.h +7697 -0
  257. data/cpp/arduino/include/iox192c3.h +6264 -0
  258. data/cpp/arduino/include/iox192d3.h +5749 -0
  259. data/cpp/arduino/include/iox256a3.h +6987 -0
  260. data/cpp/arduino/include/iox256a3b.h +6983 -0
  261. data/cpp/arduino/include/iox256a3bu.h +7706 -0
  262. data/cpp/arduino/include/iox256a3u.h +7697 -0
  263. data/cpp/arduino/include/iox256c3.h +6264 -0
  264. data/cpp/arduino/include/iox256d3.h +5709 -0
  265. data/cpp/arduino/include/iox32a4.h +6747 -0
  266. data/cpp/arduino/include/iox32a4u.h +7309 -0
  267. data/cpp/arduino/include/iox32c3.h +6264 -0
  268. data/cpp/arduino/include/iox32c4.h +6078 -0
  269. data/cpp/arduino/include/iox32d3.h +5105 -0
  270. data/cpp/arduino/include/iox32d4.h +5685 -0
  271. data/cpp/arduino/include/iox32e5.h +7699 -0
  272. data/cpp/arduino/include/iox384c3.h +6849 -0
  273. data/cpp/arduino/include/iox384d3.h +5833 -0
  274. data/cpp/arduino/include/iox64a1.h +7236 -0
  275. data/cpp/arduino/include/iox64a1u.h +8305 -0
  276. data/cpp/arduino/include/iox64a3.h +6987 -0
  277. data/cpp/arduino/include/iox64a3u.h +7697 -0
  278. data/cpp/arduino/include/iox64a4u.h +7309 -0
  279. data/cpp/arduino/include/iox64b1.h +6454 -0
  280. data/cpp/arduino/include/iox64b3.h +6288 -0
  281. data/cpp/arduino/include/iox64c3.h +6264 -0
  282. data/cpp/arduino/include/iox64d3.h +5764 -0
  283. data/cpp/arduino/include/iox64d4.h +5555 -0
  284. data/cpp/arduino/include/iox8e5.h +7699 -0
  285. data/cpp/arduino/include/lock.h +239 -0
  286. data/cpp/arduino/include/portpins.h +549 -0
  287. data/cpp/arduino/include/version.h +90 -0
  288. data/cpp/arduino/include/xmega.h +71 -0
  289. data/cpp/unittest/Assertion.h +9 -4
  290. data/cpp/unittest/Compare.h +93 -0
  291. data/lib/arduino_ci/arduino_installation.rb +1 -1
  292. data/lib/arduino_ci/cpp_library.rb +4 -1
  293. data/lib/arduino_ci/version.rb +1 -1
  294. data/misc/default.yaml +7 -0
  295. metadata +285 -2
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+ /*****************************************************************************
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+ *
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+ * Copyright (C) 2011 Atmel Corporation
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+ * All rights reserved.
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+ *
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+ * Redistribution and use in source and binary forms, with or without
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+ * modification, are permitted provided that the following conditions are met:
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+ *
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+ * * Redistributions of source code must retain the above copyright
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+ * notice, this list of conditions and the following disclaimer.
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+ *
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+ * * Redistributions in binary form must reproduce the above copyright
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+ * notice, this list of conditions and the following disclaimer in
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+ * the documentation and/or other materials provided with the
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+ * distribution.
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+ *
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+ * * Neither the name of the copyright holders nor the names of
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+ * contributors may be used to endorse or promote products derived
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+ * from this software without specific prior written permission.
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+ *
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+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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+ * POSSIBILITY OF SUCH DAMAGE.
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+ ****************************************************************************/
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+
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+ #include "iom6490.h"
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+ /*****************************************************************************
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+ *
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+ * Copyright (C) 2011 Atmel Corporation
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+ * All rights reserved.
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+ *
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+ * Redistribution and use in source and binary forms, with or without
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+ * modification, are permitted provided that the following conditions are met:
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+ *
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+ * * Redistributions of source code must retain the above copyright
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+ * notice, this list of conditions and the following disclaimer.
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+ *
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+ * * Redistributions in binary form must reproduce the above copyright
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+ * notice, this list of conditions and the following disclaimer in
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+ * the documentation and/or other materials provided with the
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+ * distribution.
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+ *
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+ * * Neither the name of the copyright holders nor the names of
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+ * contributors may be used to endorse or promote products derived
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+ * from this software without specific prior written permission.
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+ *
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+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31
+ * POSSIBILITY OF SUCH DAMAGE.
32
+ ****************************************************************************/
33
+
34
+ #include "iom6490.h"
@@ -0,0 +1,34 @@
1
+ /*****************************************************************************
2
+ *
3
+ * Copyright (C) 2011 Atmel Corporation
4
+ * All rights reserved.
5
+ *
6
+ * Redistribution and use in source and binary forms, with or without
7
+ * modification, are permitted provided that the following conditions are met:
8
+ *
9
+ * * Redistributions of source code must retain the above copyright
10
+ * notice, this list of conditions and the following disclaimer.
11
+ *
12
+ * * Redistributions in binary form must reproduce the above copyright
13
+ * notice, this list of conditions and the following disclaimer in
14
+ * the documentation and/or other materials provided with the
15
+ * distribution.
16
+ *
17
+ * * Neither the name of the copyright holders nor the names of
18
+ * contributors may be used to endorse or promote products derived
19
+ * from this software without specific prior written permission.
20
+ *
21
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31
+ * POSSIBILITY OF SUCH DAMAGE.
32
+ ****************************************************************************/
33
+
34
+ #include "iom649.h"
@@ -0,0 +1,1490 @@
1
+ /* Copyright (c) 2009 Atmel Corporation
2
+ All rights reserved.
3
+
4
+ Redistribution and use in source and binary forms, with or without
5
+ modification, are permitted provided that the following conditions are met:
6
+
7
+ * Redistributions of source code must retain the above copyright
8
+ notice, this list of conditions and the following disclaimer.
9
+
10
+ * Redistributions in binary form must reproduce the above copyright
11
+ notice, this list of conditions and the following disclaimer in
12
+ the documentation and/or other materials provided with the
13
+ distribution.
14
+
15
+ * Neither the name of the copyright holders nor the names of
16
+ contributors may be used to endorse or promote products derived
17
+ from this software without specific prior written permission.
18
+
19
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23
+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
+ POSSIBILITY OF SUCH DAMAGE. */
30
+
31
+ /* $Id: iom649p.h 2146 2010-06-09 06:38:54Z joerg_wunsch $ */
32
+
33
+ /* avr/iom649p.h - definitions for ATmega649 */
34
+
35
+ /* This file should only be included from <avr/io.h>, never directly. */
36
+
37
+ #ifndef _AVR_IO_H_
38
+ # error "Include <avr/io.h> instead of this file."
39
+ #endif
40
+
41
+ #ifndef _AVR_IOXXX_H_
42
+ # define _AVR_IOXXX_H_ "iom649p.h"
43
+ #else
44
+ # error "Attempt to include more than one <avr/ioXXX.h> file."
45
+ #endif
46
+
47
+
48
+ #ifndef _AVR_ATmega649_H_
49
+ #define _AVR_ATmega649_H_ 1
50
+
51
+
52
+ /* Registers and associated bit numbers. */
53
+
54
+ #define PINA _SFR_IO8(0x00)
55
+ #define PINA0 0
56
+ #define PINA1 1
57
+ #define PINA2 2
58
+ #define PINA3 3
59
+ #define PINA4 4
60
+ #define PINA5 5
61
+ #define PINA6 6
62
+ #define PINA7 7
63
+
64
+ #define DDRA _SFR_IO8(0x01)
65
+ #define DDA0 0
66
+ #define DDA1 1
67
+ #define DDA2 2
68
+ #define DDA3 3
69
+ #define DDA4 4
70
+ #define DDA5 5
71
+ #define DDA6 6
72
+ #define DDA7 7
73
+
74
+ #define PORTA _SFR_IO8(0x02)
75
+ #define PORTA0 0
76
+ #define PORTA1 1
77
+ #define PORTA2 2
78
+ #define PORTA3 3
79
+ #define PORTA4 4
80
+ #define PORTA5 5
81
+ #define PORTA6 6
82
+ #define PORTA7 7
83
+
84
+ #define PINB _SFR_IO8(0x03)
85
+ #define PINB0 0
86
+ #define PINB1 1
87
+ #define PINB2 2
88
+ #define PINB3 3
89
+ #define PINB4 4
90
+ #define PINB5 5
91
+ #define PINB6 6
92
+ #define PINB7 7
93
+
94
+ #define DDRB _SFR_IO8(0x04)
95
+ #define DDB0 0
96
+ #define DDB1 1
97
+ #define DDB2 2
98
+ #define DDB3 3
99
+ #define DDB4 4
100
+ #define DDB5 5
101
+ #define DDB6 6
102
+ #define DDB7 7
103
+
104
+ #define PORTB _SFR_IO8(0x05)
105
+ #define PORTB0 0
106
+ #define PORTB1 1
107
+ #define PORTB2 2
108
+ #define PORTB3 3
109
+ #define PORTB4 4
110
+ #define PORTB5 5
111
+ #define PORTB6 6
112
+ #define PORTB7 7
113
+
114
+ #define PINC _SFR_IO8(0x06)
115
+ #define PINC0 0
116
+ #define PINC1 1
117
+ #define PINC2 2
118
+ #define PINC3 3
119
+ #define PINC4 4
120
+ #define PINC5 5
121
+ #define PINC6 6
122
+ #define PINC7 7
123
+
124
+ #define DDRC _SFR_IO8(0x07)
125
+ #define DDC0 0
126
+ #define DDC1 1
127
+ #define DDC2 2
128
+ #define DDC3 3
129
+ #define DDC4 4
130
+ #define DDC5 5
131
+ #define DDC6 6
132
+ #define DDC7 7
133
+
134
+ #define PORTC _SFR_IO8(0x08)
135
+ #define PORTC0 0
136
+ #define PORTC1 1
137
+ #define PORTC2 2
138
+ #define PORTC3 3
139
+ #define PORTC4 4
140
+ #define PORTC5 5
141
+ #define PORTC6 6
142
+ #define PORTC7 7
143
+
144
+ #define PIND _SFR_IO8(0x09)
145
+ #define PIND0 0
146
+ #define PIND1 1
147
+ #define PIND2 2
148
+ #define PIND3 3
149
+ #define PIND4 4
150
+ #define PIND5 5
151
+ #define PIND6 6
152
+ #define PIND7 7
153
+
154
+ #define DDRD _SFR_IO8(0x0A)
155
+ #define DDD0 0
156
+ #define DDD1 1
157
+ #define DDD2 2
158
+ #define DDD3 3
159
+ #define DDD4 4
160
+ #define DDD5 5
161
+ #define DDD6 6
162
+ #define DDD7 7
163
+
164
+ #define PORTD _SFR_IO8(0x0B)
165
+ #define PORTD0 0
166
+ #define PORTD1 1
167
+ #define PORTD2 2
168
+ #define PORTD3 3
169
+ #define PORTD4 4
170
+ #define PORTD5 5
171
+ #define PORTD6 6
172
+ #define PORTD7 7
173
+
174
+ #define PINE _SFR_IO8(0x0C)
175
+ #define PINE0 0
176
+ #define PINE1 1
177
+ #define PINE2 2
178
+ #define PINE3 3
179
+ #define PINE4 4
180
+ #define PINE5 5
181
+ #define PINE6 6
182
+ #define PINE7 7
183
+
184
+ #define DDRE _SFR_IO8(0x0D)
185
+ #define DDE0 0
186
+ #define DDE1 1
187
+ #define DDE2 2
188
+ #define DDE3 3
189
+ #define DDE4 4
190
+ #define DDE5 5
191
+ #define DDE6 6
192
+ #define DDE7 7
193
+
194
+ #define PORTE _SFR_IO8(0x0E)
195
+ #define PORTE0 0
196
+ #define PORTE1 1
197
+ #define PORTE2 2
198
+ #define PORTE3 3
199
+ #define PORTE4 4
200
+ #define PORTE5 5
201
+ #define PORTE6 6
202
+ #define PORTE7 7
203
+
204
+ #define PINF _SFR_IO8(0x0F)
205
+ #define PINF0 0
206
+ #define PINF1 1
207
+ #define PINF2 2
208
+ #define PINF3 3
209
+ #define PINF4 4
210
+ #define PINF5 5
211
+ #define PINF6 6
212
+ #define PINF7 7
213
+
214
+ #define DDRF _SFR_IO8(0x10)
215
+ #define DDF0 0
216
+ #define DDF1 1
217
+ #define DDF2 2
218
+ #define DDF3 3
219
+ #define DDF4 4
220
+ #define DDF5 5
221
+ #define DDF6 6
222
+ #define DDF7 7
223
+
224
+ #define PORTF _SFR_IO8(0x11)
225
+ #define PORTF0 0
226
+ #define PORTF1 1
227
+ #define PORTF2 2
228
+ #define PORTF3 3
229
+ #define PORTF4 4
230
+ #define PORTF5 5
231
+ #define PORTF6 6
232
+ #define PORTF7 7
233
+
234
+ #define PING _SFR_IO8(0x12)
235
+ #define PING0 0
236
+ #define PING1 1
237
+ #define PING2 2
238
+ #define PING3 3
239
+ #define PING4 4
240
+ #define PING5 5
241
+
242
+ #define DDRG _SFR_IO8(0x13)
243
+ #define DDG0 0
244
+ #define DDG1 1
245
+ #define DDG2 2
246
+ #define DDG3 3
247
+ #define DDG4 4
248
+
249
+ #define PORTG _SFR_IO8(0x14)
250
+ #define PORTG0 0
251
+ #define PORTG1 1
252
+ #define PORTG2 2
253
+ #define PORTG3 3
254
+ #define PORTG4 4
255
+
256
+ #define TIFR0 _SFR_IO8(0x15)
257
+ #define TOV0 0
258
+ #define OCF0A 1
259
+
260
+ #define TIFR1 _SFR_IO8(0x16)
261
+ #define TOV1 0
262
+ #define OCF1A 1
263
+ #define OCF1B 2
264
+ #define ICF1 5
265
+
266
+ #define TIFR2 _SFR_IO8(0x17)
267
+ #define TOV2 0
268
+ #define OCF2A 1
269
+
270
+ #define EIFR _SFR_IO8(0x1C)
271
+ #define INTF0 0
272
+ #define PCIF0 4
273
+ #define PCIF1 5
274
+ #define PCIF2 6
275
+ #define PCIF3 7
276
+
277
+ #define EIMSK _SFR_IO8(0x1D)
278
+ #define INT0 0
279
+ #define PCIE0 4
280
+ #define PCIE1 5
281
+ #define PCIE2 6
282
+ #define PCIE3 7
283
+
284
+ #define GPIOR0 _SFR_IO8(0x1E)
285
+ #define GPIOR00 0
286
+ #define GPIOR01 1
287
+ #define GPIOR02 2
288
+ #define GPIOR03 3
289
+ #define GPIOR04 4
290
+ #define GPIOR05 5
291
+ #define GPIOR06 6
292
+ #define GPIOR07 7
293
+
294
+ #define EECR _SFR_IO8(0x1F)
295
+ #define EERE 0
296
+ #define EEWE 1
297
+ #define EEMWE 2
298
+ #define EERIE 3
299
+
300
+ #define EEDR _SFR_IO8(0x20)
301
+ #define EEDR0 0
302
+ #define EEDR1 1
303
+ #define EEDR2 2
304
+ #define EEDR3 3
305
+ #define EEDR4 4
306
+ #define EEDR5 5
307
+ #define EEDR6 6
308
+ #define EEDR7 7
309
+
310
+ #define EEAR _SFR_IO16(0x21)
311
+
312
+ #define EEARL _SFR_IO8(0x21)
313
+ #define EEARL0 0
314
+ #define EEARL1 1
315
+ #define EEARL2 2
316
+ #define EEARL3 3
317
+ #define EEARL4 4
318
+ #define EEARL5 5
319
+ #define EEARL6 6
320
+ #define EEARL7 7
321
+
322
+ #define EEARH _SFR_IO8(0x22)
323
+ #define EEAR8 0
324
+ #define EEAR9 1
325
+ #define EEAR10 2
326
+
327
+ #define GTCCR _SFR_IO8(0x23)
328
+ #define PSR310 0
329
+ #define PSR2 1
330
+ #define TSM 7
331
+
332
+ #define TCCR0A _SFR_IO8(0x24)
333
+ #define CS00 0
334
+ #define CS01 1
335
+ #define CS02 2
336
+ #define WGM01 3
337
+ #define COM0A0 4
338
+ #define COM0A1 5
339
+ #define WGM00 6
340
+ #define FOC0A 7
341
+
342
+ #define TCNT0 _SFR_IO8(0x26)
343
+ #define TCNT0_0 0
344
+ #define TCNT0_1 1
345
+ #define TCNT0_2 2
346
+ #define TCNT0_3 3
347
+ #define TCNT0_4 4
348
+ #define TCNT0_5 5
349
+ #define TCNT0_6 6
350
+ #define TCNT0_7 7
351
+
352
+ #define OCR0A _SFR_IO8(0x27)
353
+ #define OCR0A0 0
354
+ #define OCR0A1 1
355
+ #define OCR0A2 2
356
+ #define OCR0A3 3
357
+ #define OCR0A4 4
358
+ #define OCR0A5 5
359
+ #define OCR0A6 6
360
+ #define OCR0A7 7
361
+
362
+ #define GPIOR1 _SFR_IO8(0x2A)
363
+ #define GPIOR10 0
364
+ #define GPIOR11 1
365
+ #define GPIOR12 2
366
+ #define GPIOR13 3
367
+ #define GPIOR14 4
368
+ #define GPIOR15 5
369
+ #define GPIOR16 6
370
+ #define GPIOR17 7
371
+
372
+ #define GPIOR2 _SFR_IO8(0x2B)
373
+ #define GPIOR20 0
374
+ #define GPIOR21 1
375
+ #define GPIOR22 2
376
+ #define GPIOR23 3
377
+ #define GPIOR24 4
378
+ #define GPIOR25 5
379
+ #define GPIOR26 6
380
+ #define GPIOR27 7
381
+
382
+ #define SPCR _SFR_IO8(0x2C)
383
+ #define SPR0 0
384
+ #define SPR1 1
385
+ #define CPHA 2
386
+ #define CPOL 3
387
+ #define MSTR 4
388
+ #define DORD 5
389
+ #define SPE 6
390
+ #define SPIE 7
391
+
392
+ #define SPSR _SFR_IO8(0x2D)
393
+ #define SPI2X 0
394
+ #define WCOL 6
395
+ #define SPIF 7
396
+
397
+ #define SPDR _SFR_IO8(0x2E)
398
+ #define SPDR0 0
399
+ #define SPDR1 1
400
+ #define SPDR2 2
401
+ #define SPDR3 3
402
+ #define SPDR4 4
403
+ #define SPDR5 5
404
+ #define SPDR6 6
405
+ #define SPDR7 7
406
+
407
+ #define ACSR _SFR_IO8(0x30)
408
+ #define ACIS0 0
409
+ #define ACIS1 1
410
+ #define ACIC 2
411
+ #define ACIE 3
412
+ #define ACI 4
413
+ #define ACO 5
414
+ #define ACBG 6
415
+ #define ACD 7
416
+
417
+ #define OCDR _SFR_IO8(0x31)
418
+ #define OCDR0 0
419
+ #define OCDR1 1
420
+ #define OCDR2 2
421
+ #define OCDR3 3
422
+ #define OCDR4 4
423
+ #define OCDR5 5
424
+ #define OCDR6 6
425
+ #define OCDR7 7
426
+
427
+ #define SMCR _SFR_IO8(0x33)
428
+ #define SE 0
429
+ #define SM0 1
430
+ #define SM1 2
431
+ #define SM2 3
432
+
433
+ #define MCUSR _SFR_IO8(0x34)
434
+ #define PORF 0
435
+ #define EXTRF 1
436
+ #define BORF 2
437
+ #define WDRF 3
438
+ #define JTRF 4
439
+
440
+ #define MCUCR _SFR_IO8(0x35)
441
+ #define IVCE 0
442
+ #define IVSEL 1
443
+ #define PUD 4
444
+ #define JTD 7
445
+
446
+ #define SPMCSR _SFR_IO8(0x37)
447
+ #define SPMEN 0
448
+ #define PGERS 1
449
+ #define PGWRT 2
450
+ #define BLBSET 3
451
+ #define RWWSRE 4
452
+ #define RWWSB 6
453
+ #define SPMIE 7
454
+
455
+ #define WDTCR _SFR_MEM8(0x60)
456
+ #define WDP0 0
457
+ #define WDP1 1
458
+ #define WDP2 2
459
+ #define WDE 3
460
+ #define WDCE 4
461
+
462
+ #define CLKPR _SFR_MEM8(0x61)
463
+ #define CLKPS0 0
464
+ #define CLKPS1 1
465
+ #define CLKPS2 2
466
+ #define CLKPS3 3
467
+ #define CLKPCE 7
468
+
469
+ #define PRR _SFR_MEM8(0x64)
470
+ #define PRADC 0
471
+ #define PRUSART0 1
472
+ #define PRSPI 2
473
+ #define PRTIM1 3
474
+ #define PRLCD 4
475
+
476
+ #define __AVR_HAVE_PRR ((1<<PRADC)|(1<<PRUSART0)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRLCD))
477
+ #define __AVR_HAVE_PRR_PRADC
478
+ #define __AVR_HAVE_PRR_PRUSART0
479
+ #define __AVR_HAVE_PRR_PRSPI
480
+ #define __AVR_HAVE_PRR_PRTIM1
481
+ #define __AVR_HAVE_PRR_PRLCD
482
+
483
+ #define OSCCAL _SFR_MEM8(0x66)
484
+ #define CAL0 0
485
+ #define CAL1 1
486
+ #define CAL2 2
487
+ #define CAL3 3
488
+ #define CAL4 4
489
+ #define CAL5 5
490
+ #define CAL6 6
491
+ #define CAL7 7
492
+
493
+ #define EICRA _SFR_MEM8(0x69)
494
+ #define ISC00 0
495
+ #define ISC01 1
496
+
497
+ #define PCMSK0 _SFR_MEM8(0x6B)
498
+ #define PCINT0 0
499
+ #define PCINT1 1
500
+ #define PCINT2 2
501
+ #define PCINT3 3
502
+ #define PCINT4 4
503
+ #define PCINT5 5
504
+ #define PCINT6 6
505
+ #define PCINT7 7
506
+
507
+ #define PCMSK1 _SFR_MEM8(0x6C)
508
+ #define PCINT8 0
509
+ #define PCINT9 1
510
+ #define PCINT10 2
511
+ #define PCINT11 3
512
+ #define PCINT12 4
513
+ #define PCINT13 5
514
+ #define PCINT14 6
515
+ #define PCINT15 7
516
+
517
+ #define TIMSK0 _SFR_MEM8(0x6E)
518
+ #define TOIE0 0
519
+ #define OCIE0A 1
520
+
521
+ #define TIMSK1 _SFR_MEM8(0x6F)
522
+ #define TOIE1 0
523
+ #define OCIE1A 1
524
+ #define OCIE1B 2
525
+ #define ICIE1 5
526
+
527
+ #define TIMSK2 _SFR_MEM8(0x70)
528
+ #define TOIE2 0
529
+ #define OCIE2A 1
530
+
531
+ #ifndef __ASSEMBLER__
532
+ #define ADC _SFR_MEM16(0x78)
533
+ #endif
534
+ #define ADCW _SFR_MEM16(0x78)
535
+
536
+ #define ADCL _SFR_MEM8(0x78)
537
+ #define ADCL0 0
538
+ #define ADCL1 1
539
+ #define ADCL2 2
540
+ #define ADCL3 3
541
+ #define ADCL4 4
542
+ #define ADCL5 5
543
+ #define ADCL6 6
544
+ #define ADCL7 7
545
+
546
+ #define ADCH _SFR_MEM8(0x79)
547
+ #define ADCH0 0
548
+ #define ADCH1 1
549
+ #define ADCH2 2
550
+ #define ADCH3 3
551
+ #define ADCH4 4
552
+ #define ADCH5 5
553
+ #define ADCH6 6
554
+ #define ADCH7 7
555
+
556
+ #define ADCSRA _SFR_MEM8(0x7A)
557
+ #define ADPS0 0
558
+ #define ADPS1 1
559
+ #define ADPS2 2
560
+ #define ADIE 3
561
+ #define ADIF 4
562
+ #define ADATE 5
563
+ #define ADSC 6
564
+ #define ADEN 7
565
+
566
+ #define ADCSRB _SFR_MEM8(0x7B)
567
+ #define ADTS0 0
568
+ #define ADTS1 1
569
+ #define ADTS2 2
570
+ #define ACME 6
571
+
572
+ #define ADMUX _SFR_MEM8(0x7C)
573
+ #define MUX0 0
574
+ #define MUX1 1
575
+ #define MUX2 2
576
+ #define MUX3 3
577
+ #define MUX4 4
578
+ #define ADLAR 5
579
+ #define REFS0 6
580
+ #define REFS1 7
581
+
582
+ #define DIDR0 _SFR_MEM8(0x7E)
583
+ #define ADC0D 0
584
+ #define ADC1D 1
585
+ #define ADC2D 2
586
+ #define ADC3D 3
587
+ #define ADC4D 4
588
+ #define ADC5D 5
589
+ #define ADC6D 6
590
+ #define ADC7D 7
591
+
592
+ #define DIDR1 _SFR_MEM8(0x7F)
593
+ #define AIN0D 0
594
+ #define AIN1D 1
595
+
596
+ #define TCCR1A _SFR_MEM8(0x80)
597
+ #define WGM10 0
598
+ #define WGM11 1
599
+ #define COM1B0 4
600
+ #define COM1B1 5
601
+ #define COM1A0 6
602
+ #define COM1A1 7
603
+
604
+ #define TCCR1B _SFR_MEM8(0x81)
605
+ #define CS10 0
606
+ #define CS11 1
607
+ #define CS12 2
608
+ #define WGM12 3
609
+ #define WGM13 4
610
+ #define ICES1 6
611
+ #define ICNC1 7
612
+
613
+ #define TCCR1C _SFR_MEM8(0x82)
614
+ #define FOC1B 6
615
+ #define FOC1A 7
616
+
617
+ #define TCNT1 _SFR_MEM16(0x84)
618
+
619
+ #define TCNT1L _SFR_MEM8(0x84)
620
+ #define TCNT1L0 0
621
+ #define TCNT1L1 1
622
+ #define TCNT1L2 2
623
+ #define TCNT1L3 3
624
+ #define TCNT1L4 4
625
+ #define TCNT1L5 5
626
+ #define TCNT1L6 6
627
+ #define TCNT1L7 7
628
+
629
+ #define TCNT1H _SFR_MEM8(0x85)
630
+ #define TCNT1H0 0
631
+ #define TCNT1H1 1
632
+ #define TCNT1H2 2
633
+ #define TCNT1H3 3
634
+ #define TCNT1H4 4
635
+ #define TCNT1H5 5
636
+ #define TCNT1H6 6
637
+ #define TCNT1H7 7
638
+
639
+ #define ICR1 _SFR_MEM16(0x86)
640
+
641
+ #define ICR1L _SFR_MEM8(0x86)
642
+ #define ICR1L0 0
643
+ #define ICR1L1 1
644
+ #define ICR1L2 2
645
+ #define ICR1L3 3
646
+ #define ICR1L4 4
647
+ #define ICR1L5 5
648
+ #define ICR1L6 6
649
+ #define ICR1L7 7
650
+
651
+ #define ICR1H _SFR_MEM8(0x87)
652
+ #define ICR1H0 0
653
+ #define ICR1H1 1
654
+ #define ICR1H2 2
655
+ #define ICR1H3 3
656
+ #define ICR1H4 4
657
+ #define ICR1H5 5
658
+ #define ICR1H6 6
659
+ #define ICR1H7 7
660
+
661
+ #define OCR1A _SFR_MEM16(0x88)
662
+
663
+ #define OCR1AL _SFR_MEM8(0x88)
664
+ #define OCR1AL0 0
665
+ #define OCR1AL1 1
666
+ #define OCR1AL2 2
667
+ #define OCR1AL3 3
668
+ #define OCR1AL4 4
669
+ #define OCR1AL5 5
670
+ #define OCR1AL6 6
671
+ #define OCR1AL7 7
672
+
673
+ #define OCR1AH _SFR_MEM8(0x89)
674
+ #define OCR1AH0 0
675
+ #define OCR1AH1 1
676
+ #define OCR1AH2 2
677
+ #define OCR1AH3 3
678
+ #define OCR1AH4 4
679
+ #define OCR1AH5 5
680
+ #define OCR1AH6 6
681
+ #define OCR1AH7 7
682
+
683
+ #define OCR1B _SFR_MEM16(0x8A)
684
+
685
+ #define OCR1BL _SFR_MEM8(0x8A)
686
+ #define OCR1BL0 0
687
+ #define OCR1BL1 1
688
+ #define OCR1BL2 2
689
+ #define OCR1BL3 3
690
+ #define OCR1BL4 4
691
+ #define OCR1BL5 5
692
+ #define OCR1BL6 6
693
+ #define OCR1BL7 7
694
+
695
+ #define OCR1BH _SFR_MEM8(0x8B)
696
+ #define OCR1BH0 0
697
+ #define OCR1BH1 1
698
+ #define OCR1BH2 2
699
+ #define OCR1BH3 3
700
+ #define OCR1BH4 4
701
+ #define OCR1BH5 5
702
+ #define OCR1BH6 6
703
+ #define OCR1BH7 7
704
+
705
+ #define TCCR2A _SFR_MEM8(0xB0)
706
+ #define CS20 0
707
+ #define CS21 1
708
+ #define CS22 2
709
+ #define WGM21 3
710
+ #define COM2A0 4
711
+ #define COM2A1 5
712
+ #define WGM20 6
713
+ #define FOC2A 7
714
+
715
+ #define TCNT2 _SFR_MEM8(0xB2)
716
+ #define TCNT2_0 0
717
+ #define TCNT2_1 1
718
+ #define TCNT2_2 2
719
+ #define TCNT2_3 3
720
+ #define TCNT2_4 4
721
+ #define TCNT2_5 5
722
+ #define TCNT2_6 6
723
+ #define TCNT2_7 7
724
+
725
+ #define OCR2A _SFR_MEM8(0xB3)
726
+ #define OCR2A0 0
727
+ #define OCR2A1 1
728
+ #define OCR2A2 2
729
+ #define OCR2A3 3
730
+ #define OCR2A4 4
731
+ #define OCR2A5 5
732
+ #define OCR2A6 6
733
+ #define OCR2A7 7
734
+
735
+ #define ASSR _SFR_MEM8(0xB6)
736
+ #define TCR2UB 0
737
+ #define OCR2UB 1
738
+ #define TCN2UB 2
739
+ #define AS2 3
740
+ #define EXCLK 4
741
+
742
+ #define USICR _SFR_MEM8(0xB8)
743
+ #define USITC 0
744
+ #define USICLK 1
745
+ #define USICS0 2
746
+ #define USICS1 3
747
+ #define USIWM0 4
748
+ #define USIWM1 5
749
+ #define USIOIE 6
750
+ #define USISIE 7
751
+
752
+ #define USISR _SFR_MEM8(0xB9)
753
+ #define USICNT0 0
754
+ #define USICNT1 1
755
+ #define USICNT2 2
756
+ #define USICNT3 3
757
+ #define USIDC 4
758
+ #define USIPF 5
759
+ #define USIOIF 6
760
+ #define USISIF 7
761
+
762
+ #define USIDR _SFR_MEM8(0xBA)
763
+ #define USIDR0 0
764
+ #define USIDR1 1
765
+ #define USIDR2 2
766
+ #define USIDR3 3
767
+ #define USIDR4 4
768
+ #define USIDR5 5
769
+ #define USIDR6 6
770
+ #define USIDR7 7
771
+
772
+ #define UCSR0A _SFR_MEM8(0xC0)
773
+ #define MPCM0 0
774
+ #define U2X0 1
775
+ #define UPE0 2
776
+ #define DOR0 3
777
+ #define FE0 4
778
+ #define UDRE0 5
779
+ #define TXC0 6
780
+ #define RXC0 7
781
+
782
+ #define UCSR0B _SFR_MEM8(0xC1)
783
+ #define TXB80 0
784
+ #define RXB80 1
785
+ #define UCSZ02 2
786
+ #define TXEN0 3
787
+ #define RXEN0 4
788
+ #define UDRIE0 5
789
+ #define TXCIE0 6
790
+ #define RXCIE0 7
791
+
792
+ #define UCSR0C _SFR_MEM8(0xC2)
793
+ #define UCPOL0 0
794
+ #define UCSZ00 1
795
+ #define UCSZ01 2
796
+ #define USBS0 3
797
+ #define UPM00 4
798
+ #define UPM01 5
799
+ #define UMSEL0 6
800
+
801
+ #define UBRR0 _SFR_MEM16(0xC4)
802
+
803
+ #define UBRR0L _SFR_MEM8(0xC4)
804
+ #define UBRR0_0 0
805
+ #define UBRR0_1 1
806
+ #define UBRR0_2 2
807
+ #define UBRR0_3 3
808
+ #define UBRR0_4 4
809
+ #define UBRR0_5 5
810
+ #define UBRR0_6 6
811
+ #define UBRR0_7 7
812
+
813
+ #define UBRR0H _SFR_MEM8(0xC5)
814
+ #define UBRR0_8 0
815
+ #define UBRR0_9 1
816
+ #define UBRR0_10 2
817
+ #define UBRR0_11 3
818
+
819
+ #define UDR0 _SFR_MEM8(0xC6)
820
+ #define UDR00 0
821
+ #define UDR01 1
822
+ #define UDR02 2
823
+ #define UDR03 3
824
+ #define UDR04 4
825
+ #define UDR05 5
826
+ #define UDR06 6
827
+ #define UDR07 7
828
+
829
+ #define LCDCRA _SFR_MEM8(0xE4)
830
+ #define LCDBL 0
831
+ #define LCDIE 3
832
+ #define LCDIF 4
833
+ #define LCDAB 6
834
+ #define LCDEN 7
835
+
836
+ #define LCDCRB _SFR_MEM8(0xE5)
837
+ #define LCDPM0 0
838
+ #define LCDPM1 1
839
+ #define LCDPM2 2
840
+ #define LCDPM3 3
841
+ #define LCDMUX0 4
842
+ #define LCDMUX1 5
843
+ #define LCD2B 6
844
+ #define LCDCS 7
845
+
846
+ #define LCDFRR _SFR_MEM8(0xE6)
847
+ #define LCDCD0 0
848
+ #define LCDCD1 1
849
+ #define LCDCD2 2
850
+ #define LCDPS0 4
851
+ #define LCDPS1 5
852
+ #define LCDPS2 6
853
+
854
+ #define LCDCCR _SFR_MEM8(0xE7)
855
+ #define LCDCC0 0
856
+ #define LCDCC1 1
857
+ #define LCDCC2 2
858
+ #define LCDCC3 3
859
+ #define LCDDC0 5
860
+ #define LCDDC1 6
861
+ #define LCDDC2 7
862
+
863
+ #define LCDDR0 _SFR_MEM8(0xEC)
864
+ #define SEG000 0
865
+ #define SEG001 1
866
+ #define SEG002 2
867
+ #define SEG003 3
868
+ #define SEG004 4
869
+ #define SEG005 5
870
+ #define SEG006 6
871
+ #define SEG007 7
872
+
873
+ #define LCDDR1 _SFR_MEM8(0xED)
874
+ #define SEG008 0
875
+ #define SEG009 1
876
+ #define SEG010 2
877
+ #define SEG011 3
878
+ #define SEG012 4
879
+ #define SEG013 5
880
+ #define SEG014 6
881
+ #define SEG015 7
882
+
883
+ #define LCDDR2 _SFR_MEM8(0xEE)
884
+ #define SEG016 0
885
+ #define SEG017 1
886
+ #define SEG018 2
887
+ #define SEG019 3
888
+ #define SEG020 4
889
+ #define SEG021 5
890
+ #define SEG022 6
891
+ #define SEG023 7
892
+
893
+ #define LCDDR3 _SFR_MEM8(0xEF)
894
+ #define SEG024 0
895
+
896
+ #define LCDDR4 _SFR_MEM8(0xF0)
897
+
898
+ #define LCDDR5 _SFR_MEM8(0xF1)
899
+ #define SEG100 0
900
+ #define SEG101 1
901
+ #define SEG102 2
902
+ #define SEG103 3
903
+ #define SEG104 4
904
+ #define SEG105 5
905
+ #define SEG106 6
906
+ #define SEG107 7
907
+
908
+ #define LCDDR6 _SFR_MEM8(0xF2)
909
+ #define SEG108 0
910
+ #define SEG109 1
911
+ #define SEG110 2
912
+ #define SEG111 3
913
+ #define SEG112 4
914
+ #define SEG113 5
915
+ #define SEG114 6
916
+ #define SEG115 7
917
+
918
+ #define LCDDR7 _SFR_MEM8(0xF3)
919
+ #define SEG116 0
920
+ #define SEG117 1
921
+ #define SEG118 2
922
+ #define SEG119 3
923
+ #define SEG120 4
924
+ #define SEG121 5
925
+ #define SEG122 6
926
+ #define SEG123 7
927
+
928
+ #define LCDDR8 _SFR_MEM8(0xF4)
929
+ #define SEG124 0
930
+
931
+ #define LCDDR9 _SFR_MEM8(0xF5)
932
+
933
+ #define LCDDR10 _SFR_MEM8(0xF6)
934
+ #define SEG200 0
935
+ #define SEG201 1
936
+ #define SEG202 2
937
+ #define SEG203 3
938
+ #define SEG204 4
939
+ #define SEG205 5
940
+ #define SEG206 6
941
+ #define SEG207 7
942
+
943
+ #define LCDDR11 _SFR_MEM8(0xF7)
944
+ #define SEG208 0
945
+ #define SEG209 1
946
+ #define SEG210 2
947
+ #define SEG211 3
948
+ #define SEG212 4
949
+ #define SEG213 5
950
+ #define SEG214 6
951
+ #define SEG215 7
952
+
953
+ #define LCDDR12 _SFR_MEM8(0xF8)
954
+ #define SEG216 0
955
+ #define SEG217 1
956
+ #define SEG218 2
957
+ #define SEG219 3
958
+ #define SEG220 4
959
+ #define SEG221 5
960
+ #define SEG222 6
961
+ #define SEG223 7
962
+
963
+ #define LCDDR13 _SFR_MEM8(0xF9)
964
+ #define SEG224 0
965
+
966
+ #define LCDDR14 _SFR_MEM8(0xFA)
967
+
968
+ #define LCDDR15 _SFR_MEM8(0xFB)
969
+ #define SEG300 0
970
+ #define SEG301 1
971
+ #define SEG302 2
972
+ #define SEG303 3
973
+ #define SEG304 4
974
+ #define SEG305 5
975
+ #define SEG306 6
976
+ #define SEG307 7
977
+
978
+ #define LCDDR16 _SFR_MEM8(0xFC)
979
+ #define SEG308 0
980
+ #define SEG309 1
981
+ #define SEG310 2
982
+ #define SEG311 3
983
+ #define SEG312 4
984
+ #define SEG313 5
985
+ #define SEG314 6
986
+ #define SEG315 7
987
+
988
+ #define LCDDR17 _SFR_MEM8(0xFD)
989
+ #define SEG316 0
990
+ #define SEG317 1
991
+ #define SEG318 2
992
+ #define SEG319 3
993
+ #define SEG320 4
994
+ #define SEG321 5
995
+ #define SEG322 6
996
+ #define SEG323 7
997
+
998
+ #define LCDDR18 _SFR_MEM8(0xFE)
999
+ #define SEG324 0
1000
+
1001
+ #define LCDDR19 _SFR_MEM8(0xFF)
1002
+
1003
+
1004
+ /* Interrupt vectors */
1005
+ /* Vector 0 is the reset vector */
1006
+ #define INT0_vect_num 1
1007
+ #define INT0_vect _VECTOR(1) /* External Interrupt Request 0 */
1008
+ #define PCINT0_vect_num 2
1009
+ #define PCINT0_vect _VECTOR(2) /* Pin Change Interrupt Request 0 */
1010
+ #define PCINT1_vect_num 3
1011
+ #define PCINT1_vect _VECTOR(3) /* Pin Change Interrupt Request 1 */
1012
+ #define TIMER2_COMP_vect_num 4
1013
+ #define TIMER2_COMP_vect _VECTOR(4) /* Timer/Counter2 Compare Match */
1014
+ #define TIMER2_OVF_vect_num 5
1015
+ #define TIMER2_OVF_vect _VECTOR(5) /* Timer/Counter2 Overflow */
1016
+ #define TIMER1_CAPT_vect_num 6
1017
+ #define TIMER1_CAPT_vect _VECTOR(6) /* Timer/Counter1 Capture Event */
1018
+ #define TIMER1_COMPA_vect_num 7
1019
+ #define TIMER1_COMPA_vect _VECTOR(7) /* Timer/Counter1 Compare Match A */
1020
+ #define TIMER1_COMPB_vect_num 8
1021
+ #define TIMER1_COMPB_vect _VECTOR(8) /* Timer/Counter Compare Match B */
1022
+ #define TIMER1_OVF_vect_num 9
1023
+ #define TIMER1_OVF_vect _VECTOR(9) /* Timer/Counter1 Overflow */
1024
+ #define TIMER0_COMP_vect_num 10
1025
+ #define TIMER0_COMP_vect _VECTOR(10) /* Timer/Counter0 Compare Match */
1026
+ #define TIMER0_OVF_vect_num 11
1027
+ #define TIMER0_OVF_vect _VECTOR(11) /* Timer/Counter0 Overflow */
1028
+ #define SPI_STC_vect_num 12
1029
+ #define SPI_STC_vect _VECTOR(12) /* SPI Serial Transfer Complete */
1030
+ #define USART0_RX_vect_num 13
1031
+ #define USART0_RX_vect _VECTOR(13) /* USART0, Rx Complete */
1032
+ #define USART0_UDRE_vect_num 14
1033
+ #define USART0_UDRE_vect _VECTOR(14) /* USART0 Data register Empty */
1034
+ #define USART0_TX_vect_num 15
1035
+ #define USART0_TX_vect _VECTOR(15) /* USART0, Tx Complete */
1036
+ #define USI_START_vect_num 16
1037
+ #define USI_START_vect _VECTOR(16) /* USI Start Condition */
1038
+ #define USI_OVERFLOW_vect_num 17
1039
+ #define USI_OVERFLOW_vect _VECTOR(17) /* USI Overflow */
1040
+ #define ANALOG_COMP_vect_num 18
1041
+ #define ANALOG_COMP_vect _VECTOR(18) /* Analog Comparator */
1042
+ #define ADC_vect_num 19
1043
+ #define ADC_vect _VECTOR(19) /* ADC Conversion Complete */
1044
+ #define EE_READY_vect_num 20
1045
+ #define EE_READY_vect _VECTOR(20) /* EEPROM Ready */
1046
+ #define SPM_READY_vect_num 21
1047
+ #define SPM_READY_vect _VECTOR(21) /* Store Program Memory Read */
1048
+ #define LCD_vect_num 22
1049
+ #define LCD_vect _VECTOR(22) /* LCD Start of Frame */
1050
+
1051
+ #define _VECTOR_SIZE 4 /* Size of individual vector. */
1052
+ #define _VECTORS_SIZE (23 * _VECTOR_SIZE)
1053
+
1054
+
1055
+ /* Constants */
1056
+ #define SPM_PAGESIZE (256)
1057
+ #define RAMSTART (0x100)
1058
+ #define RAMSIZE (4096)
1059
+ #define RAMEND (RAMSTART + RAMSIZE - 1)
1060
+ #define XRAMSTART (NA)
1061
+ #define XRAMSIZE (0)
1062
+ #define XRAMEND (RAMEND)
1063
+ #define E2END (0x7FF)
1064
+ #define E2PAGESIZE (8)
1065
+ #define FLASHEND (0xFFFF)
1066
+
1067
+
1068
+ /* Fuses */
1069
+ #define FUSE_MEMORY_SIZE 3
1070
+
1071
+ /* Low Fuse Byte */
1072
+ #define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */
1073
+ #define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */
1074
+ #define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */
1075
+ #define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */
1076
+ #define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */
1077
+ #define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */
1078
+ #define FUSE_CKOUT (unsigned char)~_BV(6) /* Oscillator options */
1079
+ #define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */
1080
+ #define LFUSE_DEFAULT (FUSE_CKDIV8 & FUSE_SUT0 & FUSE_CKSEL3 & FUSE_CKSEL2 & FUSE_CKSEL0)
1081
+
1082
+ /* High Fuse Byte */
1083
+ #define FUSE_BOOTRST (unsigned char)~_BV(0) /* Select Reset Vector */
1084
+ #define FUSE_BOOTSZ0 (unsigned char)~_BV(1) /* Select Boot Size */
1085
+ #define FUSE_BOOTSZ1 (unsigned char)~_BV(2) /* Select Boot Size */
1086
+ #define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */
1087
+ #define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog timer always on */
1088
+ #define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */
1089
+ #define FUSE_JTAGEN (unsigned char)~_BV(6) /* Enable JTAG */
1090
+ #define FUSE_OCDEN (unsigned char)~_BV(7) /* Enable OCD */
1091
+ #define HFUSE_DEFAULT (FUSE_JTAGEN & FUSE_SPIEN & FUSE_BOOTSZ1 & FUSE_BOOTSZ0)
1092
+
1093
+ /* Extended Fuse Byte */
1094
+ #define FUSE_RESERVED (unsigned char)~_BV(0) /* Reserved fuse bit, do not program */
1095
+ #define FUSE_BODLEVEL0 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */
1096
+ #define FUSE_BODLEVEL1 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */
1097
+ #define EFUSE_DEFAULT (0xFF)
1098
+
1099
+
1100
+ /* Lock Bits */
1101
+ #define __LOCK_BITS_EXIST
1102
+ #define __BOOT_LOCK_BITS_0_EXIST
1103
+ #define __BOOT_LOCK_BITS_1_EXIST
1104
+
1105
+
1106
+ /* Signature */
1107
+ #define SIGNATURE_0 0x1E
1108
+ #define SIGNATURE_1 0x96
1109
+ #define SIGNATURE_2 0x0B
1110
+
1111
+
1112
+ /* Device Pin Definitions */
1113
+ #define RXD_DDR DDRE
1114
+ #define RXD_PORT PORTE
1115
+ #define RXD_PIN PINE
1116
+ #define RXD_BIT 0
1117
+
1118
+ #define PCINT0_DDR DDRE
1119
+ #define PCINT0_PORT PORTE
1120
+ #define PCINT0_PIN PINE
1121
+ #define PCINT0_BIT 0
1122
+
1123
+ #define TXD_DDR DDRE
1124
+ #define TXD_PORT PORTE
1125
+ #define TXD_PIN PINE
1126
+ #define TXD_BIT 1
1127
+
1128
+ #define PCINT1_DDR DDRE
1129
+ #define PCINT1_PORT PORTE
1130
+ #define PCINT1_PIN PINE
1131
+ #define PCINT1_BIT 1
1132
+
1133
+ #define XCK_DDR DDRE
1134
+ #define XCK_PORT PORTE
1135
+ #define XCK_PIN PINE
1136
+ #define XCK_BIT 2
1137
+
1138
+ #define AIN0_DDR DDRE
1139
+ #define AIN0_PORT PORTE
1140
+ #define AIN0_PIN PINE
1141
+ #define AIN0_BIT 2
1142
+
1143
+ #define PCINT2_DDR DDRE
1144
+ #define PCINT2_PORT PORTE
1145
+ #define PCINT2_PIN PINE
1146
+ #define PCINT2_BIT 2
1147
+
1148
+ #define AIN1_DDR DDRE
1149
+ #define AIN1_PORT PORTE
1150
+ #define AIN1_PIN PINE
1151
+ #define AIN1_BIT 3
1152
+
1153
+ #define PCINT3_DDR DDRE
1154
+ #define PCINT3_PORT PORTE
1155
+ #define PCINT3_PIN PINE
1156
+ #define PCINT3_BIT 3
1157
+
1158
+ #define USCK_DDR DDRE
1159
+ #define USCK_PORT PORTE
1160
+ #define USCK_PIN PINE
1161
+ #define USCK_BIT 4
1162
+
1163
+ #define SCL_DDR DDRE
1164
+ #define SCL_PORT PORTE
1165
+ #define SCL_PIN PINE
1166
+ #define SCL_BIT 4
1167
+
1168
+ #define PCINT4_DDR DDRE
1169
+ #define PCINT4_PORT PORTE
1170
+ #define PCINT4_PIN PINE
1171
+ #define PCINT4_BIT 4
1172
+
1173
+ #define DI_DDR DDRE
1174
+ #define DI_PORT PORTE
1175
+ #define DI_PIN PINE
1176
+ #define DI_BIT 5
1177
+
1178
+ #define SDA_DDR DDRE
1179
+ #define SDA_PORT PORTE
1180
+ #define SDA_PIN PINE
1181
+ #define SDA_BIT 5
1182
+
1183
+ #define PCINT5_DDR DDRE
1184
+ #define PCINT5_PORT PORTE
1185
+ #define PCINT5_PIN PINE
1186
+ #define PCINT5_BIT 5
1187
+
1188
+ #define DO_DDR DDRE
1189
+ #define DO_PORT PORTE
1190
+ #define DO_PIN PINE
1191
+ #define DO_BIT 6
1192
+
1193
+ #define PCINT6_DDR DDRE
1194
+ #define PCINT6_PORT PORTE
1195
+ #define PCINT6_PIN PINE
1196
+ #define PCINT6_BIT 6
1197
+
1198
+ #define PCINT7_DDR DDRE
1199
+ #define PCINT7_PORT PORTE
1200
+ #define PCINT7_PIN PINE
1201
+ #define PCINT7_BIT 7
1202
+
1203
+ #define SS_DDR DDRB
1204
+ #define SS_PORT PORTB
1205
+ #define SS_PIN PINB
1206
+ #define SS_BIT 0
1207
+
1208
+ #define PCINT8_DDR DDRB
1209
+ #define PCINT8_PORT PORTB
1210
+ #define PCINT8_PIN PINB
1211
+ #define PCINT8_BIT 0
1212
+
1213
+ #define SCK_DDR DDRB
1214
+ #define SCK_PORT PORTB
1215
+ #define SCK_PIN PINB
1216
+ #define SCK_BIT 1
1217
+
1218
+ #define PCINT9_DDR DDRB
1219
+ #define PCINT9_PORT PORTB
1220
+ #define PCINT9_PIN PINB
1221
+ #define PCINT9_BIT 1
1222
+
1223
+ #define MOSI_DDR DDRB
1224
+ #define MOSI_PORT PORTB
1225
+ #define MOSI_PIN PINB
1226
+ #define MOSI_BIT 2
1227
+
1228
+ #define PCINT10_DDR DDRB
1229
+ #define PCINT10_PORT PORTB
1230
+ #define PCINT10_PIN PINB
1231
+ #define PCINT10_BIT 2
1232
+
1233
+ #define MISO_DDR DDRB
1234
+ #define MISO_PORT PORTB
1235
+ #define MISO_PIN PINB
1236
+ #define MISO_BIT 3
1237
+
1238
+ #define PCINT11_DDR DDRB
1239
+ #define PCINT11_PORT PORTB
1240
+ #define PCINT11_PIN PINB
1241
+ #define PCINT11_BIT 3
1242
+
1243
+ #define OC0_DDR DDRB
1244
+ #define OC0_PORT PORTB
1245
+ #define OC0_PIN PINB
1246
+ #define OC0_BIT 4
1247
+
1248
+ #define PCINT12_DDR DDRB
1249
+ #define PCINT12_PORT PORTB
1250
+ #define PCINT12_PIN PINB
1251
+ #define PCINT12_BIT 4
1252
+
1253
+ #define OC1A_DDR DDRB
1254
+ #define OC1A_PORT PORTB
1255
+ #define OC1A_PIN PINB
1256
+ #define OC1A_BIT 5
1257
+
1258
+ #define PCINT13_DDR DDRB
1259
+ #define PCINT13_PORT PORTB
1260
+ #define PCINT13_PIN PINB
1261
+ #define PCINT13_BIT 5
1262
+
1263
+ #define OC1B_DDR DDRB
1264
+ #define OC1B_PORT PORTB
1265
+ #define OC1B_PIN PINB
1266
+ #define OC1B_BIT 6
1267
+
1268
+ #define PCINT14_DDR DDRB
1269
+ #define PCINT14_PORT PORTB
1270
+ #define PCINT14_PIN PINB
1271
+ #define PCINT14_BIT 6
1272
+
1273
+ #define OC2_DDR DDRB
1274
+ #define OC2_PORT PORTB
1275
+ #define OC2_PIN PINB
1276
+ #define OC2_BIT 7
1277
+
1278
+ #define PCINT15_DDR DDRB
1279
+ #define PCINT15_PORT PORTB
1280
+ #define PCINT15_PIN PINB
1281
+ #define PCINT15_BIT 7
1282
+
1283
+ #define T1_DDR DDRG
1284
+ #define T1_PORT PORTG
1285
+ #define T1_PIN PING
1286
+ #define T1_BIT 3
1287
+
1288
+ #define SEG24_DDR DDRG
1289
+ #define SEG24_PORT PORTG
1290
+ #define SEG24_PIN PING
1291
+ #define SEG24_BIT 3
1292
+
1293
+ #define T0_DDR DDRG
1294
+ #define T0_PORT PORTG
1295
+ #define T0_PIN PING
1296
+ #define T0_BIT 4
1297
+
1298
+ #define SEG23_DDR DDRG
1299
+ #define SEG23_PORT PORTG
1300
+ #define SEG23_PIN PING
1301
+ #define SEG23_BIT 4
1302
+
1303
+ #define SEG22_DDR DDRD
1304
+ #define SEG22_PORT PORTD
1305
+ #define SEG22_PIN PIND
1306
+ #define SEG22_BIT 0
1307
+
1308
+ #define SEG21_DDR DDRD
1309
+ #define SEG21_PORT PORTD
1310
+ #define SEG21_PIN PIND
1311
+ #define SEG21_BIT 1
1312
+
1313
+ #define SEG20_DDR DDRD
1314
+ #define SEG20_PORT PORTD
1315
+ #define SEG20_PIN PIND
1316
+ #define SEG20_BIT 2
1317
+
1318
+ #define SEG19_DDR DDRD
1319
+ #define SEG19_PORT PORTD
1320
+ #define SEG19_PIN PIND
1321
+ #define SEG19_BIT 3
1322
+
1323
+ #define SEG18_DDR DDRD
1324
+ #define SEG18_PORT PORTD
1325
+ #define SEG18_PIN PIND
1326
+ #define SEG18_BIT 4
1327
+
1328
+ #define SEG17_DDR DDRD
1329
+ #define SEG17_PORT PORTD
1330
+ #define SEG17_PIN PIND
1331
+ #define SEG17_BIT 5
1332
+
1333
+ #define SEG16_DDR DDRD
1334
+ #define SEG16_PORT PORTD
1335
+ #define SEG16_PIN PIND
1336
+ #define SEG16_BIT 6
1337
+
1338
+ #define SEG15_DDR DDRD
1339
+ #define SEG15_PORT PORTD
1340
+ #define SEG15_PIN PIND
1341
+ #define SEG15_BIT 7
1342
+
1343
+ #define SEG14_DDR DDRG
1344
+ #define SEG14_PORT PORTG
1345
+ #define SEG14_PIN PING
1346
+ #define SEG14_BIT 0
1347
+
1348
+ #define SEG13_DDR DDRG
1349
+ #define SEG13_PORT PORTG
1350
+ #define SEG13_PIN PING
1351
+ #define SEG13_BIT 1
1352
+
1353
+ #define SEG12_DDR DDRC
1354
+ #define SEG12_PORT PORTC
1355
+ #define SEG12_PIN PINC
1356
+ #define SEG12_BIT 0
1357
+
1358
+ #define SEG11_DDR DDRC
1359
+ #define SEG11_PORT PORTC
1360
+ #define SEG11_PIN PINC
1361
+ #define SEG11_BIT 1
1362
+
1363
+ #define SEG10_DDR DDRC
1364
+ #define SEG10_PORT PORTC
1365
+ #define SEG10_PIN PINC
1366
+ #define SEG10_BIT 2
1367
+
1368
+ #define SEG9_DDR DDRC
1369
+ #define SEG9_PORT PORTC
1370
+ #define SEG9_PIN PINC
1371
+ #define SEG9_BIT 3
1372
+
1373
+ #define SEG8_DDR DDRC
1374
+ #define SEG8_PORT PORTC
1375
+ #define SEG8_PIN PINC
1376
+ #define SEG8_BIT 4
1377
+
1378
+ #define SEG7_DDR DDRC
1379
+ #define SEG7_PORT PORTC
1380
+ #define SEG7_PIN PINC
1381
+ #define SEG7_BIT 5
1382
+
1383
+ #define SEG6_DDR DDRC
1384
+ #define SEG6_PORT PORTC
1385
+ #define SEG6_PIN PINC
1386
+ #define SEG6_BIT 6
1387
+
1388
+ #define SEG5_DDR DDRC
1389
+ #define SEG5_PORT PORTC
1390
+ #define SEG5_PIN PINC
1391
+ #define SEG5_BIT 7
1392
+
1393
+ #define SEG4_DDR DDRG
1394
+ #define SEG4_PORT PORTG
1395
+ #define SEG4_PIN PING
1396
+ #define SEG4_BIT 2
1397
+
1398
+ #define SEG3_DDR DDRA
1399
+ #define SEG3_PORT PORTA
1400
+ #define SEG3_PIN PINA
1401
+ #define SEG3_BIT 7
1402
+
1403
+ #define SEG2_DDR DDRA
1404
+ #define SEG2_PORT PORTA
1405
+ #define SEG2_PIN PINA
1406
+ #define SEG2_BIT 6
1407
+
1408
+ #define SEG1_DDR DDRA
1409
+ #define SEG1_PORT PORTA
1410
+ #define SEG1_PIN PINA
1411
+ #define SEG1_BIT 5
1412
+
1413
+ #define SEG0_DDR DDRA
1414
+ #define SEG0_PORT PORTA
1415
+ #define SEG0_PIN PINA
1416
+ #define SEG0_BIT 4
1417
+
1418
+ #define COM3_DDR DDRA
1419
+ #define COM3_PORT PORTA
1420
+ #define COM3_PIN PINA
1421
+ #define COM3_BIT 3
1422
+
1423
+ #define COM2_DDR DDRA
1424
+ #define COM2_PORT PORTA
1425
+ #define COM2_PIN PINA
1426
+ #define COM2_BIT 2
1427
+
1428
+ #define COM1_DDR DDRA
1429
+ #define COM1_PORT PORTA
1430
+ #define COM1_PIN PINA
1431
+ #define COM1_BIT 1
1432
+
1433
+ #define COM0_DDR DDRA
1434
+ #define COM0_PORT PORTA
1435
+ #define COM0_PIN PINA
1436
+ #define COM0_BIT 0
1437
+
1438
+ #define ADC7_DDR DDRF
1439
+ #define ADC7_PORT PORTF
1440
+ #define ADC7_PIN PINF
1441
+ #define ADC7_BIT 7
1442
+
1443
+ #define ADC6_DDR DDRF
1444
+ #define ADC6_PORT PORTF
1445
+ #define ADC6_PIN PINF
1446
+ #define ADC6_BIT 6
1447
+
1448
+ #define TD0_DDR DDRF
1449
+ #define TD0_PORT PORTF
1450
+ #define TD0_PIN PINF
1451
+ #define TD0_BIT 6
1452
+
1453
+ #define ADC5_DDR DDRF
1454
+ #define ADC5_PORT PORTF
1455
+ #define ADC5_PIN PINF
1456
+ #define ADC5_BIT 5
1457
+
1458
+ #define ADC4_DDR DDRF
1459
+ #define ADC4_PORT PORTF
1460
+ #define ADC4_PIN PINF
1461
+ #define ADC4_BIT 4
1462
+
1463
+ #define ADC3_DDR DDRF
1464
+ #define ADC3_PORT PORTF
1465
+ #define ADC3_PIN PINF
1466
+ #define ADC3_BIT 3
1467
+
1468
+ #define ADC2_DDR DDRF
1469
+ #define ADC2_PORT PORTF
1470
+ #define ADC2_PIN PINF
1471
+ #define ADC2_BIT 2
1472
+
1473
+ #define ADC1_DDR DDRF
1474
+ #define ADC1_PORT PORTF
1475
+ #define ADC1_PIN PINF
1476
+ #define ADC1_BIT 1
1477
+
1478
+ #define ADC0_DDR DDRF
1479
+ #define ADC0_PORT PORTF
1480
+ #define ADC0_PIN PINF
1481
+ #define ADC0_BIT 0
1482
+
1483
+ #define SLEEP_MODE_IDLE (0x00<<1)
1484
+ #define SLEEP_MODE_ADC (0x01<<1)
1485
+ #define SLEEP_MODE_PWR_DOWN (0x02<<1)
1486
+ #define SLEEP_MODE_PWR_SAVE (0x03<<1)
1487
+ #define SLEEP_MODE_STANDBY (0x06<<1)
1488
+
1489
+ #endif /* _AVR_ATmega649_H_ */
1490
+