aarch64 1.0.1 → 2.0.0

data/lib/aarch64/instructions/swpb.rb

@@ -6,28 +6,28 @@ module AArch64
     # SWPALB  <Ws>, <Wt>, [<Xn|SP>]
     # SWPB  <Ws>, <Wt>, [<Xn|SP>]
     # SWPLB  <Ws>, <Wt>, [<Xn|SP>]
-    class SWPB
+    class SWPB < Instruction
       def initialize rs, rt, rn, a, r
-        @rs = rs
-        @rt = rt
-        @rn = rn
-        @a  = a
-        @r  = r
+        @rs = check_mask(rs, 0x1f)
+        @rt = check_mask(rt, 0x1f)
+        @rn = check_mask(rn, 0x1f)
+        @a  = check_mask(a, 0x01)
+        @r  = check_mask(r, 0x01)
       end
 
       def encode
-        SWPB(@a, @r, @rs.to_i, @rn.to_i, @rt.to_i)
+        SWPB(@a, @r, @rs, @rn, @rt)
       end
 
       private
 
       def SWPB a, r, rs, rn, rt
         insn = 0b00_111_0_00_0_0_1_00000_1_000_00_00000_00000
-        insn |= ((a & 0x1) << 23)
-        insn |= ((r & 0x1) << 22)
-        insn |= ((rs & 0x1f) << 16)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rt & 0x1f)
+        insn |= ((a) << 23)
+        insn |= ((r) << 22)
+        insn |= ((rs) << 16)
+        insn |= ((rn) << 5)
+        insn |= (rt)
         insn
       end
     end

data/lib/aarch64/instructions/swph.rb

@@ -6,28 +6,28 @@ module AArch64
     # SWPALH  <Ws>, <Wt>, [<Xn|SP>]
     # SWPH  <Ws>, <Wt>, [<Xn|SP>]
     # SWPLH  <Ws>, <Wt>, [<Xn|SP>]
-    class SWPH
+    class SWPH < Instruction
       def initialize rs, rt, rn, a, r
-        @rs = rs
-        @rt = rt
-        @rn = rn
-        @a  = a
-        @r  = r
+        @rs = check_mask(rs, 0x1f)
+        @rt = check_mask(rt, 0x1f)
+        @rn = check_mask(rn, 0x1f)
+        @a  = check_mask(a, 0x01)
+        @r  = check_mask(r, 0x01)
       end
 
       def encode
-        SWPH(@a, @r, @rs.to_i, @rn.to_i, @rt.to_i)
+        SWPH(@a, @r, @rs, @rn, @rt)
       end
 
       private
 
       def SWPH a, r, rs, rn, rt
         insn = 0b01_111_0_00_0_0_1_00000_1_000_00_00000_00000
-        insn |= ((a & 0x1) << 23)
-        insn |= ((r & 0x1) << 22)
-        insn |= ((rs & 0x1f) << 16)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rt & 0x1f)
+        insn |= ((a) << 23)
+        insn |= ((r) << 22)
+        insn |= ((rs) << 16)
+        insn |= ((rn) << 5)
+        insn |= (rt)
         insn
       end
     end

data/lib/aarch64/instructions/sys.rb

@@ -3,28 +3,28 @@ module AArch64
     # SYS -- A64
     # System instruction
     # SYS  #<op1>, <Cn>, <Cm>, #<op2>{, <Xt>}
-    class SYS
+    class SYS < Instruction
       def initialize op1, cn, cm, op2, xt
-        @op1 = op1
-        @cn  = cn
-        @cm  = cm
-        @op2 = op2
-        @xt  = xt
+        @op1 = check_mask(op1, 0x07)
+        @cn  = check_mask(cn, 0x0f)
+        @cm  = check_mask(cm, 0x0f)
+        @op2 = check_mask(op2, 0x07)
+        @xt  = check_mask(xt, 0x1f)
       end
 
       def encode
-        SYS(@op1, @cn, @cm, @op2, @xt.to_i)
+        SYS(@op1, @cn, @cm, @op2, @xt)
       end
 
       private
 
       def SYS op1, crn, crm, op2, rt
         insn = 0b1101010100_0_01_000_0000_0000_000_00000
-        insn |= ((op1 & 0x7) << 16)
-        insn |= ((crn & 0xf) << 12)
-        insn |= ((crm & 0xf) << 8)
-        insn |= ((op2 & 0x7) << 5)
-        insn |= (rt & 0x1f)
+        insn |= ((op1) << 16)
+        insn |= ((crn) << 12)
+        insn |= ((crm) << 8)
+        insn |= ((op2) << 5)
+        insn |= (rt)
         insn
       end
     end

data/lib/aarch64/instructions/sysl.rb

@@ -3,28 +3,28 @@ module AArch64
     # SYSL -- A64
     # System instruction with result
     # SYSL  <Xt>, #<op1>, <Cn>, <Cm>, #<op2>
-    class SYSL
+    class SYSL < Instruction
       def initialize xt, op1, cn, cm, op2
-        @xt  = xt
-        @op1 = op1
-        @cn  = cn
-        @cm  = cm
-        @op2 = op2
+        @xt  = check_mask(xt, 0x1f)
+        @op1 = check_mask(op1, 0x07)
+        @cn  = check_mask(cn, 0x0f)
+        @cm  = check_mask(cm, 0x0f)
+        @op2 = check_mask(op2, 0x07)
       end
 
       def encode
-        SYSL(@op1, @cn.to_i, @cm.to_i, @op2, @xt.to_i)
+        SYSL(@op1, @cn, @cm, @op2, @xt)
       end
 
       private
 
       def SYSL op1, crn, crm, op2, rt
         insn = 0b1101010100_1_01_000_0000_0000_000_00000
-        insn |= ((op1 & 0x7) << 16)
-        insn |= ((crn & 0xf) << 12)
-        insn |= ((crm & 0xf) << 8)
-        insn |= ((op2 & 0x7) << 5)
-        insn |= (rt & 0x1f)
+        insn |= ((op1) << 16)
+        insn |= ((crn) << 12)
+        insn |= ((crm) << 8)
+        insn |= ((op2) << 5)
+        insn |= (rt)
         insn
       end
     end

data/lib/aarch64/instructions/tbnz.rb

@@ -3,26 +3,26 @@ module AArch64
     # TBNZ -- A64
     # Test bit and Branch if Nonzero
     # TBNZ  <R><t>, #<imm>, <label>
-    class TBNZ
+    class TBNZ < Instruction
       def initialize rt, imm, label, sf
-        @rt    = rt
-        @imm   = imm
+        @rt    = check_mask(rt, 0x1f)
+        @imm   = check_mask(imm, 0x1f)
         @label = label
-        @sf    = sf
+        @sf    = check_mask(sf, 0x1)
       end
 
       def encode
-        TBNZ(@sf, @imm, @label.to_i / 4, @rt.to_i)
+        TBNZ(@sf, @imm, check_mask(unwrap_label(@label), 0x3fff), @rt)
       end
 
       private
 
       def TBNZ b5, b40, imm14, rt
         insn = 0b0_011011_1_00000_00000000000000_00000
-        insn |= ((b5 & 0x1) << 31)
-        insn |= ((b40 & 0x1f) << 19)
-        insn |= ((imm14 & 0x3fff) << 5)
-        insn |= (rt & 0x1f)
+        insn |= (b5 << 31)
+        insn |= (b40 << 19)
+        insn |= (imm14 << 5)
+        insn |= rt
         insn
       end
     end

data/lib/aarch64/instructions/tbz.rb

@@ -3,26 +3,26 @@ module AArch64
     # TBZ -- A64
     # Test bit and Branch if Zero
     # TBZ  <R><t>, #<imm>, <label>
-    class TBZ
+    class TBZ < Instruction
       def initialize rt, imm, label, sf
-        @rt    = rt
-        @imm   = imm
+        @rt    = check_mask(rt, 0x1f)
+        @imm   = check_mask(imm, 0x1f)
         @label = label
-        @sf    = sf
+        @sf    = check_mask(sf, 0x1)
       end
 
       def encode
-        TBZ(@sf, @imm, @label.to_i / 4, @rt.to_i)
+        TBZ(@sf, @imm, check_mask(unwrap_label(@label), 0x3fff), @rt)
       end
 
       private
 
       def TBZ b5, b40, imm14, rt
         insn = 0b0_011011_0_00000_00000000000000_00000
-        insn |= ((b5 & 0x1) << 31)
-        insn |= ((b40 & 0x1f) << 19)
-        insn |= ((imm14 & 0x3fff) << 5)
-        insn |= (rt & 0x1f)
+        insn |= (b5 << 31)
+        insn |= (b40 << 19)
+        insn |= (imm14 << 5)
+        insn |= rt
         insn
       end
     end

data/lib/aarch64/instructions/tsb.rb

@@ -3,14 +3,8 @@ module AArch64
     # TSB CSYNC -- A64
     # Trace Synchronization Barrier
     # TSB CSYNC
-    class TSB
+    class TSB < Instruction
       def encode
-        TSB()
-      end
-
-      private
-
-      def TSB
         0b1101010100_0_00_011_0010_0010_010_11111
       end
     end

data/lib/aarch64/instructions/ubfm.rb

@@ -4,29 +4,29 @@ module AArch64
     # Unsigned Bitfield Move
     # UBFM  <Wd>, <Wn>, #<immr>, #<imms>
     # UBFM  <Xd>, <Xn>, #<immr>, #<imms>
-    class UBFM
+    class UBFM < Instruction
       def initialize rd, rn, immr, imms, sf
-        @rd   = rd
-        @rn   = rn
-        @immr = immr
-        @imms = imms
-        @sf   = sf
+        @rd   = check_mask(rd, 0x1f)
+        @rn   = check_mask(rn, 0x1f)
+        @immr = check_mask(immr, 0x3f)
+        @imms = check_mask(imms, 0x3f)
+        @sf   = check_mask(sf, 0x01)
       end
 
       def encode
-        UBFM(@sf, @sf, @immr, @imms, @rn.to_i, @rd.to_i)
+        UBFM(@sf, @sf, @immr, @imms, @rn, @rd)
       end
 
       private
 
       def UBFM sf, n, immr, imms, rn, rd
         insn = 0b0_10_100110_0_000000_000000_00000_00000
-        insn |= ((sf & 0x1) << 31)
-        insn |= ((n & 0x1) << 22)
-        insn |= ((immr & 0x3f) << 16)
-        insn |= ((imms & 0x3f) << 10)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rd & 0x1f)
+        insn |= ((sf) << 31)
+        insn |= ((n) << 22)
+        insn |= ((immr) << 16)
+        insn |= ((imms) << 10)
+        insn |= ((rn) << 5)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/udf_perm_undef.rb

@@ -3,9 +3,9 @@ module AArch64
     # UDF -- A64
     # Permanently Undefined
     # UDF  #<imm>
-    class UDF_perm_undef
+    class UDF_perm_undef < Instruction
       def initialize imm
-        @imm = imm
+        @imm = check_mask(imm, 0xffff)
       end
 
       def encode
@@ -16,7 +16,7 @@ module AArch64
 
       def UDF_perm_undef imm16
         insn = 0b0000000000000000_0000000000000000
-        insn |= (imm16 & 0xffff)
+        insn |= (imm16)
         insn
       end
     end

data/lib/aarch64/instructions/udiv.rb

@@ -4,26 +4,26 @@ module AArch64
     # Unsigned Divide
     # UDIV  <Wd>, <Wn>, <Wm>
     # UDIV  <Xd>, <Xn>, <Xm>
-    class UDIV
+    class UDIV < Instruction
       def initialize rd, rn, rm, sf
-        @rd = rd
-        @rn = rn
-        @rm = rm
-        @sf = sf
+        @rd = check_mask(rd, 0x1f)
+        @rn = check_mask(rn, 0x1f)
+        @rm = check_mask(rm, 0x1f)
+        @sf = check_mask(sf, 0x01)
       end
 
       def encode
-        UDIV(@sf, @rm.to_i, @rn.to_i, @rd.to_i)
+        UDIV(@sf, @rm, @rn, @rd)
       end
 
       private
 
       def UDIV sf, rm, rn, rd
         insn = 0b0_0_0_11010110_00000_00001_0_00000_00000
-        insn |= ((sf & 0x1) << 31)
-        insn |= ((rm & 0x1f) << 16)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rd & 0x1f)
+        insn |= ((sf) << 31)
+        insn |= ((rm) << 16)
+        insn |= ((rn) << 5)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/umaddl.rb

@@ -3,26 +3,26 @@ module AArch64
     # UMADDL -- A64
     # Unsigned Multiply-Add Long
     # UMADDL  <Xd>, <Wn>, <Wm>, <Xa>
-    class UMADDL
+    class UMADDL < Instruction
       def initialize xd, wn, wm, xa
-        @xd = xd
-        @wn = wn
-        @wm = wm
-        @xa = xa
+        @xd = check_mask(xd, 0x1f)
+        @wn = check_mask(wn, 0x1f)
+        @wm = check_mask(wm, 0x1f)
+        @xa = check_mask(xa, 0x1f)
       end
 
       def encode
-        UMADDL(@wm.to_i, @xa.to_i, @wn.to_i, @xd.to_i)
+        UMADDL(@wm, @xa, @wn, @xd)
       end
 
       private
 
       def UMADDL rm, ra, rn, rd
         insn = 0b1_00_11011_1_01_00000_0_00000_00000_00000
-        insn |= ((rm & 0x1f) << 16)
-        insn |= ((ra & 0x1f) << 10)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rd & 0x1f)
+        insn |= ((rm) << 16)
+        insn |= ((ra) << 10)
+        insn |= ((rn) << 5)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/umsubl.rb

@@ -3,26 +3,26 @@ module AArch64
     # UMSUBL -- A64
     # Unsigned Multiply-Subtract Long
     # UMSUBL  <Xd>, <Wn>, <Wm>, <Xa>
-    class UMSUBL
+    class UMSUBL < Instruction
       def initialize xd, wn, wm, xa
-        @xd = xd
-        @wn = wn
-        @wm = wm
-        @xa = xa
+        @xd = check_mask(xd, 0x1f)
+        @wn = check_mask(wn, 0x1f)
+        @wm = check_mask(wm, 0x1f)
+        @xa = check_mask(xa, 0x1f)
       end
 
       def encode
-        UMSUBL(@wm.to_i, @xa.to_i, @wn.to_i, @xd.to_i)
+        UMSUBL(@wm, @xa, @wn, @xd)
       end
 
       private
 
       def UMSUBL rm, ra, rn, rd
         insn = 0b1_00_11011_1_01_00000_1_00000_00000_00000
-        insn |= ((rm & 0x1f) << 16)
-        insn |= ((ra & 0x1f) << 10)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rd & 0x1f)
+        insn |= ((rm) << 16)
+        insn |= ((ra) << 10)
+        insn |= ((rn) << 5)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/umulh.rb

@@ -3,24 +3,24 @@ module AArch64
     # UMULH -- A64
     # Unsigned Multiply High
     # UMULH  <Xd>, <Xn>, <Xm>
-    class UMULH
+    class UMULH < Instruction
       def initialize rd, rn, rm
-        @rd = rd
-        @rn = rn
-        @rm = rm
+        @rd = check_mask(rd, 0x1f)
+        @rn = check_mask(rn, 0x1f)
+        @rm = check_mask(rm, 0x1f)
       end
 
       def encode
-        UMULH(@rm.to_i, @rn.to_i, @rd.to_i)
+        UMULH(@rm, @rn, @rd)
       end
 
       private
 
       def UMULH rm, rn, rd
         insn = 0b1_00_11011_1_10_00000_0_11111_00000_00000
-        insn |= ((rm & 0x1f) << 16)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rd & 0x1f)
+        insn |= ((rm) << 16)
+        insn |= ((rn) << 5)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/wfe.rb

@@ -3,16 +3,9 @@ module AArch64
     # WFE -- A64
     # Wait For Event
     # WFE
-    class WFE
+    class WFE < Instruction
       def encode
-        WFE()
-      end
-
-      private
-
-      def WFE
-        insn = 0b1101010100_0_00_011_0010_0000_010_11111
-        insn
+        0b1101010100_0_00_011_0010_0000_010_11111
       end
     end
   end

data/lib/aarch64/instructions/wfet.rb

@@ -3,20 +3,20 @@ module AArch64
     # WFET -- A64
     # Wait For Event with Timeout
     # WFET  <Xt>
-    class WFET
+    class WFET < Instruction
       def initialize rd
-        @rd = rd
+        @rd = check_mask(rd, 0x1f)
       end
 
       def encode
-        WFET(@rd.to_i)
+        WFET(@rd)
       end
 
       private
 
       def WFET rd
         insn = 0b11010101000000110001_0000_000_00000
-        insn |= (rd & 0x1f)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/wfi.rb

@@ -3,7 +3,7 @@ module AArch64
     # WFI -- A64
     # Wait For Interrupt
     # WFI
-    class WFI
+    class WFI < Instruction
       def encode
         0b1101010100_0_00_011_0010_0000_011_11111
       end

data/lib/aarch64/instructions/wfit.rb

@@ -3,20 +3,20 @@ module AArch64
     # WFIT -- A64
     # Wait For Interrupt with Timeout
     # WFIT  <Xt>
-    class WFIT
+    class WFIT < Instruction
       def initialize rd
-        @rd = rd
+        @rd = check_mask(rd, 0x1f)
       end
 
       def encode
-        WFIT(@rd.to_i)
+        WFIT(@rd)
       end
 
       private
 
       def WFIT rd
         insn = 0b11010101000000110001_0000_001_00000
-        insn |= (rd & 0x1f)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/xaflag.rb

@@ -3,7 +3,7 @@ module AArch64
     # XAFLAG -- A64
     # Convert floating-point condition flags from external format to Arm format
     # XAFLAG
-    class XAFLAG
+    class XAFLAG < Instruction
       def encode
         0b1101010100_0_00_000_0100_0000_001_11111
       end

data/lib/aarch64/instructions/xpac.rb

@@ -5,22 +5,22 @@ module AArch64
     # XPACD  <Xd>
     # XPACI  <Xd>
     # XPACLRI
-    class XPAC
+    class XPAC < Instruction
       def initialize rd, d
-        @rd = rd
-        @d  = d
+        @rd = check_mask(rd, 0x1f)
+        @d  = check_mask(d, 0x01)
       end
 
       def encode
-        XPAC(@d, @rd.to_i)
+        XPAC(@d, @rd)
       end
 
       private
 
       def XPAC d, rd
         insn = 0b1_1_0_11010110_00001_0_1_000_0_11111_00000
-        insn |= ((d & 0x1) << 10)
-        insn |= (rd & 0x1f)
+        insn |= ((d) << 10)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/xpaclri.rb

@@ -3,7 +3,7 @@ module AArch64
     # XPACLRI -- A64
     # Strip Pointer Authentication Code
     # XPACLRI
-    class XPACLRI
+    class XPACLRI < Instruction
       def encode
         0b11010101000000110010000011111111
       end

data/lib/aarch64/instructions/yield.rb

@@ -3,16 +3,9 @@ module AArch64
     # YIELD -- A64
     # YIELD
     # YIELD
-    class YIELD
+    class YIELD < Instruction
       def encode
-        YIELD()
-      end
-
-      private
-
-      def YIELD
-        insn = 0b1101010100_0_00_011_0010_0000_001_11111
-        insn
+        0b1101010100_0_00_011_0010_0000_001_11111
       end
     end
   end

data/lib/aarch64/instructions.rb

@@ -1,5 +1,31 @@
 module AArch64
   module Instructions
+    class Instruction
+      private
+
+      def unwrap_label label
+        label.unwrap_label / 4
+      end
+
+      def check_mask val, mask
+        val = val.to_i
+
+        if val > mask
+          raise "Expected a #{popcount(mask)} bit number, but got 0x#{val.to_s(16)}"
+        end
+        val & mask
+      end
+
+      def popcount x
+        x -= ((x >> 1) & 0x55555555)
+        x = (x & 0x33333333) + ((x >> 2) & 0x33333333)
+        x = (x + (x >> 4)) & 0x0F0F0F0F
+        x += (x >> 8)
+        x += (x >> 16)
+        x & 0x3F
+      end
+    end
+
     autoload :ADC, "aarch64/instructions/adc"
     autoload :ADCS, "aarch64/instructions/adcs"
     autoload :ADD_addsub_ext, "aarch64/instructions/add_addsub_ext"
@@ -178,14 +204,6 @@ module AArch64
     autoload :SBFM, "aarch64/instructions/sbfm"
     autoload :SDIV, "aarch64/instructions/sdiv"
     autoload :SETF, "aarch64/instructions/setf"
-    autoload :SETGP, "aarch64/instructions/setgp"
-    autoload :SETGPN, "aarch64/instructions/setgpn"
-    autoload :SETGPT, "aarch64/instructions/setgpt"
-    autoload :SETGPTN, "aarch64/instructions/setgptn"
-    autoload :SETP, "aarch64/instructions/setp"
-    autoload :SETPN, "aarch64/instructions/setpn"
-    autoload :SETPT, "aarch64/instructions/setpt"
-    autoload :SETPTN, "aarch64/instructions/setptn"
     autoload :SEV, "aarch64/instructions/sev"
     autoload :SEVL, "aarch64/instructions/sevl"
     autoload :SMADDL, "aarch64/instructions/smaddl"