aarch64 1.0.1 → 2.0.0

data/lib/aarch64/instructions/pacga.rb

@@ -3,24 +3,24 @@ module AArch64
     # PACGA -- A64
     # Pointer Authentication Code, using Generic key
     # PACGA  <Xd>, <Xn>, <Xm|SP>
-    class PACGA
+    class PACGA < Instruction
       def initialize rd, rn, rm
-        @rd = rd
-        @rn = rn
-        @rm = rm
+        @rd = check_mask(rd, 0x1f)
+        @rn = check_mask(rn, 0x1f)
+        @rm = check_mask(rm, 0x1f)
       end
 
       def encode
-        PACGA(@rm.to_i, @rn.to_i, @rd.to_i)
+        PACGA(@rm, @rn, @rd)
       end
 
       private
 
       def PACGA rm, rn, rd
         insn = 0b1_0_0_11010110_00000_001100_00000_00000
-        insn |= ((rm & 0x1f) << 16)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rd & 0x1f)
+        insn |= ((rm) << 16)
+        insn |= ((rn) << 5)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/pacia.rb

@@ -7,24 +7,24 @@ module AArch64
     # PACIA1716
     # PACIASP
     # PACIAZ
-    class PACIA
+    class PACIA < Instruction
       def initialize rd, rn, z
-        @rd = rd
-        @rn = rn
-        @z  = z
+        @rd = check_mask(rd, 0x1f)
+        @rn = check_mask(rn, 0x1f)
+        @z  = check_mask(z, 0x01)
       end
 
       def encode
-        PACIA(@z, @rn.to_i, @rd.to_i)
+        PACIA(@z, @rn, @rd)
       end
 
       private
 
       def PACIA z, rn, rd
         insn = 0b1_1_0_11010110_00001_0_0_0_000_00000_00000
-        insn |= ((z & 0x1) << 13)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rd & 0x1f)
+        insn |= ((z) << 13)
+        insn |= ((rn) << 5)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/pacia2.rb

@@ -5,10 +5,10 @@ module AArch64
     # PACIA1716
     # PACIASP
     # PACIAZ
-    class PACIA2
+    class PACIA2 < Instruction
       def initialize crm, op2
-        @crm = crm
-        @op2 = op2
+        @crm = check_mask(crm, 0x0f)
+        @op2 = check_mask(op2, 0x07)
       end
 
       def encode
@@ -19,8 +19,8 @@ module AArch64
 
       def PACIA2 crm, op2
         insn = 0b11010101000000110010_0000_000_11111
-        insn |= ((crm & 0xf) << 8)
-        insn |= ((op2 & 0x7) << 5)
+        insn |= ((crm) << 8)
+        insn |= ((op2) << 5)
         insn
       end
     end

data/lib/aarch64/instructions/pacib.rb

@@ -7,24 +7,24 @@ module AArch64
     # PACIB1716
     # PACIBSP
     # PACIBZ
-    class PACIB
+    class PACIB < Instruction
       def initialize rd, rn, z
-        @rd = rd
-        @rn = rn
-        @z  = z
+        @rd = check_mask(rd, 0x1f)
+        @rn = check_mask(rn, 0x1f)
+        @z  = check_mask(z, 0x01)
       end
 
       def encode
-        PACIB(@z, @rn.to_i, @rd.to_i)
+        PACIB(@z, @rn, @rd)
       end
 
       private
 
       def PACIB z, rn, rd
         insn = 0b1_1_0_11010110_00001_0_0_0_001_00000_00000
-        insn |= ((z & 0x1) << 13)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rd & 0x1f)
+        insn |= ((z) << 13)
+        insn |= ((rn) << 5)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/prfm_imm.rb

@@ -3,24 +3,24 @@ module AArch64
     # PRFM (immediate) -- A64
     # Prefetch Memory (immediate)
     # PRFM  (<prfop>|#<imm5>), [<Xn|SP>{, #<pimm>}]
-    class PRFM_imm
+    class PRFM_imm < Instruction
       def initialize rt, rn, imm12
-        @rt    = rt
-        @rn    = rn
-        @imm12 = imm12
+        @rt    = check_mask(rt, 0x1f)
+        @rn    = check_mask(rn, 0x1f)
+        @imm12 = check_mask(imm12, 0xfff)
       end
 
       def encode
-        PRFM_imm(@imm12, @rn.to_i, @rt.to_i)
+        PRFM_imm(@imm12, @rn, @rt)
       end
 
       private
 
       def PRFM_imm imm12, rn, rt
         insn = 0b11_111_0_01_10_000000000000_00000_00000
-        insn |= ((imm12 & 0xfff) << 10)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rt & 0x1f)
+        insn |= ((imm12) << 10)
+        insn |= ((rn) << 5)
+        insn |= (rt)
         insn
       end
     end

data/lib/aarch64/instructions/prfm_lit.rb

@@ -3,22 +3,22 @@ module AArch64
     # PRFM (literal) -- A64
     # Prefetch Memory (literal)
     # PRFM  (<prfop>|#<imm5>), <label>
-    class PRFM_lit
-      def initialize rt, imm19
-        @imm19 = imm19
-        @rt    = rt
+    class PRFM_lit < Instruction
+      def initialize rt, label
+        @label = label
+        @rt    = check_mask(rt, 0x1f)
       end
 
       def encode
-        PRFM_lit(@imm19.to_i / 4, @rt.to_i)
+        PRFM_lit(check_mask(unwrap_label(@label), 0x7ffff), @rt)
       end
 
       private
 
-      def PRFM_lit imm19, rt
+      def PRFM_lit label, rt
         insn = 0b11_011_0_00_0000000000000000000_00000
-        insn |= ((imm19 & 0x7ffff) << 5)
-        insn |= (rt & 0x1f)
+        insn |= (label << 5)
+        insn |= rt
         insn
       end
     end

data/lib/aarch64/instructions/prfm_reg.rb

@@ -3,28 +3,28 @@ module AArch64
     # PRFM (register) -- A64
     # Prefetch Memory (register)
     # PRFM  (<prfop>|#<imm5>), [<Xn|SP>, (<Wm>|<Xm>){, <extend> {<amount>}}]
-    class PRFM_reg
+    class PRFM_reg < Instruction
       def initialize rt, rn, rm, option, s
-        @rt     = rt
-        @rn     = rn
-        @rm     = rm
-        @option = option
-        @s      = s
+        @rt     = check_mask(rt, 0x1f)
+        @rn     = check_mask(rn, 0x1f)
+        @rm     = check_mask(rm, 0x1f)
+        @option = check_mask(option, 0x07)
+        @s      = check_mask(s, 0x01)
       end
 
       def encode
-        PRFM_reg(@rm.to_i, @option, @s, @rn.to_i, @rt.to_i)
+        PRFM_reg(@rm, @option, @s, @rn, @rt)
       end
 
       private
 
       def PRFM_reg rm, option, s, rn, rt
         insn = 0b11_111_0_00_10_1_00000_000_0_10_00000_00000
-        insn |= ((rm & 0x1f) << 16)
-        insn |= ((option & 0x7) << 13)
-        insn |= ((s & 0x1) << 12)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rt & 0x1f)
+        insn |= ((rm) << 16)
+        insn |= ((option) << 13)
+        insn |= ((s) << 12)
+        insn |= ((rn) << 5)
+        insn |= (rt)
         insn
       end
     end

data/lib/aarch64/instructions/prfum.rb

@@ -3,24 +3,24 @@ module AArch64
     # PRFUM -- A64
     # Prefetch Memory (unscaled offset)
     # PRFUM (<prfop>|#<imm5>), [<Xn|SP>{, #<simm>}]
-    class PRFUM
+    class PRFUM < Instruction
       def initialize rt, rn, imm9
-        @rt   = rt
-        @rn   = rn
-        @imm9 = imm9
+        @rt   = check_mask(rt, 0x1f)
+        @rn   = check_mask(rn, 0x1f)
+        @imm9 = check_mask(imm9, 0x1ff)
       end
 
       def encode
-        PRFUM(@imm9, @rn.to_i, @rt.to_i)
+        PRFUM(@imm9, @rn, @rt)
       end
 
       private
 
       def PRFUM imm9, rn, rt
         insn = 0b11_111_0_00_10_0_000000000_00_00000_00000
-        insn |= ((imm9 & 0x1ff) << 12)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rt & 0x1f)
+        insn |= ((imm9) << 12)
+        insn |= ((rn) << 5)
+        insn |= (rt)
         insn
       end
     end

data/lib/aarch64/instructions/psb.rb

@@ -3,16 +3,9 @@ module AArch64
     # PSB CSYNC -- A64
     # Profiling Synchronization Barrier
     # PSB CSYNC
-    class PSB
+    class PSB < Instruction
       def encode
-        PSB()
-      end
-
-      private
-
-      def PSB
-        insn = 0b1101010100_0_00_011_0010_0010_001_11111
-        insn
+        0b1101010100_0_00_011_0010_0010_001_11111
       end
     end
   end

data/lib/aarch64/instructions/rbit_int.rb

@@ -4,24 +4,24 @@ module AArch64
     # Reverse Bits
     # RBIT  <Wd>, <Wn>
     # RBIT  <Xd>, <Xn>
-    class RBIT_int
+    class RBIT_int < Instruction
       def initialize rd, rn, sf
-        @rd = rd
-        @rn = rn
-        @sf = sf
+        @rd = check_mask(rd, 0x1f)
+        @rn = check_mask(rn, 0x1f)
+        @sf = check_mask(sf, 0x01)
       end
 
       def encode
-        RBIT_int(@sf, @rn.to_i, @rd.to_i)
+        RBIT_int(@sf, @rn, @rd)
       end
 
       private
 
       def RBIT_int sf, rn, rd
         insn = 0b0_1_0_11010110_00000_0000_00_00000_00000
-        insn |= ((sf & 0x1) << 31)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rd & 0x1f)
+        insn |= ((sf) << 31)
+        insn |= ((rn) << 5)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/ret.rb

@@ -3,20 +3,20 @@ module AArch64
     # RET -- A64
     # Return from subroutine
     # RET  {<Xn>}
-    class RET
+    class RET < Instruction
       def initialize reg
-        @reg = reg
+        @reg = check_mask(reg, 0x1f)
       end
 
       def encode
-        RET(@reg.to_i)
+        RET(@reg)
       end
 
       private
 
       def RET rn
         insn = 0b1101011_0_0_10_11111_0000_0_0_00000_00000
-        insn |= ((rn & 0x1f) << 5)
+        insn |= ((rn) << 5)
         insn
       end
     end

data/lib/aarch64/instructions/reta.rb

@@ -4,9 +4,9 @@ module AArch64
     # Return from subroutine, with pointer authentication
     # RETAA
     # RETAB
-    class RETA
+    class RETA < Instruction
       def initialize m
-        @m = m
+        @m = check_mask(m, 0x01)
       end
 
       def encode
@@ -17,7 +17,7 @@ module AArch64
 
       def RETA m
         insn = 0b1101011_0_0_10_11111_0000_1_0_11111_11111
-        insn |= ((m & 0x1) << 10)
+        insn |= ((m) << 10)
         insn
       end
     end

data/lib/aarch64/instructions/rev.rb

@@ -4,26 +4,26 @@ module AArch64
     # Reverse Bytes
     # REV  <Wd>, <Wn>
     # REV  <Xd>, <Xn>
-    class REV
+    class REV < Instruction
       def initialize rd, rn, sf, opc
-        @rd  = rd
-        @rn  = rn
-        @sf  = sf
-        @opc = opc
+        @rd  = check_mask(rd, 0x1f)
+        @rn  = check_mask(rn, 0x1f)
+        @sf  = check_mask(sf, 0x01)
+        @opc = check_mask(opc, 0x03)
       end
 
       def encode
-        REV(@sf, @rn.to_i, @rd.to_i, @opc)
+        REV(@sf, @rn, @rd, @opc)
       end
 
       private
 
       def REV sf, rn, rd, opc
         insn = 0b0_1_0_11010110_00000_0000_00_00000_00000
-        insn |= ((sf & 0x1) << 31)
-        insn |= ((opc & 0x3) << 10)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rd & 0x1f)
+        insn |= ((sf) << 31)
+        insn |= ((opc) << 10)
+        insn |= ((rn) << 5)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/rmif.rb

@@ -3,24 +3,24 @@ module AArch64
     # RMIF -- A64
     # Rotate, Mask Insert Flags
     # RMIF  <Xn>, #<shift>, #<mask>
-    class RMIF
+    class RMIF < Instruction
       def initialize rn, imm6, mask
-        @rn   = rn
-        @imm6 = imm6
-        @mask = mask
+        @rn   = check_mask(rn, 0x1f)
+        @imm6 = check_mask(imm6, 0x3f)
+        @mask = check_mask(mask, 0x0f)
       end
 
       def encode
-        RMIF(@imm6, @rn.to_i, @mask)
+        RMIF(@imm6, @rn, @mask)
       end
 
       private
 
       def RMIF imm6, rn, mask
         insn = 0b1_0_1_11010000_000000_00001_00000_0_0000
-        insn |= ((imm6 & 0x3f) << 15)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (mask & 0xf)
+        insn |= ((imm6) << 15)
+        insn |= ((rn) << 5)
+        insn |= (mask)
         insn
       end
     end

data/lib/aarch64/instructions/rorv.rb

@@ -4,26 +4,26 @@ module AArch64
     # Rotate Right Variable
     # RORV  <Wd>, <Wn>, <Wm>
     # RORV  <Xd>, <Xn>, <Xm>
-    class RORV
+    class RORV < Instruction
       def initialize rd, rn, rm, sf
-        @rd = rd
-        @rn = rn
-        @rm = rm
-        @sf = sf
+        @rd = check_mask(rd, 0x1f)
+        @rn = check_mask(rn, 0x1f)
+        @rm = check_mask(rm, 0x1f)
+        @sf = check_mask(sf, 0x01)
       end
 
       def encode
-        RORV(@sf, @rm.to_i, @rn.to_i, @rd.to_i)
+        RORV(@sf, @rm, @rn, @rd)
       end
 
       private
 
       def RORV sf, rm, rn, rd
         insn = 0b0_0_0_11010110_00000_0010_11_00000_00000
-        insn |= ((sf & 0x1) << 31)
-        insn |= ((rm & 0x1f) << 16)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rd & 0x1f)
+        insn |= ((sf) << 31)
+        insn |= ((rm) << 16)
+        insn |= ((rn) << 5)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/sb.rb

@@ -3,7 +3,7 @@ module AArch64
     # SB -- A64
     # Speculation Barrier
     # SB
-    class SB
+    class SB < Instruction
       def encode
         0b1101010100_0_00_011_0011_0000_1_11_11111
       end

data/lib/aarch64/instructions/sbc.rb

@@ -4,26 +4,26 @@ module AArch64
     # Subtract with Carry
     # SBC  <Wd>, <Wn>, <Wm>
     # SBC  <Xd>, <Xn>, <Xm>
-    class SBC
+    class SBC < Instruction
       def initialize rd, rn, rm, sf
-        @rd = rd
-        @rn = rn
-        @rm = rm
-        @sf = sf
+        @rd = check_mask(rd, 0x1f)
+        @rn = check_mask(rn, 0x1f)
+        @rm = check_mask(rm, 0x1f)
+        @sf = check_mask(sf, 0x01)
       end
 
       def encode
-        SBC(@sf, @rm.to_i, @rn.to_i, @rd.to_i)
+        SBC(@sf, @rm, @rn, @rd)
       end
 
       private
 
       def SBC sf, rm, rn, rd
         insn = 0b0_1_0_11010000_00000_000000_00000_00000
-        insn |= ((sf & 0x1) << 31)
-        insn |= ((rm & 0x1f) << 16)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rd & 0x1f)
+        insn |= ((sf) << 31)
+        insn |= ((rm) << 16)
+        insn |= ((rn) << 5)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/sbcs.rb

@@ -4,26 +4,26 @@ module AArch64
     # Subtract with Carry, setting flags
     # SBCS  <Wd>, <Wn>, <Wm>
     # SBCS  <Xd>, <Xn>, <Xm>
-    class SBCS
+    class SBCS < Instruction
       def initialize rd, rn, rm, sf
-        @rd = rd
-        @rn = rn
-        @rm = rm
-        @sf = sf
+        @rd = check_mask(rd, 0x1f)
+        @rn = check_mask(rn, 0x1f)
+        @rm = check_mask(rm, 0x1f)
+        @sf = check_mask(sf, 0x01)
       end
 
       def encode
-        SBCS(@sf, @rm.to_i, @rn.to_i, @rd.to_i)
+        SBCS(@sf, @rm, @rn, @rd)
       end
 
       private
 
       def SBCS sf, rm, rn, rd
         insn = 0b0_1_1_11010000_00000_000000_00000_00000
-        insn |= ((sf & 0x1) << 31)
-        insn |= ((rm & 0x1f) << 16)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rd & 0x1f)
+        insn |= ((sf) << 31)
+        insn |= ((rm) << 16)
+        insn |= ((rn) << 5)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/sbfm.rb

@@ -4,29 +4,29 @@ module AArch64
     # Signed Bitfield Move
     # SBFM  <Wd>, <Wn>, #<immr>, #<imms>
     # SBFM  <Xd>, <Xn>, #<immr>, #<imms>
-    class SBFM
+    class SBFM < Instruction
       def initialize d, n, immr, imms, sf
-        @d    = d
-        @n    = n
-        @immr = immr
-        @imms = imms
-        @sf   = sf
+        @rd   = check_mask(d, 0x1f)
+        @rn   = check_mask(n, 0x1f)
+        @immr = check_mask(immr, 0x3f)
+        @imms = check_mask(imms, 0x3f)
+        @sf   = check_mask(sf, 0x01)
       end
 
       def encode
-        SBFM(@sf, @sf, @immr, @imms, @n.to_i, @d.to_i)
+        SBFM(@sf, @sf, @immr, @imms, @rn, @rd)
       end
 
       private
 
       def SBFM sf, n, immr, imms, rn, rd
         insn = 0b0_00_100110_0_000000_000000_00000_00000
-        insn |= ((sf & 0x1) << 31)
-        insn |= ((n & 0x1) << 22)
-        insn |= ((immr & 0x3f) << 16)
-        insn |= ((imms & 0x3f) << 10)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rd & 0x1f)
+        insn |= ((sf) << 31)
+        insn |= ((n) << 22)
+        insn |= ((immr) << 16)
+        insn |= ((imms) << 10)
+        insn |= ((rn) << 5)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/sdiv.rb

@@ -4,26 +4,26 @@ module AArch64
     # Signed Divide
     # SDIV  <Wd>, <Wn>, <Wm>
     # SDIV  <Xd>, <Xn>, <Xm>
-    class SDIV
+    class SDIV < Instruction
       def initialize rd, rn, rm, sf
-        @rd = rd
-        @rn = rn
-        @rm = rm
-        @sf = sf
+        @rd = check_mask(rd, 0x1f)
+        @rn = check_mask(rn, 0x1f)
+        @rm = check_mask(rm, 0x1f)
+        @sf = check_mask(sf, 0x01)
       end
 
       def encode
-        SDIV(@sf, @rm.to_i, @rn.to_i, @rd.to_i)
+        SDIV(@sf, @rm, @rn, @rd)
       end
 
       private
 
       def SDIV sf, rm, rn, rd
         insn = 0b0_0_0_11010110_00000_00001_1_00000_00000
-        insn |= ((sf & 0x1) << 31)
-        insn |= ((rm & 0x1f) << 16)
-        insn |= ((rn & 0x1f) << 5)
-        insn |= (rd & 0x1f)
+        insn |= ((sf) << 31)
+        insn |= ((rm) << 16)
+        insn |= ((rn) << 5)
+        insn |= (rd)
         insn
       end
     end

data/lib/aarch64/instructions/setf.rb

@@ -4,22 +4,22 @@ module AArch64
     # Evaluation of 8 or 16 bit flag values
     # SETF8  <Wn>
     # SETF16  <Wn>
-    class SETF
+    class SETF < Instruction
       def initialize rn, sz
-        @rn = rn
-        @sz = sz
+        @rn = check_mask(rn, 0x1f)
+        @sz = check_mask(sz, 0x01)
       end
 
       def encode
-        SETF(@sz, @rn.to_i)
+        SETF(@sz, @rn)
       end
 
       private
 
       def SETF sz, rn
         insn = 0b0_0_1_11010000_000000_0_0010_00000_0_1101
-        insn |= ((sz & 0x1) << 14)
-        insn |= ((rn & 0x1f) << 5)
+        insn |= ((sz) << 14)
+        insn |= ((rn) << 5)
         insn
       end
     end