aarch64 1.0.0

data/lib/aarch64/instructions/b_cond.rb

@@ -0,0 +1,26 @@
+module AArch64
+  module Instructions
+    # B.cond -- A64
+    # Branch conditionally
+    # B.<cond>  <label>
+    class B_cond
+      def initialize cond, label
+        @cond  = cond
+        @label = label
+      end
+
+      def encode
+        B_cond(@label.to_i / 4, Utils.cond2bin(@cond))
+      end
+
+      private
+
+      def B_cond imm19, cond
+        insn = 0b0101010_0_0000000000000000000_0_0000
+        insn |= ((imm19 & 0x7ffff) << 5)
+        insn |= (cond & 0xf)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/b_uncond.rb

@@ -0,0 +1,24 @@
+module AArch64
+  module Instructions
+    # B -- A64
+    # Branch
+    # B  <label>
+    class B_uncond
+      def initialize label
+        @label = label
+      end
+
+      def encode
+        B_uncond(@label.to_i / 4)
+      end
+
+      private
+
+      def B_uncond imm26
+        insn = 0b0_00101_00000000000000000000000000
+        insn |= (imm26 & 0x3ffffff)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/bc_cond.rb

@@ -0,0 +1,26 @@
+module AArch64
+  module Instructions
+    # BC.cond -- A64
+    # Branch Consistent conditionally
+    # BC.<cond>  <label>
+    class BC_cond
+      def initialize cond, label
+        @cond  = cond
+        @label = label
+      end
+
+      def encode
+        BC_cond(@label.to_i / 4, Utils.cond2bin(@cond))
+      end
+
+      private
+
+      def BC_cond imm19, cond
+        insn = 0b0101010_0_0000000000000000000_1_0000
+        insn |= ((imm19 & 0x7ffff) << 5)
+        insn |= (cond & 0xf)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/bfm.rb

@@ -0,0 +1,34 @@
+module AArch64
+  module Instructions
+    # BFM -- A64
+    # Bitfield Move
+    # BFM  <Wd>, <Wn>, #<immr>, #<imms>
+    # BFM  <Xd>, <Xn>, #<immr>, #<imms>
+    class BFM
+      def initialize d, n, immr, imms, sf
+        @d    = d
+        @n    = n
+        @immr = immr
+        @imms = imms
+        @sf = sf
+      end
+
+      def encode
+        BFM(@sf, @sf, @immr, @imms, @n.to_i, @d.to_i)
+      end
+
+      private
+
+      def BFM sf, n, immr, imms, rn, rd
+        insn = 0b0_01_100110_0_000000_000000_00000_00000
+        insn |= ((sf & 0x1) << 31)
+        insn |= ((n & 0x1) << 22)
+        insn |= ((immr & 0x3f) << 16)
+        insn |= ((imms & 0x3f) << 10)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/bic_log_shift.rb

@@ -0,0 +1,35 @@
+module AArch64
+  module Instructions
+    # BIC (shifted register) -- A64
+    # Bitwise Bit Clear (shifted register)
+    # BIC  <Wd>, <Wn>, <Wm>{, <shift> #<amount>}
+    # BIC  <Xd>, <Xn>, <Xm>{, <shift> #<amount>}
+    class BIC_log_shift
+      def initialize d, n, m, shift, amount, sf
+        @d      = d
+        @n      = n
+        @m      = m
+        @shift  = shift
+        @amount = amount
+        @sf     = sf
+      end
+
+      def encode
+        BIC_log_shift(@sf, @shift, @m.to_i, @amount, @n.to_i, @d.to_i)
+      end
+
+      private
+
+      def BIC_log_shift sf, shift, rm, imm6, rn, rd
+        insn = 0b0_00_01010_00_1_00000_000000_00000_00000
+        insn |= ((sf & 0x1) << 31)
+        insn |= ((shift & 0x3) << 22)
+        insn |= ((rm & 0x1f) << 16)
+        insn |= ((imm6 & 0x3f) << 10)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/bics.rb

@@ -0,0 +1,35 @@
+module AArch64
+  module Instructions
+    # BICS (shifted register) -- A64
+    # Bitwise Bit Clear (shifted register), setting flags
+    # BICS  <Wd>, <Wn>, <Wm>{, <shift> #<amount>}
+    # BICS  <Xd>, <Xn>, <Xm>{, <shift> #<amount>}
+    class BICS
+      def initialize d, n, m, shift, amount, sf
+        @d      = d
+        @n      = n
+        @m      = m
+        @shift  = shift
+        @amount = amount
+        @sf     = sf
+      end
+
+      def encode
+        BICS(@sf, @shift, @m.to_i, @amount, @n.to_i, @d.to_i)
+      end
+
+      private
+
+      def BICS sf, shift, rm, imm6, rn, rd
+        insn = 0b0_11_01010_00_1_00000_000000_00000_00000
+        insn |= ((sf & 0x1) << 31)
+        insn |= ((shift & 0x3) << 22)
+        insn |= ((rm & 0x1f) << 16)
+        insn |= ((imm6 & 0x3f) << 10)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/bl.rb

@@ -0,0 +1,24 @@
+module AArch64
+  module Instructions
+    # BL -- A64
+    # Branch with Link
+    # BL  <label>
+    class BL
+      def initialize label
+        @label = label
+      end
+
+      def encode
+        BL(@label.to_i / 4)
+      end
+
+      private
+
+      def BL imm26
+        insn = 0b1_00101_00000000000000000000000000
+        insn |= (imm26 & 0x3ffffff)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/blr.rb

@@ -0,0 +1,24 @@
+module AArch64
+  module Instructions
+    # BLR -- A64
+    # Branch with Link to Register
+    # BLR  <Xn>
+    class BLR
+      def initialize n
+        @n = n
+      end
+
+      def encode
+        BLR(@n.to_i)
+      end
+
+      private
+
+      def BLR rn
+        insn = 0b1101011_0_0_01_11111_0000_0_0_00000_00000
+        insn |= ((rn & 0x1f) << 5)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/blra.rb

@@ -0,0 +1,33 @@
+module AArch64
+  module Instructions
+    # BLRAA, BLRAAZ, BLRAB, BLRABZ -- A64
+    # Branch with Link to Register, with pointer authentication
+    # BLRAAZ  <Xn>
+    # BLRAA  <Xn>, <Xm|SP>
+    # BLRABZ  <Xn>
+    # BLRAB  <Xn>, <Xm|SP>
+    class BLRA
+      def initialize rn, rm, z, m
+        @rn = rn
+        @rm = rm
+        @z  = z
+        @m  = m
+      end
+
+      def encode
+        BLRA(@z, @m, @rn.to_i, @rm.to_i)
+      end
+
+      private
+
+      def BLRA z, m, rn, rm
+        insn = 0b1101011_0_0_01_11111_0000_1_0_00000_00000
+        insn |= ((z & 0x1) << 24)
+        insn |= ((m & 0x1) << 10)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rm & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/br.rb

@@ -0,0 +1,24 @@
+module AArch64
+  module Instructions
+    # BR -- A64
+    # Branch to Register
+    # BR  <Xn>
+    class BR
+      def initialize rn
+        @rn = rn
+      end
+
+      def encode
+        BR(@rn.to_i)
+      end
+
+      private
+
+      def BR rn
+        insn = 0b1101011_0_0_00_11111_0000_0_0_00000_00000
+        insn |= ((rn & 0x1f) << 5)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/bra.rb

@@ -0,0 +1,33 @@
+module AArch64
+  module Instructions
+    # BRAA, BRAAZ, BRAB, BRABZ -- A64
+    # Branch to Register, with pointer authentication
+    # BRAAZ  <Xn>
+    # BRAA  <Xn>, <Xm|SP>
+    # BRABZ  <Xn>
+    # BRAB  <Xn>, <Xm|SP>
+    class BRA
+      def initialize rn, rm, z, m
+        @rn = rn
+        @rm = rm
+        @z  = z
+        @m  = m
+      end
+
+      def encode
+        BRA(@z, @m, @rn.to_i, @rm.to_i)
+      end
+
+      private
+
+      def BRA z, m, rn, rm
+        insn = 0b1101011_0_0_00_11111_0000_1_0_00000_00000
+        insn |= ((z & 0x1) << 24)
+        insn |= ((m & 0x1) << 10)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rm & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/brk.rb

@@ -0,0 +1,24 @@
+module AArch64
+  module Instructions
+    # BRK -- A64
+    # Breakpoint instruction
+    # BRK  #<imm>
+    class BRK
+      def initialize imm
+        @imm = imm
+      end
+
+      def encode
+        BRK(@imm)
+      end
+
+      private
+
+      def BRK imm16
+        insn = 0b11010100_001_0000000000000000_000_00
+        insn |= ((imm16 & 0xffff) << 5)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/bti.rb

@@ -0,0 +1,24 @@
+module AArch64
+  module Instructions
+    # BTI -- A64
+    # Branch Target Identification
+    # BTI  {<targets>}
+    class BTI
+      def initialize target
+        @target = target
+      end
+
+      def encode
+        BTI(@target)
+      end
+
+      private
+
+      def BTI target
+        insn = 0b1101010100_0_00_011_0010_0100_000_11111
+        insn |= ((target & 0x3) << 5)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/cas.rb

@@ -0,0 +1,41 @@
+module AArch64
+  module Instructions
+    # CAS, CASA, CASAL, CASL -- A64
+    # Compare and Swap word or doubleword in memory
+    # CAS  <Ws>, <Wt>, [<Xn|SP>{,#0}]
+    # CASA  <Ws>, <Wt>, [<Xn|SP>{,#0}]
+    # CASAL  <Ws>, <Wt>, [<Xn|SP>{,#0}]
+    # CASL  <Ws>, <Wt>, [<Xn|SP>{,#0}]
+    # CAS  <Xs>, <Xt>, [<Xn|SP>{,#0}]
+    # CASA  <Xs>, <Xt>, [<Xn|SP>{,#0}]
+    # CASAL  <Xs>, <Xt>, [<Xn|SP>{,#0}]
+    # CASL  <Xs>, <Xt>, [<Xn|SP>{,#0}]
+    class CAS
+      def initialize s, t, n, l, o0, sf
+        @s  = s
+        @t  = t
+        @n  = n
+        @l  = l
+        @o0 = o0
+        @sf = sf
+      end
+
+      def encode
+        CAS(@sf, @l, @s.to_i, @o0, @n.to_i, @t.to_i)
+      end
+
+      private
+
+      def CAS x, l, rs, o0, rn, rt
+        insn = 0b10_0010001_0_1_00000_0_11111_00000_00000
+        insn |= ((x & 0x1) << 30)
+        insn |= ((l & 0x1) << 22)
+        insn |= ((rs & 0x1f) << 16)
+        insn |= ((o0 & 0x1) << 15)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rt & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/casb.rb

@@ -0,0 +1,35 @@
+module AArch64
+  module Instructions
+    # CASB, CASAB, CASALB, CASLB -- A64
+    # Compare and Swap byte in memory
+    # CASAB  <Ws>, <Wt>, [<Xn|SP>{,#0}]
+    # CASALB  <Ws>, <Wt>, [<Xn|SP>{,#0}]
+    # CASB  <Ws>, <Wt>, [<Xn|SP>{,#0}]
+    # CASLB  <Ws>, <Wt>, [<Xn|SP>{,#0}]
+    class CASB
+      def initialize rs, rt, rn, l, o0
+        @rs = rs
+        @rt = rt
+        @rn = rn
+        @l  = l
+        @o0 = o0
+      end
+
+      def encode
+        CASB(@l, @rs.to_i, @o0, @rn.to_i, @rt.to_i)
+      end
+
+      private
+
+      def CASB l, rs, o0, rn, rt
+        insn = 0b00_0010001_0_1_00000_0_11111_00000_00000
+        insn |= ((l & 0x1) << 22)
+        insn |= ((rs & 0x1f) << 16)
+        insn |= ((o0 & 0x1) << 15)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rt & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/cash.rb

@@ -0,0 +1,35 @@
+module AArch64
+  module Instructions
+    # CASH, CASAH, CASALH, CASLH -- A64
+    # Compare and Swap halfword in memory
+    # CASAH  <Ws>, <Wt>, [<Xn|SP>{,#0}]
+    # CASALH  <Ws>, <Wt>, [<Xn|SP>{,#0}]
+    # CASH  <Ws>, <Wt>, [<Xn|SP>{,#0}]
+    # CASLH  <Ws>, <Wt>, [<Xn|SP>{,#0}]
+    class CASH
+      def initialize rs, rt, rn, l, o0
+        @rs = rs
+        @rt = rt
+        @rn = rn
+        @l  = l
+        @o0 = o0
+      end
+
+      def encode
+        CASH(@l, @rs.to_i, @o0, @rn.to_i, @rt.to_i)
+      end
+
+      private
+
+      def CASH l, rs, o0, rn, rt
+        insn = 0b01_0010001_0_1_00000_0_11111_00000_00000
+        insn |= ((l & 0x1) << 22)
+        insn |= ((rs & 0x1f) << 16)
+        insn |= ((o0 & 0x1) << 15)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rt & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/casp.rb

@@ -0,0 +1,41 @@
+module AArch64
+  module Instructions
+    # CASP, CASPA, CASPAL, CASPL -- A64
+    # Compare and Swap Pair of words or doublewords in memory
+    # CASP  <Ws>, <W(s+1)>, <Wt>, <W(t+1)>, [<Xn|SP>{,#0}]
+    # CASPA  <Ws>, <W(s+1)>, <Wt>, <W(t+1)>, [<Xn|SP>{,#0}]
+    # CASPAL  <Ws>, <W(s+1)>, <Wt>, <W(t+1)>, [<Xn|SP>{,#0}]
+    # CASPL  <Ws>, <W(s+1)>, <Wt>, <W(t+1)>, [<Xn|SP>{,#0}]
+    # CASP  <Xs>, <X(s+1)>, <Xt>, <X(t+1)>, [<Xn|SP>{,#0}]
+    # CASPA  <Xs>, <X(s+1)>, <Xt>, <X(t+1)>, [<Xn|SP>{,#0}]
+    # CASPAL  <Xs>, <X(s+1)>, <Xt>, <X(t+1)>, [<Xn|SP>{,#0}]
+    # CASPL  <Xs>, <X(s+1)>, <Xt>, <X(t+1)>, [<Xn|SP>{,#0}]
+    class CASP
+      def initialize rs, rt, rn, l, o0, sf
+        @rs = rs
+        @rt = rt
+        @rn = rn
+        @l  = l
+        @o0 = o0
+        @sf = sf
+      end
+
+      def encode
+        CASP(@sf, @l, @rs.to_i, @o0, @rn.to_i, @rt.to_i)
+      end
+
+      private
+
+      def CASP sz, l, rs, o0, rn, rt
+        insn = 0b0_0_001000_0_0_1_00000_0_11111_00000_00000
+        insn |= ((sz & 0x1) << 30)
+        insn |= ((l & 0x1) << 22)
+        insn |= ((rs & 0x1f) << 16)
+        insn |= ((o0 & 0x1) << 15)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rt & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/cbnz.rb

@@ -0,0 +1,29 @@
+module AArch64
+  module Instructions
+    # CBNZ -- A64
+    # Compare and Branch on Nonzero
+    # CBNZ  <Wt>, <label>
+    # CBNZ  <Xt>, <label>
+    class CBNZ
+      def initialize rt, label, sf
+        @rt    = rt
+        @label = label
+        @sf    = sf
+      end
+
+      def encode
+        CBNZ(@sf, @label.to_i / 4, @rt.to_i)
+      end
+
+      private
+
+      def CBNZ sf, imm19, rt
+        insn = 0b0_011010_1_0000000000000000000_00000
+        insn |= ((sf & 0x1) << 31)
+        insn |= ((imm19 & 0x7ffff) << 5)
+        insn |= (rt & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/cbz.rb

@@ -0,0 +1,29 @@
+module AArch64
+  module Instructions
+    # CBZ -- A64
+    # Compare and Branch on Zero
+    # CBZ  <Wt>, <label>
+    # CBZ  <Xt>, <label>
+    class CBZ
+      def initialize rt, label, sf
+        @rt    = rt
+        @label = label
+        @sf    = sf
+      end
+
+      def encode
+        CBZ(@sf, @label.to_i / 4, @rt.to_i)
+      end
+
+      private
+
+      def CBZ sf, imm19, rt
+        insn = 0b0_011010_0_0000000000000000000_00000
+        insn |= ((sf & 0x1) << 31)
+        insn |= ((imm19 & 0x7ffff) << 5)
+        insn |= (rt & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/ccmn_imm.rb

@@ -0,0 +1,33 @@
+module AArch64
+  module Instructions
+    # CCMN (immediate) -- A64
+    # Conditional Compare Negative (immediate)
+    # CCMN  <Wn>, #<imm>, #<nzcv>, <cond>
+    # CCMN  <Xn>, #<imm>, #<nzcv>, <cond>
+    class CCMN_imm
+      def initialize rn, imm, nzcv, cond, sf
+        @rn   = rn
+        @imm  = imm
+        @nzcv = nzcv
+        @cond = cond
+        @sf   = sf
+      end
+
+      def encode
+        CCMN_imm(@sf, @imm, @cond, @rn.to_i, @nzcv)
+      end
+
+      private
+
+      def CCMN_imm sf, imm5, cond, rn, nzcv
+        insn = 0b0_0_1_11010010_00000_0000_1_0_00000_0_0000
+        insn |= ((sf & 0x1) << 31)
+        insn |= ((imm5 & 0x1f) << 16)
+        insn |= ((cond & 0xf) << 12)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (nzcv & 0xf)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/ccmn_reg.rb

@@ -0,0 +1,33 @@
+module AArch64
+  module Instructions
+    # CCMN (register) -- A64
+    # Conditional Compare Negative (register)
+    # CCMN  <Wn>, <Wm>, #<nzcv>, <cond>
+    # CCMN  <Xn>, <Xm>, #<nzcv>, <cond>
+    class CCMN_reg
+      def initialize rn, rm, nzcv, cond, sf
+        @rn   = rn
+        @rm   = rm
+        @nzcv = nzcv
+        @cond = cond
+        @sf   = sf
+      end
+
+      def encode
+        CCMN_reg(@sf, @rm.to_i, @cond, @rn.to_i, @nzcv)
+      end
+
+      private
+
+      def CCMN_reg sf, rm, cond, rn, nzcv
+        insn = 0b0_0_1_11010010_00000_0000_0_0_00000_0_0000
+        insn |= ((sf & 0x1) << 31)
+        insn |= ((rm & 0x1f) << 16)
+        insn |= ((cond & 0xf) << 12)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (nzcv & 0xf)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/ccmp_imm.rb

@@ -0,0 +1,33 @@
+module AArch64
+  module Instructions
+    # CCMP (immediate) -- A64
+    # Conditional Compare (immediate)
+    # CCMP  <Wn>, #<imm>, #<nzcv>, <cond>
+    # CCMP  <Xn>, #<imm>, #<nzcv>, <cond>
+    class CCMP_imm
+      def initialize rn, imm, nzcv, cond, sf
+        @rn   = rn
+        @imm  = imm
+        @nzcv = nzcv
+        @cond = cond
+        @sf   = sf
+      end
+
+      def encode
+        CCMP_imm(@sf, @imm, @cond, @rn.to_i, @nzcv)
+      end
+
+      private
+
+      def CCMP_imm sf, imm5, cond, rn, nzcv
+        insn = 0b0_1_1_11010010_00000_0000_1_0_00000_0_0000
+        insn |= ((sf & 0x1) << 31)
+        insn |= ((imm5 & 0x1f) << 16)
+        insn |= ((cond & 0xf) << 12)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (nzcv & 0xf)
+        insn
+      end
+    end
+  end
+end