aarch64 1.0.0

data/lib/aarch64/instructions/sb.rb

@@ -0,0 +1,19 @@
+module AArch64
+  module Instructions
+    # SB -- A64
+    # Speculation Barrier
+    # SB
+    class SB
+      def encode
+        self.SB
+      end
+
+      private
+
+      def SB
+        insn = 0b1101010100_0_00_011_0011_0000_1_11_11111
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/sbc.rb

@@ -0,0 +1,31 @@
+module AArch64
+  module Instructions
+    # SBC -- A64
+    # Subtract with Carry
+    # SBC  <Wd>, <Wn>, <Wm>
+    # SBC  <Xd>, <Xn>, <Xm>
+    class SBC
+      def initialize rd, rn, rm, sf
+        @rd = rd
+        @rn = rn
+        @rm = rm
+        @sf = sf
+      end
+
+      def encode
+        self.SBC(@sf, @rm.to_i, @rn.to_i, @rd.to_i)
+      end
+
+      private
+
+      def SBC sf, rm, rn, rd
+        insn = 0b0_1_0_11010000_00000_000000_00000_00000
+        insn |= ((sf & 0x1) << 31)
+        insn |= ((rm & 0x1f) << 16)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/sbcs.rb

@@ -0,0 +1,31 @@
+module AArch64
+  module Instructions
+    # SBCS -- A64
+    # Subtract with Carry, setting flags
+    # SBCS  <Wd>, <Wn>, <Wm>
+    # SBCS  <Xd>, <Xn>, <Xm>
+    class SBCS
+      def initialize rd, rn, rm, sf
+        @rd = rd
+        @rn = rn
+        @rm = rm
+        @sf = sf
+      end
+
+      def encode
+        self.SBCS(@sf, @rm.to_i, @rn.to_i, @rd.to_i)
+      end
+
+      private
+
+      def SBCS sf, rm, rn, rd
+        insn = 0b0_1_1_11010000_00000_000000_00000_00000
+        insn |= ((sf & 0x1) << 31)
+        insn |= ((rm & 0x1f) << 16)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/sbfm.rb

@@ -0,0 +1,34 @@
+module AArch64
+  module Instructions
+    # SBFM -- A64
+    # Signed Bitfield Move
+    # SBFM  <Wd>, <Wn>, #<immr>, #<imms>
+    # SBFM  <Xd>, <Xn>, #<immr>, #<imms>
+    class SBFM
+      def initialize d, n, immr, imms, sf
+        @d    = d
+        @n    = n
+        @immr = immr
+        @imms = imms
+        @sf   = sf
+      end
+
+      def encode
+        SBFM(@sf, @sf, @immr, @imms, @n.to_i, @d.to_i)
+      end
+
+      private
+
+      def SBFM sf, n, immr, imms, rn, rd
+        insn = 0b0_00_100110_0_000000_000000_00000_00000
+        insn |= ((sf & 0x1) << 31)
+        insn |= ((n & 0x1) << 22)
+        insn |= ((immr & 0x3f) << 16)
+        insn |= ((imms & 0x3f) << 10)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/sdiv.rb

@@ -0,0 +1,31 @@
+module AArch64
+  module Instructions
+    # SDIV -- A64
+    # Signed Divide
+    # SDIV  <Wd>, <Wn>, <Wm>
+    # SDIV  <Xd>, <Xn>, <Xm>
+    class SDIV
+      def initialize rd, rn, rm, sf
+        @rd = rd
+        @rn = rn
+        @rm = rm
+        @sf = sf
+      end
+
+      def encode
+        self.SDIV(@sf, @rm.to_i, @rn.to_i, @rd.to_i)
+      end
+
+      private
+
+      def SDIV sf, rm, rn, rd
+        insn = 0b0_0_0_11010110_00000_00001_1_00000_00000
+        insn |= ((sf & 0x1) << 31)
+        insn |= ((rm & 0x1f) << 16)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/setf.rb

@@ -0,0 +1,27 @@
+module AArch64
+  module Instructions
+    # SETF8, SETF16 -- A64
+    # Evaluation of 8 or 16 bit flag values
+    # SETF8  <Wn>
+    # SETF16  <Wn>
+    class SETF
+      def initialize rn, sz
+        @rn = rn
+        @sz = sz
+      end
+
+      def encode
+        self.SETF(@sz, @rn.to_i)
+      end
+
+      private
+
+      def SETF sz, rn
+        insn = 0b0_0_1_11010000_000000_0_0010_00000_0_1101
+        insn |= ((sz & 0x1) << 14)
+        insn |= ((rn & 0x1f) << 5)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/setgp.rb

@@ -0,0 +1,25 @@
+module AArch64
+  module Instructions
+    # SETGP, SETGM, SETGE -- A64
+    # Memory Set with tag setting
+    # SETGE  [<Xd>]!, <Xn>!, <Xs>
+    # SETGM  [<Xd>]!, <Xn>!, <Xs>
+    # SETGP  [<Xd>]!, <Xn>!, <Xs>
+    class SETGP
+      def encode
+        raise NotImplementedError
+      end
+
+      private
+
+      def SETGP sz, rs, rn, rd
+        insn = 0b00_011_1_01_11_0_00000_xx00_01_00000_00000
+        insn |= ((sz & 0x3) << 30)
+        insn |= ((rs & 0x1f) << 16)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/setgpn.rb

@@ -0,0 +1,25 @@
+module AArch64
+  module Instructions
+    # SETGPN, SETGMN, SETGEN -- A64
+    # Memory Set with tag setting, non-temporal
+    # SETGEN  [<Xd>]!, <Xn>!, <Xs>
+    # SETGMN  [<Xd>]!, <Xn>!, <Xs>
+    # SETGPN  [<Xd>]!, <Xn>!, <Xs>
+    class SETGPN
+      def encode
+        raise NotImplementedError
+      end
+
+      private
+
+      def SETGPN sz, rs, rn, rd
+        insn = 0b00_011_1_01_11_0_00000_xx10_01_00000_00000
+        insn |= ((sz & 0x3) << 30)
+        insn |= ((rs & 0x1f) << 16)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/setgpt.rb

@@ -0,0 +1,25 @@
+module AArch64
+  module Instructions
+    # SETGPT, SETGMT, SETGET -- A64
+    # Memory Set with tag setting, unprivileged
+    # SETGET  [<Xd>]!, <Xn>!, <Xs>
+    # SETGMT  [<Xd>]!, <Xn>!, <Xs>
+    # SETGPT  [<Xd>]!, <Xn>!, <Xs>
+    class SETGPT
+      def encode
+        raise NotImplementedError
+      end
+
+      private
+
+      def SETGPT sz, rs, rn, rd
+        insn = 0b00_011_1_01_11_0_00000_xx01_01_00000_00000
+        insn |= ((sz & 0x3) << 30)
+        insn |= ((rs & 0x1f) << 16)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/setgptn.rb

@@ -0,0 +1,25 @@
+module AArch64
+  module Instructions
+    # SETGPTN, SETGMTN, SETGETN -- A64
+    # Memory Set with tag setting, unprivileged and non-temporal
+    # SETGETN  [<Xd>]!, <Xn>!, <Xs>
+    # SETGMTN  [<Xd>]!, <Xn>!, <Xs>
+    # SETGPTN  [<Xd>]!, <Xn>!, <Xs>
+    class SETGPTN
+      def encode
+        raise NotImplementedError
+      end
+
+      private
+
+      def SETGPTN sz, rs, rn, rd
+        insn = 0b00_011_1_01_11_0_00000_xx11_01_00000_00000
+        insn |= ((sz & 0x3) << 30)
+        insn |= ((rs & 0x1f) << 16)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/setp.rb

@@ -0,0 +1,25 @@
+module AArch64
+  module Instructions
+    # SETP, SETM, SETE -- A64
+    # Memory Set
+    # SETE  [<Xd>]!, <Xn>!, <Xs>
+    # SETM  [<Xd>]!, <Xn>!, <Xs>
+    # SETP  [<Xd>]!, <Xn>!, <Xs>
+    class SETP
+      def encode
+        raise NotImplementedError
+      end
+
+      private
+
+      def SETP sz, rs, rn, rd
+        insn = 0b00_011_0_01_11_0_00000_xx00_01_00000_00000
+        insn |= ((sz & 0x3) << 30)
+        insn |= ((rs & 0x1f) << 16)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/setpn.rb

@@ -0,0 +1,25 @@
+module AArch64
+  module Instructions
+    # SETPN, SETMN, SETEN -- A64
+    # Memory Set, non-temporal
+    # SETEN  [<Xd>]!, <Xn>!, <Xs>
+    # SETMN  [<Xd>]!, <Xn>!, <Xs>
+    # SETPN  [<Xd>]!, <Xn>!, <Xs>
+    class SETPN
+      def encode
+        raise NotImplementedError
+      end
+
+      private
+
+      def SETPN sz, rs, rn, rd
+        insn = 0b00_011_0_01_11_0_00000_xx10_01_00000_00000
+        insn |= ((sz & 0x3) << 30)
+        insn |= ((rs & 0x1f) << 16)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/setpt.rb

@@ -0,0 +1,25 @@
+module AArch64
+  module Instructions
+    # SETPT, SETMT, SETET -- A64
+    # Memory Set, unprivileged
+    # SETET  [<Xd>]!, <Xn>!, <Xs>
+    # SETMT  [<Xd>]!, <Xn>!, <Xs>
+    # SETPT  [<Xd>]!, <Xn>!, <Xs>
+    class SETPT
+      def encode
+        raise NotImplementedError
+      end
+
+      private
+
+      def SETPT sz, rs, rn, rd
+        insn = 0b00_011_0_01_11_0_00000_xx01_01_00000_00000
+        insn |= ((sz & 0x3) << 30)
+        insn |= ((rs & 0x1f) << 16)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/setptn.rb

@@ -0,0 +1,25 @@
+module AArch64
+  module Instructions
+    # SETPTN, SETMTN, SETETN -- A64
+    # Memory Set, unprivileged and non-temporal
+    # SETETN  [<Xd>]!, <Xn>!, <Xs>
+    # SETMTN  [<Xd>]!, <Xn>!, <Xs>
+    # SETPTN  [<Xd>]!, <Xn>!, <Xs>
+    class SETPTN
+      def encode
+        raise NotImplementedError
+      end
+
+      private
+
+      def SETPTN sz, rs, rn, rd
+        insn = 0b00_011_0_01_11_0_00000_xx11_01_00000_00000
+        insn |= ((sz & 0x3) << 30)
+        insn |= ((rs & 0x1f) << 16)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/sev.rb

@@ -0,0 +1,18 @@
+module AArch64
+  module Instructions
+    # SEV -- A64
+    # Send Event
+    # SEV
+    class SEV
+      def encode
+        self.SEV
+      end
+
+      private
+
+      def SEV
+        0b1101010100_0_00_011_0010_0000_100_11111
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/sevl.rb

@@ -0,0 +1,18 @@
+module AArch64
+  module Instructions
+    # SEVL -- A64
+    # Send Event Local
+    # SEVL
+    class SEVL
+      def encode
+        self.SEVL
+      end
+
+      private
+
+      def SEVL
+        0b1101010100_0_00_011_0010_0000_101_11111
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/smaddl.rb

@@ -0,0 +1,30 @@
+module AArch64
+  module Instructions
+    # SMADDL -- A64
+    # Signed Multiply-Add Long
+    # SMADDL  <Xd>, <Wn>, <Wm>, <Xa>
+    class SMADDL
+      def initialize rd, rn, rm, ra
+        @rd = rd
+        @rn = rn
+        @rm = rm
+        @ra = ra
+      end
+
+      def encode
+        self.SMADDL(@rm.to_i, @ra.to_i, @rn.to_i, @rd.to_i)
+      end
+
+      private
+
+      def SMADDL rm, ra, rn, rd
+        insn = 0b1_00_11011_0_01_00000_0_00000_00000_00000
+        insn |= ((rm & 0x1f) << 16)
+        insn |= ((ra & 0x1f) << 10)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/smc.rb

@@ -0,0 +1,24 @@
+module AArch64
+  module Instructions
+    # SMC -- A64
+    # Secure Monitor Call
+    # SMC  #<imm>
+    class SMC
+      def initialize imm16
+        @imm16 = imm16
+      end
+
+      def encode
+        self.SMC(@imm16)
+      end
+
+      private
+
+      def SMC imm16
+        insn = 0b11010100_000_0000000000000000_000_11
+        insn |= ((imm16 & 0xffff) << 5)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/smsubl.rb

@@ -0,0 +1,30 @@
+module AArch64
+  module Instructions
+    # SMSUBL -- A64
+    # Signed Multiply-Subtract Long
+    # SMSUBL  <Xd>, <Wn>, <Wm>, <Xa>
+    class SMSUBL
+      def initialize rd, rn, rm, ra
+        @rd = rd
+        @rn = rn
+        @rm = rm
+        @ra = ra
+      end
+
+      def encode
+        self.SMSUBL(@rm.to_i, @ra.to_i, @rn.to_i, @rd.to_i)
+      end
+
+      private
+
+      def SMSUBL rm, ra, rn, rd
+        insn = 0b1_00_11011_0_01_00000_1_00000_00000_00000
+        insn |= ((rm & 0x1f) << 16)
+        insn |= ((ra & 0x1f) << 10)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/smulh.rb

@@ -0,0 +1,28 @@
+module AArch64
+  module Instructions
+    # SMULH -- A64
+    # Signed Multiply High
+    # SMULH  <Xd>, <Xn>, <Xm>
+    class SMULH
+      def initialize rd, rn, rm
+        @rd = rd
+        @rn = rn
+        @rm = rm
+      end
+
+      def encode
+        self.SMULH(@rm.to_i, @rn.to_i, @rd.to_i)
+      end
+
+      private
+
+      def SMULH rm, rn, rd
+        insn = 0b1_00_11011_0_10_00000_0_11111_00000_00000
+        insn |= ((rm & 0x1f) << 16)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rd & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/st2g.rb

@@ -0,0 +1,32 @@
+module AArch64
+  module Instructions
+    # ST2G -- A64
+    # Store Allocation Tags
+    # ST2G  <Xt|SP>, [<Xn|SP>], #<simm>
+    # ST2G  <Xt|SP>, [<Xn|SP>, #<simm>]!
+    # ST2G  <Xt|SP>, [<Xn|SP>{, #<simm>}]
+    class ST2G
+      def initialize xt, xn, imm9, option
+        @xt     = xt
+        @xn     = xn
+        @imm9   = imm9
+        @option = option
+      end
+
+      def encode
+        self.ST2G(@imm9, @option, @xn.to_i, @xt.to_i)
+      end
+
+      private
+
+      def ST2G imm9, option, xn, xt
+        insn = 0b11011001_1_0_1_000000000_00_00000_00000
+        insn |= ((imm9 & 0x1ff) << 12)
+        insn |= ((option & 0x3) << 10)
+        insn |= ((xn & 0x1f) << 5)
+        insn |= (xt & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/st64b.rb

@@ -0,0 +1,26 @@
+module AArch64
+  module Instructions
+    # ST64B -- A64
+    # Single-copy Atomic 64-byte Store without Return
+    # ST64B  <Xt>, [<Xn|SP> {,#0}]
+    class ST64B
+      def initialize rt, rn
+        @rt = rt
+        @rn = rn
+      end
+
+      def encode
+        self.ST64B(@rn.to_i, @rt.to_i)
+      end
+
+      private
+
+      def ST64B rn, rt
+        insn = 0b11_111_0_00_0_0_1_11111_1_001_00_00000_00000
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rt & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/st64bv.rb

@@ -0,0 +1,28 @@
+module AArch64
+  module Instructions
+    # ST64BV -- A64
+    # Single-copy Atomic 64-byte Store with Return
+    # ST64BV  <Xs>, <Xt>, [<Xn|SP>]
+    class ST64BV
+      def initialize rs, rt, rn
+        @rs = rs
+        @rt = rt
+        @rn = rn
+      end
+
+      def encode
+        self.ST64BV(@rs.to_i, @rn.to_i, @rt.to_i)
+      end
+
+      private
+
+      def ST64BV rs, rn, rt
+        insn = 0b11_111_0_00_0_0_1_00000_1_011_00_00000_00000
+        insn |= ((rs & 0x1f) << 16)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rt & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/st64bv0.rb

@@ -0,0 +1,28 @@
+module AArch64
+  module Instructions
+    # ST64BV0 -- A64
+    # Single-copy Atomic 64-byte EL0 Store with Return
+    # ST64BV0  <Xs>, <Xt>, [<Xn|SP>]
+    class ST64BV0
+      def initialize rs, rt, rn
+        @rs = rs
+        @rt = rt
+        @rn = rn
+      end
+
+      def encode
+        self.ST64BV0(@rs.to_i, @rn.to_i, @rt.to_i)
+      end
+
+      private
+
+      def ST64BV0 rs, rn, rt
+        insn = 0b11_111_0_00_0_0_1_00000_1_010_00_00000_00000
+        insn |= ((rs & 0x1f) << 16)
+        insn |= ((rn & 0x1f) << 5)
+        insn |= (rt & 0x1f)
+        insn
+      end
+    end
+  end
+end

data/lib/aarch64/instructions/stg.rb

@@ -0,0 +1,32 @@
+module AArch64
+  module Instructions
+    # STG -- A64
+    # Store Allocation Tag
+    # STG  <Xt|SP>, [<Xn|SP>], #<simm>
+    # STG  <Xt|SP>, [<Xn|SP>, #<simm>]!
+    # STG  <Xt|SP>, [<Xn|SP>{, #<simm>}]
+    class STG
+      def initialize xt, xn, imm9, option
+        @xt     = xt
+        @xn     = xn
+        @imm9   = imm9
+        @option = option
+      end
+
+      def encode
+        self.STG(@imm9, @option, @xn.to_i, @xt.to_i)
+      end
+
+      private
+
+      def STG imm9, option, xn, xt
+        insn = 0b11011001_0_0_1_000000000_00_00000_00000
+        insn |= ((imm9 & 0x1ff) << 12)
+        insn |= ((option & 0x3) << 10)
+        insn |= ((xn & 0x1f) << 5)
+        insn |= (xt & 0x1f)
+        insn
+      end
+    end
+  end
+end