v86 0.4.0 → 0.5.11

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (386) hide show
  1. package/Readme.md +56 -111
  2. package/build/libv86-debug.js +12680 -0
  3. package/build/libv86-debug.mjs +732 -0
  4. package/build/libv86.js +710 -0
  5. package/build/libv86.mjs +637 -0
  6. package/build/v86-debug.wasm +0 -0
  7. package/build/v86-fallback.wasm +0 -0
  8. package/build/v86.wasm +0 -0
  9. package/package.json +12 -35
  10. package/bios/.gitignore +0 -1
  11. package/bios/COPYING.LESSER +0 -165
  12. package/bios/bochs-bios.bin +0 -0
  13. package/bios/bochs-vgabios.bin +0 -0
  14. package/bios/fetch-and-build-seabios.sh +0 -13
  15. package/bios/seabios/.config +0 -113
  16. package/bios/seabios/.config.old +0 -114
  17. package/bios/seabios/.gitignore +0 -4
  18. package/bios/seabios/COPYING +0 -674
  19. package/bios/seabios/COPYING.LESSER +0 -165
  20. package/bios/seabios/Makefile +0 -286
  21. package/bios/seabios/README +0 -17
  22. package/bios/seabios/docs/Build_overview.md +0 -104
  23. package/bios/seabios/docs/Contributing.md +0 -20
  24. package/bios/seabios/docs/Debugging.md +0 -111
  25. package/bios/seabios/docs/Developer_Documentation.md +0 -25
  26. package/bios/seabios/docs/Developer_links.md +0 -86
  27. package/bios/seabios/docs/Download.md +0 -27
  28. package/bios/seabios/docs/Execution_and_code_flow.md +0 -178
  29. package/bios/seabios/docs/Linking_overview.md +0 -160
  30. package/bios/seabios/docs/Mailinglist.md +0 -8
  31. package/bios/seabios/docs/Memory_Model.md +0 -253
  32. package/bios/seabios/docs/README +0 -5
  33. package/bios/seabios/docs/Releases.md +0 -482
  34. package/bios/seabios/docs/Runtime_config.md +0 -193
  35. package/bios/seabios/docs/SeaBIOS.md +0 -17
  36. package/bios/seabios/docs/SeaVGABIOS.md +0 -39
  37. package/bios/seabios/out/autoconf.h +0 -117
  38. package/bios/seabios/out/include/config/acpi/dsdt.h +0 -0
  39. package/bios/seabios/out/include/config/acpi.h +0 -0
  40. package/bios/seabios/out/include/config/ahci.h +0 -0
  41. package/bios/seabios/out/include/config/apmbios.h +0 -0
  42. package/bios/seabios/out/include/config/ata/dma.h +0 -0
  43. package/bios/seabios/out/include/config/ata/pio32.h +0 -0
  44. package/bios/seabios/out/include/config/ata.h +0 -0
  45. package/bios/seabios/out/include/config/auto.conf +0 -69
  46. package/bios/seabios/out/include/config/auto.conf.cmd +0 -9
  47. package/bios/seabios/out/include/config/boot.h +0 -0
  48. package/bios/seabios/out/include/config/bootorder.h +0 -0
  49. package/bios/seabios/out/include/config/build/vgabios.h +0 -0
  50. package/bios/seabios/out/include/config/call32/smm.h +0 -0
  51. package/bios/seabios/out/include/config/cdrom/boot.h +0 -0
  52. package/bios/seabios/out/include/config/cdrom/emu.h +0 -0
  53. package/bios/seabios/out/include/config/debug/level.h +0 -0
  54. package/bios/seabios/out/include/config/drives.h +0 -0
  55. package/bios/seabios/out/include/config/entry/extrastack.h +0 -0
  56. package/bios/seabios/out/include/config/esp/scsi.h +0 -0
  57. package/bios/seabios/out/include/config/flash/floppy.h +0 -0
  58. package/bios/seabios/out/include/config/floppy.h +0 -0
  59. package/bios/seabios/out/include/config/fw/romfile/load.h +0 -0
  60. package/bios/seabios/out/include/config/hardware/irq.h +0 -0
  61. package/bios/seabios/out/include/config/kbd/call/int15/4f.h +0 -0
  62. package/bios/seabios/out/include/config/keyboard.h +0 -0
  63. package/bios/seabios/out/include/config/lpt.h +0 -0
  64. package/bios/seabios/out/include/config/lsi/scsi.h +0 -0
  65. package/bios/seabios/out/include/config/malloc/uppermemory.h +0 -0
  66. package/bios/seabios/out/include/config/megasas.h +0 -0
  67. package/bios/seabios/out/include/config/mouse.h +0 -0
  68. package/bios/seabios/out/include/config/mpt/scsi.h +0 -0
  69. package/bios/seabios/out/include/config/mptable.h +0 -0
  70. package/bios/seabios/out/include/config/mtrr/init.h +0 -0
  71. package/bios/seabios/out/include/config/optionroms.h +0 -0
  72. package/bios/seabios/out/include/config/override/pci/id.h +0 -0
  73. package/bios/seabios/out/include/config/pcibios.h +0 -0
  74. package/bios/seabios/out/include/config/pirtable.h +0 -0
  75. package/bios/seabios/out/include/config/pmm.h +0 -0
  76. package/bios/seabios/out/include/config/pmtimer.h +0 -0
  77. package/bios/seabios/out/include/config/pnpbios.h +0 -0
  78. package/bios/seabios/out/include/config/ps2port.h +0 -0
  79. package/bios/seabios/out/include/config/pvscsi.h +0 -0
  80. package/bios/seabios/out/include/config/qemu/hardware.h +0 -0
  81. package/bios/seabios/out/include/config/qemu.h +0 -0
  82. package/bios/seabios/out/include/config/rom/size.h +0 -0
  83. package/bios/seabios/out/include/config/rtc/timer.h +0 -0
  84. package/bios/seabios/out/include/config/s3/resume.h +0 -0
  85. package/bios/seabios/out/include/config/sdcard.h +0 -0
  86. package/bios/seabios/out/include/config/serial.h +0 -0
  87. package/bios/seabios/out/include/config/tcgbios.h +0 -0
  88. package/bios/seabios/out/include/config/threads.h +0 -0
  89. package/bios/seabios/out/include/config/tristate.conf +0 -4
  90. package/bios/seabios/out/include/config/tsc/timer.h +0 -0
  91. package/bios/seabios/out/include/config/use/smm.h +0 -0
  92. package/bios/seabios/out/include/config/vga/allocate/extra/stack.h +0 -0
  93. package/bios/seabios/out/include/config/vga/bochs/stdvga.h +0 -0
  94. package/bios/seabios/out/include/config/vga/bochs.h +0 -0
  95. package/bios/seabios/out/include/config/vga/did.h +0 -0
  96. package/bios/seabios/out/include/config/vga/extra/stack/size.h +0 -0
  97. package/bios/seabios/out/include/config/vga/fixup/asm.h +0 -0
  98. package/bios/seabios/out/include/config/vga/pci.h +0 -0
  99. package/bios/seabios/out/include/config/vga/stdvga/ports.h +0 -0
  100. package/bios/seabios/out/include/config/vga/vbe.h +0 -0
  101. package/bios/seabios/out/include/config/vga/vid.h +0 -0
  102. package/bios/seabios/out/include/config/vgahooks.h +0 -0
  103. package/bios/seabios/out/include/config/virtio/blk.h +0 -0
  104. package/bios/seabios/out/include/config/virtio/scsi.h +0 -0
  105. package/bios/seabios/out/include/config/xen.h +0 -0
  106. package/bios/seabios/out/scripts/kconfig/conf +0 -0
  107. package/bios/seabios/out/scripts/kconfig/conf.o +0 -0
  108. package/bios/seabios/out/scripts/kconfig/zconf.hash.c +0 -289
  109. package/bios/seabios/out/scripts/kconfig/zconf.lex.c +0 -2420
  110. package/bios/seabios/out/scripts/kconfig/zconf.tab.c +0 -2538
  111. package/bios/seabios/out/scripts/kconfig/zconf.tab.o +0 -0
  112. package/bios/seabios/scripts/acpi_extract.py +0 -366
  113. package/bios/seabios/scripts/acpi_extract_preprocess.py +0 -41
  114. package/bios/seabios/scripts/buildrom.py +0 -56
  115. package/bios/seabios/scripts/buildversion.py +0 -134
  116. package/bios/seabios/scripts/checkrom.py +0 -95
  117. package/bios/seabios/scripts/checkstack.py +0 -226
  118. package/bios/seabios/scripts/checksum.py +0 -16
  119. package/bios/seabios/scripts/encodeint.py +0 -21
  120. package/bios/seabios/scripts/gen-offsets.sh +0 -17
  121. package/bios/seabios/scripts/kconfig/.gitignore +0 -22
  122. package/bios/seabios/scripts/kconfig/Makefile +0 -331
  123. package/bios/seabios/scripts/kconfig/POTFILES.in +0 -12
  124. package/bios/seabios/scripts/kconfig/check.sh +0 -13
  125. package/bios/seabios/scripts/kconfig/conf.c +0 -718
  126. package/bios/seabios/scripts/kconfig/confdata.c +0 -1250
  127. package/bios/seabios/scripts/kconfig/expr.c +0 -1168
  128. package/bios/seabios/scripts/kconfig/expr.h +0 -241
  129. package/bios/seabios/scripts/kconfig/gconf.c +0 -1542
  130. package/bios/seabios/scripts/kconfig/gconf.glade +0 -661
  131. package/bios/seabios/scripts/kconfig/images.c +0 -326
  132. package/bios/seabios/scripts/kconfig/kxgettext.c +0 -235
  133. package/bios/seabios/scripts/kconfig/lex.zconf.c +0 -2430
  134. package/bios/seabios/scripts/kconfig/list.h +0 -131
  135. package/bios/seabios/scripts/kconfig/lkc.h +0 -200
  136. package/bios/seabios/scripts/kconfig/lkc_proto.h +0 -57
  137. package/bios/seabios/scripts/kconfig/lxdialog/.gitignore +0 -4
  138. package/bios/seabios/scripts/kconfig/lxdialog/BIG.FAT.WARNING +0 -4
  139. package/bios/seabios/scripts/kconfig/lxdialog/check-lxdialog.sh +0 -87
  140. package/bios/seabios/scripts/kconfig/lxdialog/checklist.c +0 -332
  141. package/bios/seabios/scripts/kconfig/lxdialog/dialog.h +0 -257
  142. package/bios/seabios/scripts/kconfig/lxdialog/inputbox.c +0 -301
  143. package/bios/seabios/scripts/kconfig/lxdialog/menubox.c +0 -437
  144. package/bios/seabios/scripts/kconfig/lxdialog/textbox.c +0 -408
  145. package/bios/seabios/scripts/kconfig/lxdialog/util.c +0 -713
  146. package/bios/seabios/scripts/kconfig/lxdialog/yesno.c +0 -114
  147. package/bios/seabios/scripts/kconfig/mconf.c +0 -1036
  148. package/bios/seabios/scripts/kconfig/menu.c +0 -697
  149. package/bios/seabios/scripts/kconfig/merge_config.sh +0 -150
  150. package/bios/seabios/scripts/kconfig/nconf.c +0 -1556
  151. package/bios/seabios/scripts/kconfig/nconf.gui.c +0 -656
  152. package/bios/seabios/scripts/kconfig/nconf.h +0 -96
  153. package/bios/seabios/scripts/kconfig/qconf.cc +0 -1795
  154. package/bios/seabios/scripts/kconfig/qconf.h +0 -338
  155. package/bios/seabios/scripts/kconfig/streamline_config.pl +0 -647
  156. package/bios/seabios/scripts/kconfig/symbol.c +0 -1373
  157. package/bios/seabios/scripts/kconfig/util.c +0 -157
  158. package/bios/seabios/scripts/kconfig/zconf.gperf +0 -48
  159. package/bios/seabios/scripts/kconfig/zconf.hash.c_shipped +0 -289
  160. package/bios/seabios/scripts/kconfig/zconf.l +0 -363
  161. package/bios/seabios/scripts/kconfig/zconf.lex.c_shipped +0 -2420
  162. package/bios/seabios/scripts/kconfig/zconf.tab.c_shipped +0 -2538
  163. package/bios/seabios/scripts/kconfig/zconf.y +0 -733
  164. package/bios/seabios/scripts/layoutrom.py +0 -705
  165. package/bios/seabios/scripts/python23compat.py +0 -14
  166. package/bios/seabios/scripts/readserial.py +0 -190
  167. package/bios/seabios/scripts/tarball.sh +0 -36
  168. package/bios/seabios/scripts/test-build.sh +0 -90
  169. package/bios/seabios/scripts/transdump.py +0 -53
  170. package/bios/seabios/scripts/vgafixup.py +0 -96
  171. package/bios/seabios/src/Kconfig +0 -579
  172. package/bios/seabios/src/apm.c +0 -215
  173. package/bios/seabios/src/asm-offsets.c +0 -23
  174. package/bios/seabios/src/biosvar.h +0 -130
  175. package/bios/seabios/src/block.c +0 -623
  176. package/bios/seabios/src/block.h +0 -121
  177. package/bios/seabios/src/bmp.c +0 -117
  178. package/bios/seabios/src/boot.c +0 -793
  179. package/bios/seabios/src/bootsplash.c +0 -255
  180. package/bios/seabios/src/bregs.h +0 -80
  181. package/bios/seabios/src/byteorder.h +0 -71
  182. package/bios/seabios/src/cdrom.c +0 -322
  183. package/bios/seabios/src/clock.c +0 -506
  184. package/bios/seabios/src/code16gcc.s +0 -1
  185. package/bios/seabios/src/config.h +0 -108
  186. package/bios/seabios/src/cp437.c +0 -275
  187. package/bios/seabios/src/cp437.h +0 -1
  188. package/bios/seabios/src/disk.c +0 -779
  189. package/bios/seabios/src/e820map.c +0 -152
  190. package/bios/seabios/src/e820map.h +0 -26
  191. package/bios/seabios/src/entryfuncs.S +0 -165
  192. package/bios/seabios/src/farptr.h +0 -208
  193. package/bios/seabios/src/font.c +0 -139
  194. package/bios/seabios/src/fw/acpi-dsdt-cpu-hotplug.dsl +0 -78
  195. package/bios/seabios/src/fw/acpi-dsdt-dbug.dsl +0 -26
  196. package/bios/seabios/src/fw/acpi-dsdt-hpet.dsl +0 -36
  197. package/bios/seabios/src/fw/acpi-dsdt-isa.dsl +0 -102
  198. package/bios/seabios/src/fw/acpi-dsdt-pci-crs.dsl +0 -90
  199. package/bios/seabios/src/fw/acpi-dsdt.dsl +0 -342
  200. package/bios/seabios/src/fw/acpi-dsdt.hex +0 -554
  201. package/bios/seabios/src/fw/acpi.c +0 -685
  202. package/bios/seabios/src/fw/biostables.c +0 -491
  203. package/bios/seabios/src/fw/coreboot.c +0 -569
  204. package/bios/seabios/src/fw/csm.c +0 -347
  205. package/bios/seabios/src/fw/dev-pci.h +0 -52
  206. package/bios/seabios/src/fw/dev-piix.h +0 -29
  207. package/bios/seabios/src/fw/dev-q35.h +0 -52
  208. package/bios/seabios/src/fw/lzmadecode.c +0 -398
  209. package/bios/seabios/src/fw/lzmadecode.h +0 -67
  210. package/bios/seabios/src/fw/mptable.c +0 -197
  211. package/bios/seabios/src/fw/mtrr.c +0 -105
  212. package/bios/seabios/src/fw/multiboot.c +0 -111
  213. package/bios/seabios/src/fw/paravirt.c +0 -624
  214. package/bios/seabios/src/fw/paravirt.h +0 -63
  215. package/bios/seabios/src/fw/pciinit.c +0 -1187
  216. package/bios/seabios/src/fw/pirtable.c +0 -103
  217. package/bios/seabios/src/fw/q35-acpi-dsdt.dsl +0 -450
  218. package/bios/seabios/src/fw/romfile_loader.c +0 -259
  219. package/bios/seabios/src/fw/romfile_loader.h +0 -91
  220. package/bios/seabios/src/fw/shadow.c +0 -208
  221. package/bios/seabios/src/fw/smbios.c +0 -585
  222. package/bios/seabios/src/fw/smm.c +0 -269
  223. package/bios/seabios/src/fw/smp.c +0 -194
  224. package/bios/seabios/src/fw/ssdt-misc.dsl +0 -104
  225. package/bios/seabios/src/fw/ssdt-misc.hex +0 -88
  226. package/bios/seabios/src/fw/ssdt-pcihp.dsl +0 -36
  227. package/bios/seabios/src/fw/ssdt-pcihp.hex +0 -38
  228. package/bios/seabios/src/fw/ssdt-proc.dsl +0 -48
  229. package/bios/seabios/src/fw/ssdt-proc.hex +0 -35
  230. package/bios/seabios/src/fw/xen.c +0 -149
  231. package/bios/seabios/src/fw/xen.h +0 -125
  232. package/bios/seabios/src/gen-defs.h +0 -19
  233. package/bios/seabios/src/hw/ahci.c +0 -697
  234. package/bios/seabios/src/hw/ahci.h +0 -201
  235. package/bios/seabios/src/hw/ata.c +0 -1046
  236. package/bios/seabios/src/hw/ata.h +0 -163
  237. package/bios/seabios/src/hw/blockcmd.c +0 -372
  238. package/bios/seabios/src/hw/blockcmd.h +0 -114
  239. package/bios/seabios/src/hw/dma.c +0 -67
  240. package/bios/seabios/src/hw/esp-scsi.c +0 -241
  241. package/bios/seabios/src/hw/esp-scsi.h +0 -8
  242. package/bios/seabios/src/hw/floppy.c +0 -741
  243. package/bios/seabios/src/hw/lsi-scsi.c +0 -221
  244. package/bios/seabios/src/hw/lsi-scsi.h +0 -8
  245. package/bios/seabios/src/hw/megasas.c +0 -405
  246. package/bios/seabios/src/hw/megasas.h +0 -8
  247. package/bios/seabios/src/hw/mpt-scsi.c +0 -319
  248. package/bios/seabios/src/hw/mpt-scsi.h +0 -8
  249. package/bios/seabios/src/hw/nvme-int.h +0 -199
  250. package/bios/seabios/src/hw/nvme.c +0 -708
  251. package/bios/seabios/src/hw/nvme.h +0 -17
  252. package/bios/seabios/src/hw/pci.c +0 -133
  253. package/bios/seabios/src/hw/pci.h +0 -47
  254. package/bios/seabios/src/hw/pci_ids.h +0 -2632
  255. package/bios/seabios/src/hw/pci_regs.h +0 -556
  256. package/bios/seabios/src/hw/pcidevice.c +0 -192
  257. package/bios/seabios/src/hw/pcidevice.h +0 -76
  258. package/bios/seabios/src/hw/pic.c +0 -115
  259. package/bios/seabios/src/hw/pic.h +0 -60
  260. package/bios/seabios/src/hw/ps2port.c +0 -543
  261. package/bios/seabios/src/hw/ps2port.h +0 -67
  262. package/bios/seabios/src/hw/pvscsi.c +0 -333
  263. package/bios/seabios/src/hw/pvscsi.h +0 -8
  264. package/bios/seabios/src/hw/ramdisk.c +0 -108
  265. package/bios/seabios/src/hw/rtc.c +0 -100
  266. package/bios/seabios/src/hw/rtc.h +0 -75
  267. package/bios/seabios/src/hw/sdcard.c +0 -572
  268. package/bios/seabios/src/hw/serialio.c +0 -113
  269. package/bios/seabios/src/hw/serialio.h +0 -29
  270. package/bios/seabios/src/hw/timer.c +0 -259
  271. package/bios/seabios/src/hw/tpm_drivers.c +0 -636
  272. package/bios/seabios/src/hw/tpm_drivers.h +0 -127
  273. package/bios/seabios/src/hw/usb-ehci.c +0 -650
  274. package/bios/seabios/src/hw/usb-ehci.h +0 -177
  275. package/bios/seabios/src/hw/usb-hid.c +0 -442
  276. package/bios/seabios/src/hw/usb-hid.h +0 -29
  277. package/bios/seabios/src/hw/usb-hub.c +0 -205
  278. package/bios/seabios/src/hw/usb-hub.h +0 -64
  279. package/bios/seabios/src/hw/usb-msc.c +0 -222
  280. package/bios/seabios/src/hw/usb-msc.h +0 -10
  281. package/bios/seabios/src/hw/usb-ohci.c +0 -568
  282. package/bios/seabios/src/hw/usb-ohci.h +0 -144
  283. package/bios/seabios/src/hw/usb-uas.c +0 -289
  284. package/bios/seabios/src/hw/usb-uas.h +0 -9
  285. package/bios/seabios/src/hw/usb-uhci.c +0 -571
  286. package/bios/seabios/src/hw/usb-uhci.h +0 -128
  287. package/bios/seabios/src/hw/usb-xhci.c +0 -1161
  288. package/bios/seabios/src/hw/usb-xhci.h +0 -133
  289. package/bios/seabios/src/hw/usb.c +0 -499
  290. package/bios/seabios/src/hw/usb.h +0 -254
  291. package/bios/seabios/src/hw/virtio-blk.c +0 -211
  292. package/bios/seabios/src/hw/virtio-blk.h +0 -43
  293. package/bios/seabios/src/hw/virtio-pci.c +0 -501
  294. package/bios/seabios/src/hw/virtio-pci.h +0 -151
  295. package/bios/seabios/src/hw/virtio-ring.c +0 -147
  296. package/bios/seabios/src/hw/virtio-ring.h +0 -121
  297. package/bios/seabios/src/hw/virtio-scsi.c +0 -220
  298. package/bios/seabios/src/hw/virtio-scsi.h +0 -47
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  306. package/bios/seabios/src/mouse.c +0 -342
  307. package/bios/seabios/src/optionroms.c +0 -475
  308. package/bios/seabios/src/output.c +0 -584
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  349. package/bios/seabios/vgasrc/Kconfig +0 -211
  350. package/bios/seabios/vgasrc/bochsdisplay.c +0 -59
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@@ -1,568 +0,0 @@
1
- // Code for handling OHCI USB controllers.
2
- //
3
- // Copyright (C) 2009 Kevin O'Connor <kevin@koconnor.net>
4
- //
5
- // This file may be distributed under the terms of the GNU LGPLv3 license.
6
-
7
- #include "biosvar.h" // GET_LOWFLAT
8
- #include "config.h" // CONFIG_*
9
- #include "malloc.h" // free
10
- #include "memmap.h" // PAGE_SIZE
11
- #include "output.h" // dprintf
12
- #include "pcidevice.h" // foreachpci
13
- #include "pci_ids.h" // PCI_CLASS_SERIAL_USB_OHCI
14
- #include "pci_regs.h" // PCI_BASE_ADDRESS_0
15
- #include "string.h" // memset
16
- #include "usb.h" // struct usb_s
17
- #include "usb-ehci.h" // ehci_wait_controllers
18
- #include "usb-ohci.h" // struct ohci_hcca
19
- #include "util.h" // msleep
20
- #include "x86.h" // readl
21
-
22
- #define FIT (1 << 31)
23
-
24
- struct usb_ohci_s {
25
- struct usb_s usb;
26
- struct ohci_regs *regs;
27
- };
28
-
29
- struct ohci_pipe {
30
- struct ohci_ed ed;
31
- struct usb_pipe pipe;
32
- struct ohci_regs *regs;
33
- void *data;
34
- int count;
35
- struct ohci_td *tds;
36
- };
37
-
38
-
39
- /****************************************************************
40
- * Root hub
41
- ****************************************************************/
42
-
43
- // Check if device attached to port
44
- static int
45
- ohci_hub_detect(struct usbhub_s *hub, u32 port)
46
- {
47
- struct usb_ohci_s *cntl = container_of(hub->cntl, struct usb_ohci_s, usb);
48
- u32 sts = readl(&cntl->regs->roothub_portstatus[port]);
49
- return (sts & RH_PS_CCS) ? 1 : 0;
50
- }
51
-
52
- // Disable port
53
- static void
54
- ohci_hub_disconnect(struct usbhub_s *hub, u32 port)
55
- {
56
- struct usb_ohci_s *cntl = container_of(hub->cntl, struct usb_ohci_s, usb);
57
- writel(&cntl->regs->roothub_portstatus[port], RH_PS_CCS|RH_PS_LSDA);
58
- }
59
-
60
- // Reset device on port
61
- static int
62
- ohci_hub_reset(struct usbhub_s *hub, u32 port)
63
- {
64
- struct usb_ohci_s *cntl = container_of(hub->cntl, struct usb_ohci_s, usb);
65
- writel(&cntl->regs->roothub_portstatus[port], RH_PS_PRS);
66
- u32 sts;
67
- u32 end = timer_calc(USB_TIME_DRSTR * 2);
68
- for (;;) {
69
- sts = readl(&cntl->regs->roothub_portstatus[port]);
70
- if (!(sts & RH_PS_PRS))
71
- // XXX - need to ensure USB_TIME_DRSTR time in reset?
72
- break;
73
- if (timer_check(end)) {
74
- // Timeout.
75
- warn_timeout();
76
- ohci_hub_disconnect(hub, port);
77
- return -1;
78
- }
79
- yield();
80
- }
81
-
82
- if ((sts & (RH_PS_CCS|RH_PS_PES)) != (RH_PS_CCS|RH_PS_PES))
83
- // Device no longer present
84
- return -1;
85
-
86
- return !!(sts & RH_PS_LSDA);
87
- }
88
-
89
- static struct usbhub_op_s ohci_HubOp = {
90
- .detect = ohci_hub_detect,
91
- .reset = ohci_hub_reset,
92
- .disconnect = ohci_hub_disconnect,
93
- };
94
-
95
- // Find any devices connected to the root hub.
96
- static int
97
- check_ohci_ports(struct usb_ohci_s *cntl)
98
- {
99
- ASSERT32FLAT();
100
- // Wait for ehci init - in case this is a "companion controller"
101
- ehci_wait_controllers();
102
- // Turn on power for all devices on roothub.
103
- u32 rha = readl(&cntl->regs->roothub_a);
104
- rha &= ~(RH_A_PSM | RH_A_OCPM);
105
- writel(&cntl->regs->roothub_status, RH_HS_LPSC);
106
- writel(&cntl->regs->roothub_b, RH_B_PPCM);
107
- msleep((rha >> 24) * 2);
108
- // XXX - need to sleep for USB_TIME_SIGATT if just powered up?
109
-
110
- struct usbhub_s hub;
111
- memset(&hub, 0, sizeof(hub));
112
- hub.cntl = &cntl->usb;
113
- hub.portcount = rha & RH_A_NDP;
114
- hub.op = &ohci_HubOp;
115
- usb_enumerate(&hub);
116
- return hub.devcount;
117
- }
118
-
119
-
120
- /****************************************************************
121
- * Setup
122
- ****************************************************************/
123
-
124
- // Wait for next USB frame to start - for ensuring safe memory release.
125
- static void
126
- ohci_waittick(struct ohci_regs *regs)
127
- {
128
- barrier();
129
- struct ohci_hcca *hcca = (void*)regs->hcca;
130
- u32 startframe = hcca->frame_no;
131
- u32 end = timer_calc(1000 * 5);
132
- for (;;) {
133
- if (hcca->frame_no != startframe)
134
- break;
135
- if (timer_check(end)) {
136
- warn_timeout();
137
- return;
138
- }
139
- yield();
140
- }
141
- }
142
-
143
- static void
144
- ohci_free_pipes(struct usb_ohci_s *cntl)
145
- {
146
- dprintf(7, "ohci_free_pipes %p\n", cntl);
147
-
148
- u32 creg = readl(&cntl->regs->control);
149
- if (creg & (OHCI_CTRL_CLE|OHCI_CTRL_BLE)) {
150
- writel(&cntl->regs->control, creg & ~(OHCI_CTRL_CLE|OHCI_CTRL_BLE));
151
- ohci_waittick(cntl->regs);
152
- }
153
-
154
- u32 *pos = &cntl->regs->ed_controlhead;
155
- for (;;) {
156
- struct ohci_ed *next = (void*)*pos;
157
- if (!next)
158
- break;
159
- struct ohci_pipe *pipe = container_of(next, struct ohci_pipe, ed);
160
- if (usb_is_freelist(&cntl->usb, &pipe->pipe)) {
161
- *pos = next->hwNextED;
162
- free(pipe);
163
- } else {
164
- pos = &next->hwNextED;
165
- }
166
- }
167
-
168
- writel(&cntl->regs->ed_controlcurrent, 0);
169
- writel(&cntl->regs->ed_bulkcurrent, 0);
170
- writel(&cntl->regs->control, creg);
171
- cntl->usb.freelist = NULL;
172
- }
173
-
174
- static int
175
- start_ohci(struct usb_ohci_s *cntl, struct ohci_hcca *hcca)
176
- {
177
- u32 oldfminterval = readl(&cntl->regs->fminterval);
178
- u32 oldrwc = readl(&cntl->regs->control) & OHCI_CTRL_RWC;
179
-
180
- // XXX - check if already running?
181
-
182
- // Do reset
183
- writel(&cntl->regs->control, OHCI_USB_RESET | oldrwc);
184
- readl(&cntl->regs->control); // flush writes
185
- msleep(USB_TIME_DRSTR);
186
-
187
- // Do software init (min 10us, max 2ms)
188
- u32 end = timer_calc_usec(10);
189
- writel(&cntl->regs->cmdstatus, OHCI_HCR);
190
- for (;;) {
191
- u32 status = readl(&cntl->regs->cmdstatus);
192
- if (! status & OHCI_HCR)
193
- break;
194
- if (timer_check(end)) {
195
- warn_timeout();
196
- return -1;
197
- }
198
- }
199
-
200
- // Init memory
201
- writel(&cntl->regs->ed_controlhead, 0);
202
- writel(&cntl->regs->ed_bulkhead, 0);
203
- writel(&cntl->regs->hcca, (u32)hcca);
204
-
205
- // Init fminterval
206
- u32 fi = oldfminterval & 0x3fff;
207
- writel(&cntl->regs->fminterval
208
- , (((oldfminterval & FIT) ^ FIT)
209
- | fi | (((6 * (fi - 210)) / 7) << 16)));
210
- writel(&cntl->regs->periodicstart, ((9 * fi) / 10) & 0x3fff);
211
- readl(&cntl->regs->control); // flush writes
212
-
213
- // XXX - verify that fminterval was setup correctly.
214
-
215
- // Go into operational state
216
- writel(&cntl->regs->control
217
- , (OHCI_CTRL_CBSR | OHCI_CTRL_CLE | OHCI_CTRL_BLE | OHCI_CTRL_PLE
218
- | OHCI_USB_OPER | oldrwc));
219
- readl(&cntl->regs->control); // flush writes
220
-
221
- return 0;
222
- }
223
-
224
- static void
225
- stop_ohci(struct usb_ohci_s *cntl)
226
- {
227
- u32 oldrwc = readl(&cntl->regs->control) & OHCI_CTRL_RWC;
228
- writel(&cntl->regs->control, oldrwc);
229
- readl(&cntl->regs->control); // flush writes
230
- }
231
-
232
- static void
233
- configure_ohci(void *data)
234
- {
235
- struct usb_ohci_s *cntl = data;
236
-
237
- // Allocate memory
238
- struct ohci_hcca *hcca = memalign_high(256, sizeof(*hcca));
239
- struct ohci_ed *intr_ed = malloc_high(sizeof(*intr_ed));
240
- if (!hcca || !intr_ed) {
241
- warn_noalloc();
242
- goto free;
243
- }
244
- memset(hcca, 0, sizeof(*hcca));
245
- memset(intr_ed, 0, sizeof(*intr_ed));
246
- intr_ed->hwINFO = ED_SKIP;
247
- int i;
248
- for (i=0; i<ARRAY_SIZE(hcca->int_table); i++)
249
- hcca->int_table[i] = (u32)intr_ed;
250
-
251
- int ret = start_ohci(cntl, hcca);
252
- if (ret)
253
- goto err;
254
-
255
- int count = check_ohci_ports(cntl);
256
- ohci_free_pipes(cntl);
257
- if (! count)
258
- goto err;
259
- return;
260
-
261
- err:
262
- stop_ohci(cntl);
263
- free:
264
- free(hcca);
265
- free(intr_ed);
266
- }
267
-
268
- static void
269
- ohci_controller_setup(struct pci_device *pci)
270
- {
271
- struct ohci_regs *regs = pci_enable_membar(pci, PCI_BASE_ADDRESS_0);
272
- if (!regs)
273
- return;
274
-
275
- struct usb_ohci_s *cntl = malloc_tmphigh(sizeof(*cntl));
276
- if (!cntl) {
277
- warn_noalloc();
278
- return;
279
- }
280
- memset(cntl, 0, sizeof(*cntl));
281
- cntl->usb.pci = pci;
282
- cntl->usb.type = USB_TYPE_OHCI;
283
- cntl->regs = regs;
284
-
285
- dprintf(1, "OHCI init on dev %pP (regs=%p)\n", pci, cntl->regs);
286
-
287
- pci_enable_busmaster(pci);
288
-
289
- // XXX - check for and disable SMM control?
290
-
291
- // Disable interrupts
292
- writel(&cntl->regs->intrdisable, ~0);
293
- writel(&cntl->regs->intrstatus, ~0);
294
-
295
- run_thread(configure_ohci, cntl);
296
- }
297
-
298
- void
299
- ohci_setup(void)
300
- {
301
- if (! CONFIG_USB_OHCI)
302
- return;
303
- struct pci_device *pci;
304
- foreachpci(pci) {
305
- if (pci_classprog(pci) == PCI_CLASS_SERIAL_USB_OHCI)
306
- ohci_controller_setup(pci);
307
- }
308
- }
309
-
310
-
311
- /****************************************************************
312
- * End point communication
313
- ****************************************************************/
314
-
315
- // Setup fields in ed
316
- static void
317
- ohci_desc2pipe(struct ohci_pipe *pipe, struct usbdevice_s *usbdev
318
- , struct usb_endpoint_descriptor *epdesc)
319
- {
320
- usb_desc2pipe(&pipe->pipe, usbdev, epdesc);
321
- pipe->ed.hwINFO = (ED_SKIP | usbdev->devaddr | (pipe->pipe.ep << 7)
322
- | (epdesc->wMaxPacketSize << 16)
323
- | (usbdev->speed ? ED_LOWSPEED : 0));
324
- struct usb_ohci_s *cntl = container_of(
325
- usbdev->hub->cntl, struct usb_ohci_s, usb);
326
- pipe->regs = cntl->regs;
327
- }
328
-
329
- static struct usb_pipe *
330
- ohci_alloc_intr_pipe(struct usbdevice_s *usbdev
331
- , struct usb_endpoint_descriptor *epdesc)
332
- {
333
- struct usb_ohci_s *cntl = container_of(
334
- usbdev->hub->cntl, struct usb_ohci_s, usb);
335
- int frameexp = usb_get_period(usbdev, epdesc);
336
- dprintf(7, "ohci_alloc_intr_pipe %p %d\n", &cntl->usb, frameexp);
337
-
338
- if (frameexp > 5)
339
- frameexp = 5;
340
- int maxpacket = epdesc->wMaxPacketSize;
341
- // Determine number of entries needed for 2 timer ticks.
342
- int ms = 1<<frameexp;
343
- int count = DIV_ROUND_UP(ticks_to_ms(2), ms) + 1;
344
- struct ohci_pipe *pipe = malloc_low(sizeof(*pipe));
345
- struct ohci_td *tds = malloc_low(sizeof(*tds) * count);
346
- void *data = malloc_low(maxpacket * count);
347
- if (!pipe || !tds || !data)
348
- goto err;
349
- memset(pipe, 0, sizeof(*pipe));
350
- ohci_desc2pipe(pipe, usbdev, epdesc);
351
- pipe->ed.hwINFO &= ~ED_SKIP;
352
- pipe->data = data;
353
- pipe->count = count;
354
- pipe->tds = tds;
355
-
356
- struct ohci_ed *ed = &pipe->ed;
357
- ed->hwHeadP = (u32)&tds[0];
358
- ed->hwTailP = (u32)&tds[count-1];
359
-
360
- int i;
361
- for (i=0; i<count-1; i++) {
362
- tds[i].hwINFO = TD_DP_IN | TD_T_TOGGLE | TD_CC;
363
- tds[i].hwCBP = (u32)data + maxpacket * i;
364
- tds[i].hwNextTD = (u32)&tds[i+1];
365
- tds[i].hwBE = tds[i].hwCBP + maxpacket - 1;
366
- }
367
-
368
- // Add to interrupt schedule.
369
- struct ohci_hcca *hcca = (void*)cntl->regs->hcca;
370
- if (frameexp == 0) {
371
- // Add to existing interrupt entry.
372
- struct ohci_ed *intr_ed = (void*)hcca->int_table[0];
373
- ed->hwNextED = intr_ed->hwNextED;
374
- barrier();
375
- intr_ed->hwNextED = (u32)ed;
376
- } else {
377
- int startpos = 1<<(frameexp-1);
378
- ed->hwNextED = hcca->int_table[startpos];
379
- barrier();
380
- for (i=startpos; i<ARRAY_SIZE(hcca->int_table); i+=ms)
381
- hcca->int_table[i] = (u32)ed;
382
- }
383
-
384
- return &pipe->pipe;
385
-
386
- err:
387
- free(pipe);
388
- free(tds);
389
- free(data);
390
- return NULL;
391
- }
392
-
393
- struct usb_pipe *
394
- ohci_realloc_pipe(struct usbdevice_s *usbdev, struct usb_pipe *upipe
395
- , struct usb_endpoint_descriptor *epdesc)
396
- {
397
- if (! CONFIG_USB_OHCI)
398
- return NULL;
399
- usb_add_freelist(upipe);
400
- if (!epdesc)
401
- return NULL;
402
- u8 eptype = epdesc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
403
- if (eptype == USB_ENDPOINT_XFER_INT)
404
- return ohci_alloc_intr_pipe(usbdev, epdesc);
405
- struct usb_ohci_s *cntl = container_of(
406
- usbdev->hub->cntl, struct usb_ohci_s, usb);
407
- dprintf(7, "ohci_alloc_async_pipe %p\n", &cntl->usb);
408
-
409
- struct usb_pipe *usbpipe = usb_get_freelist(&cntl->usb, eptype);
410
- if (usbpipe) {
411
- // Use previously allocated pipe.
412
- struct ohci_pipe *pipe = container_of(usbpipe, struct ohci_pipe, pipe);
413
- ohci_desc2pipe(pipe, usbdev, epdesc);
414
- return usbpipe;
415
- }
416
-
417
- // Allocate a new queue head.
418
- struct ohci_pipe *pipe;
419
- if (eptype == USB_ENDPOINT_XFER_CONTROL)
420
- pipe = malloc_tmphigh(sizeof(*pipe));
421
- else
422
- pipe = malloc_low(sizeof(*pipe));
423
- if (!pipe) {
424
- warn_noalloc();
425
- return NULL;
426
- }
427
- memset(pipe, 0, sizeof(*pipe));
428
- ohci_desc2pipe(pipe, usbdev, epdesc);
429
-
430
- // Add queue head to controller list.
431
- u32 *head = &cntl->regs->ed_controlhead;
432
- if (eptype != USB_ENDPOINT_XFER_CONTROL)
433
- head = &cntl->regs->ed_bulkhead;
434
- pipe->ed.hwNextED = *head;
435
- barrier();
436
- *head = (u32)&pipe->ed;
437
- return &pipe->pipe;
438
- }
439
-
440
- static int
441
- wait_ed(struct ohci_ed *ed, int timeout)
442
- {
443
- u32 end = timer_calc(timeout);
444
- for (;;) {
445
- if ((ed->hwHeadP & ~(ED_C|ED_H)) == ed->hwTailP)
446
- return 0;
447
- if (timer_check(end)) {
448
- warn_timeout();
449
- dprintf(1, "ohci ed info=%x tail=%x head=%x next=%x\n"
450
- , ed->hwINFO, ed->hwTailP, ed->hwHeadP, ed->hwNextED);
451
- return -1;
452
- }
453
- yield();
454
- }
455
- }
456
-
457
- #define STACKOTDS 18
458
- #define OHCI_TD_ALIGN 16
459
-
460
- int
461
- ohci_send_pipe(struct usb_pipe *p, int dir, const void *cmd
462
- , void *data, int datasize)
463
- {
464
- ASSERT32FLAT();
465
- if (! CONFIG_USB_OHCI)
466
- return -1;
467
- dprintf(7, "ohci_send_pipe %p\n", p);
468
- struct ohci_pipe *pipe = container_of(p, struct ohci_pipe, pipe);
469
-
470
- // Allocate tds on stack (with required alignment)
471
- u8 tdsbuf[sizeof(struct ohci_td) * STACKOTDS + OHCI_TD_ALIGN - 1];
472
- struct ohci_td *tds = (void*)ALIGN((u32)tdsbuf, OHCI_TD_ALIGN), *td = tds;
473
- memset(tds, 0, sizeof(*tds) * STACKOTDS);
474
-
475
- // Setup transfer descriptors
476
- u16 maxpacket = pipe->pipe.maxpacket;
477
- u32 toggle = 0, statuscmd = OHCI_BLF;
478
- if (cmd) {
479
- // Send setup pid on control transfers
480
- td->hwINFO = TD_DP_SETUP | TD_T_DATA0 | TD_CC;
481
- td->hwCBP = (u32)cmd;
482
- td->hwNextTD = (u32)&td[1];
483
- td->hwBE = (u32)cmd + USB_CONTROL_SETUP_SIZE - 1;
484
- td++;
485
- toggle = TD_T_DATA1;
486
- statuscmd = OHCI_CLF;
487
- }
488
- u32 dest = (u32)data, dataend = dest + datasize;
489
- while (dest < dataend) {
490
- // Send data pids
491
- if (td >= &tds[STACKOTDS]) {
492
- warn_noalloc();
493
- return -1;
494
- }
495
- int maxtransfer = 2*PAGE_SIZE - (dest & (PAGE_SIZE-1));
496
- int transfer = dataend - dest;
497
- if (transfer > maxtransfer)
498
- transfer = ALIGN_DOWN(maxtransfer, maxpacket);
499
- td->hwINFO = (dir ? TD_DP_IN : TD_DP_OUT) | toggle | TD_CC;
500
- td->hwCBP = dest;
501
- td->hwNextTD = (u32)&td[1];
502
- td->hwBE = dest + transfer - 1;
503
- td++;
504
- dest += transfer;
505
- }
506
- if (cmd) {
507
- // Send status pid on control transfers
508
- if (td >= &tds[STACKOTDS]) {
509
- warn_noalloc();
510
- return -1;
511
- }
512
- td->hwINFO = (dir ? TD_DP_OUT : TD_DP_IN) | TD_T_DATA1 | TD_CC;
513
- td->hwCBP = 0;
514
- td->hwNextTD = (u32)&td[1];
515
- td->hwBE = 0;
516
- td++;
517
- }
518
-
519
- // Transfer data
520
- pipe->ed.hwHeadP = (u32)tds | (pipe->ed.hwHeadP & ED_C);
521
- pipe->ed.hwTailP = (u32)td;
522
- barrier();
523
- pipe->ed.hwINFO &= ~ED_SKIP;
524
- writel(&pipe->regs->cmdstatus, statuscmd);
525
-
526
- int ret = wait_ed(&pipe->ed, usb_xfer_time(p, datasize));
527
- pipe->ed.hwINFO |= ED_SKIP;
528
- if (ret)
529
- ohci_waittick(pipe->regs);
530
- return ret;
531
- }
532
-
533
- int
534
- ohci_poll_intr(struct usb_pipe *p, void *data)
535
- {
536
- ASSERT16();
537
- if (! CONFIG_USB_OHCI)
538
- return -1;
539
-
540
- struct ohci_pipe *pipe = container_of(p, struct ohci_pipe, pipe);
541
- struct ohci_td *tds = GET_LOWFLAT(pipe->tds);
542
- struct ohci_td *head = (void*)(GET_LOWFLAT(pipe->ed.hwHeadP) & ~(ED_C|ED_H));
543
- struct ohci_td *tail = (void*)GET_LOWFLAT(pipe->ed.hwTailP);
544
- int count = GET_LOWFLAT(pipe->count);
545
- int pos = (tail - tds + 1) % count;
546
- struct ohci_td *next = &tds[pos];
547
- if (head == next)
548
- // No intrs found.
549
- return -1;
550
- // XXX - check for errors.
551
-
552
- // Copy data.
553
- int maxpacket = GET_LOWFLAT(pipe->pipe.maxpacket);
554
- void *pipedata = GET_LOWFLAT((pipe->data));
555
- void *intrdata = pipedata + maxpacket * pos;
556
- memcpy_far(GET_SEG(SS), data, SEG_LOW, LOWFLAT2LOW(intrdata), maxpacket);
557
-
558
- // Reenable this td.
559
- SET_LOWFLAT(tail->hwINFO, TD_DP_IN | TD_T_TOGGLE | TD_CC);
560
- intrdata = pipedata + maxpacket * (tail-tds);
561
- SET_LOWFLAT(tail->hwCBP, (u32)intrdata);
562
- SET_LOWFLAT(tail->hwNextTD, (u32)next);
563
- SET_LOWFLAT(tail->hwBE, (u32)intrdata + maxpacket - 1);
564
- barrier();
565
- SET_LOWFLAT(pipe->ed.hwTailP, (u32)next);
566
-
567
- return 0;
568
- }
@@ -1,144 +0,0 @@
1
- #ifndef __USB_OHCI_H
2
- #define __USB_OHCI_H
3
-
4
- // usb-ohci.c
5
- void ohci_setup(void);
6
- struct usbdevice_s;
7
- struct usb_endpoint_descriptor;
8
- struct usb_pipe;
9
- struct usb_pipe *ohci_realloc_pipe(struct usbdevice_s *usbdev
10
- , struct usb_pipe *upipe
11
- , struct usb_endpoint_descriptor *epdesc);
12
- int ohci_send_pipe(struct usb_pipe *p, int dir, const void *cmd
13
- , void *data, int datasize);
14
- int ohci_poll_intr(struct usb_pipe *p, void *data);
15
-
16
-
17
- /****************************************************************
18
- * ohci structs and flags
19
- ****************************************************************/
20
-
21
- struct ohci_ed {
22
- u32 hwINFO;
23
- u32 hwTailP;
24
- u32 hwHeadP;
25
- u32 hwNextED;
26
- } PACKED;
27
-
28
- #define ED_ISO (1 << 15)
29
- #define ED_SKIP (1 << 14)
30
- #define ED_LOWSPEED (1 << 13)
31
- #define ED_OUT (0x01 << 11)
32
- #define ED_IN (0x02 << 11)
33
-
34
- #define ED_C (0x02)
35
- #define ED_H (0x01)
36
-
37
- struct ohci_td {
38
- u32 hwINFO;
39
- u32 hwCBP;
40
- u32 hwNextTD;
41
- u32 hwBE;
42
- } PACKED;
43
-
44
- #define TD_CC 0xf0000000
45
- #define TD_CC_GET(td_p) ((td_p >>28) & 0x0f)
46
- #define TD_DI 0x00E00000
47
-
48
- #define TD_DONE 0x00020000
49
- #define TD_ISO 0x00010000
50
-
51
- #define TD_EC 0x0C000000
52
- #define TD_T 0x03000000
53
- #define TD_T_DATA0 0x02000000
54
- #define TD_T_DATA1 0x03000000
55
- #define TD_T_TOGGLE 0x00000000
56
- #define TD_DP 0x00180000
57
- #define TD_DP_SETUP 0x00000000
58
- #define TD_DP_IN 0x00100000
59
- #define TD_DP_OUT 0x00080000
60
-
61
- #define TD_R 0x00040000
62
-
63
- struct ohci_hcca {
64
- u32 int_table[32];
65
- u32 frame_no;
66
- u32 done_head;
67
- u8 reserved[120];
68
- } PACKED;
69
-
70
- struct ohci_regs {
71
- u32 revision;
72
- u32 control;
73
- u32 cmdstatus;
74
- u32 intrstatus;
75
- u32 intrenable;
76
- u32 intrdisable;
77
-
78
- u32 hcca;
79
- u32 ed_periodcurrent;
80
- u32 ed_controlhead;
81
- u32 ed_controlcurrent;
82
- u32 ed_bulkhead;
83
- u32 ed_bulkcurrent;
84
- u32 donehead;
85
-
86
- u32 fminterval;
87
- u32 fmremaining;
88
- u32 fmnumber;
89
- u32 periodicstart;
90
- u32 lsthresh;
91
-
92
- u32 roothub_a;
93
- u32 roothub_b;
94
- u32 roothub_status;
95
- u32 roothub_portstatus[15];
96
- } PACKED;
97
-
98
- #define OHCI_CTRL_CBSR (3 << 0)
99
- #define OHCI_CTRL_PLE (1 << 2)
100
- #define OHCI_CTRL_CLE (1 << 4)
101
- #define OHCI_CTRL_BLE (1 << 5)
102
- #define OHCI_CTRL_HCFS (3 << 6)
103
- # define OHCI_USB_RESET (0 << 6)
104
- # define OHCI_USB_OPER (2 << 6)
105
- #define OHCI_CTRL_RWC (1 << 9)
106
-
107
- #define OHCI_HCR (1 << 0)
108
- #define OHCI_CLF (1 << 1)
109
- #define OHCI_BLF (1 << 2)
110
-
111
- #define OHCI_INTR_MIE (1 << 31)
112
-
113
- #define RH_PS_CCS 0x00000001
114
- #define RH_PS_PES 0x00000002
115
- #define RH_PS_PSS 0x00000004
116
- #define RH_PS_POCI 0x00000008
117
- #define RH_PS_PRS 0x00000010
118
- #define RH_PS_PPS 0x00000100
119
- #define RH_PS_LSDA 0x00000200
120
- #define RH_PS_CSC 0x00010000
121
- #define RH_PS_PESC 0x00020000
122
- #define RH_PS_PSSC 0x00040000
123
- #define RH_PS_OCIC 0x00080000
124
- #define RH_PS_PRSC 0x00100000
125
-
126
- #define RH_HS_LPS 0x00000001
127
- #define RH_HS_OCI 0x00000002
128
- #define RH_HS_DRWE 0x00008000
129
- #define RH_HS_LPSC 0x00010000
130
- #define RH_HS_OCIC 0x00020000
131
- #define RH_HS_CRWE 0x80000000
132
-
133
- #define RH_B_DR 0x0000ffff
134
- #define RH_B_PPCM 0xffff0000
135
-
136
- #define RH_A_NDP (0xff << 0)
137
- #define RH_A_PSM (1 << 8)
138
- #define RH_A_NPS (1 << 9)
139
- #define RH_A_DT (1 << 10)
140
- #define RH_A_OCPM (1 << 11)
141
- #define RH_A_NOCP (1 << 12)
142
- #define RH_A_POTPGT (0xff << 24)
143
-
144
- #endif // usb-ohci.h