v86 0.4.0 → 0.5.11

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (386) hide show
  1. package/Readme.md +56 -111
  2. package/build/libv86-debug.js +12680 -0
  3. package/build/libv86-debug.mjs +732 -0
  4. package/build/libv86.js +710 -0
  5. package/build/libv86.mjs +637 -0
  6. package/build/v86-debug.wasm +0 -0
  7. package/build/v86-fallback.wasm +0 -0
  8. package/build/v86.wasm +0 -0
  9. package/package.json +12 -35
  10. package/bios/.gitignore +0 -1
  11. package/bios/COPYING.LESSER +0 -165
  12. package/bios/bochs-bios.bin +0 -0
  13. package/bios/bochs-vgabios.bin +0 -0
  14. package/bios/fetch-and-build-seabios.sh +0 -13
  15. package/bios/seabios/.config +0 -113
  16. package/bios/seabios/.config.old +0 -114
  17. package/bios/seabios/.gitignore +0 -4
  18. package/bios/seabios/COPYING +0 -674
  19. package/bios/seabios/COPYING.LESSER +0 -165
  20. package/bios/seabios/Makefile +0 -286
  21. package/bios/seabios/README +0 -17
  22. package/bios/seabios/docs/Build_overview.md +0 -104
  23. package/bios/seabios/docs/Contributing.md +0 -20
  24. package/bios/seabios/docs/Debugging.md +0 -111
  25. package/bios/seabios/docs/Developer_Documentation.md +0 -25
  26. package/bios/seabios/docs/Developer_links.md +0 -86
  27. package/bios/seabios/docs/Download.md +0 -27
  28. package/bios/seabios/docs/Execution_and_code_flow.md +0 -178
  29. package/bios/seabios/docs/Linking_overview.md +0 -160
  30. package/bios/seabios/docs/Mailinglist.md +0 -8
  31. package/bios/seabios/docs/Memory_Model.md +0 -253
  32. package/bios/seabios/docs/README +0 -5
  33. package/bios/seabios/docs/Releases.md +0 -482
  34. package/bios/seabios/docs/Runtime_config.md +0 -193
  35. package/bios/seabios/docs/SeaBIOS.md +0 -17
  36. package/bios/seabios/docs/SeaVGABIOS.md +0 -39
  37. package/bios/seabios/out/autoconf.h +0 -117
  38. package/bios/seabios/out/include/config/acpi/dsdt.h +0 -0
  39. package/bios/seabios/out/include/config/acpi.h +0 -0
  40. package/bios/seabios/out/include/config/ahci.h +0 -0
  41. package/bios/seabios/out/include/config/apmbios.h +0 -0
  42. package/bios/seabios/out/include/config/ata/dma.h +0 -0
  43. package/bios/seabios/out/include/config/ata/pio32.h +0 -0
  44. package/bios/seabios/out/include/config/ata.h +0 -0
  45. package/bios/seabios/out/include/config/auto.conf +0 -69
  46. package/bios/seabios/out/include/config/auto.conf.cmd +0 -9
  47. package/bios/seabios/out/include/config/boot.h +0 -0
  48. package/bios/seabios/out/include/config/bootorder.h +0 -0
  49. package/bios/seabios/out/include/config/build/vgabios.h +0 -0
  50. package/bios/seabios/out/include/config/call32/smm.h +0 -0
  51. package/bios/seabios/out/include/config/cdrom/boot.h +0 -0
  52. package/bios/seabios/out/include/config/cdrom/emu.h +0 -0
  53. package/bios/seabios/out/include/config/debug/level.h +0 -0
  54. package/bios/seabios/out/include/config/drives.h +0 -0
  55. package/bios/seabios/out/include/config/entry/extrastack.h +0 -0
  56. package/bios/seabios/out/include/config/esp/scsi.h +0 -0
  57. package/bios/seabios/out/include/config/flash/floppy.h +0 -0
  58. package/bios/seabios/out/include/config/floppy.h +0 -0
  59. package/bios/seabios/out/include/config/fw/romfile/load.h +0 -0
  60. package/bios/seabios/out/include/config/hardware/irq.h +0 -0
  61. package/bios/seabios/out/include/config/kbd/call/int15/4f.h +0 -0
  62. package/bios/seabios/out/include/config/keyboard.h +0 -0
  63. package/bios/seabios/out/include/config/lpt.h +0 -0
  64. package/bios/seabios/out/include/config/lsi/scsi.h +0 -0
  65. package/bios/seabios/out/include/config/malloc/uppermemory.h +0 -0
  66. package/bios/seabios/out/include/config/megasas.h +0 -0
  67. package/bios/seabios/out/include/config/mouse.h +0 -0
  68. package/bios/seabios/out/include/config/mpt/scsi.h +0 -0
  69. package/bios/seabios/out/include/config/mptable.h +0 -0
  70. package/bios/seabios/out/include/config/mtrr/init.h +0 -0
  71. package/bios/seabios/out/include/config/optionroms.h +0 -0
  72. package/bios/seabios/out/include/config/override/pci/id.h +0 -0
  73. package/bios/seabios/out/include/config/pcibios.h +0 -0
  74. package/bios/seabios/out/include/config/pirtable.h +0 -0
  75. package/bios/seabios/out/include/config/pmm.h +0 -0
  76. package/bios/seabios/out/include/config/pmtimer.h +0 -0
  77. package/bios/seabios/out/include/config/pnpbios.h +0 -0
  78. package/bios/seabios/out/include/config/ps2port.h +0 -0
  79. package/bios/seabios/out/include/config/pvscsi.h +0 -0
  80. package/bios/seabios/out/include/config/qemu/hardware.h +0 -0
  81. package/bios/seabios/out/include/config/qemu.h +0 -0
  82. package/bios/seabios/out/include/config/rom/size.h +0 -0
  83. package/bios/seabios/out/include/config/rtc/timer.h +0 -0
  84. package/bios/seabios/out/include/config/s3/resume.h +0 -0
  85. package/bios/seabios/out/include/config/sdcard.h +0 -0
  86. package/bios/seabios/out/include/config/serial.h +0 -0
  87. package/bios/seabios/out/include/config/tcgbios.h +0 -0
  88. package/bios/seabios/out/include/config/threads.h +0 -0
  89. package/bios/seabios/out/include/config/tristate.conf +0 -4
  90. package/bios/seabios/out/include/config/tsc/timer.h +0 -0
  91. package/bios/seabios/out/include/config/use/smm.h +0 -0
  92. package/bios/seabios/out/include/config/vga/allocate/extra/stack.h +0 -0
  93. package/bios/seabios/out/include/config/vga/bochs/stdvga.h +0 -0
  94. package/bios/seabios/out/include/config/vga/bochs.h +0 -0
  95. package/bios/seabios/out/include/config/vga/did.h +0 -0
  96. package/bios/seabios/out/include/config/vga/extra/stack/size.h +0 -0
  97. package/bios/seabios/out/include/config/vga/fixup/asm.h +0 -0
  98. package/bios/seabios/out/include/config/vga/pci.h +0 -0
  99. package/bios/seabios/out/include/config/vga/stdvga/ports.h +0 -0
  100. package/bios/seabios/out/include/config/vga/vbe.h +0 -0
  101. package/bios/seabios/out/include/config/vga/vid.h +0 -0
  102. package/bios/seabios/out/include/config/vgahooks.h +0 -0
  103. package/bios/seabios/out/include/config/virtio/blk.h +0 -0
  104. package/bios/seabios/out/include/config/virtio/scsi.h +0 -0
  105. package/bios/seabios/out/include/config/xen.h +0 -0
  106. package/bios/seabios/out/scripts/kconfig/conf +0 -0
  107. package/bios/seabios/out/scripts/kconfig/conf.o +0 -0
  108. package/bios/seabios/out/scripts/kconfig/zconf.hash.c +0 -289
  109. package/bios/seabios/out/scripts/kconfig/zconf.lex.c +0 -2420
  110. package/bios/seabios/out/scripts/kconfig/zconf.tab.c +0 -2538
  111. package/bios/seabios/out/scripts/kconfig/zconf.tab.o +0 -0
  112. package/bios/seabios/scripts/acpi_extract.py +0 -366
  113. package/bios/seabios/scripts/acpi_extract_preprocess.py +0 -41
  114. package/bios/seabios/scripts/buildrom.py +0 -56
  115. package/bios/seabios/scripts/buildversion.py +0 -134
  116. package/bios/seabios/scripts/checkrom.py +0 -95
  117. package/bios/seabios/scripts/checkstack.py +0 -226
  118. package/bios/seabios/scripts/checksum.py +0 -16
  119. package/bios/seabios/scripts/encodeint.py +0 -21
  120. package/bios/seabios/scripts/gen-offsets.sh +0 -17
  121. package/bios/seabios/scripts/kconfig/.gitignore +0 -22
  122. package/bios/seabios/scripts/kconfig/Makefile +0 -331
  123. package/bios/seabios/scripts/kconfig/POTFILES.in +0 -12
  124. package/bios/seabios/scripts/kconfig/check.sh +0 -13
  125. package/bios/seabios/scripts/kconfig/conf.c +0 -718
  126. package/bios/seabios/scripts/kconfig/confdata.c +0 -1250
  127. package/bios/seabios/scripts/kconfig/expr.c +0 -1168
  128. package/bios/seabios/scripts/kconfig/expr.h +0 -241
  129. package/bios/seabios/scripts/kconfig/gconf.c +0 -1542
  130. package/bios/seabios/scripts/kconfig/gconf.glade +0 -661
  131. package/bios/seabios/scripts/kconfig/images.c +0 -326
  132. package/bios/seabios/scripts/kconfig/kxgettext.c +0 -235
  133. package/bios/seabios/scripts/kconfig/lex.zconf.c +0 -2430
  134. package/bios/seabios/scripts/kconfig/list.h +0 -131
  135. package/bios/seabios/scripts/kconfig/lkc.h +0 -200
  136. package/bios/seabios/scripts/kconfig/lkc_proto.h +0 -57
  137. package/bios/seabios/scripts/kconfig/lxdialog/.gitignore +0 -4
  138. package/bios/seabios/scripts/kconfig/lxdialog/BIG.FAT.WARNING +0 -4
  139. package/bios/seabios/scripts/kconfig/lxdialog/check-lxdialog.sh +0 -87
  140. package/bios/seabios/scripts/kconfig/lxdialog/checklist.c +0 -332
  141. package/bios/seabios/scripts/kconfig/lxdialog/dialog.h +0 -257
  142. package/bios/seabios/scripts/kconfig/lxdialog/inputbox.c +0 -301
  143. package/bios/seabios/scripts/kconfig/lxdialog/menubox.c +0 -437
  144. package/bios/seabios/scripts/kconfig/lxdialog/textbox.c +0 -408
  145. package/bios/seabios/scripts/kconfig/lxdialog/util.c +0 -713
  146. package/bios/seabios/scripts/kconfig/lxdialog/yesno.c +0 -114
  147. package/bios/seabios/scripts/kconfig/mconf.c +0 -1036
  148. package/bios/seabios/scripts/kconfig/menu.c +0 -697
  149. package/bios/seabios/scripts/kconfig/merge_config.sh +0 -150
  150. package/bios/seabios/scripts/kconfig/nconf.c +0 -1556
  151. package/bios/seabios/scripts/kconfig/nconf.gui.c +0 -656
  152. package/bios/seabios/scripts/kconfig/nconf.h +0 -96
  153. package/bios/seabios/scripts/kconfig/qconf.cc +0 -1795
  154. package/bios/seabios/scripts/kconfig/qconf.h +0 -338
  155. package/bios/seabios/scripts/kconfig/streamline_config.pl +0 -647
  156. package/bios/seabios/scripts/kconfig/symbol.c +0 -1373
  157. package/bios/seabios/scripts/kconfig/util.c +0 -157
  158. package/bios/seabios/scripts/kconfig/zconf.gperf +0 -48
  159. package/bios/seabios/scripts/kconfig/zconf.hash.c_shipped +0 -289
  160. package/bios/seabios/scripts/kconfig/zconf.l +0 -363
  161. package/bios/seabios/scripts/kconfig/zconf.lex.c_shipped +0 -2420
  162. package/bios/seabios/scripts/kconfig/zconf.tab.c_shipped +0 -2538
  163. package/bios/seabios/scripts/kconfig/zconf.y +0 -733
  164. package/bios/seabios/scripts/layoutrom.py +0 -705
  165. package/bios/seabios/scripts/python23compat.py +0 -14
  166. package/bios/seabios/scripts/readserial.py +0 -190
  167. package/bios/seabios/scripts/tarball.sh +0 -36
  168. package/bios/seabios/scripts/test-build.sh +0 -90
  169. package/bios/seabios/scripts/transdump.py +0 -53
  170. package/bios/seabios/scripts/vgafixup.py +0 -96
  171. package/bios/seabios/src/Kconfig +0 -579
  172. package/bios/seabios/src/apm.c +0 -215
  173. package/bios/seabios/src/asm-offsets.c +0 -23
  174. package/bios/seabios/src/biosvar.h +0 -130
  175. package/bios/seabios/src/block.c +0 -623
  176. package/bios/seabios/src/block.h +0 -121
  177. package/bios/seabios/src/bmp.c +0 -117
  178. package/bios/seabios/src/boot.c +0 -793
  179. package/bios/seabios/src/bootsplash.c +0 -255
  180. package/bios/seabios/src/bregs.h +0 -80
  181. package/bios/seabios/src/byteorder.h +0 -71
  182. package/bios/seabios/src/cdrom.c +0 -322
  183. package/bios/seabios/src/clock.c +0 -506
  184. package/bios/seabios/src/code16gcc.s +0 -1
  185. package/bios/seabios/src/config.h +0 -108
  186. package/bios/seabios/src/cp437.c +0 -275
  187. package/bios/seabios/src/cp437.h +0 -1
  188. package/bios/seabios/src/disk.c +0 -779
  189. package/bios/seabios/src/e820map.c +0 -152
  190. package/bios/seabios/src/e820map.h +0 -26
  191. package/bios/seabios/src/entryfuncs.S +0 -165
  192. package/bios/seabios/src/farptr.h +0 -208
  193. package/bios/seabios/src/font.c +0 -139
  194. package/bios/seabios/src/fw/acpi-dsdt-cpu-hotplug.dsl +0 -78
  195. package/bios/seabios/src/fw/acpi-dsdt-dbug.dsl +0 -26
  196. package/bios/seabios/src/fw/acpi-dsdt-hpet.dsl +0 -36
  197. package/bios/seabios/src/fw/acpi-dsdt-isa.dsl +0 -102
  198. package/bios/seabios/src/fw/acpi-dsdt-pci-crs.dsl +0 -90
  199. package/bios/seabios/src/fw/acpi-dsdt.dsl +0 -342
  200. package/bios/seabios/src/fw/acpi-dsdt.hex +0 -554
  201. package/bios/seabios/src/fw/acpi.c +0 -685
  202. package/bios/seabios/src/fw/biostables.c +0 -491
  203. package/bios/seabios/src/fw/coreboot.c +0 -569
  204. package/bios/seabios/src/fw/csm.c +0 -347
  205. package/bios/seabios/src/fw/dev-pci.h +0 -52
  206. package/bios/seabios/src/fw/dev-piix.h +0 -29
  207. package/bios/seabios/src/fw/dev-q35.h +0 -52
  208. package/bios/seabios/src/fw/lzmadecode.c +0 -398
  209. package/bios/seabios/src/fw/lzmadecode.h +0 -67
  210. package/bios/seabios/src/fw/mptable.c +0 -197
  211. package/bios/seabios/src/fw/mtrr.c +0 -105
  212. package/bios/seabios/src/fw/multiboot.c +0 -111
  213. package/bios/seabios/src/fw/paravirt.c +0 -624
  214. package/bios/seabios/src/fw/paravirt.h +0 -63
  215. package/bios/seabios/src/fw/pciinit.c +0 -1187
  216. package/bios/seabios/src/fw/pirtable.c +0 -103
  217. package/bios/seabios/src/fw/q35-acpi-dsdt.dsl +0 -450
  218. package/bios/seabios/src/fw/romfile_loader.c +0 -259
  219. package/bios/seabios/src/fw/romfile_loader.h +0 -91
  220. package/bios/seabios/src/fw/shadow.c +0 -208
  221. package/bios/seabios/src/fw/smbios.c +0 -585
  222. package/bios/seabios/src/fw/smm.c +0 -269
  223. package/bios/seabios/src/fw/smp.c +0 -194
  224. package/bios/seabios/src/fw/ssdt-misc.dsl +0 -104
  225. package/bios/seabios/src/fw/ssdt-misc.hex +0 -88
  226. package/bios/seabios/src/fw/ssdt-pcihp.dsl +0 -36
  227. package/bios/seabios/src/fw/ssdt-pcihp.hex +0 -38
  228. package/bios/seabios/src/fw/ssdt-proc.dsl +0 -48
  229. package/bios/seabios/src/fw/ssdt-proc.hex +0 -35
  230. package/bios/seabios/src/fw/xen.c +0 -149
  231. package/bios/seabios/src/fw/xen.h +0 -125
  232. package/bios/seabios/src/gen-defs.h +0 -19
  233. package/bios/seabios/src/hw/ahci.c +0 -697
  234. package/bios/seabios/src/hw/ahci.h +0 -201
  235. package/bios/seabios/src/hw/ata.c +0 -1046
  236. package/bios/seabios/src/hw/ata.h +0 -163
  237. package/bios/seabios/src/hw/blockcmd.c +0 -372
  238. package/bios/seabios/src/hw/blockcmd.h +0 -114
  239. package/bios/seabios/src/hw/dma.c +0 -67
  240. package/bios/seabios/src/hw/esp-scsi.c +0 -241
  241. package/bios/seabios/src/hw/esp-scsi.h +0 -8
  242. package/bios/seabios/src/hw/floppy.c +0 -741
  243. package/bios/seabios/src/hw/lsi-scsi.c +0 -221
  244. package/bios/seabios/src/hw/lsi-scsi.h +0 -8
  245. package/bios/seabios/src/hw/megasas.c +0 -405
  246. package/bios/seabios/src/hw/megasas.h +0 -8
  247. package/bios/seabios/src/hw/mpt-scsi.c +0 -319
  248. package/bios/seabios/src/hw/mpt-scsi.h +0 -8
  249. package/bios/seabios/src/hw/nvme-int.h +0 -199
  250. package/bios/seabios/src/hw/nvme.c +0 -708
  251. package/bios/seabios/src/hw/nvme.h +0 -17
  252. package/bios/seabios/src/hw/pci.c +0 -133
  253. package/bios/seabios/src/hw/pci.h +0 -47
  254. package/bios/seabios/src/hw/pci_ids.h +0 -2632
  255. package/bios/seabios/src/hw/pci_regs.h +0 -556
  256. package/bios/seabios/src/hw/pcidevice.c +0 -192
  257. package/bios/seabios/src/hw/pcidevice.h +0 -76
  258. package/bios/seabios/src/hw/pic.c +0 -115
  259. package/bios/seabios/src/hw/pic.h +0 -60
  260. package/bios/seabios/src/hw/ps2port.c +0 -543
  261. package/bios/seabios/src/hw/ps2port.h +0 -67
  262. package/bios/seabios/src/hw/pvscsi.c +0 -333
  263. package/bios/seabios/src/hw/pvscsi.h +0 -8
  264. package/bios/seabios/src/hw/ramdisk.c +0 -108
  265. package/bios/seabios/src/hw/rtc.c +0 -100
  266. package/bios/seabios/src/hw/rtc.h +0 -75
  267. package/bios/seabios/src/hw/sdcard.c +0 -572
  268. package/bios/seabios/src/hw/serialio.c +0 -113
  269. package/bios/seabios/src/hw/serialio.h +0 -29
  270. package/bios/seabios/src/hw/timer.c +0 -259
  271. package/bios/seabios/src/hw/tpm_drivers.c +0 -636
  272. package/bios/seabios/src/hw/tpm_drivers.h +0 -127
  273. package/bios/seabios/src/hw/usb-ehci.c +0 -650
  274. package/bios/seabios/src/hw/usb-ehci.h +0 -177
  275. package/bios/seabios/src/hw/usb-hid.c +0 -442
  276. package/bios/seabios/src/hw/usb-hid.h +0 -29
  277. package/bios/seabios/src/hw/usb-hub.c +0 -205
  278. package/bios/seabios/src/hw/usb-hub.h +0 -64
  279. package/bios/seabios/src/hw/usb-msc.c +0 -222
  280. package/bios/seabios/src/hw/usb-msc.h +0 -10
  281. package/bios/seabios/src/hw/usb-ohci.c +0 -568
  282. package/bios/seabios/src/hw/usb-ohci.h +0 -144
  283. package/bios/seabios/src/hw/usb-uas.c +0 -289
  284. package/bios/seabios/src/hw/usb-uas.h +0 -9
  285. package/bios/seabios/src/hw/usb-uhci.c +0 -571
  286. package/bios/seabios/src/hw/usb-uhci.h +0 -128
  287. package/bios/seabios/src/hw/usb-xhci.c +0 -1161
  288. package/bios/seabios/src/hw/usb-xhci.h +0 -133
  289. package/bios/seabios/src/hw/usb.c +0 -499
  290. package/bios/seabios/src/hw/usb.h +0 -254
  291. package/bios/seabios/src/hw/virtio-blk.c +0 -211
  292. package/bios/seabios/src/hw/virtio-blk.h +0 -43
  293. package/bios/seabios/src/hw/virtio-pci.c +0 -501
  294. package/bios/seabios/src/hw/virtio-pci.h +0 -151
  295. package/bios/seabios/src/hw/virtio-ring.c +0 -147
  296. package/bios/seabios/src/hw/virtio-ring.h +0 -121
  297. package/bios/seabios/src/hw/virtio-scsi.c +0 -220
  298. package/bios/seabios/src/hw/virtio-scsi.h +0 -47
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@@ -1,985 +0,0 @@
1
- /** @file
2
- The EFI Legacy BIOS Protocol is used to abstract legacy Option ROM usage
3
- under EFI and Legacy OS boot. This file also includes all the related
4
- COMPATIBILIY16 structures and defintions.
5
-
6
- Note: The names for EFI_IA32_REGISTER_SET elements were picked to follow
7
- well known naming conventions.
8
-
9
- Thunk is the code that switches from 32-bit protected environment into the 16-bit real-mode
10
- environment. Reverse thunk is the code that does the opposite.
11
-
12
- Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
13
- This program and the accompanying materials are licensed and made available under
14
- the terms and conditions of the BSD License that accompanies this distribution.
15
- The full text of the license may be found at
16
- http://opensource.org/licenses/bsd-license.php.
17
-
18
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
19
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
20
-
21
- @par Revision Reference:
22
- This protocol is defined in Framework for EFI Compatibility Support Module spec
23
- Version 0.97.
24
-
25
- **/
26
-
27
- #ifndef _EFI_LEGACY_BIOS_H_
28
- #define _EFI_LEGACY_BIOS_H_
29
-
30
- ///
31
- ///
32
- ///
33
- #pragma pack(1)
34
-
35
- typedef UINT8 SERIAL_MODE;
36
- typedef UINT8 PARALLEL_MODE;
37
-
38
- #define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')
39
-
40
- ///
41
- /// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx
42
- /// physical address range. It is located on a 16-byte boundary and provides the physical address of the
43
- /// entry point for the Compatibility16 functions. These functions provide the platform-specific
44
- /// information that is required by the generic EfiCompatibility code. The functions are invoked via
45
- /// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical
46
- /// entry point.
47
- ///
48
- typedef struct {
49
- ///
50
- /// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte
51
- /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.
52
- ///
53
- UINT32 Signature;
54
-
55
- ///
56
- /// The value required such that byte checksum of TableLength equals zero.
57
- ///
58
- UINT8 TableChecksum;
59
-
60
- ///
61
- /// The length of this table.
62
- ///
63
- UINT8 TableLength;
64
-
65
- ///
66
- /// The major EFI revision for which this table was generated.
67
- ///
68
- UINT8 EfiMajorRevision;
69
-
70
- ///
71
- /// The minor EFI revision for which this table was generated.
72
- ///
73
- UINT8 EfiMinorRevision;
74
-
75
- ///
76
- /// The major revision of this table.
77
- ///
78
- UINT8 TableMajorRevision;
79
-
80
- ///
81
- /// The minor revision of this table.
82
- ///
83
- UINT8 TableMinorRevision;
84
-
85
- ///
86
- /// Reserved for future usage.
87
- ///
88
- UINT16 Reserved;
89
-
90
- ///
91
- /// The segment of the entry point within the traditional BIOS for Compatibility16 functions.
92
- ///
93
- UINT16 Compatibility16CallSegment;
94
-
95
- ///
96
- /// The offset of the entry point within the traditional BIOS for Compatibility16 functions.
97
- ///
98
- UINT16 Compatibility16CallOffset;
99
-
100
- ///
101
- /// The segment of the entry point within the traditional BIOS for EfiCompatibility
102
- /// to invoke the PnP installation check.
103
- ///
104
- UINT16 PnPInstallationCheckSegment;
105
-
106
- ///
107
- /// The Offset of the entry point within the traditional BIOS for EfiCompatibility
108
- /// to invoke the PnP installation check.
109
- ///
110
- UINT16 PnPInstallationCheckOffset;
111
-
112
- ///
113
- /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform
114
- ///Innovation Framework for EFI Driver Execution Environment Core Interface Specification (DXE CIS).
115
- ///
116
- UINT32 EfiSystemTable;
117
-
118
- ///
119
- /// The address of an OEM-provided identifier string. The string is null terminated.
120
- ///
121
- UINT32 OemIdStringPointer;
122
-
123
- ///
124
- /// The 32-bit physical address where ACPI RSD PTR is stored within the traditional
125
- /// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size
126
- /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI
127
- /// RSD PTR with either the ACPI 1.0b or 2.0 values.
128
- ///
129
- UINT32 AcpiRsdPtrPointer;
130
-
131
- ///
132
- /// The OEM revision number. Usage is undefined but provided for OEM module usage.
133
- ///
134
- UINT16 OemRevision;
135
-
136
- ///
137
- /// The 32-bit physical address where INT15 E820 data is stored within the traditional
138
- /// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the
139
- /// data to the indicated area.
140
- ///
141
- UINT32 E820Pointer;
142
-
143
- ///
144
- /// The length of the E820 data and is filled in by the EfiCompatibility code.
145
- ///
146
- UINT32 E820Length;
147
-
148
- ///
149
- /// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.
150
- /// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and
151
- /// copy the data to the indicated area.
152
- ///
153
- UINT32 IrqRoutingTablePointer;
154
-
155
- ///
156
- /// The length of the $PIR table and is filled in by the EfiCompatibility code.
157
- ///
158
- UINT32 IrqRoutingTableLength;
159
-
160
- ///
161
- /// The 32-bit physical address where the MP table is stored in the traditional BIOS.
162
- /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data
163
- /// to the indicated area.
164
- ///
165
- UINT32 MpTablePtr;
166
-
167
- ///
168
- /// The length of the MP table and is filled in by the EfiCompatibility code.
169
- ///
170
- UINT32 MpTableLength;
171
-
172
- ///
173
- /// The segment of the OEM-specific INT table/code.
174
- ///
175
- UINT16 OemIntSegment;
176
-
177
- ///
178
- /// The offset of the OEM-specific INT table/code.
179
- ///
180
- UINT16 OemIntOffset;
181
-
182
- ///
183
- /// The segment of the OEM-specific 32-bit table/code.
184
- ///
185
- UINT16 Oem32Segment;
186
-
187
- ///
188
- /// The offset of the OEM-specific 32-bit table/code.
189
- ///
190
- UINT16 Oem32Offset;
191
-
192
- ///
193
- /// The segment of the OEM-specific 16-bit table/code.
194
- ///
195
- UINT16 Oem16Segment;
196
-
197
- ///
198
- /// The offset of the OEM-specific 16-bit table/code.
199
- ///
200
- UINT16 Oem16Offset;
201
-
202
- ///
203
- /// The segment of the TPM binary passed to 16-bit CSM.
204
- ///
205
- UINT16 TpmSegment;
206
-
207
- ///
208
- /// The offset of the TPM binary passed to 16-bit CSM.
209
- ///
210
- UINT16 TpmOffset;
211
-
212
- ///
213
- /// A pointer to a string identifying the independent BIOS vendor.
214
- ///
215
- UINT32 IbvPointer;
216
-
217
- ///
218
- /// This field is NULL for all systems not supporting PCI Express. This field is the base
219
- /// value of the start of the PCI Express memory-mapped configuration registers and
220
- /// must be filled in prior to EfiCompatibility code issuing the Compatibility16 function
221
- /// Compatibility16InitializeYourself().
222
- /// Compatibility16InitializeYourself() is defined in Compatability16
223
- /// Functions.
224
- ///
225
- UINT32 PciExpressBase;
226
-
227
- ///
228
- /// Maximum PCI bus number assigned.
229
- ///
230
- UINT8 LastPciBus;
231
-
232
- ///
233
- /// Start address of UMB RAM
234
- ///
235
- UINT32 UmaAddress;
236
-
237
- ///
238
- /// Size of UMB RAM
239
- ///
240
- UINT32 UmaSize;
241
-
242
- ///
243
- /// Start address of persistent allocation in high (>1MiB) memory
244
- ///
245
- UINT32 HiPermanentMemoryAddress;
246
-
247
- ///
248
- /// Size of persistent allocation in high (>1MiB) memory
249
- ///
250
- UINT32 HiPermanentMemorySize;
251
- } EFI_COMPATIBILITY16_TABLE;
252
-
253
- ///
254
- /// Functions provided by the CSM binary which communicate between the EfiCompatibility
255
- /// and Compatability16 code.
256
- ///
257
- /// Inconsistent with the specification here:
258
- /// The member's name started with "Compatibility16" [defined in Intel Framework
259
- /// Compatibility Support Module Specification / 0.97 version]
260
- /// has been changed to "Legacy16" since keeping backward compatible.
261
- ///
262
- typedef enum {
263
- ///
264
- /// Causes the Compatibility16 code to do any internal initialization required.
265
- /// Input:
266
- /// AX = Compatibility16InitializeYourself
267
- /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_INIT_TABLE
268
- /// Return:
269
- /// AX = Return Status codes
270
- ///
271
- Legacy16InitializeYourself = 0x0000,
272
-
273
- ///
274
- /// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.
275
- /// Input:
276
- /// AX = Compatibility16UpdateBbs
277
- /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE
278
- /// Return:
279
- /// AX = Returned status codes
280
- ///
281
- Legacy16UpdateBbs = 0x0001,
282
-
283
- ///
284
- /// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16
285
- /// code is read/write.
286
- /// Input:
287
- /// AX = Compatibility16PrepareToBoot
288
- /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure
289
- /// Return:
290
- /// AX = Returned status codes
291
- ///
292
- Legacy16PrepareToBoot = 0x0002,
293
-
294
- ///
295
- /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.
296
- /// Input:
297
- /// AX = Compatibility16Boot
298
- /// Output:
299
- /// AX = Returned status codes
300
- ///
301
- Legacy16Boot = 0x0003,
302
-
303
- ///
304
- /// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is
305
- /// stored in CMOS and is the priority number of the last attempted boot device.
306
- /// Input:
307
- /// AX = Compatibility16RetrieveLastBootDevice
308
- /// Output:
309
- /// AX = Returned status codes
310
- /// BX = Priority number of the boot device.
311
- ///
312
- Legacy16RetrieveLastBootDevice = 0x0004,
313
-
314
- ///
315
- /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 after dispatching a legacy OpROM.
316
- /// Input:
317
- /// AX = Compatibility16DispatchOprom
318
- /// ES:BX = Pointer to EFI_DISPATCH_OPROM_TABLE
319
- /// Output:
320
- /// AX = Returned status codes
321
- /// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.
322
- ///
323
- Legacy16DispatchOprom = 0x0005,
324
-
325
- ///
326
- /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address
327
- /// of that region.
328
- /// Input:
329
- /// AX = Compatibility16GetTableAddress
330
- /// BX = Allocation region
331
- /// 00 = Allocate from either 0xE0000 or 0xF0000 64 KB blocks.
332
- /// Bit 0 = 1 Allocate from 0xF0000 64 KB block
333
- /// Bit 1 = 1 Allocate from 0xE0000 64 KB block
334
- /// CX = Requested length in bytes.
335
- /// DX = Required address alignment. Bit mapped. First non-zero bit from the right is the alignment.
336
- /// Output:
337
- /// AX = Returned status codes
338
- /// DS:BX = Address of the region
339
- ///
340
- Legacy16GetTableAddress = 0x0006,
341
-
342
- ///
343
- /// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.
344
- /// Input:
345
- /// AX = Compatibility16SetKeyboardLeds
346
- /// CL = LED status.
347
- /// Bit 0 Scroll Lock 0 = Off
348
- /// Bit 1 NumLock
349
- /// Bit 2 Caps Lock
350
- /// Output:
351
- /// AX = Returned status codes
352
- ///
353
- Legacy16SetKeyboardLeds = 0x0007,
354
-
355
- ///
356
- /// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that
357
- /// do not have an OpROM associated with them. An example is SATA.
358
- /// Input:
359
- /// AX = Compatibility16InstallPciHandler
360
- /// ES:BX = Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure
361
- /// Output:
362
- /// AX = Returned status codes
363
- ///
364
- Legacy16InstallPciHandler = 0x0008
365
- } EFI_COMPATIBILITY_FUNCTIONS;
366
-
367
-
368
- ///
369
- /// EFI_DISPATCH_OPROM_TABLE
370
- ///
371
- typedef struct {
372
- UINT16 PnPInstallationCheckSegment; ///< A pointer to the PnpInstallationCheck data structure.
373
- UINT16 PnPInstallationCheckOffset; ///< A pointer to the PnpInstallationCheck data structure.
374
- UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3.
375
- UINT8 PciBus; ///< The PCI bus.
376
- UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function.
377
- UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may
378
- ///< increase this number, if BBS-compliant devices also hook INTs in order to force the
379
- ///< OpROM BIOS Setup to be executed.
380
- UINT32 BbsTablePointer; ///< A pointer to the BBS table.
381
- UINT16 RuntimeSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this
382
- ///< means that the relocation of this run time code is not supported.
383
- ///< Inconsistent with specification here:
384
- ///< The member's name "OpromDestinationSegment" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version]
385
- ///< has been changed to "RuntimeSegment" since keeping backward compatible.
386
-
387
- } EFI_DISPATCH_OPROM_TABLE;
388
-
389
- ///
390
- /// EFI_TO_COMPATIBILITY16_INIT_TABLE
391
- ///
392
- typedef struct {
393
- ///
394
- /// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.
395
- ///
396
- UINT32 BiosLessThan1MB;
397
-
398
- ///
399
- /// The starting address of the high memory block.
400
- ///
401
- UINT32 HiPmmMemory;
402
-
403
- ///
404
- /// The length of high memory block.
405
- ///
406
- UINT32 HiPmmMemorySizeInBytes;
407
-
408
- ///
409
- /// The segment of the reverse thunk call code.
410
- ///
411
- UINT16 ReverseThunkCallSegment;
412
-
413
- ///
414
- /// The offset of the reverse thunk call code.
415
- ///
416
- UINT16 ReverseThunkCallOffset;
417
-
418
- ///
419
- /// The number of E820 entries copied to the Compatibility16 BIOS.
420
- ///
421
- UINT32 NumberE820Entries;
422
-
423
- ///
424
- /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.
425
- ///
426
- UINT32 OsMemoryAbove1Mb;
427
-
428
- ///
429
- /// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.
430
- ///
431
- UINT32 ThunkStart;
432
-
433
- ///
434
- /// The size of the thunk code.
435
- ///
436
- UINT32 ThunkSizeInBytes;
437
-
438
- ///
439
- /// Starting address of memory under 1 MB.
440
- ///
441
- UINT32 LowPmmMemory;
442
-
443
- ///
444
- /// The length of low Memory block.
445
- ///
446
- UINT32 LowPmmMemorySizeInBytes;
447
- } EFI_TO_COMPATIBILITY16_INIT_TABLE;
448
-
449
- ///
450
- /// DEVICE_PRODUCER_SERIAL.
451
- ///
452
- typedef struct {
453
- UINT16 Address; ///< I/O address assigned to the serial port.
454
- UINT8 Irq; ///< IRQ assigned to the serial port.
455
- SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below.
456
- } DEVICE_PRODUCER_SERIAL;
457
-
458
- ///
459
- /// DEVICE_PRODUCER_SERIAL's modes.
460
- ///@{
461
- #define DEVICE_SERIAL_MODE_NORMAL 0x00
462
- #define DEVICE_SERIAL_MODE_IRDA 0x01
463
- #define DEVICE_SERIAL_MODE_ASK_IR 0x02
464
- #define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00
465
- #define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10
466
- ///@)
467
-
468
- ///
469
- /// DEVICE_PRODUCER_PARALLEL.
470
- ///
471
- typedef struct {
472
- UINT16 Address; ///< I/O address assigned to the parallel port.
473
- UINT8 Irq; ///< IRQ assigned to the parallel port.
474
- UINT8 Dma; ///< DMA assigned to the parallel port.
475
- PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below.
476
- } DEVICE_PRODUCER_PARALLEL;
477
-
478
- ///
479
- /// DEVICE_PRODUCER_PARALLEL's modes.
480
- ///@{
481
- #define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00
482
- #define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01
483
- #define DEVICE_PARALLEL_MODE_MODE_EPP 0x02
484
- #define DEVICE_PARALLEL_MODE_MODE_ECP 0x03
485
- ///@}
486
-
487
- ///
488
- /// DEVICE_PRODUCER_FLOPPY
489
- ///
490
- typedef struct {
491
- UINT16 Address; ///< I/O address assigned to the floppy.
492
- UINT8 Irq; ///< IRQ assigned to the floppy.
493
- UINT8 Dma; ///< DMA assigned to the floppy.
494
- UINT8 NumberOfFloppy; ///< Number of floppies in the system.
495
- } DEVICE_PRODUCER_FLOPPY;
496
-
497
- ///
498
- /// LEGACY_DEVICE_FLAGS
499
- ///
500
- typedef struct {
501
- UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller.
502
- UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92.
503
- UINT32 Reserved : 30; ///< Reserved for future usage.
504
- } LEGACY_DEVICE_FLAGS;
505
-
506
- ///
507
- /// DEVICE_PRODUCER_DATA_HEADER
508
- ///
509
- typedef struct {
510
- DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below.
511
- DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below.
512
- DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below.
513
- UINT8 MousePresent; ///< Flag to indicate if mouse is present.
514
- LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM.
515
- } DEVICE_PRODUCER_DATA_HEADER;
516
-
517
- ///
518
- /// ATAPI_IDENTIFY
519
- ///
520
- typedef struct {
521
- UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command.
522
- } ATAPI_IDENTIFY;
523
-
524
- ///
525
- /// HDD_INFO
526
- ///
527
- typedef struct {
528
- ///
529
- /// Status of IDE device. Values are defined below. There is one HDD_INFO structure
530
- /// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index
531
- /// 1 is slave.
532
- ///
533
- UINT16 Status;
534
-
535
- ///
536
- /// PCI bus of IDE controller.
537
- ///
538
- UINT32 Bus;
539
-
540
- ///
541
- /// PCI device of IDE controller.
542
- ///
543
- UINT32 Device;
544
-
545
- ///
546
- /// PCI function of IDE controller.
547
- ///
548
- UINT32 Function;
549
-
550
- ///
551
- /// Command ports base address.
552
- ///
553
- UINT16 CommandBaseAddress;
554
-
555
- ///
556
- /// Control ports base address.
557
- ///
558
- UINT16 ControlBaseAddress;
559
-
560
- ///
561
- /// Bus master address.
562
- ///
563
- UINT16 BusMasterAddress;
564
-
565
- UINT8 HddIrq;
566
-
567
- ///
568
- /// Data that identifies the drive data; one per possible attached drive.
569
- ///
570
- ATAPI_IDENTIFY IdentifyDrive[2];
571
- } HDD_INFO;
572
-
573
- ///
574
- /// HDD_INFO status bits
575
- ///
576
- #define HDD_PRIMARY 0x01
577
- #define HDD_SECONDARY 0x02
578
- #define HDD_MASTER_ATAPI_CDROM 0x04
579
- #define HDD_SLAVE_ATAPI_CDROM 0x08
580
- #define HDD_MASTER_IDE 0x20
581
- #define HDD_SLAVE_IDE 0x40
582
- #define HDD_MASTER_ATAPI_ZIPDISK 0x10
583
- #define HDD_SLAVE_ATAPI_ZIPDISK 0x80
584
-
585
- ///
586
- /// BBS_STATUS_FLAGS;\.
587
- ///
588
- typedef struct {
589
- UINT16 OldPosition : 4; ///< Prior priority.
590
- UINT16 Reserved1 : 4; ///< Reserved for future use.
591
- UINT16 Enabled : 1; ///< If 0, ignore this entry.
592
- UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.
593
- ///< 1 = Boot attempted failed.
594
-
595
- ///
596
- /// State of media present.
597
- /// 00 = No bootable media is present in the device.
598
- /// 01 = Unknown if a bootable media present.
599
- /// 10 = Media is present and appears bootable.
600
- /// 11 = Reserved.
601
- ///
602
- UINT16 MediaPresent : 2;
603
- UINT16 Reserved2 : 4; ///< Reserved for future use.
604
- } BBS_STATUS_FLAGS;
605
-
606
- ///
607
- /// BBS_TABLE, device type values & boot priority values.
608
- ///
609
- typedef struct {
610
- ///
611
- /// The boot priority for this boot device. Values are defined below.
612
- ///
613
- UINT16 BootPriority;
614
-
615
- ///
616
- /// The PCI bus for this boot device.
617
- ///
618
- UINT32 Bus;
619
-
620
- ///
621
- /// The PCI device for this boot device.
622
- ///
623
- UINT32 Device;
624
-
625
- ///
626
- /// The PCI function for the boot device.
627
- ///
628
- UINT32 Function;
629
-
630
- ///
631
- /// The PCI class for this boot device.
632
- ///
633
- UINT8 Class;
634
-
635
- ///
636
- /// The PCI Subclass for this boot device.
637
- ///
638
- UINT8 SubClass;
639
-
640
- ///
641
- /// Segment:offset address of an ASCIIZ description string describing the manufacturer.
642
- ///
643
- UINT16 MfgStringOffset;
644
-
645
- ///
646
- /// Segment:offset address of an ASCIIZ description string describing the manufacturer.
647
- ///
648
- UINT16 MfgStringSegment;
649
-
650
- ///
651
- /// BBS device type. BBS device types are defined below.
652
- ///
653
- UINT16 DeviceType;
654
-
655
- ///
656
- /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.
657
- ///
658
- BBS_STATUS_FLAGS StatusFlags;
659
-
660
- ///
661
- /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for
662
- /// BCV devices.
663
- ///
664
- UINT16 BootHandlerOffset;
665
-
666
- ///
667
- /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for
668
- /// BCV devices.
669
- ///
670
- UINT16 BootHandlerSegment;
671
-
672
- ///
673
- /// Segment:offset address of an ASCIIZ description string describing this device.
674
- ///
675
- UINT16 DescStringOffset;
676
-
677
- ///
678
- /// Segment:offset address of an ASCIIZ description string describing this device.
679
- ///
680
- UINT16 DescStringSegment;
681
-
682
- ///
683
- /// Reserved.
684
- ///
685
- UINT32 InitPerReserved;
686
-
687
- ///
688
- /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
689
- /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
690
- /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
691
- ///
692
- UINT32 AdditionalIrq13Handler;
693
-
694
- ///
695
- /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
696
- /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
697
- /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
698
- ///
699
- UINT32 AdditionalIrq18Handler;
700
-
701
- ///
702
- /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
703
- /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
704
- /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
705
- ///
706
- UINT32 AdditionalIrq19Handler;
707
-
708
- ///
709
- /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
710
- /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
711
- /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
712
- ///
713
- UINT32 AdditionalIrq40Handler;
714
- UINT8 AssignedDriveNumber;
715
- UINT32 AdditionalIrq41Handler;
716
- UINT32 AdditionalIrq46Handler;
717
- UINT32 IBV1;
718
- UINT32 IBV2;
719
- } BBS_TABLE;
720
-
721
- ///
722
- /// BBS device type values
723
- ///@{
724
- #define BBS_FLOPPY 0x01
725
- #define BBS_HARDDISK 0x02
726
- #define BBS_CDROM 0x03
727
- #define BBS_PCMCIA 0x04
728
- #define BBS_USB 0x05
729
- #define BBS_EMBED_NETWORK 0x06
730
- #define BBS_BEV_DEVICE 0x80
731
- #define BBS_UNKNOWN 0xff
732
- ///@}
733
-
734
- ///
735
- /// BBS boot priority values
736
- ///@{
737
- #define BBS_DO_NOT_BOOT_FROM 0xFFFC
738
- #define BBS_LOWEST_PRIORITY 0xFFFD
739
- #define BBS_UNPRIORITIZED_ENTRY 0xFFFE
740
- #define BBS_IGNORE_ENTRY 0xFFFF
741
- ///@}
742
-
743
- ///
744
- /// SMM_ATTRIBUTES
745
- ///
746
- typedef struct {
747
- ///
748
- /// Access mechanism used to generate the soft SMI. Defined types are below. The other
749
- /// values are reserved for future usage.
750
- ///
751
- UINT16 Type : 3;
752
-
753
- ///
754
- /// The size of "port" in bits. Defined values are below.
755
- ///
756
- UINT16 PortGranularity : 3;
757
-
758
- ///
759
- /// The size of data in bits. Defined values are below.
760
- ///
761
- UINT16 DataGranularity : 3;
762
-
763
- ///
764
- /// Reserved for future use.
765
- ///
766
- UINT16 Reserved : 7;
767
- } SMM_ATTRIBUTES;
768
-
769
- ///
770
- /// SMM_ATTRIBUTES type values.
771
- ///@{
772
- #define STANDARD_IO 0x00
773
- #define STANDARD_MEMORY 0x01
774
- ///@}
775
-
776
- ///
777
- /// SMM_ATTRIBUTES port size constants.
778
- ///@{
779
- #define PORT_SIZE_8 0x00
780
- #define PORT_SIZE_16 0x01
781
- #define PORT_SIZE_32 0x02
782
- #define PORT_SIZE_64 0x03
783
- ///@}
784
-
785
- ///
786
- /// SMM_ATTRIBUTES data size constants.
787
- ///@{
788
- #define DATA_SIZE_8 0x00
789
- #define DATA_SIZE_16 0x01
790
- #define DATA_SIZE_32 0x02
791
- #define DATA_SIZE_64 0x03
792
- ///@}
793
-
794
- ///
795
- /// SMM_FUNCTION & relating constants.
796
- ///
797
- typedef struct {
798
- UINT16 Function : 15;
799
- UINT16 Owner : 1;
800
- } SMM_FUNCTION;
801
-
802
- ///
803
- /// SMM_FUNCTION Function constants.
804
- ///@{
805
- #define INT15_D042 0x0000
806
- #define GET_USB_BOOT_INFO 0x0001
807
- #define DMI_PNP_50_57 0x0002
808
- ///@}
809
-
810
- ///
811
- /// SMM_FUNCTION Owner constants.
812
- ///@{
813
- #define STANDARD_OWNER 0x0
814
- #define OEM_OWNER 0x1
815
- ///@}
816
-
817
- ///
818
- /// This structure assumes both port and data sizes are 1. SmmAttribute must be
819
- /// properly to reflect that assumption.
820
- ///
821
- typedef struct {
822
- ///
823
- /// Describes the access mechanism, SmmPort, and SmmData sizes. Type
824
- /// SMM_ATTRIBUTES is defined below.
825
- ///
826
- SMM_ATTRIBUTES SmmAttributes;
827
-
828
- ///
829
- /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.
830
- ///
831
- SMM_FUNCTION SmmFunction;
832
-
833
- ///
834
- /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes.
835
- ///
836
- UINT8 SmmPort;
837
-
838
- ///
839
- /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes.
840
- ///
841
- UINT8 SmmData;
842
- } SMM_ENTRY;
843
-
844
- ///
845
- /// SMM_TABLE
846
- ///
847
- typedef struct {
848
- UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry.
849
- SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below.
850
- } SMM_TABLE;
851
-
852
- ///
853
- /// UDC_ATTRIBUTES
854
- ///
855
- typedef struct {
856
- ///
857
- /// This bit set indicates that the ServiceAreaData is valid.
858
- ///
859
- UINT8 DirectoryServiceValidity : 1;
860
-
861
- ///
862
- /// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if
863
- /// DirectoryServiceValidity is 0.
864
- ///
865
- UINT8 RabcaUsedFlag : 1;
866
-
867
- ///
868
- /// This bit set indicates to execute hard disk diagnostics.
869
- ///
870
- UINT8 ExecuteHddDiagnosticsFlag : 1;
871
-
872
- ///
873
- /// Reserved for future use. Set to 0.
874
- ///
875
- UINT8 Reserved : 5;
876
- } UDC_ATTRIBUTES;
877
-
878
- ///
879
- /// UD_TABLE
880
- ///
881
- typedef struct {
882
- ///
883
- /// This field contains the bit-mapped attributes of the PARTIES information. Type
884
- /// UDC_ATTRIBUTES is defined below.
885
- ///
886
- UDC_ATTRIBUTES Attributes;
887
-
888
- ///
889
- /// This field contains the zero-based device on which the selected
890
- /// ServiceDataArea is present. It is 0 for master and 1 for the slave device.
891
- ///
892
- UINT8 DeviceNumber;
893
-
894
- ///
895
- /// This field contains the zero-based index into the BbsTable for the parent device.
896
- /// This index allows the user to reference the parent device information such as PCI
897
- /// bus, device function.
898
- ///
899
- UINT8 BbsTableEntryNumberForParentDevice;
900
-
901
- ///
902
- /// This field contains the zero-based index into the BbsTable for the boot entry.
903
- ///
904
- UINT8 BbsTableEntryNumberForBoot;
905
-
906
- ///
907
- /// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.
908
- ///
909
- UINT8 BbsTableEntryNumberForHddDiag;
910
-
911
- ///
912
- /// The raw Beer data.
913
- ///
914
- UINT8 BeerData[128];
915
-
916
- ///
917
- /// The raw data of selected service area.
918
- ///
919
- UINT8 ServiceAreaData[64];
920
- } UD_TABLE;
921
-
922
- #define EFI_TO_LEGACY_MAJOR_VERSION 0x02
923
- #define EFI_TO_LEGACY_MINOR_VERSION 0x00
924
- #define MAX_IDE_CONTROLLER 8
925
-
926
- ///
927
- /// EFI_TO_COMPATIBILITY16_BOOT_TABLE
928
- ///
929
- typedef struct {
930
- UINT16 MajorVersion; ///< The EfiCompatibility major version number.
931
- UINT16 MinorVersion; ///< The EfiCompatibility minor version number.
932
- UINT32 AcpiTable; ///< The location of the RSDT ACPI table. < 4G range.
933
- UINT32 SmbiosTable; ///< The location of the SMBIOS table in EFI memory. < 4G range.
934
- UINT32 SmbiosTableLength;
935
- //
936
- // Legacy SIO state
937
- //
938
- DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information.
939
- UINT16 DevicePathType; ///< The default boot type.
940
- UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI.
941
- UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the
942
- ///< Compatibility16InitializeYourself() function.
943
- //
944
- // Controller & Drive Identify[2] per controller information
945
- //
946
- HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data.
947
- UINT32 NumberBbsEntries; ///< Number of entries in the BBS table
948
- UINT32 BbsTable; ///< A pointer to the BBS table. Type BBS_TABLE is defined below.
949
- UINT32 SmmTable; ///< A pointer to the SMM table. Type SMM_TABLE is defined below.
950
- UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can
951
- ///< differ from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more
952
- ///< memory may have been discovered.
953
- UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type
954
- ///< UD_TABLE is defined below.
955
- } EFI_TO_COMPATIBILITY16_BOOT_TABLE;
956
-
957
- ///
958
- /// EFI_LEGACY_INSTALL_PCI_HANDLER
959
- ///
960
- typedef struct {
961
- UINT8 PciBus; ///< The PCI bus of the device.
962
- UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0.
963
- UINT8 PciSegment; ///< The PCI segment of the device.
964
- UINT8 PciClass; ///< The PCI class code of the device.
965
- UINT8 PciSubclass; ///< The PCI subclass code of the device.
966
- UINT8 PciInterface; ///< The PCI interface code of the device.
967
- //
968
- // Primary section
969
- //
970
- UINT8 PrimaryIrq; ///< The primary device IRQ.
971
- UINT8 PrimaryReserved; ///< Reserved.
972
- UINT16 PrimaryControl; ///< The primary device control I/O base.
973
- UINT16 PrimaryBase; ///< The primary device I/O base.
974
- UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base.
975
- //
976
- // Secondary Section
977
- //
978
- UINT8 SecondaryIrq; ///< The secondary device IRQ.
979
- UINT8 SecondaryReserved; ///< Reserved.
980
- UINT16 SecondaryControl; ///< The secondary device control I/O base.
981
- UINT16 SecondaryBase; ///< The secondary device I/O base.
982
- UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base.
983
- } EFI_LEGACY_INSTALL_PCI_HANDLER;
984
-
985
- #endif