v86 0.4.0 → 0.5.11

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (386) hide show
  1. package/Readme.md +56 -111
  2. package/build/libv86-debug.js +12680 -0
  3. package/build/libv86-debug.mjs +732 -0
  4. package/build/libv86.js +710 -0
  5. package/build/libv86.mjs +637 -0
  6. package/build/v86-debug.wasm +0 -0
  7. package/build/v86-fallback.wasm +0 -0
  8. package/build/v86.wasm +0 -0
  9. package/package.json +12 -35
  10. package/bios/.gitignore +0 -1
  11. package/bios/COPYING.LESSER +0 -165
  12. package/bios/bochs-bios.bin +0 -0
  13. package/bios/bochs-vgabios.bin +0 -0
  14. package/bios/fetch-and-build-seabios.sh +0 -13
  15. package/bios/seabios/.config +0 -113
  16. package/bios/seabios/.config.old +0 -114
  17. package/bios/seabios/.gitignore +0 -4
  18. package/bios/seabios/COPYING +0 -674
  19. package/bios/seabios/COPYING.LESSER +0 -165
  20. package/bios/seabios/Makefile +0 -286
  21. package/bios/seabios/README +0 -17
  22. package/bios/seabios/docs/Build_overview.md +0 -104
  23. package/bios/seabios/docs/Contributing.md +0 -20
  24. package/bios/seabios/docs/Debugging.md +0 -111
  25. package/bios/seabios/docs/Developer_Documentation.md +0 -25
  26. package/bios/seabios/docs/Developer_links.md +0 -86
  27. package/bios/seabios/docs/Download.md +0 -27
  28. package/bios/seabios/docs/Execution_and_code_flow.md +0 -178
  29. package/bios/seabios/docs/Linking_overview.md +0 -160
  30. package/bios/seabios/docs/Mailinglist.md +0 -8
  31. package/bios/seabios/docs/Memory_Model.md +0 -253
  32. package/bios/seabios/docs/README +0 -5
  33. package/bios/seabios/docs/Releases.md +0 -482
  34. package/bios/seabios/docs/Runtime_config.md +0 -193
  35. package/bios/seabios/docs/SeaBIOS.md +0 -17
  36. package/bios/seabios/docs/SeaVGABIOS.md +0 -39
  37. package/bios/seabios/out/autoconf.h +0 -117
  38. package/bios/seabios/out/include/config/acpi/dsdt.h +0 -0
  39. package/bios/seabios/out/include/config/acpi.h +0 -0
  40. package/bios/seabios/out/include/config/ahci.h +0 -0
  41. package/bios/seabios/out/include/config/apmbios.h +0 -0
  42. package/bios/seabios/out/include/config/ata/dma.h +0 -0
  43. package/bios/seabios/out/include/config/ata/pio32.h +0 -0
  44. package/bios/seabios/out/include/config/ata.h +0 -0
  45. package/bios/seabios/out/include/config/auto.conf +0 -69
  46. package/bios/seabios/out/include/config/auto.conf.cmd +0 -9
  47. package/bios/seabios/out/include/config/boot.h +0 -0
  48. package/bios/seabios/out/include/config/bootorder.h +0 -0
  49. package/bios/seabios/out/include/config/build/vgabios.h +0 -0
  50. package/bios/seabios/out/include/config/call32/smm.h +0 -0
  51. package/bios/seabios/out/include/config/cdrom/boot.h +0 -0
  52. package/bios/seabios/out/include/config/cdrom/emu.h +0 -0
  53. package/bios/seabios/out/include/config/debug/level.h +0 -0
  54. package/bios/seabios/out/include/config/drives.h +0 -0
  55. package/bios/seabios/out/include/config/entry/extrastack.h +0 -0
  56. package/bios/seabios/out/include/config/esp/scsi.h +0 -0
  57. package/bios/seabios/out/include/config/flash/floppy.h +0 -0
  58. package/bios/seabios/out/include/config/floppy.h +0 -0
  59. package/bios/seabios/out/include/config/fw/romfile/load.h +0 -0
  60. package/bios/seabios/out/include/config/hardware/irq.h +0 -0
  61. package/bios/seabios/out/include/config/kbd/call/int15/4f.h +0 -0
  62. package/bios/seabios/out/include/config/keyboard.h +0 -0
  63. package/bios/seabios/out/include/config/lpt.h +0 -0
  64. package/bios/seabios/out/include/config/lsi/scsi.h +0 -0
  65. package/bios/seabios/out/include/config/malloc/uppermemory.h +0 -0
  66. package/bios/seabios/out/include/config/megasas.h +0 -0
  67. package/bios/seabios/out/include/config/mouse.h +0 -0
  68. package/bios/seabios/out/include/config/mpt/scsi.h +0 -0
  69. package/bios/seabios/out/include/config/mptable.h +0 -0
  70. package/bios/seabios/out/include/config/mtrr/init.h +0 -0
  71. package/bios/seabios/out/include/config/optionroms.h +0 -0
  72. package/bios/seabios/out/include/config/override/pci/id.h +0 -0
  73. package/bios/seabios/out/include/config/pcibios.h +0 -0
  74. package/bios/seabios/out/include/config/pirtable.h +0 -0
  75. package/bios/seabios/out/include/config/pmm.h +0 -0
  76. package/bios/seabios/out/include/config/pmtimer.h +0 -0
  77. package/bios/seabios/out/include/config/pnpbios.h +0 -0
  78. package/bios/seabios/out/include/config/ps2port.h +0 -0
  79. package/bios/seabios/out/include/config/pvscsi.h +0 -0
  80. package/bios/seabios/out/include/config/qemu/hardware.h +0 -0
  81. package/bios/seabios/out/include/config/qemu.h +0 -0
  82. package/bios/seabios/out/include/config/rom/size.h +0 -0
  83. package/bios/seabios/out/include/config/rtc/timer.h +0 -0
  84. package/bios/seabios/out/include/config/s3/resume.h +0 -0
  85. package/bios/seabios/out/include/config/sdcard.h +0 -0
  86. package/bios/seabios/out/include/config/serial.h +0 -0
  87. package/bios/seabios/out/include/config/tcgbios.h +0 -0
  88. package/bios/seabios/out/include/config/threads.h +0 -0
  89. package/bios/seabios/out/include/config/tristate.conf +0 -4
  90. package/bios/seabios/out/include/config/tsc/timer.h +0 -0
  91. package/bios/seabios/out/include/config/use/smm.h +0 -0
  92. package/bios/seabios/out/include/config/vga/allocate/extra/stack.h +0 -0
  93. package/bios/seabios/out/include/config/vga/bochs/stdvga.h +0 -0
  94. package/bios/seabios/out/include/config/vga/bochs.h +0 -0
  95. package/bios/seabios/out/include/config/vga/did.h +0 -0
  96. package/bios/seabios/out/include/config/vga/extra/stack/size.h +0 -0
  97. package/bios/seabios/out/include/config/vga/fixup/asm.h +0 -0
  98. package/bios/seabios/out/include/config/vga/pci.h +0 -0
  99. package/bios/seabios/out/include/config/vga/stdvga/ports.h +0 -0
  100. package/bios/seabios/out/include/config/vga/vbe.h +0 -0
  101. package/bios/seabios/out/include/config/vga/vid.h +0 -0
  102. package/bios/seabios/out/include/config/vgahooks.h +0 -0
  103. package/bios/seabios/out/include/config/virtio/blk.h +0 -0
  104. package/bios/seabios/out/include/config/virtio/scsi.h +0 -0
  105. package/bios/seabios/out/include/config/xen.h +0 -0
  106. package/bios/seabios/out/scripts/kconfig/conf +0 -0
  107. package/bios/seabios/out/scripts/kconfig/conf.o +0 -0
  108. package/bios/seabios/out/scripts/kconfig/zconf.hash.c +0 -289
  109. package/bios/seabios/out/scripts/kconfig/zconf.lex.c +0 -2420
  110. package/bios/seabios/out/scripts/kconfig/zconf.tab.c +0 -2538
  111. package/bios/seabios/out/scripts/kconfig/zconf.tab.o +0 -0
  112. package/bios/seabios/scripts/acpi_extract.py +0 -366
  113. package/bios/seabios/scripts/acpi_extract_preprocess.py +0 -41
  114. package/bios/seabios/scripts/buildrom.py +0 -56
  115. package/bios/seabios/scripts/buildversion.py +0 -134
  116. package/bios/seabios/scripts/checkrom.py +0 -95
  117. package/bios/seabios/scripts/checkstack.py +0 -226
  118. package/bios/seabios/scripts/checksum.py +0 -16
  119. package/bios/seabios/scripts/encodeint.py +0 -21
  120. package/bios/seabios/scripts/gen-offsets.sh +0 -17
  121. package/bios/seabios/scripts/kconfig/.gitignore +0 -22
  122. package/bios/seabios/scripts/kconfig/Makefile +0 -331
  123. package/bios/seabios/scripts/kconfig/POTFILES.in +0 -12
  124. package/bios/seabios/scripts/kconfig/check.sh +0 -13
  125. package/bios/seabios/scripts/kconfig/conf.c +0 -718
  126. package/bios/seabios/scripts/kconfig/confdata.c +0 -1250
  127. package/bios/seabios/scripts/kconfig/expr.c +0 -1168
  128. package/bios/seabios/scripts/kconfig/expr.h +0 -241
  129. package/bios/seabios/scripts/kconfig/gconf.c +0 -1542
  130. package/bios/seabios/scripts/kconfig/gconf.glade +0 -661
  131. package/bios/seabios/scripts/kconfig/images.c +0 -326
  132. package/bios/seabios/scripts/kconfig/kxgettext.c +0 -235
  133. package/bios/seabios/scripts/kconfig/lex.zconf.c +0 -2430
  134. package/bios/seabios/scripts/kconfig/list.h +0 -131
  135. package/bios/seabios/scripts/kconfig/lkc.h +0 -200
  136. package/bios/seabios/scripts/kconfig/lkc_proto.h +0 -57
  137. package/bios/seabios/scripts/kconfig/lxdialog/.gitignore +0 -4
  138. package/bios/seabios/scripts/kconfig/lxdialog/BIG.FAT.WARNING +0 -4
  139. package/bios/seabios/scripts/kconfig/lxdialog/check-lxdialog.sh +0 -87
  140. package/bios/seabios/scripts/kconfig/lxdialog/checklist.c +0 -332
  141. package/bios/seabios/scripts/kconfig/lxdialog/dialog.h +0 -257
  142. package/bios/seabios/scripts/kconfig/lxdialog/inputbox.c +0 -301
  143. package/bios/seabios/scripts/kconfig/lxdialog/menubox.c +0 -437
  144. package/bios/seabios/scripts/kconfig/lxdialog/textbox.c +0 -408
  145. package/bios/seabios/scripts/kconfig/lxdialog/util.c +0 -713
  146. package/bios/seabios/scripts/kconfig/lxdialog/yesno.c +0 -114
  147. package/bios/seabios/scripts/kconfig/mconf.c +0 -1036
  148. package/bios/seabios/scripts/kconfig/menu.c +0 -697
  149. package/bios/seabios/scripts/kconfig/merge_config.sh +0 -150
  150. package/bios/seabios/scripts/kconfig/nconf.c +0 -1556
  151. package/bios/seabios/scripts/kconfig/nconf.gui.c +0 -656
  152. package/bios/seabios/scripts/kconfig/nconf.h +0 -96
  153. package/bios/seabios/scripts/kconfig/qconf.cc +0 -1795
  154. package/bios/seabios/scripts/kconfig/qconf.h +0 -338
  155. package/bios/seabios/scripts/kconfig/streamline_config.pl +0 -647
  156. package/bios/seabios/scripts/kconfig/symbol.c +0 -1373
  157. package/bios/seabios/scripts/kconfig/util.c +0 -157
  158. package/bios/seabios/scripts/kconfig/zconf.gperf +0 -48
  159. package/bios/seabios/scripts/kconfig/zconf.hash.c_shipped +0 -289
  160. package/bios/seabios/scripts/kconfig/zconf.l +0 -363
  161. package/bios/seabios/scripts/kconfig/zconf.lex.c_shipped +0 -2420
  162. package/bios/seabios/scripts/kconfig/zconf.tab.c_shipped +0 -2538
  163. package/bios/seabios/scripts/kconfig/zconf.y +0 -733
  164. package/bios/seabios/scripts/layoutrom.py +0 -705
  165. package/bios/seabios/scripts/python23compat.py +0 -14
  166. package/bios/seabios/scripts/readserial.py +0 -190
  167. package/bios/seabios/scripts/tarball.sh +0 -36
  168. package/bios/seabios/scripts/test-build.sh +0 -90
  169. package/bios/seabios/scripts/transdump.py +0 -53
  170. package/bios/seabios/scripts/vgafixup.py +0 -96
  171. package/bios/seabios/src/Kconfig +0 -579
  172. package/bios/seabios/src/apm.c +0 -215
  173. package/bios/seabios/src/asm-offsets.c +0 -23
  174. package/bios/seabios/src/biosvar.h +0 -130
  175. package/bios/seabios/src/block.c +0 -623
  176. package/bios/seabios/src/block.h +0 -121
  177. package/bios/seabios/src/bmp.c +0 -117
  178. package/bios/seabios/src/boot.c +0 -793
  179. package/bios/seabios/src/bootsplash.c +0 -255
  180. package/bios/seabios/src/bregs.h +0 -80
  181. package/bios/seabios/src/byteorder.h +0 -71
  182. package/bios/seabios/src/cdrom.c +0 -322
  183. package/bios/seabios/src/clock.c +0 -506
  184. package/bios/seabios/src/code16gcc.s +0 -1
  185. package/bios/seabios/src/config.h +0 -108
  186. package/bios/seabios/src/cp437.c +0 -275
  187. package/bios/seabios/src/cp437.h +0 -1
  188. package/bios/seabios/src/disk.c +0 -779
  189. package/bios/seabios/src/e820map.c +0 -152
  190. package/bios/seabios/src/e820map.h +0 -26
  191. package/bios/seabios/src/entryfuncs.S +0 -165
  192. package/bios/seabios/src/farptr.h +0 -208
  193. package/bios/seabios/src/font.c +0 -139
  194. package/bios/seabios/src/fw/acpi-dsdt-cpu-hotplug.dsl +0 -78
  195. package/bios/seabios/src/fw/acpi-dsdt-dbug.dsl +0 -26
  196. package/bios/seabios/src/fw/acpi-dsdt-hpet.dsl +0 -36
  197. package/bios/seabios/src/fw/acpi-dsdt-isa.dsl +0 -102
  198. package/bios/seabios/src/fw/acpi-dsdt-pci-crs.dsl +0 -90
  199. package/bios/seabios/src/fw/acpi-dsdt.dsl +0 -342
  200. package/bios/seabios/src/fw/acpi-dsdt.hex +0 -554
  201. package/bios/seabios/src/fw/acpi.c +0 -685
  202. package/bios/seabios/src/fw/biostables.c +0 -491
  203. package/bios/seabios/src/fw/coreboot.c +0 -569
  204. package/bios/seabios/src/fw/csm.c +0 -347
  205. package/bios/seabios/src/fw/dev-pci.h +0 -52
  206. package/bios/seabios/src/fw/dev-piix.h +0 -29
  207. package/bios/seabios/src/fw/dev-q35.h +0 -52
  208. package/bios/seabios/src/fw/lzmadecode.c +0 -398
  209. package/bios/seabios/src/fw/lzmadecode.h +0 -67
  210. package/bios/seabios/src/fw/mptable.c +0 -197
  211. package/bios/seabios/src/fw/mtrr.c +0 -105
  212. package/bios/seabios/src/fw/multiboot.c +0 -111
  213. package/bios/seabios/src/fw/paravirt.c +0 -624
  214. package/bios/seabios/src/fw/paravirt.h +0 -63
  215. package/bios/seabios/src/fw/pciinit.c +0 -1187
  216. package/bios/seabios/src/fw/pirtable.c +0 -103
  217. package/bios/seabios/src/fw/q35-acpi-dsdt.dsl +0 -450
  218. package/bios/seabios/src/fw/romfile_loader.c +0 -259
  219. package/bios/seabios/src/fw/romfile_loader.h +0 -91
  220. package/bios/seabios/src/fw/shadow.c +0 -208
  221. package/bios/seabios/src/fw/smbios.c +0 -585
  222. package/bios/seabios/src/fw/smm.c +0 -269
  223. package/bios/seabios/src/fw/smp.c +0 -194
  224. package/bios/seabios/src/fw/ssdt-misc.dsl +0 -104
  225. package/bios/seabios/src/fw/ssdt-misc.hex +0 -88
  226. package/bios/seabios/src/fw/ssdt-pcihp.dsl +0 -36
  227. package/bios/seabios/src/fw/ssdt-pcihp.hex +0 -38
  228. package/bios/seabios/src/fw/ssdt-proc.dsl +0 -48
  229. package/bios/seabios/src/fw/ssdt-proc.hex +0 -35
  230. package/bios/seabios/src/fw/xen.c +0 -149
  231. package/bios/seabios/src/fw/xen.h +0 -125
  232. package/bios/seabios/src/gen-defs.h +0 -19
  233. package/bios/seabios/src/hw/ahci.c +0 -697
  234. package/bios/seabios/src/hw/ahci.h +0 -201
  235. package/bios/seabios/src/hw/ata.c +0 -1046
  236. package/bios/seabios/src/hw/ata.h +0 -163
  237. package/bios/seabios/src/hw/blockcmd.c +0 -372
  238. package/bios/seabios/src/hw/blockcmd.h +0 -114
  239. package/bios/seabios/src/hw/dma.c +0 -67
  240. package/bios/seabios/src/hw/esp-scsi.c +0 -241
  241. package/bios/seabios/src/hw/esp-scsi.h +0 -8
  242. package/bios/seabios/src/hw/floppy.c +0 -741
  243. package/bios/seabios/src/hw/lsi-scsi.c +0 -221
  244. package/bios/seabios/src/hw/lsi-scsi.h +0 -8
  245. package/bios/seabios/src/hw/megasas.c +0 -405
  246. package/bios/seabios/src/hw/megasas.h +0 -8
  247. package/bios/seabios/src/hw/mpt-scsi.c +0 -319
  248. package/bios/seabios/src/hw/mpt-scsi.h +0 -8
  249. package/bios/seabios/src/hw/nvme-int.h +0 -199
  250. package/bios/seabios/src/hw/nvme.c +0 -708
  251. package/bios/seabios/src/hw/nvme.h +0 -17
  252. package/bios/seabios/src/hw/pci.c +0 -133
  253. package/bios/seabios/src/hw/pci.h +0 -47
  254. package/bios/seabios/src/hw/pci_ids.h +0 -2632
  255. package/bios/seabios/src/hw/pci_regs.h +0 -556
  256. package/bios/seabios/src/hw/pcidevice.c +0 -192
  257. package/bios/seabios/src/hw/pcidevice.h +0 -76
  258. package/bios/seabios/src/hw/pic.c +0 -115
  259. package/bios/seabios/src/hw/pic.h +0 -60
  260. package/bios/seabios/src/hw/ps2port.c +0 -543
  261. package/bios/seabios/src/hw/ps2port.h +0 -67
  262. package/bios/seabios/src/hw/pvscsi.c +0 -333
  263. package/bios/seabios/src/hw/pvscsi.h +0 -8
  264. package/bios/seabios/src/hw/ramdisk.c +0 -108
  265. package/bios/seabios/src/hw/rtc.c +0 -100
  266. package/bios/seabios/src/hw/rtc.h +0 -75
  267. package/bios/seabios/src/hw/sdcard.c +0 -572
  268. package/bios/seabios/src/hw/serialio.c +0 -113
  269. package/bios/seabios/src/hw/serialio.h +0 -29
  270. package/bios/seabios/src/hw/timer.c +0 -259
  271. package/bios/seabios/src/hw/tpm_drivers.c +0 -636
  272. package/bios/seabios/src/hw/tpm_drivers.h +0 -127
  273. package/bios/seabios/src/hw/usb-ehci.c +0 -650
  274. package/bios/seabios/src/hw/usb-ehci.h +0 -177
  275. package/bios/seabios/src/hw/usb-hid.c +0 -442
  276. package/bios/seabios/src/hw/usb-hid.h +0 -29
  277. package/bios/seabios/src/hw/usb-hub.c +0 -205
  278. package/bios/seabios/src/hw/usb-hub.h +0 -64
  279. package/bios/seabios/src/hw/usb-msc.c +0 -222
  280. package/bios/seabios/src/hw/usb-msc.h +0 -10
  281. package/bios/seabios/src/hw/usb-ohci.c +0 -568
  282. package/bios/seabios/src/hw/usb-ohci.h +0 -144
  283. package/bios/seabios/src/hw/usb-uas.c +0 -289
  284. package/bios/seabios/src/hw/usb-uas.h +0 -9
  285. package/bios/seabios/src/hw/usb-uhci.c +0 -571
  286. package/bios/seabios/src/hw/usb-uhci.h +0 -128
  287. package/bios/seabios/src/hw/usb-xhci.c +0 -1161
  288. package/bios/seabios/src/hw/usb-xhci.h +0 -133
  289. package/bios/seabios/src/hw/usb.c +0 -499
  290. package/bios/seabios/src/hw/usb.h +0 -254
  291. package/bios/seabios/src/hw/virtio-blk.c +0 -211
  292. package/bios/seabios/src/hw/virtio-blk.h +0 -43
  293. package/bios/seabios/src/hw/virtio-pci.c +0 -501
  294. package/bios/seabios/src/hw/virtio-pci.h +0 -151
  295. package/bios/seabios/src/hw/virtio-ring.c +0 -147
  296. package/bios/seabios/src/hw/virtio-ring.h +0 -121
  297. package/bios/seabios/src/hw/virtio-scsi.c +0 -220
  298. package/bios/seabios/src/hw/virtio-scsi.h +0 -47
  299. package/bios/seabios/src/jpeg.c +0 -1055
  300. package/bios/seabios/src/kbd.c +0 -599
  301. package/bios/seabios/src/list.h +0 -91
  302. package/bios/seabios/src/malloc.c +0 -561
  303. package/bios/seabios/src/malloc.h +0 -70
  304. package/bios/seabios/src/memmap.h +0 -21
  305. package/bios/seabios/src/misc.c +0 -195
  306. package/bios/seabios/src/mouse.c +0 -342
  307. package/bios/seabios/src/optionroms.c +0 -475
  308. package/bios/seabios/src/output.c +0 -584
  309. package/bios/seabios/src/output.h +0 -68
  310. package/bios/seabios/src/pcibios.c +0 -241
  311. package/bios/seabios/src/pmm.c +0 -176
  312. package/bios/seabios/src/pnpbios.c +0 -88
  313. package/bios/seabios/src/post.c +0 -337
  314. package/bios/seabios/src/resume.c +0 -157
  315. package/bios/seabios/src/romfile.c +0 -146
  316. package/bios/seabios/src/romfile.h +0 -21
  317. package/bios/seabios/src/romlayout.S +0 -698
  318. package/bios/seabios/src/sercon.c +0 -677
  319. package/bios/seabios/src/serial.c +0 -317
  320. package/bios/seabios/src/sha1.c +0 -147
  321. package/bios/seabios/src/sha1.h +0 -8
  322. package/bios/seabios/src/stacks.c +0 -771
  323. package/bios/seabios/src/stacks.h +0 -68
  324. package/bios/seabios/src/std/LegacyBios.h +0 -985
  325. package/bios/seabios/src/std/acpi.h +0 -323
  326. package/bios/seabios/src/std/bda.h +0 -174
  327. package/bios/seabios/src/std/disk.h +0 -175
  328. package/bios/seabios/src/std/mptable.h +0 -77
  329. package/bios/seabios/src/std/multiboot.h +0 -260
  330. package/bios/seabios/src/std/optionrom.h +0 -59
  331. package/bios/seabios/src/std/pirtable.h +0 -35
  332. package/bios/seabios/src/std/pmm.h +0 -19
  333. package/bios/seabios/src/std/pnpbios.h +0 -24
  334. package/bios/seabios/src/std/smbios.h +0 -167
  335. package/bios/seabios/src/std/tcg.h +0 -554
  336. package/bios/seabios/src/std/vbe.h +0 -156
  337. package/bios/seabios/src/std/vga.h +0 -63
  338. package/bios/seabios/src/string.c +0 -251
  339. package/bios/seabios/src/string.h +0 -31
  340. package/bios/seabios/src/system.c +0 -357
  341. package/bios/seabios/src/tcgbios.c +0 -2014
  342. package/bios/seabios/src/tcgbios.h +0 -19
  343. package/bios/seabios/src/types.h +0 -156
  344. package/bios/seabios/src/util.h +0 -251
  345. package/bios/seabios/src/version.c +0 -5
  346. package/bios/seabios/src/vgahooks.c +0 -355
  347. package/bios/seabios/src/x86.c +0 -23
  348. package/bios/seabios/src/x86.h +0 -277
  349. package/bios/seabios/vgasrc/Kconfig +0 -211
  350. package/bios/seabios/vgasrc/bochsdisplay.c +0 -59
  351. package/bios/seabios/vgasrc/bochsvga.c +0 -447
  352. package/bios/seabios/vgasrc/bochsvga.h +0 -57
  353. package/bios/seabios/vgasrc/cbvga.c +0 -337
  354. package/bios/seabios/vgasrc/clext.c +0 -627
  355. package/bios/seabios/vgasrc/geodevga.c +0 -434
  356. package/bios/seabios/vgasrc/geodevga.h +0 -89
  357. package/bios/seabios/vgasrc/ramfb.c +0 -163
  358. package/bios/seabios/vgasrc/stdvga.c +0 -485
  359. package/bios/seabios/vgasrc/stdvga.h +0 -81
  360. package/bios/seabios/vgasrc/stdvgaio.c +0 -186
  361. package/bios/seabios/vgasrc/stdvgamodes.c +0 -534
  362. package/bios/seabios/vgasrc/swcursor.c +0 -96
  363. package/bios/seabios/vgasrc/vbe.c +0 -432
  364. package/bios/seabios/vgasrc/vgabios.c +0 -1131
  365. package/bios/seabios/vgasrc/vgabios.h +0 -88
  366. package/bios/seabios/vgasrc/vgaentry.S +0 -161
  367. package/bios/seabios/vgasrc/vgafb.c +0 -661
  368. package/bios/seabios/vgasrc/vgafb.h +0 -42
  369. package/bios/seabios/vgasrc/vgafonts.c +0 -785
  370. package/bios/seabios/vgasrc/vgahw.h +0 -152
  371. package/bios/seabios/vgasrc/vgainit.c +0 -202
  372. package/bios/seabios/vgasrc/vgalayout.lds.S +0 -23
  373. package/bios/seabios/vgasrc/vgautil.h +0 -103
  374. package/bios/seabios/vgasrc/vgaversion.c +0 -6
  375. package/bios/seabios-debug.bin +0 -0
  376. package/bios/seabios-debug.config +0 -117
  377. package/bios/seabios.bin +0 -0
  378. package/bios/seabios.config +0 -114
  379. package/bios/vgabios-debug.bin +0 -0
  380. package/bios/vgabios.bin +0 -0
  381. package/build/binaries.js +0 -1
  382. package/build/index-debug.cjs +0 -1
  383. package/build/index-debug.js +0 -1
  384. package/build/index.cjs +0 -1
  385. package/build/index.js +0 -1
  386. package/v86.css +0 -259
@@ -1,355 +0,0 @@
1
- // Hooks for via vgabios calls into main bios.
2
- //
3
- // Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4
- //
5
- // This file may be distributed under the terms of the GNU LGPLv3 license.
6
-
7
- #include "biosvar.h" // GET_GLOBAL
8
- #include "bregs.h" // set_code_invalid
9
- #include "config.h" // CONFIG_*
10
- #include "hw/pci.h" // pci_config_readb
11
- #include "hw/pcidevice.h" // pci_find_device
12
- #include "hw/pci_ids.h" // PCI_VENDOR_ID_VIA
13
- #include "hw/pci_regs.h" // PCI_VENDOR_ID
14
- #include "output.h" // dprintf
15
- #include "string.h" // strcmp
16
- #include "util.h" // handle_155f, handle_157f
17
-
18
- #define VH_VIA 1
19
- #define VH_INTEL 2
20
- #define VH_SMI 3
21
-
22
- int VGAHookHandlerType VARFSEG;
23
-
24
- static void
25
- handle_155fXX(struct bregs *regs)
26
- {
27
- set_code_unimplemented(regs, RET_EUNSUPPORTED);
28
- }
29
-
30
- static void
31
- handle_157fXX(struct bregs *regs)
32
- {
33
- set_code_unimplemented(regs, RET_EUNSUPPORTED);
34
- }
35
-
36
- /****************************************************************
37
- * Via hooks
38
- ****************************************************************/
39
-
40
- int ViaFBsize VARFSEG, ViaRamSpeed VARFSEG;
41
-
42
- static void
43
- via_155f01(struct bregs *regs)
44
- {
45
- regs->eax = 0x5f;
46
- regs->cl = 2; // panel type = 2 = 1024 * 768
47
- set_success(regs);
48
- dprintf(1, "Warning: VGA panel type is hardcoded\n");
49
- }
50
-
51
- static void
52
- via_155f02(struct bregs *regs)
53
- {
54
- regs->eax = 0x5f;
55
- regs->bx = 2;
56
- regs->cx = 0x401; // PAL + crt only
57
- regs->dx = 0; // TV Layout - default
58
- set_success(regs);
59
- dprintf(1, "Warning: VGA TV/CRT output type is hardcoded\n");
60
- }
61
-
62
- static void
63
- via_155f18(struct bregs *regs)
64
- {
65
- int fbsize = GET_GLOBAL(ViaFBsize), ramspeed = GET_GLOBAL(ViaRamSpeed);
66
- if (fbsize < 0 || ramspeed < 0) {
67
- set_code_invalid(regs, RET_EUNSUPPORTED);
68
- return;
69
- }
70
- regs->eax = 0x5f;
71
- regs->ebx = 0x500 | (ramspeed << 4) | fbsize;
72
- regs->ecx = 0x060;
73
- set_success(regs);
74
- }
75
-
76
- static void
77
- via_155f19(struct bregs *regs)
78
- {
79
- set_invalid_silent(regs);
80
- }
81
-
82
- static void
83
- via_155f(struct bregs *regs)
84
- {
85
- switch (regs->al) {
86
- case 0x01: via_155f01(regs); break;
87
- case 0x02: via_155f02(regs); break;
88
- case 0x18: via_155f18(regs); break;
89
- case 0x19: via_155f19(regs); break;
90
- default: handle_155fXX(regs); break;
91
- }
92
- }
93
-
94
- static int
95
- getFBSize(struct pci_device *pci)
96
- {
97
- /* FB config */
98
- u8 reg = pci_config_readb(pci->bdf, 0xa1);
99
-
100
- /* GFX disabled ? */
101
- if (!(reg & 0x80))
102
- return -1;
103
-
104
- static u8 mem_power[] = {0, 3, 4, 5, 6, 7, 8, 9};
105
- return mem_power[(reg >> 4) & 0x7];
106
- }
107
-
108
- static int
109
- getViaRamSpeed(struct pci_device *pci)
110
- {
111
- return (pci_config_readb(pci->bdf, 0x90) & 0x07) + 3;
112
- }
113
-
114
- static int
115
- getAMDRamSpeed(void)
116
- {
117
- struct pci_device *pci = pci_find_device(PCI_VENDOR_ID_AMD
118
- , PCI_DEVICE_ID_AMD_K8_NB_MEMCTL);
119
- if (!pci)
120
- return -1;
121
-
122
- /* mem clk 0 = DDR2 400 */
123
- return (pci_config_readb(pci->bdf, 0x94) & 0x7) + 6;
124
- }
125
-
126
- /* int 0x15 - 5f18
127
-
128
- ECX = unknown/don't care
129
- EBX[3..0] Frame Buffer Size 2^N MiB
130
- EBX[7..4] Memory speed:
131
- 0: SDR 66Mhz
132
- 1: SDR 100Mhz
133
- 2: SDR 133Mhz
134
- 3: DDR 100Mhz (PC1600 or DDR200)
135
- 4: DDR 133Mhz (PC2100 or DDR266)
136
- 5: DDR 166Mhz (PC2700 or DDR333)
137
- 6: DDR 200Mhz (PC3200 or DDR400)
138
- 7: DDR2 133Mhz (DDR2 533)
139
- 8: DDR2 166Mhz (DDR2 667)
140
- 9: DDR2 200Mhz (DDR2 800)
141
- A: DDR2 233Mhz (DDR2 1066)
142
- B: and above: Unknown
143
- EBX[?..8] Total memory size?
144
- EAX = 0x5f for success
145
- */
146
-
147
- #define PCI_DEVICE_ID_VIA_K8M890CE_3 0x3336
148
- #define PCI_DEVICE_ID_VIA_VX855_MEMCTRL 0x3409
149
-
150
- static void
151
- via_setup(struct pci_device *pci)
152
- {
153
- VGAHookHandlerType = VH_VIA;
154
-
155
- struct pci_device *d = pci_find_device(PCI_VENDOR_ID_VIA
156
- , PCI_DEVICE_ID_VIA_K8M890CE_3);
157
- if (d) {
158
- ViaFBsize = getFBSize(d);
159
- ViaRamSpeed = getAMDRamSpeed();
160
- return;
161
- }
162
- d = pci_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VX855_MEMCTRL);
163
- if (d) {
164
- ViaFBsize = getFBSize(d);
165
- ViaRamSpeed = getViaRamSpeed(d);
166
- return;
167
- }
168
-
169
- dprintf(1, "Warning: VGA memory size and speed is hardcoded\n");
170
- ViaFBsize = 5; // 32M frame buffer
171
- ViaRamSpeed = 4; // MCLK = DDR266
172
- }
173
-
174
-
175
- /****************************************************************
176
- * Intel VGA hooks
177
- ****************************************************************/
178
-
179
- u8 IntelDisplayType VARFSEG, IntelDisplayId VARFSEG;
180
-
181
- static void
182
- intel_155f35(struct bregs *regs)
183
- {
184
- regs->ax = 0x005f;
185
- regs->cl = GET_GLOBAL(IntelDisplayType);
186
- set_success(regs);
187
- }
188
-
189
- static void
190
- intel_155f40(struct bregs *regs)
191
- {
192
- regs->ax = 0x005f;
193
- regs->cl = GET_GLOBAL(IntelDisplayId);
194
- set_success(regs);
195
- }
196
-
197
- static void
198
- intel_155f50(struct bregs *regs)
199
- {
200
- /* Mandatory hook on some Dell laptops */
201
- regs->ax = 0x005f;
202
- set_success(regs);
203
- }
204
-
205
- static void
206
- intel_155f(struct bregs *regs)
207
- {
208
- switch (regs->al) {
209
- case 0x35: intel_155f35(regs); break;
210
- case 0x40: intel_155f40(regs); break;
211
- case 0x50: intel_155f50(regs); break;
212
- default: handle_155fXX(regs); break;
213
- }
214
- }
215
-
216
- #define BOOT_DISPLAY_DEFAULT (0)
217
- #define BOOT_DISPLAY_CRT (1 << 0)
218
- #define BOOT_DISPLAY_TV (1 << 1)
219
- #define BOOT_DISPLAY_EFP (1 << 2)
220
- #define BOOT_DISPLAY_LCD (1 << 3)
221
- #define BOOT_DISPLAY_CRT2 (1 << 4)
222
- #define BOOT_DISPLAY_TV2 (1 << 5)
223
- #define BOOT_DISPLAY_EFP2 (1 << 6)
224
- #define BOOT_DISPLAY_LCD2 (1 << 7)
225
-
226
- static void
227
- intel_setup(struct pci_device *pci)
228
- {
229
- VGAHookHandlerType = VH_INTEL;
230
-
231
- IntelDisplayType = BOOT_DISPLAY_DEFAULT;
232
- IntelDisplayId = 3;
233
- }
234
-
235
- static void
236
- roda_setup(struct pci_device *pci)
237
- {
238
- VGAHookHandlerType = VH_INTEL;
239
- // IntelDisplayType = BOOT_DISPLAY_DEFAULT;
240
- IntelDisplayType = BOOT_DISPLAY_LCD;
241
- // IntelDisplayId = inb(0x60f) & 0x0f; // Correct according to Crete
242
- IntelDisplayId = 3; // Correct according to empirical studies
243
- }
244
-
245
- static void
246
- kontron_setup(struct pci_device *pci)
247
- {
248
- VGAHookHandlerType = VH_INTEL;
249
- IntelDisplayType = BOOT_DISPLAY_CRT;
250
- IntelDisplayId = 3;
251
- }
252
-
253
- static void
254
- getac_setup(struct pci_device *pci)
255
- {
256
- }
257
-
258
- /****************************************************************
259
- * Silicon Motion hooks
260
- ****************************************************************/
261
-
262
- u8 SmiBootDisplay VARFSEG; // 1: LCD, 2: CRT, 3: Both */
263
-
264
- static void
265
- smi_157f02(struct bregs *regs)
266
- {
267
- /* Boot Display Device Override */
268
- regs->ax = 0x007f;
269
- regs->bl = GET_GLOBAL(SmiBootDisplay);
270
- set_success(regs);
271
- }
272
-
273
- static void
274
- smi_157f14(struct bregs *regs)
275
- {
276
- /* ReduceOn support default status */
277
- regs->ax = 0x007f;
278
- regs->bl = 0x00;
279
- set_success(regs);
280
- }
281
-
282
- static void
283
- smi_157f(struct bregs *regs)
284
- {
285
- switch (regs->al) {
286
- case 0x02: smi_157f02(regs); break;
287
- case 0x14: smi_157f14(regs); break;
288
- default: handle_157fXX(regs); break;
289
- }
290
- }
291
-
292
- static void
293
- winent_mb6047_setup(struct pci_device *pci)
294
- {
295
- VGAHookHandlerType = VH_SMI;
296
- SmiBootDisplay = 0x02;
297
- }
298
-
299
- /****************************************************************
300
- * Entry and setup
301
- ****************************************************************/
302
-
303
- // Main 16bit entry point
304
- void
305
- handle_155f(struct bregs *regs)
306
- {
307
- if (!CONFIG_VGAHOOKS) {
308
- handle_155fXX(regs);
309
- return;
310
- }
311
-
312
- int htype = GET_GLOBAL(VGAHookHandlerType);
313
- switch (htype) {
314
- case VH_VIA: via_155f(regs); break;
315
- case VH_INTEL: intel_155f(regs); break;
316
- default: handle_155fXX(regs); break;
317
- }
318
- }
319
-
320
- // Main 16bit entry point
321
- void
322
- handle_157f(struct bregs *regs)
323
- {
324
- if (!CONFIG_VGAHOOKS) {
325
- handle_157fXX(regs);
326
- return;
327
- }
328
-
329
- int htype = GET_GLOBAL(VGAHookHandlerType);
330
- switch (htype) {
331
- case VH_SMI: smi_157f(regs); break;
332
- default: handle_157fXX(regs); break;
333
- }
334
- }
335
-
336
- // Setup
337
- void
338
- vgahook_setup(struct pci_device *pci)
339
- {
340
- if (!CONFIG_VGAHOOKS)
341
- return;
342
-
343
- if (strcmp(CBvendor, "KONTRON") == 0 && strcmp(CBpart, "986LCD-M") == 0)
344
- kontron_setup(pci);
345
- else if (strcmp(CBvendor, "GETAC") == 0 && strcmp(CBpart, "P470") == 0)
346
- getac_setup(pci);
347
- else if (strcmp(CBvendor, "RODA") == 0 && strcmp(CBpart, "RK886EX") == 0)
348
- roda_setup(pci);
349
- else if (strcmp(CBvendor, "Win Enterprise") == 0 && strcmp(CBpart, "MB6047") == 0)
350
- winent_mb6047_setup(pci);
351
- else if (pci->vendor == PCI_VENDOR_ID_VIA)
352
- via_setup(pci);
353
- else if (pci->vendor == PCI_VENDOR_ID_INTEL)
354
- intel_setup(pci);
355
- }
@@ -1,23 +0,0 @@
1
- // X86 utility functions.
2
- //
3
- // Copyright (C) 2013 Kevin O'Connor <kevin@koconnor.net>
4
- //
5
- // This file may be distributed under the terms of the GNU LGPLv3 license.
6
-
7
- #include "x86.h" // __cpuid
8
-
9
- void
10
- cpuid(u32 index, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
11
- {
12
- // Check for cpu id
13
- u32 origflags = save_flags();
14
- restore_flags(origflags ^ F_ID);
15
- u32 newflags = save_flags();
16
- restore_flags(origflags);
17
-
18
- if (((origflags ^ newflags) & F_ID) != F_ID)
19
- // no cpuid
20
- *eax = *ebx = *ecx = *edx = 0;
21
- else
22
- __cpuid(index, eax, ebx, ecx, edx);
23
- }
@@ -1,277 +0,0 @@
1
- // Basic x86 asm functions.
2
- #ifndef __X86_H
3
- #define __X86_H
4
-
5
- // CPU flag bitdefs
6
- #define F_CF (1<<0)
7
- #define F_ZF (1<<6)
8
- #define F_IF (1<<9)
9
- #define F_ID (1<<21)
10
-
11
- // CR0 flags
12
- #define CR0_PG (1<<31) // Paging
13
- #define CR0_CD (1<<30) // Cache disable
14
- #define CR0_NW (1<<29) // Not Write-through
15
- #define CR0_PE (1<<0) // Protection enable
16
-
17
- // PORT_A20 bitdefs
18
- #define PORT_A20 0x0092
19
- #define A20_ENABLE_BIT 0x02
20
-
21
- #ifndef __ASSEMBLY__
22
-
23
- #include "types.h" // u32
24
-
25
- static inline void irq_disable(void)
26
- {
27
- asm volatile("cli": : :"memory");
28
- }
29
-
30
- static inline void irq_enable(void)
31
- {
32
- asm volatile("sti": : :"memory");
33
- }
34
-
35
- static inline u32 save_flags(void)
36
- {
37
- u32 flags;
38
- asm volatile("pushfl ; popl %0" : "=rm" (flags));
39
- return flags;
40
- }
41
-
42
- static inline void restore_flags(u32 flags)
43
- {
44
- asm volatile("pushl %0 ; popfl" : : "g" (flags) : "memory", "cc");
45
- }
46
-
47
- static inline void cpu_relax(void)
48
- {
49
- asm volatile("rep ; nop": : :"memory");
50
- }
51
-
52
- static inline void nop(void)
53
- {
54
- asm volatile("nop");
55
- }
56
-
57
- static inline void hlt(void)
58
- {
59
- asm volatile("hlt": : :"memory");
60
- }
61
-
62
- static inline void wbinvd(void)
63
- {
64
- asm volatile("wbinvd": : :"memory");
65
- }
66
-
67
- #define CPUID_TSC (1 << 4)
68
- #define CPUID_MSR (1 << 5)
69
- #define CPUID_APIC (1 << 9)
70
- #define CPUID_MTRR (1 << 12)
71
- #define CPUID_X2APIC (1 << 21)
72
- static inline void __cpuid(u32 index, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
73
- {
74
- asm("cpuid"
75
- : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
76
- : "0" (index));
77
- }
78
-
79
- static inline u32 cr0_read(void) {
80
- u32 cr0;
81
- asm("movl %%cr0, %0" : "=r"(cr0));
82
- return cr0;
83
- }
84
- static inline void cr0_write(u32 cr0) {
85
- asm("movl %0, %%cr0" : : "r"(cr0));
86
- }
87
- static inline void cr0_mask(u32 off, u32 on) {
88
- cr0_write((cr0_read() & ~off) | on);
89
- }
90
- static inline u16 cr0_vm86_read(void) {
91
- u16 cr0;
92
- asm("smsww %0" : "=r"(cr0));
93
- return cr0;
94
- }
95
-
96
- static inline u64 rdmsr(u32 index)
97
- {
98
- u64 ret;
99
- asm ("rdmsr" : "=A"(ret) : "c"(index));
100
- return ret;
101
- }
102
-
103
- static inline void wrmsr(u32 index, u64 val)
104
- {
105
- asm volatile ("wrmsr" : : "c"(index), "A"(val));
106
- }
107
-
108
- static inline u64 rdtscll(void)
109
- {
110
- u64 val;
111
- asm volatile("rdtsc" : "=A" (val));
112
- return val;
113
- }
114
-
115
- static inline u32 __ffs(u32 word)
116
- {
117
- asm("bsf %1,%0"
118
- : "=r" (word)
119
- : "rm" (word));
120
- return word;
121
- }
122
- static inline u32 __fls(u32 word)
123
- {
124
- asm("bsr %1,%0"
125
- : "=r" (word)
126
- : "rm" (word));
127
- return word;
128
- }
129
-
130
- static inline u32 getesp(void) {
131
- u32 esp;
132
- asm("movl %%esp, %0" : "=rm"(esp));
133
- return esp;
134
- }
135
-
136
- static inline u32 rol(u32 val, u16 rol) {
137
- u32 res;
138
- asm volatile("roll %%cl, %%eax"
139
- : "=a" (res) : "a" (val), "c" (rol));
140
- return res;
141
- }
142
-
143
- static inline void outb(u8 value, u16 port) {
144
- __asm__ __volatile__("outb %b0, %w1" : : "a"(value), "Nd"(port));
145
- }
146
- static inline void outw(u16 value, u16 port) {
147
- __asm__ __volatile__("outw %w0, %w1" : : "a"(value), "Nd"(port));
148
- }
149
- static inline void outl(u32 value, u16 port) {
150
- __asm__ __volatile__("outl %0, %w1" : : "a"(value), "Nd"(port));
151
- }
152
- static inline u8 inb(u16 port) {
153
- u8 value;
154
- __asm__ __volatile__("inb %w1, %b0" : "=a"(value) : "Nd"(port));
155
- return value;
156
- }
157
- static inline u16 inw(u16 port) {
158
- u16 value;
159
- __asm__ __volatile__("inw %w1, %w0" : "=a"(value) : "Nd"(port));
160
- return value;
161
- }
162
- static inline u32 inl(u16 port) {
163
- u32 value;
164
- __asm__ __volatile__("inl %w1, %0" : "=a"(value) : "Nd"(port));
165
- return value;
166
- }
167
-
168
- static inline void insb(u16 port, u8 *data, u32 count) {
169
- asm volatile("rep insb (%%dx), %%es:(%%edi)"
170
- : "+c"(count), "+D"(data) : "d"(port) : "memory");
171
- }
172
- static inline void insw(u16 port, u16 *data, u32 count) {
173
- asm volatile("rep insw (%%dx), %%es:(%%edi)"
174
- : "+c"(count), "+D"(data) : "d"(port) : "memory");
175
- }
176
- static inline void insl(u16 port, u32 *data, u32 count) {
177
- asm volatile("rep insl (%%dx), %%es:(%%edi)"
178
- : "+c"(count), "+D"(data) : "d"(port) : "memory");
179
- }
180
- // XXX - outs not limited to es segment
181
- static inline void outsb(u16 port, u8 *data, u32 count) {
182
- asm volatile("rep outsb %%es:(%%esi), (%%dx)"
183
- : "+c"(count), "+S"(data) : "d"(port) : "memory");
184
- }
185
- static inline void outsw(u16 port, u16 *data, u32 count) {
186
- asm volatile("rep outsw %%es:(%%esi), (%%dx)"
187
- : "+c"(count), "+S"(data) : "d"(port) : "memory");
188
- }
189
- static inline void outsl(u16 port, u32 *data, u32 count) {
190
- asm volatile("rep outsl %%es:(%%esi), (%%dx)"
191
- : "+c"(count), "+S"(data) : "d"(port) : "memory");
192
- }
193
-
194
- /* Compiler barrier is enough as an x86 CPU does not reorder reads or writes */
195
- static inline void smp_rmb(void) {
196
- barrier();
197
- }
198
- static inline void smp_wmb(void) {
199
- barrier();
200
- }
201
-
202
- static inline void writel(void *addr, u32 val) {
203
- barrier();
204
- *(volatile u32 *)addr = val;
205
- }
206
- static inline void writew(void *addr, u16 val) {
207
- barrier();
208
- *(volatile u16 *)addr = val;
209
- }
210
- static inline void writeb(void *addr, u8 val) {
211
- barrier();
212
- *(volatile u8 *)addr = val;
213
- }
214
- static inline u64 readq(const void *addr) {
215
- u64 val = *(volatile const u64 *)addr;
216
- barrier();
217
- return val;
218
- }
219
- static inline u32 readl(const void *addr) {
220
- u32 val = *(volatile const u32 *)addr;
221
- barrier();
222
- return val;
223
- }
224
- static inline u16 readw(const void *addr) {
225
- u16 val = *(volatile const u16 *)addr;
226
- barrier();
227
- return val;
228
- }
229
- static inline u8 readb(const void *addr) {
230
- u8 val = *(volatile const u8 *)addr;
231
- barrier();
232
- return val;
233
- }
234
-
235
- // GDT bits
236
- #define GDT_CODE (0x9bULL << 40) // Code segment - P,R,A bits also set
237
- #define GDT_DATA (0x93ULL << 40) // Data segment - W,A bits also set
238
- #define GDT_B (0x1ULL << 54) // Big flag
239
- #define GDT_G (0x1ULL << 55) // Granularity flag
240
- // GDT bits for segment base
241
- #define GDT_BASE(v) ((((u64)(v) & 0xff000000) << 32) \
242
- | (((u64)(v) & 0x00ffffff) << 16))
243
- // GDT bits for segment limit (0-1Meg)
244
- #define GDT_LIMIT(v) ((((u64)(v) & 0x000f0000) << 32) \
245
- | (((u64)(v) & 0x0000ffff) << 0))
246
- // GDT bits for segment limit (0-4Gig in 4K chunks)
247
- #define GDT_GRANLIMIT(v) (GDT_G | GDT_LIMIT((v) >> 12))
248
-
249
- struct descloc_s {
250
- u16 length;
251
- u32 addr;
252
- } PACKED;
253
-
254
- static inline void sgdt(struct descloc_s *desc) {
255
- asm("sgdtl %0" : "=m"(*desc));
256
- }
257
- static inline void lgdt(struct descloc_s *desc) {
258
- asm("lgdtl %0" : : "m"(*desc) : "memory");
259
- }
260
-
261
- static inline u8 get_a20(void) {
262
- return (inb(PORT_A20) & A20_ENABLE_BIT) != 0;
263
- }
264
-
265
- static inline u8 set_a20(u8 cond) {
266
- u8 val = inb(PORT_A20), a20_enabled = (val & A20_ENABLE_BIT) != 0;
267
- if (a20_enabled != !!cond)
268
- outb(val ^ A20_ENABLE_BIT, PORT_A20);
269
- return a20_enabled;
270
- }
271
-
272
- // x86.c
273
- void cpuid(u32 index, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx);
274
-
275
- #endif // !__ASSEMBLY__
276
-
277
- #endif // x86.h