wasmtime 21.0.1 → 22.0.0
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- checksums.yaml +4 -4
- data/Cargo.lock +80 -87
- data/ext/Cargo.toml +4 -4
- data/ext/cargo-vendor/cranelift-bforest-0.109.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-bforest-0.109.0/Cargo.toml +41 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/Cargo.toml +193 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/context.rs +384 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/dominator_tree.rs +727 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/egraph.rs +835 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/inst_predicates.rs +230 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/ir/dfg.rs +1777 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/ir/extfunc.rs +402 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/ir/immediates.rs +1612 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/ir/stackslot.rs +208 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/ir/types.rs +627 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/abi.rs +1556 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/inst/args.rs +711 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/inst/emit.rs +3584 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/inst/emit_tests.rs +7901 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/inst/imms.rs +1213 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/inst/mod.rs +3060 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/inst/regs.rs +269 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/inst/unwind/systemv.rs +174 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/inst.isle +4218 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/aarch64/pcc.rs +568 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/riscv64/abi.rs +1029 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/riscv64/inst/args.rs +2054 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/riscv64/inst/emit.rs +2682 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/riscv64/inst/emit_tests.rs +2215 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/riscv64/inst/encode.rs +675 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/riscv64/inst/imms.rs +374 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/riscv64/inst/mod.rs +1938 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/riscv64/inst/unwind/systemv.rs +170 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/riscv64/inst/vector.rs +1150 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/riscv64/inst.isle +3127 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/riscv64/inst_vector.isle +1907 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/riscv64/lower/isle.rs +649 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/riscv64/lower.isle +2923 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/riscv64/mod.rs +260 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/s390x/abi.rs +1016 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/s390x/inst/args.rs +298 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/s390x/inst/emit.rs +3401 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/s390x/inst/emit_tests.rs +13388 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/s390x/inst/imms.rs +202 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/s390x/inst/mod.rs +3401 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/s390x/inst/regs.rs +169 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/s390x/inst/unwind/systemv.rs +212 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/s390x/inst.isle +5028 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/s390x/lower.isle +3995 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/x64/abi.rs +1390 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/x64/inst/args.rs +2240 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/x64/inst/emit.rs +4287 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/x64/inst/emit_state.rs +52 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/x64/inst/emit_tests.rs +5171 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/x64/inst/mod.rs +2821 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/x64/inst/regs.rs +275 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/x64/inst/unwind/systemv.rs +198 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/x64/inst.isle +5289 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/x64/lower.isle +4810 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isa/x64/pcc.rs +1014 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/isle_prelude.rs +986 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/lib.rs +106 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/abi.rs +2419 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/blockorder.rs +465 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/buffer.rs +2508 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/isle.rs +909 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/lower.rs +1432 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/mod.rs +551 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/reg.rs +479 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/valueregs.rs +138 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/machinst/vcode.rs +1741 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/opts/cprop.isle +297 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/opts/shifts.isle +307 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/prelude.isle +664 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/prelude_lower.isle +1073 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/timing.rs +296 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/traversals.rs +216 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/verifier/mod.rs +1957 -0
- data/ext/cargo-vendor/cranelift-codegen-0.109.0/src/write.rs +638 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.109.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.109.0/Cargo.toml +36 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.109.0/src/cdsl/types.rs +496 -0
- data/ext/cargo-vendor/cranelift-codegen-meta-0.109.0/src/isa/riscv64.rs +174 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.109.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.109.0/Cargo.toml +22 -0
- data/ext/cargo-vendor/cranelift-codegen-shared-0.109.0/src/constants.rs +28 -0
- data/ext/cargo-vendor/cranelift-control-0.109.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-control-0.109.0/Cargo.toml +30 -0
- data/ext/cargo-vendor/cranelift-entity-0.109.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-entity-0.109.0/Cargo.toml +53 -0
- data/ext/cargo-vendor/cranelift-entity-0.109.0/src/set.rs +290 -0
- data/ext/cargo-vendor/cranelift-frontend-0.109.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-frontend-0.109.0/Cargo.toml +68 -0
- data/ext/cargo-vendor/cranelift-frontend-0.109.0/src/frontend.rs +1857 -0
- data/ext/cargo-vendor/cranelift-frontend-0.109.0/src/lib.rs +187 -0
- data/ext/cargo-vendor/cranelift-frontend-0.109.0/src/ssa.rs +1328 -0
- data/ext/cargo-vendor/cranelift-isle-0.109.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-isle-0.109.0/Cargo.toml +47 -0
- data/ext/cargo-vendor/cranelift-isle-0.109.0/src/sema.rs +2492 -0
- data/ext/cargo-vendor/cranelift-native-0.109.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-native-0.109.0/Cargo.toml +43 -0
- data/ext/cargo-vendor/cranelift-native-0.109.0/src/lib.rs +188 -0
- data/ext/cargo-vendor/cranelift-native-0.109.0/src/riscv.rs +128 -0
- data/ext/cargo-vendor/cranelift-wasm-0.109.0/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/cranelift-wasm-0.109.0/Cargo.toml +110 -0
- data/ext/cargo-vendor/cranelift-wasm-0.109.0/src/code_translator.rs +3695 -0
- data/ext/cargo-vendor/cranelift-wasm-0.109.0/src/func_translator.rs +296 -0
- data/ext/cargo-vendor/cranelift-wasm-0.109.0/src/module_translator.rs +120 -0
- data/ext/cargo-vendor/cranelift-wasm-0.109.0/src/sections_translator.rs +343 -0
- data/ext/cargo-vendor/cranelift-wasm-0.109.0/src/state.rs +522 -0
- data/ext/cargo-vendor/object-0.36.3/.cargo-checksum.json +1 -0
- data/ext/cargo-vendor/object-0.36.3/CHANGELOG.md +1028 -0
- data/ext/cargo-vendor/object-0.36.3/Cargo.toml +180 -0
- data/ext/cargo-vendor/object-0.36.3/README.md +60 -0
- data/ext/cargo-vendor/object-0.36.3/src/build/bytes.rs +146 -0
- data/ext/cargo-vendor/object-0.36.3/src/build/elf.rs +3113 -0
- data/ext/cargo-vendor/object-0.36.3/src/common.rs +590 -0
- data/ext/cargo-vendor/object-0.36.3/src/elf.rs +6303 -0
- data/ext/cargo-vendor/object-0.36.3/src/endian.rs +831 -0
- data/ext/cargo-vendor/object-0.36.3/src/macho.rs +3303 -0
- data/ext/cargo-vendor/object-0.36.3/src/pod.rs +281 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/any.rs +1334 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/archive.rs +1133 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/coff/comdat.rs +220 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/coff/file.rs +381 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/coff/relocation.rs +113 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/coff/section.rs +619 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/coff/symbol.rs +669 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/elf/attributes.rs +340 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/elf/comdat.rs +186 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/elf/file.rs +959 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/elf/hash.rs +236 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/elf/note.rs +302 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/elf/relocation.rs +661 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/elf/section.rs +1241 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/elf/segment.rs +365 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/elf/symbol.rs +654 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/elf/version.rs +513 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/gnu_compression.rs +36 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/macho/dyld_cache.rs +384 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/macho/file.rs +779 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/macho/load_command.rs +404 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/macho/section.rs +420 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/macho/segment.rs +317 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/macho/symbol.rs +532 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/mod.rs +1018 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/pe/file.rs +1033 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/pe/import.rs +381 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/pe/relocation.rs +109 -0
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- data/ext/cargo-vendor/object-0.36.3/src/read/read_cache.rs +261 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/traits.rs +589 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/wasm.rs +983 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/xcoff/file.rs +716 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/xcoff/relocation.rs +138 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/xcoff/section.rs +452 -0
- data/ext/cargo-vendor/object-0.36.3/src/read/xcoff/symbol.rs +836 -0
- data/ext/cargo-vendor/object-0.36.3/src/write/coff/object.rs +681 -0
- data/ext/cargo-vendor/object-0.36.3/src/write/coff/writer.rs +520 -0
- data/ext/cargo-vendor/object-0.36.3/src/write/elf/object.rs +897 -0
- data/ext/cargo-vendor/object-0.36.3/src/write/elf/writer.rs +2361 -0
- data/ext/cargo-vendor/object-0.36.3/src/write/macho.rs +1124 -0
- data/ext/cargo-vendor/object-0.36.3/src/write/mod.rs +1023 -0
- data/ext/cargo-vendor/object-0.36.3/src/write/pe.rs +849 -0
- data/ext/cargo-vendor/object-0.36.3/src/write/xcoff.rs +588 -0
- data/ext/cargo-vendor/object-0.36.3/tests/build/elf.rs +254 -0
- data/ext/cargo-vendor/object-0.36.3/tests/build/mod.rs +3 -0
- data/ext/cargo-vendor/object-0.36.3/tests/integration.rs +3 -0
- data/ext/cargo-vendor/object-0.36.3/tests/read/macho.rs +49 -0
- data/ext/cargo-vendor/object-0.36.3/tests/read/mod.rs +5 -0
- data/ext/cargo-vendor/object-0.36.3/tests/round_trip/bss.rs +244 -0
- data/ext/cargo-vendor/object-0.36.3/tests/round_trip/comdat.rs +217 -0
- data/ext/cargo-vendor/object-0.36.3/tests/round_trip/common.rs +241 -0
- data/ext/cargo-vendor/object-0.36.3/tests/round_trip/elf.rs +302 -0
- data/ext/cargo-vendor/object-0.36.3/tests/round_trip/mod.rs +682 -0
- data/ext/cargo-vendor/object-0.36.3/tests/round_trip/section_flags.rs +89 -0
- data/ext/cargo-vendor/object-0.36.3/tests/round_trip/tls.rs +308 -0
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- data/ext/cargo-vendor/wasi-common-22.0.0/src/snapshots/preview_0.rs +1080 -0
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- data/ext/cargo-vendor/wasi-common-22.0.0/src/string_array.rs +75 -0
- data/ext/cargo-vendor/wasi-common-22.0.0/src/sync/sched/windows.rs +221 -0
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- /data/ext/cargo-vendor/{wit-parser-0.207.0 → wit-parser-0.209.1}/tests/ui/wasi.wit.json +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.207.0 → wit-parser-0.209.1}/tests/ui/world-diamond.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.207.0 → wit-parser-0.209.1}/tests/ui/world-iface-no-collide.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.207.0 → wit-parser-0.209.1}/tests/ui/world-implicit-import1.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.207.0 → wit-parser-0.209.1}/tests/ui/world-implicit-import2.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.207.0 → wit-parser-0.209.1}/tests/ui/world-implicit-import3.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.207.0 → wit-parser-0.209.1}/tests/ui/world-same-fields4.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.207.0 → wit-parser-0.209.1}/tests/ui/world-top-level-funcs.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.207.0 → wit-parser-0.209.1}/tests/ui/world-top-level-funcs.wit.json +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.207.0 → wit-parser-0.209.1}/tests/ui/world-top-level-resources.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.207.0 → wit-parser-0.209.1}/tests/ui/worlds-union-dedup.wit +0 -0
- /data/ext/cargo-vendor/{wit-parser-0.207.0 → wit-parser-0.209.1}/tests/ui/worlds-with-types.wit +0 -0
@@ -1,555 +0,0 @@
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//! This module exposes the machine-specific backend definition pieces.
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//!
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//! The MachInst infrastructure is the compiler backend, from CLIF
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//! (ir::Function) to machine code. The purpose of this infrastructure is, at a
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//! high level, to do instruction selection/lowering (to machine instructions),
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//! register allocation, and then perform all the fixups to branches, constant
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//! data references, etc., needed to actually generate machine code.
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//!
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//! The container for machine instructions, at various stages of construction,
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//! is the `VCode` struct. We refer to a sequence of machine instructions organized
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//! into basic blocks as "vcode". This is short for "virtual-register code".
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//!
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//! The compilation pipeline, from an `ir::Function` (already optimized as much as
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//! you like by machine-independent optimization passes) onward, is as follows.
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//!
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//! ```plain
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//!
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//! ir::Function (SSA IR, machine-independent opcodes)
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//! |
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//! | [lower]
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//! |
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//! VCode<arch_backend::Inst> (machine instructions:
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//! | - mostly virtual registers.
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//! | - cond branches in two-target form.
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//! | - branch targets are block indices.
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//! | - in-memory constants held by insns,
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//! | with unknown offsets.
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//! | - critical edges (actually all edges)
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//! | are split.)
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//! |
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//! | [regalloc --> `regalloc2::Output`; VCode is unchanged]
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//! |
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//! | [binary emission via MachBuffer]
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//! |
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//! Vec<u8> (machine code:
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//! | - two-dest branches resolved via
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//! | streaming branch resolution/simplification.
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//! | - regalloc `Allocation` results used directly
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//! | by instruction emission code.
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//! | - prologue and epilogue(s) built and emitted
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//! | directly during emission.
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//! | - nominal-SP-relative offsets resolved
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//! | by tracking EmitState.)
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//!
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//! ```
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use crate::binemit::{Addend, CodeInfo, CodeOffset, Reloc, StackMap};
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use crate::ir::function::FunctionParameters;
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use crate::ir::{DynamicStackSlot, RelSourceLoc, StackSlot, Type};
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use crate::isa::FunctionAlignment;
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use crate::result::CodegenResult;
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use crate::settings;
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use crate::settings::Flags;
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use crate::value_label::ValueLabelsRanges;
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use alloc::vec::Vec;
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use core::fmt::Debug;
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use cranelift_control::ControlPlane;
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use cranelift_entity::PrimaryMap;
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use regalloc2::{Allocation, VReg};
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use smallvec::{smallvec, SmallVec};
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use std::string::String;
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#[cfg(feature = "enable-serde")]
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use serde_derive::{Deserialize, Serialize};
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#[macro_use]
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pub mod isle;
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pub mod lower;
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pub use lower::*;
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pub mod vcode;
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pub use vcode::*;
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pub mod compile;
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pub use compile::*;
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pub mod blockorder;
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pub use blockorder::*;
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pub mod abi;
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pub use abi::*;
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pub mod buffer;
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pub use buffer::*;
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pub mod helpers;
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pub use helpers::*;
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pub mod inst_common;
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#[allow(unused_imports)] // not used in all backends right now
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pub use inst_common::*;
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pub mod valueregs;
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pub use reg::*;
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pub use valueregs::*;
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pub mod pcc;
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pub mod reg;
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/// A machine instruction.
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pub trait MachInst: Clone + Debug {
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/// The ABI machine spec for this `MachInst`.
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type ABIMachineSpec: ABIMachineSpec<I = Self>;
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/// Return the registers referenced by this machine instruction along with
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/// the modes of reference (use, def, modify).
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fn get_operands(&mut self, collector: &mut impl OperandVisitor);
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/// If this is a simple move, return the (source, destination) tuple of registers.
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fn is_move(&self) -> Option<(Writable<Reg>, Reg)>;
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/// Is this a terminator (branch or ret)? If so, return its type
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/// (ret/uncond/cond) and target if applicable.
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fn is_term(&self) -> MachTerminator;
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/// Is this an unconditional trap?
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fn is_trap(&self) -> bool;
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/// Is this an "args" pseudoinst?
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fn is_args(&self) -> bool;
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/// Should this instruction be included in the clobber-set?
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fn is_included_in_clobbers(&self) -> bool;
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/// Does this instruction access memory?
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fn is_mem_access(&self) -> bool;
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/// Generate a move.
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fn gen_move(to_reg: Writable<Reg>, from_reg: Reg, ty: Type) -> Self;
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/// Generate a dummy instruction that will keep a value alive but
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/// has no other purpose.
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fn gen_dummy_use(reg: Reg) -> Self;
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/// Determine register class(es) to store the given Cranelift type, and the
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/// Cranelift type actually stored in the underlying register(s). May return
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/// an error if the type isn't supported by this backend.
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///
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/// If the type requires multiple registers, then the list of registers is
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/// returned in little-endian order.
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///
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/// Note that the type actually stored in the register(s) may differ in the
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/// case that a value is split across registers: for example, on a 32-bit
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/// target, an I64 may be stored in two registers, each of which holds an
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/// I32. The actually-stored types are used only to inform the backend when
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/// generating spills and reloads for individual registers.
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fn rc_for_type(ty: Type) -> CodegenResult<(&'static [RegClass], &'static [Type])>;
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/// Get an appropriate type that can fully hold a value in a given
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/// register class. This may not be the only type that maps to
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/// that class, but when used with `gen_move()` or the ABI trait's
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/// load/spill constructors, it should produce instruction(s) that
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/// move the entire register contents.
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fn canonical_type_for_rc(rc: RegClass) -> Type;
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/// Generate a jump to another target. Used during lowering of
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/// control flow.
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fn gen_jump(target: MachLabel) -> Self;
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/// Generate a store of an immediate 64-bit integer to a register. Used by
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/// the control plane to generate random instructions.
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fn gen_imm_u64(_value: u64, _dst: Writable<Reg>) -> Option<Self> {
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None
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}
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/// Generate a store of an immediate 64-bit integer to a register. Used by
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/// the control plane to generate random instructions. The tmp register may
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/// be used by architectures which don't support writing immediate values to
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/// floating point registers directly.
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fn gen_imm_f64(_value: f64, _tmp: Writable<Reg>, _dst: Writable<Reg>) -> SmallVec<[Self; 2]> {
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SmallVec::new()
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}
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/// Generate a NOP. The `preferred_size` parameter allows the caller to
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/// request a NOP of that size, or as close to it as possible. The machine
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/// backend may return a NOP whose binary encoding is smaller than the
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/// preferred size, but must not return a NOP that is larger. However,
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/// the instruction must have a nonzero size if preferred_size is nonzero.
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fn gen_nop(preferred_size: usize) -> Self;
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/// Align a basic block offset (from start of function). By default, no
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/// alignment occurs.
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fn align_basic_block(offset: CodeOffset) -> CodeOffset {
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offset
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}
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/// What is the worst-case instruction size emitted by this instruction type?
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fn worst_case_size() -> CodeOffset;
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/// What is the register class used for reference types (GC-observable pointers)? Can
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/// be dependent on compilation flags.
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fn ref_type_regclass(_flags: &Flags) -> RegClass;
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/// Is this a safepoint?
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fn is_safepoint(&self) -> bool;
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/// Generate an instruction that must appear at the beginning of a basic
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/// block, if any. Note that the return value must not be subject to
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/// register allocation.
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fn gen_block_start(
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_is_indirect_branch_target: bool,
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_is_forward_edge_cfi_enabled: bool,
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) -> Option<Self> {
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None
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}
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/// Returns a description of the alignment required for functions for this
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/// architecture.
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fn function_alignment() -> FunctionAlignment;
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/// A label-use kind: a type that describes the types of label references that
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/// can occur in an instruction.
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type LabelUse: MachInstLabelUse;
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/// Byte representation of a trap opcode which is inserted by `MachBuffer`
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/// during its `defer_trap` method.
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const TRAP_OPCODE: &'static [u8];
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}
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/// A descriptor of a label reference (use) in an instruction set.
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pub trait MachInstLabelUse: Clone + Copy + Debug + Eq {
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/// Required alignment for any veneer. Usually the required instruction
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/// alignment (e.g., 4 for a RISC with 32-bit instructions, or 1 for x86).
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const ALIGN: CodeOffset;
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/// What is the maximum PC-relative range (positive)? E.g., if `1024`, a
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/// label-reference fixup at offset `x` is valid if the label resolves to `x
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/// + 1024`.
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fn max_pos_range(self) -> CodeOffset;
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/// What is the maximum PC-relative range (negative)? This is the absolute
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/// value; i.e., if `1024`, then a label-reference fixup at offset `x` is
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/// valid if the label resolves to `x - 1024`.
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fn max_neg_range(self) -> CodeOffset;
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/// What is the size of code-buffer slice this label-use needs to patch in
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/// the label's value?
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fn patch_size(self) -> CodeOffset;
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/// Perform a code-patch, given the offset into the buffer of this label use
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/// and the offset into the buffer of the label's definition.
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/// It is guaranteed that, given `delta = offset - label_offset`, we will
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/// have `offset >= -self.max_neg_range()` and `offset <=
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/// self.max_pos_range()`.
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fn patch(self, buffer: &mut [u8], use_offset: CodeOffset, label_offset: CodeOffset);
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/// Can the label-use be patched to a veneer that supports a longer range?
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/// Usually valid for jumps (a short-range jump can jump to a longer-range
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/// jump), but not for e.g. constant pool references, because the constant
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/// load would require different code (one more level of indirection).
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fn supports_veneer(self) -> bool;
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/// How many bytes are needed for a veneer?
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fn veneer_size(self) -> CodeOffset;
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/// What's the largest possible veneer that may be generated?
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fn worst_case_veneer_size() -> CodeOffset;
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/// Generate a veneer. The given code-buffer slice is `self.veneer_size()`
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/// bytes long at offset `veneer_offset` in the buffer. The original
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/// label-use will be patched to refer to this veneer's offset. A new
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/// (offset, LabelUse) is returned that allows the veneer to use the actual
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/// label. For veneers to work properly, it is expected that the new veneer
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/// has a larger range; on most platforms this probably means either a
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/// "long-range jump" (e.g., on ARM, the 26-bit form), or if already at that
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/// stage, a jump that supports a full 32-bit range, for example.
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fn generate_veneer(self, buffer: &mut [u8], veneer_offset: CodeOffset) -> (CodeOffset, Self);
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/// Returns the corresponding label-use for the relocation specified.
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///
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/// This returns `None` if the relocation doesn't have a corresponding
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/// representation for the target architecture.
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fn from_reloc(reloc: Reloc, addend: Addend) -> Option<Self>;
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}
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/// Describes a block terminator (not call) in the vcode, when its branches
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/// have not yet been finalized (so a branch may have two targets).
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///
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/// Actual targets are not included: the single-source-of-truth for
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/// those is the VCode itself, which holds, for each block, successors
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/// and outgoing branch args per successor.
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#[derive(Clone, Debug, PartialEq, Eq)]
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pub enum MachTerminator {
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/// Not a terminator.
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None,
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/// A return instruction.
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Ret,
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/// A tail call.
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RetCall,
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/// An unconditional branch to another block.
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Uncond,
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/// A conditional branch to one of two other blocks.
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Cond,
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/// An indirect branch with known possible targets.
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Indirect,
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}
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/// A trait describing the ability to encode a MachInst into binary machine code.
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pub trait MachInstEmit: MachInst {
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/// Persistent state carried across `emit` invocations.
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type State: MachInstEmitState<Self>;
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/// Constant information used in `emit` invocations.
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type Info;
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/// Emit the instruction.
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fn emit(
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&self,
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allocs: &[Allocation],
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code: &mut MachBuffer<Self>,
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info: &Self::Info,
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state: &mut Self::State,
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);
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/// Pretty-print the instruction.
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fn pretty_print_inst(&self, allocs: &[Allocation], state: &mut Self::State) -> String;
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}
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/// A trait describing the emission state carried between MachInsts when
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/// emitting a function body.
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pub trait MachInstEmitState<I: VCodeInst>: Default + Clone + Debug {
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/// Create a new emission state given the ABI object.
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fn new(abi: &Callee<I::ABIMachineSpec>, ctrl_plane: ControlPlane) -> Self;
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/// Update the emission state before emitting an instruction that is a
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/// safepoint.
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fn pre_safepoint(&mut self, _stack_map: StackMap) {}
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/// The emission state holds ownership of a control plane, so it doesn't
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/// have to be passed around explicitly too much. `ctrl_plane_mut` may
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/// be used if temporary access to the control plane is needed by some
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/// other function that doesn't have access to the emission state.
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fn ctrl_plane_mut(&mut self) -> &mut ControlPlane;
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/// Used to continue using a control plane after the emission state is
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/// not needed anymore.
|
316
|
-
fn take_ctrl_plane(self) -> ControlPlane;
|
317
|
-
/// A hook that triggers when first emitting a new block.
|
318
|
-
/// It is guaranteed to be called before any instructions are emitted.
|
319
|
-
fn on_new_block(&mut self) {}
|
320
|
-
}
|
321
|
-
|
322
|
-
/// The result of a `MachBackend::compile_function()` call. Contains machine
|
323
|
-
/// code (as bytes) and a disassembly, if requested.
|
324
|
-
#[derive(PartialEq, Debug, Clone)]
|
325
|
-
#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))]
|
326
|
-
pub struct CompiledCodeBase<T: CompilePhase> {
|
327
|
-
/// Machine code.
|
328
|
-
pub buffer: MachBufferFinalized<T>,
|
329
|
-
/// Size of stack frame, in bytes.
|
330
|
-
pub frame_size: u32,
|
331
|
-
/// Disassembly, if requested.
|
332
|
-
pub vcode: Option<String>,
|
333
|
-
/// Debug info: value labels to registers/stackslots at code offsets.
|
334
|
-
pub value_labels_ranges: ValueLabelsRanges,
|
335
|
-
/// Debug info: stackslots to stack pointer offsets.
|
336
|
-
pub sized_stackslot_offsets: PrimaryMap<StackSlot, u32>,
|
337
|
-
/// Debug info: stackslots to stack pointer offsets.
|
338
|
-
pub dynamic_stackslot_offsets: PrimaryMap<DynamicStackSlot, u32>,
|
339
|
-
/// Basic-block layout info: block start offsets.
|
340
|
-
///
|
341
|
-
/// This info is generated only if the `machine_code_cfg_info`
|
342
|
-
/// flag is set.
|
343
|
-
pub bb_starts: Vec<CodeOffset>,
|
344
|
-
/// Basic-block layout info: block edges. Each edge is `(from,
|
345
|
-
/// to)`, where `from` and `to` are basic-block start offsets of
|
346
|
-
/// the respective blocks.
|
347
|
-
///
|
348
|
-
/// This info is generated only if the `machine_code_cfg_info`
|
349
|
-
/// flag is set.
|
350
|
-
pub bb_edges: Vec<(CodeOffset, CodeOffset)>,
|
351
|
-
}
|
352
|
-
|
353
|
-
impl CompiledCodeStencil {
|
354
|
-
/// Apply function parameters to finalize a stencil into its final form.
|
355
|
-
pub fn apply_params(self, params: &FunctionParameters) -> CompiledCode {
|
356
|
-
CompiledCode {
|
357
|
-
buffer: self.buffer.apply_base_srcloc(params.base_srcloc()),
|
358
|
-
frame_size: self.frame_size,
|
359
|
-
vcode: self.vcode,
|
360
|
-
value_labels_ranges: self.value_labels_ranges,
|
361
|
-
sized_stackslot_offsets: self.sized_stackslot_offsets,
|
362
|
-
dynamic_stackslot_offsets: self.dynamic_stackslot_offsets,
|
363
|
-
bb_starts: self.bb_starts,
|
364
|
-
bb_edges: self.bb_edges,
|
365
|
-
}
|
366
|
-
}
|
367
|
-
}
|
368
|
-
|
369
|
-
impl<T: CompilePhase> CompiledCodeBase<T> {
|
370
|
-
/// Get a `CodeInfo` describing section sizes from this compilation result.
|
371
|
-
pub fn code_info(&self) -> CodeInfo {
|
372
|
-
CodeInfo {
|
373
|
-
total_size: self.buffer.total_size(),
|
374
|
-
}
|
375
|
-
}
|
376
|
-
|
377
|
-
/// Returns a reference to the machine code generated for this function compilation.
|
378
|
-
pub fn code_buffer(&self) -> &[u8] {
|
379
|
-
self.buffer.data()
|
380
|
-
}
|
381
|
-
|
382
|
-
/// Get the disassembly of the buffer, using the given capstone context.
|
383
|
-
#[cfg(feature = "disas")]
|
384
|
-
pub fn disassemble(
|
385
|
-
&self,
|
386
|
-
params: Option<&crate::ir::function::FunctionParameters>,
|
387
|
-
cs: &capstone::Capstone,
|
388
|
-
) -> Result<String, anyhow::Error> {
|
389
|
-
use std::fmt::Write;
|
390
|
-
|
391
|
-
let mut buf = String::new();
|
392
|
-
|
393
|
-
let relocs = self.buffer.relocs();
|
394
|
-
let traps = self.buffer.traps();
|
395
|
-
|
396
|
-
// Normalize the block starts to include an initial block of offset 0.
|
397
|
-
let mut block_starts = Vec::new();
|
398
|
-
if self.bb_starts.first().copied() != Some(0) {
|
399
|
-
block_starts.push(0);
|
400
|
-
}
|
401
|
-
block_starts.extend_from_slice(&self.bb_starts);
|
402
|
-
block_starts.push(self.buffer.data().len() as u32);
|
403
|
-
|
404
|
-
// Iterate over block regions, to ensure that we always produce block labels
|
405
|
-
for (n, (&start, &end)) in block_starts
|
406
|
-
.iter()
|
407
|
-
.zip(block_starts.iter().skip(1))
|
408
|
-
.enumerate()
|
409
|
-
{
|
410
|
-
writeln!(buf, "block{}: ; offset 0x{:x}", n, start)?;
|
411
|
-
|
412
|
-
let buffer = &self.buffer.data()[start as usize..end as usize];
|
413
|
-
let insns = cs.disasm_all(buffer, start as u64).map_err(map_caperr)?;
|
414
|
-
for i in insns.iter() {
|
415
|
-
write!(buf, " ")?;
|
416
|
-
|
417
|
-
let op_str = i.op_str().unwrap_or("");
|
418
|
-
if let Some(s) = i.mnemonic() {
|
419
|
-
write!(buf, "{}", s)?;
|
420
|
-
if !op_str.is_empty() {
|
421
|
-
write!(buf, " ")?;
|
422
|
-
}
|
423
|
-
}
|
424
|
-
|
425
|
-
write!(buf, "{}", op_str)?;
|
426
|
-
|
427
|
-
let end = i.address() + i.bytes().len() as u64;
|
428
|
-
let contains = |off| i.address() <= off && off < end;
|
429
|
-
|
430
|
-
for reloc in relocs.iter().filter(|reloc| contains(reloc.offset as u64)) {
|
431
|
-
write!(
|
432
|
-
buf,
|
433
|
-
" ; reloc_external {} {} {}",
|
434
|
-
reloc.kind,
|
435
|
-
reloc.target.display(params),
|
436
|
-
reloc.addend,
|
437
|
-
)?;
|
438
|
-
}
|
439
|
-
|
440
|
-
if let Some(trap) = traps.iter().find(|trap| contains(trap.offset as u64)) {
|
441
|
-
write!(buf, " ; trap: {}", trap.code)?;
|
442
|
-
}
|
443
|
-
|
444
|
-
writeln!(buf)?;
|
445
|
-
}
|
446
|
-
}
|
447
|
-
|
448
|
-
return Ok(buf);
|
449
|
-
|
450
|
-
fn map_caperr(err: capstone::Error) -> anyhow::Error {
|
451
|
-
anyhow::format_err!("{}", err)
|
452
|
-
}
|
453
|
-
}
|
454
|
-
}
|
455
|
-
|
456
|
-
/// Result of compiling a `FunctionStencil`, before applying `FunctionParameters` onto it.
|
457
|
-
///
|
458
|
-
/// Only used internally, in a transient manner, for the incremental compilation cache.
|
459
|
-
pub type CompiledCodeStencil = CompiledCodeBase<Stencil>;
|
460
|
-
|
461
|
-
/// `CompiledCode` in its final form (i.e. after `FunctionParameters` have been applied), ready for
|
462
|
-
/// consumption.
|
463
|
-
pub type CompiledCode = CompiledCodeBase<Final>;
|
464
|
-
|
465
|
-
impl CompiledCode {
|
466
|
-
/// If available, return information about the code layout in the
|
467
|
-
/// final machine code: the offsets (in bytes) of each basic-block
|
468
|
-
/// start, and all basic-block edges.
|
469
|
-
pub fn get_code_bb_layout(&self) -> (Vec<usize>, Vec<(usize, usize)>) {
|
470
|
-
(
|
471
|
-
self.bb_starts.iter().map(|&off| off as usize).collect(),
|
472
|
-
self.bb_edges
|
473
|
-
.iter()
|
474
|
-
.map(|&(from, to)| (from as usize, to as usize))
|
475
|
-
.collect(),
|
476
|
-
)
|
477
|
-
}
|
478
|
-
|
479
|
-
/// Creates unwind information for the function.
|
480
|
-
///
|
481
|
-
/// Returns `None` if the function has no unwind information.
|
482
|
-
#[cfg(feature = "unwind")]
|
483
|
-
pub fn create_unwind_info(
|
484
|
-
&self,
|
485
|
-
isa: &dyn crate::isa::TargetIsa,
|
486
|
-
) -> CodegenResult<Option<crate::isa::unwind::UnwindInfo>> {
|
487
|
-
use crate::isa::unwind::UnwindInfoKind;
|
488
|
-
let unwind_info_kind = match isa.triple().operating_system {
|
489
|
-
target_lexicon::OperatingSystem::Windows => UnwindInfoKind::Windows,
|
490
|
-
_ => UnwindInfoKind::SystemV,
|
491
|
-
};
|
492
|
-
self.create_unwind_info_of_kind(isa, unwind_info_kind)
|
493
|
-
}
|
494
|
-
|
495
|
-
/// Creates unwind information for the function using the supplied
|
496
|
-
/// "kind". Supports cross-OS (but not cross-arch) generation.
|
497
|
-
///
|
498
|
-
/// Returns `None` if the function has no unwind information.
|
499
|
-
#[cfg(feature = "unwind")]
|
500
|
-
pub fn create_unwind_info_of_kind(
|
501
|
-
&self,
|
502
|
-
isa: &dyn crate::isa::TargetIsa,
|
503
|
-
unwind_info_kind: crate::isa::unwind::UnwindInfoKind,
|
504
|
-
) -> CodegenResult<Option<crate::isa::unwind::UnwindInfo>> {
|
505
|
-
isa.emit_unwind_info(self, unwind_info_kind)
|
506
|
-
}
|
507
|
-
}
|
508
|
-
|
509
|
-
/// An object that can be used to create the text section of an executable.
|
510
|
-
///
|
511
|
-
/// This primarily handles resolving relative relocations at
|
512
|
-
/// text-section-assembly time rather than at load/link time. This
|
513
|
-
/// architecture-specific logic is sort of like a linker, but only for one
|
514
|
-
/// object file at a time.
|
515
|
-
pub trait TextSectionBuilder {
|
516
|
-
/// Appends `data` to the text section with the `align` specified.
|
517
|
-
///
|
518
|
-
/// If `labeled` is `true` then this also binds the appended data to the
|
519
|
-
/// `n`th label for how many times this has been called with `labeled:
|
520
|
-
/// true`. The label target can be passed as the `target` argument to
|
521
|
-
/// `resolve_reloc`.
|
522
|
-
///
|
523
|
-
/// This function returns the offset at which the data was placed in the
|
524
|
-
/// text section.
|
525
|
-
fn append(
|
526
|
-
&mut self,
|
527
|
-
labeled: bool,
|
528
|
-
data: &[u8],
|
529
|
-
align: u32,
|
530
|
-
ctrl_plane: &mut ControlPlane,
|
531
|
-
) -> u64;
|
532
|
-
|
533
|
-
/// Attempts to resolve a relocation for this function.
|
534
|
-
///
|
535
|
-
/// The `offset` is the offset of the relocation, within the text section.
|
536
|
-
/// The `reloc` is the kind of relocation.
|
537
|
-
/// The `addend` is the value to add to the relocation.
|
538
|
-
/// The `target` is the labeled function that is the target of this
|
539
|
-
/// relocation.
|
540
|
-
///
|
541
|
-
/// Labeled functions are created with the `append` function above by
|
542
|
-
/// setting the `labeled` parameter to `true`.
|
543
|
-
///
|
544
|
-
/// If this builder does not know how to handle `reloc` then this function
|
545
|
-
/// will return `false`. Otherwise this function will return `true` and this
|
546
|
-
/// relocation will be resolved in the final bytes returned by `finish`.
|
547
|
-
fn resolve_reloc(&mut self, offset: u64, reloc: Reloc, addend: Addend, target: usize) -> bool;
|
548
|
-
|
549
|
-
/// A debug-only option which is used to for
|
550
|
-
fn force_veneers(&mut self);
|
551
|
-
|
552
|
-
/// Completes this text section, filling out any final details, and returns
|
553
|
-
/// the bytes of the text section.
|
554
|
-
fn finish(&mut self, ctrl_plane: &mut ControlPlane) -> Vec<u8>;
|
555
|
-
}
|