udb 0.1.16 → 0.1.18

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (856) hide show
  1. checksums.yaml +4 -4
  2. data/.data/cfgs/example_rv64_with_overlay.yaml +157 -2
  3. data/.data/cfgs/mc100-32-full-example.yaml +6 -0
  4. data/.data/cfgs/profile/RVA23S64.yaml +1 -1
  5. data/.data/cfgs/profile/RVA23p1S64.yaml +217 -0
  6. data/.data/cfgs/profile/RVB23S64.yaml +1 -1
  7. data/.data/cfgs/profile/RVB23p1S64.yaml +179 -0
  8. data/.data/cfgs/qc_iu.yaml +14 -0
  9. data/.data/cfgs/rv32-riscv-tests.yaml +143 -0
  10. data/.data/cfgs/rv32-vector.yaml +144 -1
  11. data/.data/cfgs/rv64-riscv-tests.yaml +143 -0
  12. data/.data/cfgs/rv64-vector.yaml +145 -2
  13. data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.mva01s.yaml +2 -2
  14. data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.mvsa01.yaml +2 -2
  15. data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.pop.yaml +2 -2
  16. data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.popret.yaml +2 -2
  17. data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.popretz.yaml +2 -2
  18. data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.push.yaml +2 -2
  19. data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.pushfp.yaml +2 -2
  20. data/.data/spec/schemas/README.adoc +4 -1
  21. data/.data/spec/schemas/csr_schema.json +2 -2
  22. data/.data/spec/schemas/schema_defs.json +4 -1
  23. data/.data/spec/std/isa/csr/H/hgeie.yaml +38 -0
  24. data/.data/spec/std/isa/csr/H/hgeip.yaml +33 -0
  25. data/.data/spec/std/isa/csr/H/hideleg.yaml +120 -0
  26. data/.data/spec/std/isa/csr/H/hie.yaml +74 -0
  27. data/.data/spec/std/isa/csr/H/hip.yaml +88 -0
  28. data/.data/spec/std/isa/csr/H/hvip.yaml +46 -0
  29. data/.data/spec/std/isa/csr/H/vsie.yaml +86 -0
  30. data/.data/spec/std/isa/csr/H/vsip.yaml +98 -0
  31. data/.data/spec/std/isa/csr/H/vsscratch.yaml +29 -0
  32. data/.data/spec/std/isa/csr/I/mcounteren.layout +7 -0
  33. data/.data/spec/std/isa/csr/I/mcounteren.yaml +7 -0
  34. data/.data/spec/std/isa/csr/I/pmpaddr0.yaml +7 -7
  35. data/.data/spec/std/isa/csr/I/pmpaddr1.yaml +7 -7
  36. data/.data/spec/std/isa/csr/I/pmpaddr10.yaml +7 -7
  37. data/.data/spec/std/isa/csr/I/pmpaddr11.yaml +7 -7
  38. data/.data/spec/std/isa/csr/I/pmpaddr12.yaml +7 -7
  39. data/.data/spec/std/isa/csr/I/pmpaddr13.yaml +7 -7
  40. data/.data/spec/std/isa/csr/I/pmpaddr14.yaml +7 -7
  41. data/.data/spec/std/isa/csr/I/pmpaddr15.yaml +7 -7
  42. data/.data/spec/std/isa/csr/I/pmpaddr16.yaml +7 -7
  43. data/.data/spec/std/isa/csr/I/pmpaddr17.yaml +7 -7
  44. data/.data/spec/std/isa/csr/I/pmpaddr18.yaml +7 -7
  45. data/.data/spec/std/isa/csr/I/pmpaddr19.yaml +7 -7
  46. data/.data/spec/std/isa/csr/I/pmpaddr2.yaml +7 -7
  47. data/.data/spec/std/isa/csr/I/pmpaddr20.yaml +7 -7
  48. data/.data/spec/std/isa/csr/I/pmpaddr21.yaml +7 -7
  49. data/.data/spec/std/isa/csr/I/pmpaddr22.yaml +7 -7
  50. data/.data/spec/std/isa/csr/I/pmpaddr23.yaml +7 -7
  51. data/.data/spec/std/isa/csr/I/pmpaddr24.yaml +7 -7
  52. data/.data/spec/std/isa/csr/I/pmpaddr25.yaml +7 -7
  53. data/.data/spec/std/isa/csr/I/pmpaddr26.yaml +7 -7
  54. data/.data/spec/std/isa/csr/I/pmpaddr27.yaml +7 -7
  55. data/.data/spec/std/isa/csr/I/pmpaddr28.yaml +7 -7
  56. data/.data/spec/std/isa/csr/I/pmpaddr29.yaml +7 -7
  57. data/.data/spec/std/isa/csr/I/pmpaddr3.yaml +7 -7
  58. data/.data/spec/std/isa/csr/I/pmpaddr30.yaml +7 -7
  59. data/.data/spec/std/isa/csr/I/pmpaddr31.yaml +7 -7
  60. data/.data/spec/std/isa/csr/I/pmpaddr32.yaml +7 -7
  61. data/.data/spec/std/isa/csr/I/pmpaddr33.yaml +7 -7
  62. data/.data/spec/std/isa/csr/I/pmpaddr34.yaml +7 -7
  63. data/.data/spec/std/isa/csr/I/pmpaddr35.yaml +7 -7
  64. data/.data/spec/std/isa/csr/I/pmpaddr36.yaml +7 -7
  65. data/.data/spec/std/isa/csr/I/pmpaddr37.yaml +7 -7
  66. data/.data/spec/std/isa/csr/I/pmpaddr38.yaml +7 -7
  67. data/.data/spec/std/isa/csr/I/pmpaddr39.yaml +7 -7
  68. data/.data/spec/std/isa/csr/I/pmpaddr4.yaml +7 -7
  69. data/.data/spec/std/isa/csr/I/pmpaddr40.yaml +7 -7
  70. data/.data/spec/std/isa/csr/I/pmpaddr41.yaml +7 -7
  71. data/.data/spec/std/isa/csr/I/pmpaddr42.yaml +7 -7
  72. data/.data/spec/std/isa/csr/I/pmpaddr43.yaml +7 -7
  73. data/.data/spec/std/isa/csr/I/pmpaddr44.yaml +7 -7
  74. data/.data/spec/std/isa/csr/I/pmpaddr45.yaml +7 -7
  75. data/.data/spec/std/isa/csr/I/pmpaddr46.yaml +7 -7
  76. data/.data/spec/std/isa/csr/I/pmpaddr47.yaml +7 -7
  77. data/.data/spec/std/isa/csr/I/pmpaddr48.yaml +7 -7
  78. data/.data/spec/std/isa/csr/I/pmpaddr49.yaml +7 -7
  79. data/.data/spec/std/isa/csr/I/pmpaddr5.yaml +7 -7
  80. data/.data/spec/std/isa/csr/I/pmpaddr50.yaml +7 -7
  81. data/.data/spec/std/isa/csr/I/pmpaddr51.yaml +7 -7
  82. data/.data/spec/std/isa/csr/I/pmpaddr52.yaml +7 -7
  83. data/.data/spec/std/isa/csr/I/pmpaddr53.yaml +7 -7
  84. data/.data/spec/std/isa/csr/I/pmpaddr54.yaml +7 -7
  85. data/.data/spec/std/isa/csr/I/pmpaddr55.yaml +7 -7
  86. data/.data/spec/std/isa/csr/I/pmpaddr56.yaml +7 -7
  87. data/.data/spec/std/isa/csr/I/pmpaddr57.yaml +7 -7
  88. data/.data/spec/std/isa/csr/I/pmpaddr58.yaml +7 -7
  89. data/.data/spec/std/isa/csr/I/pmpaddr59.yaml +7 -7
  90. data/.data/spec/std/isa/csr/I/pmpaddr6.yaml +7 -7
  91. data/.data/spec/std/isa/csr/I/pmpaddr60.yaml +7 -7
  92. data/.data/spec/std/isa/csr/I/pmpaddr61.yaml +7 -7
  93. data/.data/spec/std/isa/csr/I/pmpaddr62.yaml +7 -7
  94. data/.data/spec/std/isa/csr/I/pmpaddr63.yaml +7 -7
  95. data/.data/spec/std/isa/csr/I/pmpaddr7.yaml +7 -7
  96. data/.data/spec/std/isa/csr/I/pmpaddr8.yaml +7 -7
  97. data/.data/spec/std/isa/csr/I/pmpaddr9.yaml +7 -7
  98. data/.data/spec/std/isa/csr/I/pmpaddrN.layout +7 -7
  99. data/.data/spec/std/isa/csr/Smcdeleg/scountinhibit.layout +111 -0
  100. data/.data/spec/std/isa/csr/Smcdeleg/scountinhibit.yaml +840 -0
  101. data/.data/spec/std/isa/csr/Smcntrpmf/mcyclecfg.yaml +2 -0
  102. data/.data/spec/std/isa/csr/Smcntrpmf/mcyclecfgh.yaml +2 -0
  103. data/.data/spec/std/isa/csr/Smcntrpmf/minstretcfg.yaml +2 -0
  104. data/.data/spec/std/isa/csr/Smcntrpmf/minstretcfgh.yaml +2 -0
  105. data/.data/spec/std/isa/csr/Smcsrind/mireg.yaml +2 -2
  106. data/.data/spec/std/isa/csr/Smcsrind/mireg2.yaml +2 -2
  107. data/.data/spec/std/isa/csr/Smcsrind/mireg3.yaml +2 -2
  108. data/.data/spec/std/isa/csr/Smcsrind/mireg4.yaml +2 -2
  109. data/.data/spec/std/isa/csr/Smcsrind/mireg5.yaml +2 -2
  110. data/.data/spec/std/isa/csr/Smcsrind/mireg6.yaml +2 -2
  111. data/.data/spec/std/isa/csr/Smcsrind/sireg.yaml +2 -2
  112. data/.data/spec/std/isa/csr/Smcsrind/sireg2.yaml +2 -2
  113. data/.data/spec/std/isa/csr/Smcsrind/sireg3.yaml +2 -2
  114. data/.data/spec/std/isa/csr/Smcsrind/sireg4.yaml +2 -2
  115. data/.data/spec/std/isa/csr/Smcsrind/sireg5.yaml +2 -2
  116. data/.data/spec/std/isa/csr/Smcsrind/sireg6.yaml +2 -2
  117. data/.data/spec/std/isa/csr/Smcsrind/vsireg.yaml +2 -2
  118. data/.data/spec/std/isa/csr/Smcsrind/vsireg2.yaml +2 -2
  119. data/.data/spec/std/isa/csr/Smcsrind/vsireg3.yaml +2 -2
  120. data/.data/spec/std/isa/csr/Smcsrind/vsireg4.yaml +2 -2
  121. data/.data/spec/std/isa/csr/Smcsrind/vsireg5.yaml +2 -2
  122. data/.data/spec/std/isa/csr/Smcsrind/vsireg6.yaml +2 -2
  123. data/.data/spec/std/isa/csr/Smctr/sctrctl.yaml +1 -1
  124. data/.data/spec/std/isa/csr/Smctr/sctrdepth.yaml +43 -0
  125. data/.data/spec/std/isa/csr/Smctr/sctrstatus.yaml +37 -0
  126. data/.data/spec/std/isa/csr/Smctr/vsctrctl.yaml +3 -1
  127. data/.data/spec/std/isa/csr/Sscofpmf/scountovf.layout +7 -0
  128. data/.data/spec/std/isa/csr/Sscofpmf/scountovf.yaml +7 -0
  129. data/.data/spec/std/isa/csr/Sstc/stimecmp.yaml +42 -0
  130. data/.data/spec/std/isa/csr/Sstc/stimecmph.yaml +43 -0
  131. data/.data/spec/std/isa/csr/Sstc/vstimecmp.yaml +45 -0
  132. data/.data/spec/std/isa/csr/Sstc/vstimecmph.yaml +46 -0
  133. data/.data/spec/std/isa/csr/V/vcsr.yaml +1 -1
  134. data/.data/spec/std/isa/csr/V/vl.yaml +1 -1
  135. data/.data/spec/std/isa/csr/V/vlenb.yaml +1 -1
  136. data/.data/spec/std/isa/csr/V/vstart.yaml +1 -1
  137. data/.data/spec/std/isa/csr/V/vtype.yaml +20 -1
  138. data/.data/spec/std/isa/csr/V/vxrm.yaml +1 -1
  139. data/.data/spec/std/isa/csr/V/vxsat.yaml +1 -1
  140. data/.data/spec/std/isa/csr/Zicntr/mcountinhibit.layout +1 -15
  141. data/.data/spec/std/isa/csr/Zicntr/mcountinhibit.yaml +29 -267
  142. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter10.yaml +4 -7
  143. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter10h.yaml +2 -4
  144. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter11.yaml +4 -7
  145. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter11h.yaml +2 -4
  146. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter12.yaml +4 -7
  147. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter12h.yaml +2 -4
  148. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter13.yaml +4 -7
  149. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter13h.yaml +2 -4
  150. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter14.yaml +4 -7
  151. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter14h.yaml +2 -4
  152. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter15.yaml +4 -7
  153. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter15h.yaml +2 -4
  154. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter16.yaml +4 -7
  155. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter16h.yaml +2 -4
  156. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter17.yaml +4 -7
  157. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter17h.yaml +2 -4
  158. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter18.yaml +4 -7
  159. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter18h.yaml +2 -4
  160. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter19.yaml +4 -7
  161. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter19h.yaml +2 -4
  162. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter20.yaml +4 -7
  163. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter20h.yaml +2 -4
  164. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter21.yaml +4 -7
  165. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter21h.yaml +2 -4
  166. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter22.yaml +4 -7
  167. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter22h.yaml +2 -4
  168. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter23.yaml +4 -7
  169. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter23h.yaml +2 -4
  170. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter24.yaml +4 -7
  171. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter24h.yaml +2 -4
  172. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter25.yaml +4 -7
  173. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter25h.yaml +2 -4
  174. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter26.yaml +4 -7
  175. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter26h.yaml +2 -4
  176. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter27.yaml +4 -7
  177. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter27h.yaml +2 -4
  178. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter28.yaml +4 -7
  179. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter28h.yaml +2 -4
  180. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter29.yaml +4 -7
  181. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter29h.yaml +2 -4
  182. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter3.yaml +4 -7
  183. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter30.yaml +4 -7
  184. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter30h.yaml +2 -4
  185. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter31.yaml +4 -7
  186. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter31h.yaml +2 -4
  187. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter3h.yaml +2 -4
  188. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter4.yaml +4 -7
  189. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter4h.yaml +2 -4
  190. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter5.yaml +4 -7
  191. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter5h.yaml +2 -4
  192. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter6.yaml +4 -7
  193. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter6h.yaml +2 -4
  194. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter7.yaml +4 -7
  195. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter7h.yaml +2 -4
  196. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter8.yaml +4 -7
  197. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter8h.yaml +2 -4
  198. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter9.yaml +4 -7
  199. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter9h.yaml +2 -4
  200. data/.data/spec/std/isa/csr/Zihpm/mhpmcounterN.layout +4 -7
  201. data/.data/spec/std/isa/csr/Zihpm/mhpmcounterNh.layout +2 -4
  202. data/.data/spec/std/isa/csr/Zihpm/mhpmevent10.yaml +4 -7
  203. data/.data/spec/std/isa/csr/Zihpm/mhpmevent10h.yaml +4 -4
  204. data/.data/spec/std/isa/csr/Zihpm/mhpmevent11.yaml +4 -7
  205. data/.data/spec/std/isa/csr/Zihpm/mhpmevent11h.yaml +4 -4
  206. data/.data/spec/std/isa/csr/Zihpm/mhpmevent12.yaml +4 -7
  207. data/.data/spec/std/isa/csr/Zihpm/mhpmevent12h.yaml +4 -4
  208. data/.data/spec/std/isa/csr/Zihpm/mhpmevent13.yaml +4 -7
  209. data/.data/spec/std/isa/csr/Zihpm/mhpmevent13h.yaml +4 -4
  210. data/.data/spec/std/isa/csr/Zihpm/mhpmevent14.yaml +4 -7
  211. data/.data/spec/std/isa/csr/Zihpm/mhpmevent14h.yaml +4 -4
  212. data/.data/spec/std/isa/csr/Zihpm/mhpmevent15.yaml +4 -7
  213. data/.data/spec/std/isa/csr/Zihpm/mhpmevent15h.yaml +4 -4
  214. data/.data/spec/std/isa/csr/Zihpm/mhpmevent16.yaml +4 -7
  215. data/.data/spec/std/isa/csr/Zihpm/mhpmevent16h.yaml +4 -4
  216. data/.data/spec/std/isa/csr/Zihpm/mhpmevent17.yaml +4 -7
  217. data/.data/spec/std/isa/csr/Zihpm/mhpmevent17h.yaml +4 -4
  218. data/.data/spec/std/isa/csr/Zihpm/mhpmevent18.yaml +4 -7
  219. data/.data/spec/std/isa/csr/Zihpm/mhpmevent18h.yaml +4 -4
  220. data/.data/spec/std/isa/csr/Zihpm/mhpmevent19.yaml +4 -7
  221. data/.data/spec/std/isa/csr/Zihpm/mhpmevent19h.yaml +4 -4
  222. data/.data/spec/std/isa/csr/Zihpm/mhpmevent20.yaml +4 -7
  223. data/.data/spec/std/isa/csr/Zihpm/mhpmevent20h.yaml +4 -4
  224. data/.data/spec/std/isa/csr/Zihpm/mhpmevent21.yaml +4 -7
  225. data/.data/spec/std/isa/csr/Zihpm/mhpmevent21h.yaml +4 -4
  226. data/.data/spec/std/isa/csr/Zihpm/mhpmevent22.yaml +4 -7
  227. data/.data/spec/std/isa/csr/Zihpm/mhpmevent22h.yaml +4 -4
  228. data/.data/spec/std/isa/csr/Zihpm/mhpmevent23.yaml +4 -7
  229. data/.data/spec/std/isa/csr/Zihpm/mhpmevent23h.yaml +4 -4
  230. data/.data/spec/std/isa/csr/Zihpm/mhpmevent24.yaml +4 -7
  231. data/.data/spec/std/isa/csr/Zihpm/mhpmevent24h.yaml +4 -4
  232. data/.data/spec/std/isa/csr/Zihpm/mhpmevent25.yaml +4 -7
  233. data/.data/spec/std/isa/csr/Zihpm/mhpmevent25h.yaml +4 -4
  234. data/.data/spec/std/isa/csr/Zihpm/mhpmevent26.yaml +4 -7
  235. data/.data/spec/std/isa/csr/Zihpm/mhpmevent26h.yaml +4 -4
  236. data/.data/spec/std/isa/csr/Zihpm/mhpmevent27.yaml +4 -7
  237. data/.data/spec/std/isa/csr/Zihpm/mhpmevent27h.yaml +4 -4
  238. data/.data/spec/std/isa/csr/Zihpm/mhpmevent28.yaml +4 -7
  239. data/.data/spec/std/isa/csr/Zihpm/mhpmevent28h.yaml +4 -4
  240. data/.data/spec/std/isa/csr/Zihpm/mhpmevent29.yaml +4 -7
  241. data/.data/spec/std/isa/csr/Zihpm/mhpmevent29h.yaml +4 -4
  242. data/.data/spec/std/isa/csr/Zihpm/mhpmevent3.yaml +4 -7
  243. data/.data/spec/std/isa/csr/Zihpm/mhpmevent30.yaml +4 -7
  244. data/.data/spec/std/isa/csr/Zihpm/mhpmevent30h.yaml +4 -4
  245. data/.data/spec/std/isa/csr/Zihpm/mhpmevent31.yaml +4 -7
  246. data/.data/spec/std/isa/csr/Zihpm/mhpmevent31h.yaml +4 -4
  247. data/.data/spec/std/isa/csr/Zihpm/mhpmevent3h.yaml +4 -4
  248. data/.data/spec/std/isa/csr/Zihpm/mhpmevent4.yaml +4 -7
  249. data/.data/spec/std/isa/csr/Zihpm/mhpmevent4h.yaml +4 -4
  250. data/.data/spec/std/isa/csr/Zihpm/mhpmevent5.yaml +4 -7
  251. data/.data/spec/std/isa/csr/Zihpm/mhpmevent5h.yaml +4 -4
  252. data/.data/spec/std/isa/csr/Zihpm/mhpmevent6.yaml +4 -7
  253. data/.data/spec/std/isa/csr/Zihpm/mhpmevent6h.yaml +4 -4
  254. data/.data/spec/std/isa/csr/Zihpm/mhpmevent7.yaml +4 -7
  255. data/.data/spec/std/isa/csr/Zihpm/mhpmevent7h.yaml +4 -4
  256. data/.data/spec/std/isa/csr/Zihpm/mhpmevent8.yaml +4 -7
  257. data/.data/spec/std/isa/csr/Zihpm/mhpmevent8h.yaml +4 -4
  258. data/.data/spec/std/isa/csr/Zihpm/mhpmevent9.yaml +4 -7
  259. data/.data/spec/std/isa/csr/Zihpm/mhpmevent9h.yaml +4 -4
  260. data/.data/spec/std/isa/csr/Zihpm/mhpmeventN.layout +4 -7
  261. data/.data/spec/std/isa/csr/Zihpm/mhpmeventNh.layout +4 -4
  262. data/.data/spec/std/isa/csr/Zkr/seed.yaml +75 -0
  263. data/.data/spec/std/isa/csr/hcontext.yaml +4 -4
  264. data/.data/spec/std/isa/csr/mcontext.yaml +4 -4
  265. data/.data/spec/std/isa/csr/mcycle.yaml +2 -0
  266. data/.data/spec/std/isa/csr/mcycleh.yaml +2 -0
  267. data/.data/spec/std/isa/csr/medeleg.yaml +72 -36
  268. data/.data/spec/std/isa/csr/menvcfg.yaml +12 -1
  269. data/.data/spec/std/isa/csr/menvcfgh.yaml +12 -0
  270. data/.data/spec/std/isa/csr/mideleg.yaml +37 -12
  271. data/.data/spec/std/isa/csr/mie.yaml +12 -6
  272. data/.data/spec/std/isa/csr/minstret.yaml +2 -0
  273. data/.data/spec/std/isa/csr/minstreth.yaml +2 -0
  274. data/.data/spec/std/isa/csr/mip.yaml +15 -7
  275. data/.data/spec/std/isa/csr/misa.yaml +14 -30
  276. data/.data/spec/std/isa/csr/mseccfg.yaml +27 -1
  277. data/.data/spec/std/isa/csr/mstatus.yaml +10 -4
  278. data/.data/spec/std/isa/csr/schema.adoc +10 -4
  279. data/.data/spec/std/isa/csr/scontext.yaml +8 -4
  280. data/.data/spec/std/isa/csr/senvcfg.yaml +6 -12
  281. data/.data/spec/std/isa/csr/sstateen0.yaml +1 -1
  282. data/.data/spec/std/isa/csr/sstateen1.yaml +2 -3
  283. data/.data/spec/std/isa/csr/sstateen2.yaml +2 -3
  284. data/.data/spec/std/isa/csr/sstateen3.yaml +2 -3
  285. data/.data/spec/std/isa/csr/tcontrol.yaml +41 -0
  286. data/.data/spec/std/isa/csr/tdata2.yaml +6 -2
  287. data/.data/spec/std/isa/csr/tdata3.yaml +6 -2
  288. data/.data/spec/std/isa/csr/tinfo.yaml +44 -0
  289. data/.data/spec/std/isa/ext/Sdext.yaml +58 -2
  290. data/.data/spec/std/isa/ext/Sm.yaml +2 -2
  291. data/.data/spec/std/isa/ext/Smcdeleg.yaml +7 -0
  292. data/.data/spec/std/isa/ext/Smctr.yaml +1 -1
  293. data/.data/spec/std/isa/ext/Smmpm.yaml +8 -0
  294. data/.data/spec/std/isa/ext/Smnpm.yaml +19 -0
  295. data/.data/spec/std/isa/ext/Smpmpdeleg.yaml +33 -0
  296. data/.data/spec/std/isa/ext/Ssccfg.yaml +7 -0
  297. data/.data/spec/std/isa/ext/Ssctr.yaml +1 -1
  298. data/.data/spec/std/isa/ext/Ssnpm.yaml +8 -0
  299. data/.data/spec/std/isa/ext/Sspmp.yaml +44 -0
  300. data/.data/spec/std/isa/ext/Sspmpen.yaml +30 -0
  301. data/.data/spec/std/isa/ext/Ssstrict.yaml +2 -2
  302. data/.data/spec/std/isa/ext/Sv32.yaml +2 -2
  303. data/.data/spec/std/isa/ext/Svpbmt.yaml +2 -2
  304. data/.data/spec/std/isa/ext/Zaamo.yaml +1 -1
  305. data/.data/spec/std/isa/ext/Zbc.yaml +4 -0
  306. data/.data/spec/std/isa/ext/Zvabd.yaml +5 -1
  307. data/.data/spec/std/isa/ext/Zvfbdota32f.yaml +23 -0
  308. data/.data/spec/std/isa/ext/Zvfbfa.yaml +24 -0
  309. data/.data/spec/std/isa/ext/Zvfofp4min.yaml +21 -0
  310. data/.data/spec/std/isa/ext/Zvfofp8min.yaml +20 -0
  311. data/.data/spec/std/isa/ext/Zvzip.yaml +24 -0
  312. data/.data/spec/std/isa/inst/B/andn.yaml +0 -4
  313. data/.data/spec/std/isa/inst/B/orn.yaml +0 -4
  314. data/.data/spec/std/isa/inst/B/rev8.yaml +0 -4
  315. data/.data/spec/std/isa/inst/B/rol.yaml +0 -4
  316. data/.data/spec/std/isa/inst/B/rolw.yaml +0 -4
  317. data/.data/spec/std/isa/inst/B/ror.yaml +0 -4
  318. data/.data/spec/std/isa/inst/B/rori.yaml +0 -4
  319. data/.data/spec/std/isa/inst/B/roriw.yaml +0 -4
  320. data/.data/spec/std/isa/inst/B/rorw.yaml +0 -4
  321. data/.data/spec/std/isa/inst/B/xnor.yaml +0 -4
  322. data/.data/spec/std/isa/inst/C/c.addi.yaml +2 -2
  323. data/.data/spec/std/isa/inst/C/c.addi16sp.yaml +2 -2
  324. data/.data/spec/std/isa/inst/C/c.addi4spn.yaml +2 -2
  325. data/.data/spec/std/isa/inst/C/c.addiw.yaml +2 -2
  326. data/.data/spec/std/isa/inst/C/c.beqz.yaml +2 -2
  327. data/.data/spec/std/isa/inst/C/c.bnez.yaml +4 -4
  328. data/.data/spec/std/isa/inst/C/c.ebreak.yaml +2 -2
  329. data/.data/spec/std/isa/inst/C/c.j.yaml +2 -2
  330. data/.data/spec/std/isa/inst/C/c.jal.yaml +2 -2
  331. data/.data/spec/std/isa/inst/C/c.jalr.yaml +2 -2
  332. data/.data/spec/std/isa/inst/C/c.jr.yaml +2 -2
  333. data/.data/spec/std/isa/inst/C/c.ld.yaml +2 -2
  334. data/.data/spec/std/isa/inst/C/c.ldsp.yaml +2 -2
  335. data/.data/spec/std/isa/inst/C/c.li.yaml +2 -2
  336. data/.data/spec/std/isa/inst/C/c.lui.yaml +2 -2
  337. data/.data/spec/std/isa/inst/C/c.lw.yaml +2 -2
  338. data/.data/spec/std/isa/inst/C/c.lwsp.yaml +2 -2
  339. data/.data/spec/std/isa/inst/C/c.mv.yaml +2 -2
  340. data/.data/spec/std/isa/inst/C/c.nop.yaml +2 -2
  341. data/.data/spec/std/isa/inst/C/c.sd.yaml +2 -2
  342. data/.data/spec/std/isa/inst/C/c.sdsp.yaml +5 -5
  343. data/.data/spec/std/isa/inst/C/c.sw.yaml +2 -2
  344. data/.data/spec/std/isa/inst/C/c.swsp.yaml +2 -2
  345. data/.data/spec/std/isa/inst/H/hlv.b.yaml +1 -1
  346. data/.data/spec/std/isa/inst/H/hlv.bu.yaml +1 -1
  347. data/.data/spec/std/isa/inst/H/hlv.d.yaml +1 -1
  348. data/.data/spec/std/isa/inst/H/hlv.h.yaml +1 -1
  349. data/.data/spec/std/isa/inst/H/hlv.hu.yaml +1 -1
  350. data/.data/spec/std/isa/inst/H/hlv.w.yaml +1 -1
  351. data/.data/spec/std/isa/inst/H/hlv.wu.yaml +1 -1
  352. data/.data/spec/std/isa/inst/H/hlvx.hu.yaml +1 -1
  353. data/.data/spec/std/isa/inst/H/hlvx.wu.yaml +1 -1
  354. data/.data/spec/std/isa/inst/H/hsv.b.yaml +1 -1
  355. data/.data/spec/std/isa/inst/H/hsv.d.yaml +1 -1
  356. data/.data/spec/std/isa/inst/H/hsv.h.yaml +1 -1
  357. data/.data/spec/std/isa/inst/H/hsv.w.yaml +1 -1
  358. data/.data/spec/std/isa/inst/I/ld.yaml +18 -12
  359. data/.data/spec/std/isa/inst/I/sd.yaml +18 -12
  360. data/.data/spec/std/isa/inst/I/wfi.yaml +1 -1
  361. data/.data/spec/std/isa/inst/M/div.yaml +2 -2
  362. data/.data/spec/std/isa/inst/M/divu.yaml +2 -2
  363. data/.data/spec/std/isa/inst/M/divuw.yaml +2 -2
  364. data/.data/spec/std/isa/inst/M/divw.yaml +2 -2
  365. data/.data/spec/std/isa/inst/M/mul.yaml +0 -4
  366. data/.data/spec/std/isa/inst/M/mulh.yaml +0 -4
  367. data/.data/spec/std/isa/inst/M/mulhsu.yaml +0 -4
  368. data/.data/spec/std/isa/inst/M/mulhu.yaml +0 -4
  369. data/.data/spec/std/isa/inst/M/mulw.yaml +0 -4
  370. data/.data/spec/std/isa/inst/M/rem.yaml +2 -2
  371. data/.data/spec/std/isa/inst/M/remu.yaml +2 -2
  372. data/.data/spec/std/isa/inst/M/remuw.yaml +2 -2
  373. data/.data/spec/std/isa/inst/M/remw.yaml +2 -2
  374. data/.data/spec/std/isa/inst/Q/fcvt.q.d.yaml +1 -1
  375. data/.data/spec/std/isa/inst/Q/flq.yaml +1 -1
  376. data/.data/spec/std/isa/inst/Sdext/dret.yaml +72 -6
  377. data/.data/spec/std/isa/inst/V/vfadd.vf.yaml +3 -1
  378. data/.data/spec/std/isa/inst/V/vfadd.vv.yaml +3 -1
  379. data/.data/spec/std/isa/inst/V/vfclass.v.yaml +3 -1
  380. data/.data/spec/std/isa/inst/V/vfmacc.vf.yaml +3 -1
  381. data/.data/spec/std/isa/inst/V/vfmacc.vv.yaml +3 -1
  382. data/.data/spec/std/isa/inst/V/vfmadd.vf.yaml +3 -1
  383. data/.data/spec/std/isa/inst/V/vfmadd.vv.yaml +3 -1
  384. data/.data/spec/std/isa/inst/V/vfmax.vf.yaml +3 -1
  385. data/.data/spec/std/isa/inst/V/vfmax.vv.yaml +3 -1
  386. data/.data/spec/std/isa/inst/V/vfmerge.vfm.yaml +3 -1
  387. data/.data/spec/std/isa/inst/V/vfmin.vf.yaml +3 -1
  388. data/.data/spec/std/isa/inst/V/vfmin.vv.yaml +3 -1
  389. data/.data/spec/std/isa/inst/V/vfmsac.vf.yaml +3 -1
  390. data/.data/spec/std/isa/inst/V/vfmsac.vv.yaml +3 -1
  391. data/.data/spec/std/isa/inst/V/vfmsub.vf.yaml +3 -1
  392. data/.data/spec/std/isa/inst/V/vfmsub.vv.yaml +3 -1
  393. data/.data/spec/std/isa/inst/V/vfmul.vf.yaml +3 -1
  394. data/.data/spec/std/isa/inst/V/vfmul.vv.yaml +3 -1
  395. data/.data/spec/std/isa/inst/V/vfmv.f.s.yaml +3 -1
  396. data/.data/spec/std/isa/inst/V/vfmv.s.f.yaml +3 -1
  397. data/.data/spec/std/isa/inst/V/vfmv.v.f.yaml +3 -1
  398. data/.data/spec/std/isa/inst/V/vfncvt.f.f.w.yaml +5 -3
  399. data/.data/spec/std/isa/inst/V/vfncvt.f.x.w.yaml +2 -2
  400. data/.data/spec/std/isa/inst/V/vfncvt.f.xu.w.yaml +2 -2
  401. data/.data/spec/std/isa/inst/V/vfncvt.rod.f.f.w.yaml +5 -3
  402. data/.data/spec/std/isa/inst/V/vfncvt.rtz.x.f.w.yaml +5 -3
  403. data/.data/spec/std/isa/inst/V/vfncvt.rtz.xu.f.w.yaml +5 -3
  404. data/.data/spec/std/isa/inst/V/vfncvt.x.f.w.yaml +5 -3
  405. data/.data/spec/std/isa/inst/V/vfncvt.xu.f.w.yaml +5 -3
  406. data/.data/spec/std/isa/inst/V/vfnmacc.vf.yaml +3 -1
  407. data/.data/spec/std/isa/inst/V/vfnmacc.vv.yaml +3 -1
  408. data/.data/spec/std/isa/inst/V/vfnmadd.vf.yaml +3 -1
  409. data/.data/spec/std/isa/inst/V/vfnmadd.vv.yaml +3 -1
  410. data/.data/spec/std/isa/inst/V/vfnmsac.vf.yaml +3 -1
  411. data/.data/spec/std/isa/inst/V/vfnmsac.vv.yaml +3 -1
  412. data/.data/spec/std/isa/inst/V/vfnmsub.vf.yaml +3 -1
  413. data/.data/spec/std/isa/inst/V/vfnmsub.vv.yaml +3 -1
  414. data/.data/spec/std/isa/inst/V/vfrec7.v.yaml +3 -1
  415. data/.data/spec/std/isa/inst/V/vfrsqrt7.v.yaml +3 -1
  416. data/.data/spec/std/isa/inst/V/vfrsub.vf.yaml +3 -1
  417. data/.data/spec/std/isa/inst/V/vfsgnj.vf.yaml +3 -1
  418. data/.data/spec/std/isa/inst/V/vfsgnj.vv.yaml +3 -1
  419. data/.data/spec/std/isa/inst/V/vfsgnjn.vf.yaml +3 -1
  420. data/.data/spec/std/isa/inst/V/vfsgnjn.vv.yaml +3 -1
  421. data/.data/spec/std/isa/inst/V/vfsgnjx.vf.yaml +3 -1
  422. data/.data/spec/std/isa/inst/V/vfsgnjx.vv.yaml +3 -1
  423. data/.data/spec/std/isa/inst/V/vfslide1down.vf.yaml +3 -1
  424. data/.data/spec/std/isa/inst/V/vfslide1up.vf.yaml +3 -1
  425. data/.data/spec/std/isa/inst/V/vfsub.vf.yaml +3 -1
  426. data/.data/spec/std/isa/inst/V/vfsub.vv.yaml +3 -1
  427. data/.data/spec/std/isa/inst/V/vfwadd.vf.yaml +3 -1
  428. data/.data/spec/std/isa/inst/V/vfwadd.vv.yaml +3 -1
  429. data/.data/spec/std/isa/inst/V/vfwadd.wf.yaml +3 -1
  430. data/.data/spec/std/isa/inst/V/vfwadd.wv.yaml +3 -1
  431. data/.data/spec/std/isa/inst/V/vfwcvt.f.f.v.yaml +3 -1
  432. data/.data/spec/std/isa/inst/V/vfwcvt.f.x.v.yaml +3 -1
  433. data/.data/spec/std/isa/inst/V/vfwcvt.f.xu.v.yaml +3 -1
  434. data/.data/spec/std/isa/inst/V/vfwmacc.vf.yaml +3 -1
  435. data/.data/spec/std/isa/inst/V/vfwmacc.vv.yaml +3 -1
  436. data/.data/spec/std/isa/inst/V/vfwmsac.vf.yaml +3 -1
  437. data/.data/spec/std/isa/inst/V/vfwmsac.vv.yaml +3 -1
  438. data/.data/spec/std/isa/inst/V/vfwmul.vf.yaml +3 -1
  439. data/.data/spec/std/isa/inst/V/vfwmul.vv.yaml +3 -1
  440. data/.data/spec/std/isa/inst/V/vfwnmacc.vf.yaml +3 -1
  441. data/.data/spec/std/isa/inst/V/vfwnmacc.vv.yaml +3 -1
  442. data/.data/spec/std/isa/inst/V/vfwnmsac.vf.yaml +3 -1
  443. data/.data/spec/std/isa/inst/V/vfwnmsac.vv.yaml +3 -1
  444. data/.data/spec/std/isa/inst/V/vfwsub.vf.yaml +3 -1
  445. data/.data/spec/std/isa/inst/V/vfwsub.vv.yaml +3 -1
  446. data/.data/spec/std/isa/inst/V/vfwsub.wf.yaml +3 -1
  447. data/.data/spec/std/isa/inst/V/vfwsub.wv.yaml +3 -1
  448. data/.data/spec/std/isa/inst/V/vmfeq.vf.yaml +3 -1
  449. data/.data/spec/std/isa/inst/V/vmfeq.vv.yaml +3 -1
  450. data/.data/spec/std/isa/inst/V/vmfge.vf.yaml +3 -1
  451. data/.data/spec/std/isa/inst/V/vmfgt.vf.yaml +3 -1
  452. data/.data/spec/std/isa/inst/V/vmfle.vf.yaml +3 -1
  453. data/.data/spec/std/isa/inst/V/vmfle.vv.yaml +3 -1
  454. data/.data/spec/std/isa/inst/V/vmflt.vf.yaml +3 -1
  455. data/.data/spec/std/isa/inst/V/vmflt.vv.yaml +3 -1
  456. data/.data/spec/std/isa/inst/V/vmfne.vf.yaml +3 -1
  457. data/.data/spec/std/isa/inst/V/vmfne.vv.yaml +3 -1
  458. data/.data/spec/std/isa/inst/V/vnclip.wi.yaml +2 -2
  459. data/.data/spec/std/isa/inst/V/vnclip.wv.yaml +2 -2
  460. data/.data/spec/std/isa/inst/V/vnclip.wx.yaml +2 -2
  461. data/.data/spec/std/isa/inst/V/vnclipu.wi.yaml +2 -2
  462. data/.data/spec/std/isa/inst/V/vnclipu.wv.yaml +2 -2
  463. data/.data/spec/std/isa/inst/V/vnclipu.wx.yaml +2 -2
  464. data/.data/spec/std/isa/inst/V/vnsra.wi.yaml +2 -2
  465. data/.data/spec/std/isa/inst/V/vnsra.wv.yaml +2 -2
  466. data/.data/spec/std/isa/inst/V/vnsra.wx.yaml +2 -2
  467. data/.data/spec/std/isa/inst/V/vnsrl.wi.yaml +2 -2
  468. data/.data/spec/std/isa/inst/V/vnsrl.wv.yaml +2 -2
  469. data/.data/spec/std/isa/inst/V/vnsrl.wx.yaml +2 -2
  470. data/.data/spec/std/isa/inst/Zaamo/amoadd.SIZE.AQRL.layout +1 -5
  471. data/.data/spec/std/isa/inst/Zaamo/amoadd.d.aq.yaml +0 -4
  472. data/.data/spec/std/isa/inst/Zaamo/amoadd.d.aqrl.yaml +0 -4
  473. data/.data/spec/std/isa/inst/Zaamo/amoadd.d.rl.yaml +0 -4
  474. data/.data/spec/std/isa/inst/Zaamo/amoadd.d.yaml +0 -4
  475. data/.data/spec/std/isa/inst/Zaamo/amoadd.w.aq.yaml +1 -5
  476. data/.data/spec/std/isa/inst/Zaamo/amoadd.w.aqrl.yaml +1 -5
  477. data/.data/spec/std/isa/inst/Zaamo/amoadd.w.rl.yaml +1 -5
  478. data/.data/spec/std/isa/inst/Zaamo/amoadd.w.yaml +1 -5
  479. data/.data/spec/std/isa/inst/Zaamo/amoand.SIZE.AQRL.layout +1 -5
  480. data/.data/spec/std/isa/inst/Zaamo/amoand.d.aq.yaml +0 -4
  481. data/.data/spec/std/isa/inst/Zaamo/amoand.d.aqrl.yaml +0 -4
  482. data/.data/spec/std/isa/inst/Zaamo/amoand.d.rl.yaml +0 -4
  483. data/.data/spec/std/isa/inst/Zaamo/amoand.d.yaml +0 -4
  484. data/.data/spec/std/isa/inst/Zaamo/amoand.w.aq.yaml +1 -5
  485. data/.data/spec/std/isa/inst/Zaamo/amoand.w.aqrl.yaml +1 -5
  486. data/.data/spec/std/isa/inst/Zaamo/amoand.w.rl.yaml +1 -5
  487. data/.data/spec/std/isa/inst/Zaamo/amoand.w.yaml +1 -5
  488. data/.data/spec/std/isa/inst/Zaamo/amomax.SIZE.AQRL.layout +1 -5
  489. data/.data/spec/std/isa/inst/Zaamo/amomax.d.aq.yaml +0 -4
  490. data/.data/spec/std/isa/inst/Zaamo/amomax.d.aqrl.yaml +0 -4
  491. data/.data/spec/std/isa/inst/Zaamo/amomax.d.rl.yaml +0 -4
  492. data/.data/spec/std/isa/inst/Zaamo/amomax.d.yaml +0 -4
  493. data/.data/spec/std/isa/inst/Zaamo/amomax.w.aq.yaml +1 -5
  494. data/.data/spec/std/isa/inst/Zaamo/amomax.w.aqrl.yaml +1 -5
  495. data/.data/spec/std/isa/inst/Zaamo/amomax.w.rl.yaml +1 -5
  496. data/.data/spec/std/isa/inst/Zaamo/amomax.w.yaml +1 -5
  497. data/.data/spec/std/isa/inst/Zaamo/amomaxu.SIZE.AQRL.layout +1 -5
  498. data/.data/spec/std/isa/inst/Zaamo/amomaxu.d.aq.yaml +0 -4
  499. data/.data/spec/std/isa/inst/Zaamo/amomaxu.d.aqrl.yaml +0 -4
  500. data/.data/spec/std/isa/inst/Zaamo/amomaxu.d.rl.yaml +0 -4
  501. data/.data/spec/std/isa/inst/Zaamo/amomaxu.d.yaml +0 -4
  502. data/.data/spec/std/isa/inst/Zaamo/amomaxu.w.aq.yaml +1 -5
  503. data/.data/spec/std/isa/inst/Zaamo/amomaxu.w.aqrl.yaml +1 -5
  504. data/.data/spec/std/isa/inst/Zaamo/amomaxu.w.rl.yaml +1 -5
  505. data/.data/spec/std/isa/inst/Zaamo/amomaxu.w.yaml +1 -5
  506. data/.data/spec/std/isa/inst/Zaamo/amomin.SIZE.AQRL.layout +1 -5
  507. data/.data/spec/std/isa/inst/Zaamo/amomin.d.aq.yaml +0 -4
  508. data/.data/spec/std/isa/inst/Zaamo/amomin.d.aqrl.yaml +0 -4
  509. data/.data/spec/std/isa/inst/Zaamo/amomin.d.rl.yaml +0 -4
  510. data/.data/spec/std/isa/inst/Zaamo/amomin.d.yaml +0 -4
  511. data/.data/spec/std/isa/inst/Zaamo/amomin.w.aq.yaml +1 -5
  512. data/.data/spec/std/isa/inst/Zaamo/amomin.w.aqrl.yaml +1 -5
  513. data/.data/spec/std/isa/inst/Zaamo/amomin.w.rl.yaml +1 -5
  514. data/.data/spec/std/isa/inst/Zaamo/amomin.w.yaml +1 -5
  515. data/.data/spec/std/isa/inst/Zaamo/amominu.SIZE.AQRL.layout +1 -5
  516. data/.data/spec/std/isa/inst/Zaamo/amominu.d.aq.yaml +0 -4
  517. data/.data/spec/std/isa/inst/Zaamo/amominu.d.aqrl.yaml +0 -4
  518. data/.data/spec/std/isa/inst/Zaamo/amominu.d.rl.yaml +0 -4
  519. data/.data/spec/std/isa/inst/Zaamo/amominu.d.yaml +0 -4
  520. data/.data/spec/std/isa/inst/Zaamo/amominu.w.aq.yaml +1 -5
  521. data/.data/spec/std/isa/inst/Zaamo/amominu.w.aqrl.yaml +1 -5
  522. data/.data/spec/std/isa/inst/Zaamo/amominu.w.rl.yaml +1 -5
  523. data/.data/spec/std/isa/inst/Zaamo/amominu.w.yaml +1 -5
  524. data/.data/spec/std/isa/inst/Zaamo/amoor.SIZE.AQRL.layout +1 -5
  525. data/.data/spec/std/isa/inst/Zaamo/amoor.d.aq.yaml +0 -4
  526. data/.data/spec/std/isa/inst/Zaamo/amoor.d.aqrl.yaml +0 -4
  527. data/.data/spec/std/isa/inst/Zaamo/amoor.d.rl.yaml +0 -4
  528. data/.data/spec/std/isa/inst/Zaamo/amoor.d.yaml +0 -4
  529. data/.data/spec/std/isa/inst/Zaamo/amoor.w.aq.yaml +1 -5
  530. data/.data/spec/std/isa/inst/Zaamo/amoor.w.aqrl.yaml +1 -5
  531. data/.data/spec/std/isa/inst/Zaamo/amoor.w.rl.yaml +1 -5
  532. data/.data/spec/std/isa/inst/Zaamo/amoor.w.yaml +1 -5
  533. data/.data/spec/std/isa/inst/Zaamo/amoswap.SIZE.AQRL.layout +1 -5
  534. data/.data/spec/std/isa/inst/Zaamo/amoswap.d.aq.yaml +0 -4
  535. data/.data/spec/std/isa/inst/Zaamo/amoswap.d.aqrl.yaml +0 -4
  536. data/.data/spec/std/isa/inst/Zaamo/amoswap.d.rl.yaml +0 -4
  537. data/.data/spec/std/isa/inst/Zaamo/amoswap.d.yaml +0 -4
  538. data/.data/spec/std/isa/inst/Zaamo/amoswap.w.aq.yaml +1 -5
  539. data/.data/spec/std/isa/inst/Zaamo/amoswap.w.aqrl.yaml +1 -5
  540. data/.data/spec/std/isa/inst/Zaamo/amoswap.w.rl.yaml +1 -5
  541. data/.data/spec/std/isa/inst/Zaamo/amoswap.w.yaml +1 -5
  542. data/.data/spec/std/isa/inst/Zaamo/amoxor.SIZE.AQRL.layout +1 -5
  543. data/.data/spec/std/isa/inst/Zaamo/amoxor.d.aq.yaml +0 -4
  544. data/.data/spec/std/isa/inst/Zaamo/amoxor.d.aqrl.yaml +0 -4
  545. data/.data/spec/std/isa/inst/Zaamo/amoxor.d.rl.yaml +0 -4
  546. data/.data/spec/std/isa/inst/Zaamo/amoxor.d.yaml +0 -4
  547. data/.data/spec/std/isa/inst/Zaamo/amoxor.w.aq.yaml +1 -5
  548. data/.data/spec/std/isa/inst/Zaamo/amoxor.w.aqrl.yaml +1 -5
  549. data/.data/spec/std/isa/inst/Zaamo/amoxor.w.rl.yaml +1 -5
  550. data/.data/spec/std/isa/inst/Zaamo/amoxor.w.yaml +1 -5
  551. data/.data/spec/std/isa/inst/Zabha/amoadd.b.aq.yaml +1 -5
  552. data/.data/spec/std/isa/inst/Zabha/amoadd.b.aqrl.yaml +1 -5
  553. data/.data/spec/std/isa/inst/Zabha/amoadd.b.rl.yaml +1 -5
  554. data/.data/spec/std/isa/inst/Zabha/amoadd.b.yaml +1 -5
  555. data/.data/spec/std/isa/inst/Zabha/amoadd.h.aq.yaml +1 -5
  556. data/.data/spec/std/isa/inst/Zabha/amoadd.h.aqrl.yaml +1 -5
  557. data/.data/spec/std/isa/inst/Zabha/amoadd.h.rl.yaml +1 -5
  558. data/.data/spec/std/isa/inst/Zabha/amoadd.h.yaml +1 -5
  559. data/.data/spec/std/isa/inst/Zabha/amoand.b.aq.yaml +1 -5
  560. data/.data/spec/std/isa/inst/Zabha/amoand.b.aqrl.yaml +1 -5
  561. data/.data/spec/std/isa/inst/Zabha/amoand.b.rl.yaml +1 -5
  562. data/.data/spec/std/isa/inst/Zabha/amoand.b.yaml +1 -5
  563. data/.data/spec/std/isa/inst/Zabha/amoand.h.aq.yaml +1 -5
  564. data/.data/spec/std/isa/inst/Zabha/amoand.h.aqrl.yaml +1 -5
  565. data/.data/spec/std/isa/inst/Zabha/amoand.h.rl.yaml +1 -5
  566. data/.data/spec/std/isa/inst/Zabha/amoand.h.yaml +1 -5
  567. data/.data/spec/std/isa/inst/Zabha/amomax.b.aq.yaml +1 -5
  568. data/.data/spec/std/isa/inst/Zabha/amomax.b.aqrl.yaml +1 -5
  569. data/.data/spec/std/isa/inst/Zabha/amomax.b.rl.yaml +1 -5
  570. data/.data/spec/std/isa/inst/Zabha/amomax.b.yaml +1 -5
  571. data/.data/spec/std/isa/inst/Zabha/amomax.h.aq.yaml +1 -5
  572. data/.data/spec/std/isa/inst/Zabha/amomax.h.aqrl.yaml +1 -5
  573. data/.data/spec/std/isa/inst/Zabha/amomax.h.rl.yaml +1 -5
  574. data/.data/spec/std/isa/inst/Zabha/amomax.h.yaml +1 -5
  575. data/.data/spec/std/isa/inst/Zabha/amomaxu.b.aq.yaml +1 -5
  576. data/.data/spec/std/isa/inst/Zabha/amomaxu.b.aqrl.yaml +1 -5
  577. data/.data/spec/std/isa/inst/Zabha/amomaxu.b.rl.yaml +1 -5
  578. data/.data/spec/std/isa/inst/Zabha/amomaxu.b.yaml +1 -5
  579. data/.data/spec/std/isa/inst/Zabha/amomaxu.h.aq.yaml +1 -5
  580. data/.data/spec/std/isa/inst/Zabha/amomaxu.h.aqrl.yaml +1 -5
  581. data/.data/spec/std/isa/inst/Zabha/amomaxu.h.rl.yaml +1 -5
  582. data/.data/spec/std/isa/inst/Zabha/amomaxu.h.yaml +1 -5
  583. data/.data/spec/std/isa/inst/Zabha/amomin.b.aq.yaml +1 -5
  584. data/.data/spec/std/isa/inst/Zabha/amomin.b.aqrl.yaml +1 -5
  585. data/.data/spec/std/isa/inst/Zabha/amomin.b.rl.yaml +1 -5
  586. data/.data/spec/std/isa/inst/Zabha/amomin.b.yaml +1 -5
  587. data/.data/spec/std/isa/inst/Zabha/amomin.h.aq.yaml +1 -5
  588. data/.data/spec/std/isa/inst/Zabha/amomin.h.aqrl.yaml +1 -5
  589. data/.data/spec/std/isa/inst/Zabha/amomin.h.rl.yaml +1 -5
  590. data/.data/spec/std/isa/inst/Zabha/amomin.h.yaml +1 -5
  591. data/.data/spec/std/isa/inst/Zabha/amominu.b.aq.yaml +1 -5
  592. data/.data/spec/std/isa/inst/Zabha/amominu.b.aqrl.yaml +1 -5
  593. data/.data/spec/std/isa/inst/Zabha/amominu.b.rl.yaml +1 -5
  594. data/.data/spec/std/isa/inst/Zabha/amominu.b.yaml +1 -5
  595. data/.data/spec/std/isa/inst/Zabha/amominu.h.aq.yaml +1 -5
  596. data/.data/spec/std/isa/inst/Zabha/amominu.h.aqrl.yaml +1 -5
  597. data/.data/spec/std/isa/inst/Zabha/amominu.h.rl.yaml +1 -5
  598. data/.data/spec/std/isa/inst/Zabha/amominu.h.yaml +1 -5
  599. data/.data/spec/std/isa/inst/Zabha/amoor.b.aq.yaml +1 -5
  600. data/.data/spec/std/isa/inst/Zabha/amoor.b.aqrl.yaml +1 -5
  601. data/.data/spec/std/isa/inst/Zabha/amoor.b.rl.yaml +1 -5
  602. data/.data/spec/std/isa/inst/Zabha/amoor.b.yaml +1 -5
  603. data/.data/spec/std/isa/inst/Zabha/amoor.h.aq.yaml +1 -5
  604. data/.data/spec/std/isa/inst/Zabha/amoor.h.aqrl.yaml +1 -5
  605. data/.data/spec/std/isa/inst/Zabha/amoor.h.rl.yaml +1 -5
  606. data/.data/spec/std/isa/inst/Zabha/amoor.h.yaml +1 -5
  607. data/.data/spec/std/isa/inst/Zabha/amoswap.b.aq.yaml +1 -5
  608. data/.data/spec/std/isa/inst/Zabha/amoswap.b.aqrl.yaml +1 -5
  609. data/.data/spec/std/isa/inst/Zabha/amoswap.b.rl.yaml +1 -5
  610. data/.data/spec/std/isa/inst/Zabha/amoswap.b.yaml +1 -5
  611. data/.data/spec/std/isa/inst/Zabha/amoswap.h.aq.yaml +1 -5
  612. data/.data/spec/std/isa/inst/Zabha/amoswap.h.aqrl.yaml +1 -5
  613. data/.data/spec/std/isa/inst/Zabha/amoswap.h.rl.yaml +1 -5
  614. data/.data/spec/std/isa/inst/Zabha/amoswap.h.yaml +1 -5
  615. data/.data/spec/std/isa/inst/Zabha/amoxor.b.aq.yaml +1 -5
  616. data/.data/spec/std/isa/inst/Zabha/amoxor.b.aqrl.yaml +1 -5
  617. data/.data/spec/std/isa/inst/Zabha/amoxor.b.rl.yaml +1 -5
  618. data/.data/spec/std/isa/inst/Zabha/amoxor.b.yaml +1 -5
  619. data/.data/spec/std/isa/inst/Zabha/amoxor.h.aq.yaml +1 -5
  620. data/.data/spec/std/isa/inst/Zabha/amoxor.h.aqrl.yaml +1 -5
  621. data/.data/spec/std/isa/inst/Zabha/amoxor.h.rl.yaml +1 -5
  622. data/.data/spec/std/isa/inst/Zabha/amoxor.h.yaml +1 -5
  623. data/.data/spec/std/isa/inst/Zalrsc/lr.SIZE.AQRL.layout +1 -11
  624. data/.data/spec/std/isa/inst/Zalrsc/lr.d.aq.yaml +0 -6
  625. data/.data/spec/std/isa/inst/Zalrsc/lr.d.aqrl.yaml +0 -6
  626. data/.data/spec/std/isa/inst/Zalrsc/lr.d.rl.yaml +0 -6
  627. data/.data/spec/std/isa/inst/Zalrsc/lr.d.yaml +0 -6
  628. data/.data/spec/std/isa/inst/Zalrsc/lr.w.aq.yaml +1 -11
  629. data/.data/spec/std/isa/inst/Zalrsc/lr.w.aqrl.yaml +1 -11
  630. data/.data/spec/std/isa/inst/Zalrsc/lr.w.rl.yaml +1 -11
  631. data/.data/spec/std/isa/inst/Zalrsc/lr.w.yaml +1 -11
  632. data/.data/spec/std/isa/inst/Zalrsc/sc.SIZE.AQRL.layout +4 -10
  633. data/.data/spec/std/isa/inst/Zalrsc/sc.d.aq.yaml +4 -10
  634. data/.data/spec/std/isa/inst/Zalrsc/sc.d.aqrl.yaml +4 -10
  635. data/.data/spec/std/isa/inst/Zalrsc/sc.d.rl.yaml +4 -10
  636. data/.data/spec/std/isa/inst/Zalrsc/sc.d.yaml +4 -10
  637. data/.data/spec/std/isa/inst/Zalrsc/sc.w.aq.yaml +4 -10
  638. data/.data/spec/std/isa/inst/Zalrsc/sc.w.aqrl.yaml +4 -10
  639. data/.data/spec/std/isa/inst/Zalrsc/sc.w.rl.yaml +4 -10
  640. data/.data/spec/std/isa/inst/Zalrsc/sc.w.yaml +4 -10
  641. data/.data/spec/std/isa/inst/Zba/add.uw.yaml +0 -4
  642. data/.data/spec/std/isa/inst/Zba/sh1add.uw.yaml +0 -4
  643. data/.data/spec/std/isa/inst/Zba/sh1add.yaml +0 -4
  644. data/.data/spec/std/isa/inst/Zba/sh2add.uw.yaml +0 -4
  645. data/.data/spec/std/isa/inst/Zba/sh2add.yaml +0 -4
  646. data/.data/spec/std/isa/inst/Zba/sh3add.uw.yaml +0 -4
  647. data/.data/spec/std/isa/inst/Zba/sh3add.yaml +0 -4
  648. data/.data/spec/std/isa/inst/Zba/slli.uw.yaml +0 -4
  649. data/.data/spec/std/isa/inst/Zbb/clz.yaml +0 -4
  650. data/.data/spec/std/isa/inst/Zbb/clzw.yaml +0 -4
  651. data/.data/spec/std/isa/inst/Zbb/cpop.yaml +0 -4
  652. data/.data/spec/std/isa/inst/Zbb/cpopw.yaml +0 -4
  653. data/.data/spec/std/isa/inst/Zbb/ctz.yaml +0 -4
  654. data/.data/spec/std/isa/inst/Zbb/ctzw.yaml +0 -4
  655. data/.data/spec/std/isa/inst/Zbb/max.yaml +0 -4
  656. data/.data/spec/std/isa/inst/Zbb/maxu.yaml +0 -4
  657. data/.data/spec/std/isa/inst/Zbb/min.yaml +0 -4
  658. data/.data/spec/std/isa/inst/Zbb/minu.yaml +0 -4
  659. data/.data/spec/std/isa/inst/Zbb/orc.b.yaml +0 -4
  660. data/.data/spec/std/isa/inst/Zbb/sext.b.yaml +0 -4
  661. data/.data/spec/std/isa/inst/Zbb/sext.h.yaml +0 -4
  662. data/.data/spec/std/isa/inst/Zbb/zext.h.yaml +0 -4
  663. data/.data/spec/std/isa/inst/Zbc/clmulr.yaml +0 -4
  664. data/.data/spec/std/isa/inst/{B → Zbkc}/clmul.yaml +1 -7
  665. data/.data/spec/std/isa/inst/{B → Zbkc}/clmulh.yaml +1 -7
  666. data/.data/spec/std/isa/inst/Zbs/bclr.yaml +0 -4
  667. data/.data/spec/std/isa/inst/Zbs/bclri.yaml +0 -4
  668. data/.data/spec/std/isa/inst/Zbs/bext.yaml +0 -4
  669. data/.data/spec/std/isa/inst/Zbs/bexti.yaml +0 -4
  670. data/.data/spec/std/isa/inst/Zbs/binv.yaml +0 -4
  671. data/.data/spec/std/isa/inst/Zbs/binvi.yaml +0 -4
  672. data/.data/spec/std/isa/inst/Zbs/bset.yaml +0 -4
  673. data/.data/spec/std/isa/inst/Zbs/bseti.yaml +0 -4
  674. data/.data/spec/std/isa/inst/Zcb/c.lbu.yaml +2 -2
  675. data/.data/spec/std/isa/inst/Zcb/c.lh.yaml +2 -2
  676. data/.data/spec/std/isa/inst/Zcb/c.lhu.yaml +2 -2
  677. data/.data/spec/std/isa/inst/Zcb/c.mul.yaml +2 -6
  678. data/.data/spec/std/isa/inst/Zcb/c.not.yaml +2 -2
  679. data/.data/spec/std/isa/inst/Zcb/c.sb.yaml +2 -2
  680. data/.data/spec/std/isa/inst/Zcb/c.sext.b.yaml +2 -6
  681. data/.data/spec/std/isa/inst/Zcb/c.sext.h.yaml +2 -6
  682. data/.data/spec/std/isa/inst/Zcb/c.sh.yaml +2 -2
  683. data/.data/spec/std/isa/inst/Zcb/c.zext.b.yaml +2 -2
  684. data/.data/spec/std/isa/inst/Zcb/c.zext.h.yaml +2 -6
  685. data/.data/spec/std/isa/inst/Zcb/c.zext.w.yaml +2 -6
  686. data/.data/spec/std/isa/inst/Zcd/c.fld.yaml +3 -3
  687. data/.data/spec/std/isa/inst/Zcd/c.fldsp.yaml +4 -4
  688. data/.data/spec/std/isa/inst/Zcd/c.fsd.yaml +3 -3
  689. data/.data/spec/std/isa/inst/Zcd/c.fsdsp.yaml +4 -4
  690. data/.data/spec/std/isa/inst/Zcf/c.flw.yaml +3 -3
  691. data/.data/spec/std/isa/inst/Zcf/c.flwsp.yaml +4 -4
  692. data/.data/spec/std/isa/inst/Zcf/c.fsw.yaml +3 -3
  693. data/.data/spec/std/isa/inst/Zcf/c.fswsp.yaml +4 -4
  694. data/.data/spec/std/isa/inst/Zcmp/cm.mva01s.yaml +2 -2
  695. data/.data/spec/std/isa/inst/Zcmp/cm.mvsa01.yaml +2 -2
  696. data/.data/spec/std/isa/inst/Zcmp/cm.pop.yaml +2 -2
  697. data/.data/spec/std/isa/inst/Zcmp/cm.popret.yaml +2 -2
  698. data/.data/spec/std/isa/inst/Zcmp/cm.popretz.yaml +2 -2
  699. data/.data/spec/std/isa/inst/Zcmp/cm.push.yaml +2 -2
  700. data/.data/spec/std/isa/inst/Zfh/fcvt.h.s.yaml +28 -20
  701. data/.data/spec/std/isa/inst/Zfh/fcvt.s.h.yaml +35 -20
  702. data/.data/spec/std/isa/inst/Zicbom/cbo.clean.yaml +2 -2
  703. data/.data/spec/std/isa/inst/Zicbom/cbo.flush.yaml +2 -2
  704. data/.data/spec/std/isa/inst/Zicbom/cbo.inval.yaml +2 -2
  705. data/.data/spec/std/isa/inst/Zicboz/cbo.zero.yaml +2 -2
  706. data/.data/spec/std/isa/inst/Zvabd/vabd.vv.yaml +3 -3
  707. data/.data/spec/std/isa/inst/Zvabd/vabd.vx.yaml +69 -0
  708. data/.data/spec/std/isa/inst/Zvabd/vabdu.vv.yaml +3 -3
  709. data/.data/spec/std/isa/inst/Zvabd/{vabs.v.yaml → vabdu.vx.yaml} +17 -11
  710. data/.data/spec/std/isa/inst/Zvabd/vwabda.vv.yaml +1 -1
  711. data/.data/spec/std/isa/inst/Zvabd/vwabda.vx.yaml +73 -0
  712. data/.data/spec/std/isa/inst/Zvabd/vwabdau.vv.yaml +1 -1
  713. data/.data/spec/std/isa/inst/Zvabd/vwabdau.vx.yaml +74 -0
  714. data/.data/spec/std/isa/inst/Zvfbdota32f/vfbdota.vv.yaml +68 -0
  715. data/.data/spec/std/isa/inst/Zvfbfmin/vfncvtbf16.f.f.w.yaml +3 -1
  716. data/.data/spec/std/isa/inst/Zvfbfmin/vfwcvtbf16.f.f.v.yaml +3 -1
  717. data/.data/spec/std/isa/inst/Zvfofp4min/vfext.vf2.yaml +35 -0
  718. data/.data/spec/std/isa/inst/Zvfofp8min/vfncvt.f.f.q.yaml +31 -0
  719. data/.data/spec/std/isa/inst/Zvfofp8min/vfncvt.sat.f.f.q.yaml +32 -0
  720. data/.data/spec/std/isa/inst/Zvfofp8min/vfncvtbf16.sat.f.f.w.yaml +32 -0
  721. data/.data/spec/std/isa/inst/Zvzip/vpaire.vv.yaml +36 -0
  722. data/.data/spec/std/isa/inst/Zvzip/vpairo.vv.yaml +37 -0
  723. data/.data/spec/std/isa/inst/Zvzip/vunzipe.v.yaml +33 -0
  724. data/.data/spec/std/isa/inst/Zvzip/vunzipo.v.yaml +33 -0
  725. data/.data/spec/std/isa/inst/Zvzip/vzip.vv.yaml +37 -0
  726. data/.data/spec/std/isa/isa/builtin_functions.idl +54 -1
  727. data/.data/spec/std/isa/isa/globals.isa +117 -5
  728. data/.data/spec/std/isa/isa/util.idl +1 -0
  729. data/.data/spec/std/isa/param/COUNTINHIBIT_EN.yaml +2 -10
  730. data/.data/spec/std/isa/param/HCONTEXT_IMPLEMENTED.yaml +29 -0
  731. data/.data/spec/std/isa/param/HCOUNTENABLE_EN.yaml +2 -5
  732. data/.data/spec/std/isa/param/HPM_COUNTER10_WIDTH.yaml +29 -0
  733. data/.data/spec/std/isa/param/HPM_COUNTER11_WIDTH.yaml +29 -0
  734. data/.data/spec/std/isa/param/HPM_COUNTER12_WIDTH.yaml +29 -0
  735. data/.data/spec/std/isa/param/HPM_COUNTER13_WIDTH.yaml +29 -0
  736. data/.data/spec/std/isa/param/HPM_COUNTER14_WIDTH.yaml +29 -0
  737. data/.data/spec/std/isa/param/HPM_COUNTER15_WIDTH.yaml +29 -0
  738. data/.data/spec/std/isa/param/HPM_COUNTER16_WIDTH.yaml +29 -0
  739. data/.data/spec/std/isa/param/HPM_COUNTER17_WIDTH.yaml +29 -0
  740. data/.data/spec/std/isa/param/HPM_COUNTER18_WIDTH.yaml +29 -0
  741. data/.data/spec/std/isa/param/HPM_COUNTER19_WIDTH.yaml +29 -0
  742. data/.data/spec/std/isa/param/HPM_COUNTER20_WIDTH.yaml +29 -0
  743. data/.data/spec/std/isa/param/HPM_COUNTER21_WIDTH.yaml +29 -0
  744. data/.data/spec/std/isa/param/HPM_COUNTER22_WIDTH.yaml +29 -0
  745. data/.data/spec/std/isa/param/HPM_COUNTER23_WIDTH.yaml +29 -0
  746. data/.data/spec/std/isa/param/HPM_COUNTER24_WIDTH.yaml +29 -0
  747. data/.data/spec/std/isa/param/HPM_COUNTER25_WIDTH.yaml +29 -0
  748. data/.data/spec/std/isa/param/HPM_COUNTER26_WIDTH.yaml +29 -0
  749. data/.data/spec/std/isa/param/HPM_COUNTER27_WIDTH.yaml +29 -0
  750. data/.data/spec/std/isa/param/HPM_COUNTER28_WIDTH.yaml +29 -0
  751. data/.data/spec/std/isa/param/HPM_COUNTER29_WIDTH.yaml +29 -0
  752. data/.data/spec/std/isa/param/HPM_COUNTER30_WIDTH.yaml +29 -0
  753. data/.data/spec/std/isa/param/HPM_COUNTER31_WIDTH.yaml +29 -0
  754. data/.data/spec/std/isa/param/HPM_COUNTER3_WIDTH.yaml +29 -0
  755. data/.data/spec/std/isa/param/HPM_COUNTER4_WIDTH.yaml +29 -0
  756. data/.data/spec/std/isa/param/HPM_COUNTER5_WIDTH.yaml +29 -0
  757. data/.data/spec/std/isa/param/HPM_COUNTER6_WIDTH.yaml +29 -0
  758. data/.data/spec/std/isa/param/HPM_COUNTER7_WIDTH.yaml +29 -0
  759. data/.data/spec/std/isa/param/HPM_COUNTER8_WIDTH.yaml +29 -0
  760. data/.data/spec/std/isa/param/HPM_COUNTER9_WIDTH.yaml +29 -0
  761. data/.data/spec/std/isa/param/HPM_COUNTERN_WIDTH.layout +27 -0
  762. data/.data/spec/std/isa/param/HW_MSTATUS_FS_DIRTY_UPDATE.yaml +2 -4
  763. data/.data/spec/std/isa/param/HW_MSTATUS_VS_DIRTY_UPDATE.yaml +2 -4
  764. data/.data/spec/std/isa/param/LRSC_FAIL_ON_NON_EXACT_LRSC.yaml +1 -1
  765. data/.data/spec/std/isa/param/LRSC_FAIL_ON_VA_SYNONYM.yaml +1 -1
  766. data/.data/spec/std/isa/param/LRSC_MISALIGNED_BEHAVIOR.yaml +4 -4
  767. data/.data/spec/std/isa/param/LRSC_RESERVATION_STRATEGY.yaml +1 -1
  768. data/.data/spec/std/isa/param/{MCONTEXT_AVAILABLE.yaml → MCONTEXT_IMPLEMENTED.yaml} +3 -3
  769. data/.data/spec/std/isa/param/MCOUNTENABLE_EN.yaml +2 -5
  770. data/.data/spec/std/isa/param/MEDELEG_DELEGATABLE.yaml +121 -0
  771. data/.data/spec/std/isa/param/MEI_INTR_IMPL.yaml +28 -0
  772. data/.data/spec/std/isa/param/MIDELEG_DELEGATABLE.yaml +177 -0
  773. data/.data/spec/std/isa/param/MSI_INTR_IMPL.yaml +28 -0
  774. data/.data/spec/std/isa/param/MSTATUS_FS_LEGAL_VALUES.yaml +8 -15
  775. data/.data/spec/std/isa/param/MSTATUS_VS_LEGAL_VALUES.yaml +7 -15
  776. data/.data/spec/std/isa/param/MTI_INTR_IMPL.yaml +28 -0
  777. data/.data/spec/std/isa/param/MTVAL_WIDTH.yaml +17 -5
  778. data/.data/spec/std/isa/param/MUTABLE_MISA_A.yaml +1 -1
  779. data/.data/spec/std/isa/param/MUTABLE_MISA_B.yaml +1 -1
  780. data/.data/spec/std/isa/param/MUTABLE_MISA_C.yaml +1 -1
  781. data/.data/spec/std/isa/param/MUTABLE_MISA_D.yaml +1 -1
  782. data/.data/spec/std/isa/param/MUTABLE_MISA_F.yaml +1 -1
  783. data/.data/spec/std/isa/param/MUTABLE_MISA_M.yaml +1 -1
  784. data/.data/spec/std/isa/param/MUTABLE_MISA_Q.yaml +1 -1
  785. data/.data/spec/std/isa/param/MUTABLE_MISA_U.yaml +1 -1
  786. data/.data/spec/std/isa/param/MUTABLE_MISA_V.yaml +1 -1
  787. data/.data/spec/std/isa/param/{HCONTEXT_AVAILABLE.yaml → NON_STANDARD_EXTENSION_IMPLEMENTED.yaml} +5 -7
  788. data/.data/spec/std/isa/param/NUM_EXTERNAL_GUEST_INTERRUPTS.yaml +1 -1
  789. data/.data/spec/std/isa/param/NUM_PMP_ENTRIES.yaml +1 -1
  790. data/.data/spec/std/isa/param/REPORT_CAUSE_IN_MTVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml +1 -1
  791. data/.data/spec/std/isa/param/REPORT_CAUSE_IN_STVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml +1 -1
  792. data/.data/spec/std/isa/param/REPORT_CAUSE_IN_VSTVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml +1 -1
  793. data/.data/spec/std/isa/param/SCONTEXT_IMPLEMENTED.yaml +18 -0
  794. data/.data/spec/std/isa/param/SCOUNTENABLE_EN.yaml +2 -6
  795. data/.data/spec/std/isa/param/SCTRDEPTH_DEPTH_LEGAL_VALUES.yaml +27 -0
  796. data/.data/spec/std/isa/param/SDTRIG_BREAKPOINT_REENTRANCY.yaml +45 -0
  797. data/.data/spec/std/isa/param/SDTRIG_ETRIGGER_SUPPORTED_EXCEPTIONS.yaml +37 -0
  798. data/.data/spec/std/isa/param/SDTRIG_ETRIGGER_SUPPORTED_TRIGGERS.yaml +25 -0
  799. data/.data/spec/std/isa/param/SDTRIG_ICOUNT_COUNT_HARDWIRED_1.yaml +23 -0
  800. data/.data/spec/std/isa/param/SDTRIG_ICOUNT_SELF_WRITE_SETS_PENDING.yaml +23 -0
  801. data/.data/spec/std/isa/param/SDTRIG_ICOUNT_SUPPORTED_TRIGGERS.yaml +25 -0
  802. data/.data/spec/std/isa/param/SDTRIG_ITRIGGER_SUPPORTED_INTERRUPTS.yaml +37 -0
  803. data/.data/spec/std/isa/param/SDTRIG_ITRIGGER_SUPPORTED_TRIGGERS.yaml +25 -0
  804. data/.data/spec/std/isa/param/SDTRIG_MAX_CHAIN_LENGTH.yaml +33 -0
  805. data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_EXECUTE_WRITABLE.yaml +22 -0
  806. data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_LOAD_WRITABLE.yaml +22 -0
  807. data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_MASKMAX6.yaml +26 -0
  808. data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_MATCH_LEGAL_VALUES.yaml +41 -0
  809. data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_SELECT_WRITABLE.yaml +22 -0
  810. data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_SIZE_LEGAL_VALUES.yaml +38 -0
  811. data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_STORE_WRITABLE.yaml +22 -0
  812. data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_SUPPORTED_TRIGGERS.yaml +25 -0
  813. data/.data/spec/std/isa/param/SDTRIG_M_WRITABLE.yaml +17 -0
  814. data/.data/spec/std/isa/param/SDTRIG_NUM_TRIGGERS.yaml +22 -0
  815. data/.data/spec/std/isa/param/SDTRIG_S_WRITABLE.yaml +19 -0
  816. data/.data/spec/std/isa/param/SDTRIG_TEXTRA_MHSELECT_MCONTEXT_MATCH.yaml +24 -0
  817. data/.data/spec/std/isa/param/SDTRIG_TEXTRA_MHSELECT_VMID_MATCH.yaml +23 -0
  818. data/.data/spec/std/isa/param/SDTRIG_TEXTRA_MHVALUE_LEN.yaml +26 -0
  819. data/.data/spec/std/isa/param/SDTRIG_TEXTRA_SSELECT_ASID_MATCH.yaml +23 -0
  820. data/.data/spec/std/isa/param/SDTRIG_TEXTRA_SSELECT_SCONTEXT_MATCH.yaml +26 -0
  821. data/.data/spec/std/isa/param/SDTRIG_TEXTRA_SVALUE_LEN.yaml +26 -0
  822. data/.data/spec/std/isa/param/SDTRIG_U_WRITABLE.yaml +19 -0
  823. data/.data/spec/std/isa/param/SDTRIG_VS_WRITABLE.yaml +19 -0
  824. data/.data/spec/std/isa/param/SDTRIG_VU_WRITABLE.yaml +19 -0
  825. data/.data/spec/std/isa/param/SEI_INTR_IMPL.yaml +28 -0
  826. data/.data/spec/std/isa/param/SSEED_READ_ONLY_ZERO.yaml +28 -0
  827. data/.data/spec/std/isa/param/SSI_INTR_IMPL.yaml +28 -0
  828. data/.data/spec/std/isa/param/STI_INTR_IMPL.yaml +33 -0
  829. data/.data/spec/std/isa/param/STVAL_WIDTH.yaml +81 -0
  830. data/.data/spec/std/isa/param/SUPPORTED_PMLEN_SMMPM.yaml +40 -0
  831. data/.data/spec/std/isa/param/SUPPORTED_PMLEN_SMNPM.yaml +42 -0
  832. data/.data/spec/std/isa/param/SUPPORTED_PMLEN_SSNPM.yaml +42 -0
  833. data/.data/spec/std/isa/param/TCONTROL_IMPLEMENTED.yaml +16 -0
  834. data/.data/spec/std/isa/param/TDATA2_IMPLEMENTED.yaml +26 -0
  835. data/.data/spec/std/isa/param/TDATA3_IMPLEMENTED.yaml +29 -0
  836. data/.data/spec/std/isa/param/TRAP_ON_ECALL_FROM_S.yaml +1 -1
  837. data/.data/spec/std/isa/param/TRAP_ON_ECALL_FROM_U.yaml +1 -1
  838. data/.data/spec/std/isa/param/TRAP_ON_ECALL_FROM_VS.yaml +1 -1
  839. data/.data/spec/std/isa/param/TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY.yaml +1 -1
  840. data/.data/spec/std/isa/param/USEED_READ_ONLY_ZERO.yaml +28 -0
  841. data/.data/spec/std/isa/param/WFI_FINITE.yaml +20 -0
  842. data/.data/spec/std/isa/param/WFI_U_MODE.yaml +20 -0
  843. data/.data/spec/std/isa/profile/RVA23p1S64.yaml +37 -0
  844. data/.data/spec/std/isa/profile/RVB23p1S64.yaml +39 -0
  845. data/.data/spec/std/isa/profile_family/RVA.yaml +3 -1
  846. data/.data/spec/std/isa/profile_family/RVB.yaml +3 -1
  847. data/.data/spec/std/isa/profile_release/RVA23p1.yaml +30 -0
  848. data/.data/spec/std/isa/profile_release/RVB23p1.yaml +30 -0
  849. data/lib/udb/Z3_VERSION +1 -1
  850. data/lib/udb/log.rb +16 -0
  851. data/lib/udb/obj/csr.rb +38 -45
  852. data/lib/udb/obj/database_obj.rb +1 -1
  853. data/lib/udb/obj/exception_code.rb +3 -3
  854. data/lib/udb/version.rb +1 -1
  855. metadata +139 -13
  856. data/.data/spec/std/isa/param/PMLEN.yaml +0 -20
@@ -0,0 +1,177 @@
1
+ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
2
+ # SPDX-License-Identifier: BSD-3-Clause-Clear
3
+
4
+ # yaml-language-server: $schema=../../../schemas/param_schema.json
5
+
6
+ $schema: param_schema.json#
7
+ kind: parameter
8
+ name: MIDELEG_DELEGATABLE
9
+ description: |
10
+ Indicates which interrupts can be delegated via `mideleg`.
11
+
12
+ Entry _i_ corresponds to `mideleg` bit _i_, which uses the same bit layout as `mip`.
13
+ When an entry is true, the corresponding interrupt can be delegated: the `mideleg` bit is writable,
14
+ except for bits that are always delegated, which are read-only one.
15
+ When an entry is false, the corresponding `mideleg` bit is read-only zero.
16
+
17
+ An unimplemented interrupt cannot be delegated, i.e., if `STI_INTR_IMPL` is false,
18
+ `MIDELEG_DELEGATABLE[5]` must be false.
19
+
20
+ When the H extension is implemented, VSSI, VSTI, and VSEI are always delegated to HS-mode,
21
+ so `MIDELEG_DELEGATABLE[2]`, `[6]`, and `[10]` must be true.
22
+ SGEI is also always delegated when any guest external interrupts are implemented
23
+ (`NUM_EXTERNAL_GUEST_INTERRUPTS` is nonzero), so `MIDELEG_DELEGATABLE[12]` must then be true;
24
+ otherwise it must be false.
25
+ When H is not implemented, all four must be false.
26
+ long_name: Interrupts that can be delegated through mideleg
27
+ schema:
28
+ type: array
29
+ items:
30
+ type: boolean
31
+ maxItems: 64
32
+ minItems: 64
33
+ definedBy:
34
+ extension:
35
+ name: S
36
+ requirements:
37
+ allOf:
38
+ # Reserved interrupt codes (0, 4, 8, 14, 15) cannot be delegated
39
+ - param:
40
+ allOf:
41
+ - name: MIDELEG_DELEGATABLE
42
+ index: 0
43
+ equal: false
44
+ - name: MIDELEG_DELEGATABLE
45
+ index: 4
46
+ equal: false
47
+ - name: MIDELEG_DELEGATABLE
48
+ index: 8
49
+ equal: false
50
+ - name: MIDELEG_DELEGATABLE
51
+ index: 14
52
+ equal: false
53
+ - name: MIDELEG_DELEGATABLE
54
+ index: 15
55
+ equal: false
56
+ # An unimplemented interrupt cannot be delegated
57
+ - if:
58
+ param:
59
+ name: MIDELEG_DELEGATABLE
60
+ index: 1
61
+ equal: true
62
+ then:
63
+ param:
64
+ name: SSI_INTR_IMPL
65
+ equal: true
66
+ - if:
67
+ param:
68
+ name: MIDELEG_DELEGATABLE
69
+ index: 3
70
+ equal: true
71
+ then:
72
+ param:
73
+ name: MSI_INTR_IMPL
74
+ equal: true
75
+ - if:
76
+ param:
77
+ name: MIDELEG_DELEGATABLE
78
+ index: 5
79
+ equal: true
80
+ then:
81
+ param:
82
+ name: STI_INTR_IMPL
83
+ equal: true
84
+ - if:
85
+ param:
86
+ name: MIDELEG_DELEGATABLE
87
+ index: 7
88
+ equal: true
89
+ then:
90
+ param:
91
+ name: MTI_INTR_IMPL
92
+ equal: true
93
+ - if:
94
+ param:
95
+ name: MIDELEG_DELEGATABLE
96
+ index: 9
97
+ equal: true
98
+ then:
99
+ param:
100
+ name: SEI_INTR_IMPL
101
+ equal: true
102
+ - if:
103
+ param:
104
+ name: MIDELEG_DELEGATABLE
105
+ index: 11
106
+ equal: true
107
+ then:
108
+ param:
109
+ name: MEI_INTR_IMPL
110
+ equal: true
111
+ # LCOFI (bit 13) is defined by Sscofpmf
112
+ - if:
113
+ not:
114
+ extension:
115
+ name: Sscofpmf
116
+ then:
117
+ param:
118
+ name: MIDELEG_DELEGATABLE
119
+ index: 13
120
+ equal: false
121
+ # VSSI, VSTI, and VSEI are always delegated to HS-mode when H is implemented
122
+ - if:
123
+ extension:
124
+ name: H
125
+ then:
126
+ allOf:
127
+ # VSSI, VSTI, and VSEI are always delegated to HS-mode when H is implemented
128
+ - param:
129
+ allOf:
130
+ - name: MIDELEG_DELEGATABLE
131
+ index: 2
132
+ equal: true
133
+ - name: MIDELEG_DELEGATABLE
134
+ index: 6
135
+ equal: true
136
+ - name: MIDELEG_DELEGATABLE
137
+ index: 10
138
+ equal: true
139
+ # SGEI is always delegated to HS-mode when any guest external interrupts are implemented (GEILEN nonzero)
140
+ - if:
141
+ not:
142
+ param:
143
+ name: NUM_EXTERNAL_GUEST_INTERRUPTS
144
+ equal: 0
145
+ then:
146
+ param:
147
+ name: MIDELEG_DELEGATABLE
148
+ index: 12
149
+ equal: true
150
+ - if:
151
+ param:
152
+ name: NUM_EXTERNAL_GUEST_INTERRUPTS
153
+ equal: 0
154
+ then:
155
+ param:
156
+ name: MIDELEG_DELEGATABLE
157
+ index: 12
158
+ equal: false
159
+ - if:
160
+ not:
161
+ extension:
162
+ name: H
163
+ then:
164
+ param:
165
+ allOf:
166
+ - name: MIDELEG_DELEGATABLE
167
+ index: 2
168
+ equal: false
169
+ - name: MIDELEG_DELEGATABLE
170
+ index: 6
171
+ equal: false
172
+ - name: MIDELEG_DELEGATABLE
173
+ index: 10
174
+ equal: false
175
+ - name: MIDELEG_DELEGATABLE
176
+ index: 12
177
+ equal: false
@@ -0,0 +1,28 @@
1
+ # Copyright (c) David_Harris@hmc.edu 13 July 2026
2
+ # SPDX-License-Identifier: BSD-3-Clause-Clear
3
+
4
+ # yaml-language-server: $schema=../../../schemas/param_schema.json
5
+
6
+ $schema: param_schema.json#
7
+ kind: parameter
8
+ name: MSI_INTR_IMPL
9
+ description: |
10
+ Whether or not machine-level software interrupts are implemented.
11
+
12
+ Possible values:
13
+
14
+ true::
15
+ Machine-level software interrupts are implemented.
16
+ `mie.MSIE` is writable, and `mideleg.MSI` is writable if `MIDELEG_DELEGATABLE[3]` is true.
17
+
18
+ false::
19
+ Machine-level software interrupts are not implemented.
20
+ `mie.MSIE` and `mideleg.MSI` are read-only zero.
21
+ long_name: Machine-level software interrupts are implemented
22
+ schema:
23
+ type: boolean
24
+ definedBy:
25
+ extension:
26
+ allOf:
27
+ - name: Zicsr
28
+ - name: Sm
@@ -6,32 +6,25 @@
6
6
  $schema: param_schema.json#
7
7
  kind: parameter
8
8
  name: MSTATUS_FS_LEGAL_VALUES
9
- description: "The set of values that mstatus.FS supports.
10
-
11
- "
12
- long_name: TODO
9
+ description: The set of values that mstatus.FS supports.
10
+ long_name: mstatus.FS legal values
13
11
  schema:
14
12
  type: array
15
13
  items:
16
14
  type: integer
17
15
  enum:
18
- - 0
19
- - 1
20
- - 2
21
- - 3
16
+ - 0 # Off
17
+ - 1 # Initial
18
+ - 2 # Clean
19
+ - 3 # Dirty
22
20
  maxItems: 4
23
21
  minItems: 1
24
22
  uniqueItems: true
25
23
  requirements:
26
24
  idl(): |
27
- implemented?(ExtensionName::F) &&
28
- (HW_MSTATUS_FS_DIRTY_UPDATE == "precise" ||
29
- HW_MSTATUS_FS_DIRTY_UPDATE == "imprecise")
30
- ->
25
+ implemented?(ExtensionName::F) ->
31
26
  $array_includes?(MSTATUS_FS_LEGAL_VALUES, 3);
32
- reason:
33
- If there is a hardware update to mstatus.FS, then the Dirty state must be
34
- supported
27
+ reason: If F extension is implemented, then the Dirty state must be supported
35
28
  definedBy:
36
29
  extension:
37
30
  allOf:
@@ -7,34 +7,26 @@ $schema: param_schema.json#
7
7
  kind: parameter
8
8
  name: MSTATUS_VS_LEGAL_VALUES
9
9
  description: The set of values that mstatus.VS will accept from a software write.
10
- long_name: TODO
10
+ long_name: mstatus.VS legal values
11
11
  schema:
12
12
  type: array
13
13
  items:
14
14
  type: integer
15
15
  enum:
16
- - 0
17
- - 1
18
- - 2
19
- - 3
16
+ - 0 # Off
17
+ - 1 # Initial
18
+ - 2 # Clean
19
+ - 3 # Dirty
20
20
  minItems: 1
21
21
  maxItems: 4
22
22
  uniqueItems: true
23
23
  requirements:
24
24
  idl(): |
25
- # [RULE] If the v registers are implemented, the VS field shall not be read-only zero.
26
- implemented?(ExtensionName::V)
27
- -> $array_size(MSTATUS_VS_LEGAL_VALUES) > 1;
28
-
29
25
  # [RULE] If there is a hardware update to mstatus.VS, then the Dirty state must be supported
30
- implemented?(ExtensionName::V) &&
31
- (HW_MSTATUS_VS_DIRTY_UPDATE == "precise" || HW_MSTATUS_VS_DIRTY_UPDATE == "imprecise")
32
- -> $array_includes?(MSTATUS_VS_LEGAL_VALUES, 0) &&
33
- $array_includes?(MSTATUS_VS_LEGAL_VALUES, 3);
26
+ implemented?(ExtensionName::V)
27
+ -> $array_includes?(MSTATUS_VS_LEGAL_VALUES, 3);
34
28
 
35
29
  reason: |
36
- If V is supported, both Off (0) and Dirty (3) must be supported
37
-
38
30
  If there is a hardware update to mstatus.VS, then the Dirty state must be supported
39
31
  definedBy:
40
32
  extension:
@@ -0,0 +1,28 @@
1
+ # Copyright (c) David_Harris@hmc.edu 13 July 2026
2
+ # SPDX-License-Identifier: BSD-3-Clause-Clear
3
+
4
+ # yaml-language-server: $schema=../../../schemas/param_schema.json
5
+
6
+ $schema: param_schema.json#
7
+ kind: parameter
8
+ name: MTI_INTR_IMPL
9
+ description: |
10
+ Whether or not machine-level timer interrupts are implemented.
11
+
12
+ Possible values:
13
+
14
+ true::
15
+ Machine-level timer interrupts are implemented.
16
+ `mie.MTIE` and `mtimecmp` are writable, and `mideleg.MTI` is writable if `MIDELEG_DELEGATABLE[7]` is true.
17
+
18
+ false::
19
+ Machine-level timer interrupts are not implemented.
20
+ `mie.MTIE` and `mideleg.MTI` are read-only zero. `mtimecmp` is optional and may be read-only zero.
21
+ long_name: Machine-level timer interrupts are implemented
22
+ schema:
23
+ type: boolean
24
+ definedBy:
25
+ extension:
26
+ allOf:
27
+ - name: Zicsr
28
+ - name: Sm
@@ -29,7 +29,7 @@ requirements:
29
29
 
30
30
  # in RV32, MTVAL must be able to hold a physical address if M-mode takes an exception
31
31
  # that reports an address
32
- # Since phyiscal address width can be larger than 32 with Sv32, need to downsize MTVAL in that case
32
+ # Since physical address width can be larger than 32 with Sv32, need to downsize MTVAL in that case
33
33
  (
34
34
  MXLEN == 32 &&
35
35
  PHYS_ADDR_WIDTH > 32 &&
@@ -42,11 +42,15 @@ requirements:
42
42
  REPORT_VA_IN_MTVAL_ON_INSTRUCTION_MISALIGNED ||
43
43
  REPORT_VA_IN_MTVAL_ON_LOAD_ACCESS_FAULT ||
44
44
  REPORT_VA_IN_MTVAL_ON_STORE_AMO_ACCESS_FAULT ||
45
- REPORT_VA_IN_MTVAL_ON_INSTRUCTION_ACCESS_FAULT
45
+ REPORT_VA_IN_MTVAL_ON_INSTRUCTION_ACCESS_FAULT ||
46
+ REPORT_VA_IN_MTVAL_ON_LOAD_PAGE_FAULT ||
47
+ REPORT_VA_IN_MTVAL_ON_STORE_AMO_PAGE_FAULT ||
48
+ REPORT_VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT
46
49
  )
47
50
  ) -> (MTVAL_WIDTH == 32);
48
51
 
49
- # TODO: uncomment when we have support for parameter comparison to other parameters
52
+ # TODO: uncomment when we have support for parameter/function comparison
53
+ # on the RHS of a constraint.
50
54
  # (
51
55
  # (
52
56
  # MXLEN == 64 ||
@@ -64,10 +68,15 @@ requirements:
64
68
  # REPORT_VA_IN_MTVAL_ON_INSTRUCTION_MISALIGNED ||
65
69
  # REPORT_VA_IN_MTVAL_ON_LOAD_ACCESS_FAULT ||
66
70
  # REPORT_VA_IN_MTVAL_ON_STORE_AMO_ACCESS_FAULT ||
67
- # REPORT_VA_IN_MTVAL_ON_INSTRUCTION_ACCESS_FAULT
71
+ # REPORT_VA_IN_MTVAL_ON_INSTRUCTION_ACCESS_FAULT ||
72
+ # REPORT_VA_IN_MTVAL_ON_LOAD_PAGE_FAULT ||
73
+ # REPORT_VA_IN_MTVAL_ON_STORE_AMO_PAGE_FAULT ||
74
+ # REPORT_VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT
68
75
  # )
69
76
  # ) -> (MTVAL_WIDTH >= PHYS_ADDR_WIDTH);
70
77
 
78
+ # TODO: uncomment when we have support for parameter/function comparison
79
+ # on the RHS of a constraint.
71
80
  # (
72
81
  # implemented?(ExtensionName::S) &&
73
82
  # (
@@ -79,7 +88,10 @@ requirements:
79
88
  # REPORT_VA_IN_MTVAL_ON_INSTRUCTION_MISALIGNED ||
80
89
  # REPORT_VA_IN_MTVAL_ON_LOAD_ACCESS_FAULT ||
81
90
  # REPORT_VA_IN_MTVAL_ON_STORE_AMO_ACCESS_FAULT ||
82
- # REPORT_VA_IN_MTVAL_ON_INSTRUCTION_ACCESS_FAULT
91
+ # REPORT_VA_IN_MTVAL_ON_INSTRUCTION_ACCESS_FAULT ||
92
+ # REPORT_VA_IN_MTVAL_ON_LOAD_PAGE_FAULT ||
93
+ # REPORT_VA_IN_MTVAL_ON_STORE_AMO_PAGE_FAULT ||
94
+ # REPORT_VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT
83
95
  # )
84
96
  # ) -> (MTVAL_WIDTH >= max_va_size());
85
97
 
@@ -9,7 +9,7 @@ name: MUTABLE_MISA_A
9
9
  description: |
10
10
  When the `A` extensions is supported, indicates whether or not
11
11
  the extension can be disabled in the `misa.A` bit.
12
- long_name: TODO
12
+ long_name: "`misa.A` mutability"
13
13
  schema:
14
14
  type: boolean
15
15
  definedBy:
@@ -8,7 +8,7 @@ kind: parameter
8
8
  name: MUTABLE_MISA_B
9
9
  description: Indicates whether or not the `B` extension can be disabled with the
10
10
  `misa.B` bit.
11
- long_name: TODO
11
+ long_name: "`misa.B` mutability"
12
12
  schema:
13
13
  type: boolean
14
14
  definedBy:
@@ -11,7 +11,7 @@ description:
11
11
  `misa.C` bit.
12
12
 
13
13
  "
14
- long_name: TODO
14
+ long_name: "`misa.C` mutability"
15
15
  schema:
16
16
  type: boolean
17
17
  definedBy:
@@ -11,7 +11,7 @@ description:
11
11
  `misa.D` bit.
12
12
 
13
13
  "
14
- long_name: TODO
14
+ long_name: "`misa.D` mutability"
15
15
  schema:
16
16
  type: boolean
17
17
  definedBy:
@@ -11,7 +11,7 @@ description:
11
11
  `misa.F` bit.
12
12
 
13
13
  "
14
- long_name: TODO
14
+ long_name: "`misa.F` mutability"
15
15
  schema:
16
16
  type: boolean
17
17
  definedBy:
@@ -11,7 +11,7 @@ description:
11
11
  `misa.M` bit.
12
12
 
13
13
  "
14
- long_name: TODO
14
+ long_name: "`misa.M` mutability"
15
15
  schema:
16
16
  type: boolean
17
17
  definedBy:
@@ -11,7 +11,7 @@ description:
11
11
  `misa.Q` bit.
12
12
 
13
13
  "
14
- long_name: TODO
14
+ long_name: "`misa.Q` mutability"
15
15
  schema:
16
16
  type: boolean
17
17
  definedBy:
@@ -11,7 +11,7 @@ description:
11
11
  `misa.U` bit.
12
12
 
13
13
  "
14
- long_name: TODO
14
+ long_name: "`misa.U` mutability"
15
15
  schema:
16
16
  type: boolean
17
17
  definedBy:
@@ -7,7 +7,7 @@ $schema: param_schema.json#
7
7
  kind: parameter
8
8
  name: MUTABLE_MISA_V
9
9
  description: Indicates whether or not the `V` extension can be disabled with the `misa.V` bit.
10
- long_name: TODO
10
+ long_name: "`misa.V` mutability"
11
11
  schema:
12
12
  type: boolean
13
13
  definedBy:
@@ -5,15 +5,13 @@
5
5
 
6
6
  $schema: param_schema.json#
7
7
  kind: parameter
8
- name: HCONTEXT_AVAILABLE
8
+ name: NON_STANDARD_EXTENSION_IMPLEMENTED
9
9
  description: |
10
- Specifies if HCONTEXT is available
11
- long_name: HCONTEXT Availability
10
+ If any non-standard extensions are implemented, this parameter must be true.
11
+ This parameter is used as the reset value for `misa.X`.
12
+ long_name: Non-standard extensions implemented
12
13
  schema:
13
14
  type: boolean
14
15
  definedBy:
15
16
  extension:
16
- name: Sdtrig
17
- requirements:
18
- idl(): HCONTEXT_AVAILABLE -> MCONTEXT_AVAILABLE;
19
- reason: HCONTEXT cannot exist without MCONTEXT
17
+ name: Sm
@@ -13,7 +13,7 @@ description: |
13
13
  long_name: TODO
14
14
  schema:
15
15
  type: integer
16
- minimum: 1
16
+ minimum: 0
17
17
  maximum: 63
18
18
  definedBy:
19
19
  extension:
@@ -22,7 +22,7 @@ description: |
22
22
  An implemented entry may still be read-only zero (but will never cause an exception).
23
23
  The number of entries that are actually usable is given by
24
24
  NUM_USABLE_PMP_ENTRIES.
25
- long_name: TODO
25
+ long_name: number of implemented PMP entries
26
26
  schema:
27
27
  type: integer
28
28
  enum: [0, 16, 64]
@@ -7,7 +7,7 @@ $schema: param_schema.json#
7
7
  kind: parameter
8
8
  name: REPORT_CAUSE_IN_MTVAL_ON_LANDING_PAD_SOFTWARE_CHECK
9
9
  description: |
10
- When true, `mtval` is written with the shadow stack cause (code=18) when a SoftwareCheck exception is raised into M-mode due to a landing pad error.
10
+ When true, `mtval` is written with the landing pad fault cause (code=2) when a SoftwareCheck exception is raised into M-mode due to a landing pad error.
11
11
 
12
12
  When false, `mtval` is written with 0.
13
13
  long_name: TODO
@@ -7,7 +7,7 @@ $schema: param_schema.json#
7
7
  kind: parameter
8
8
  name: REPORT_CAUSE_IN_STVAL_ON_LANDING_PAD_SOFTWARE_CHECK
9
9
  description: |
10
- When true, `stval` is written with the shadow stack cause (code=18) when a SoftwareCheck exception is raised into S-mode due to a landing pad error.
10
+ When true, `stval` is written with the landing pad fault cause (code=2) when a SoftwareCheck exception is raised into S-mode due to a landing pad error.
11
11
 
12
12
  When false, `stval` is written with 0.
13
13
  long_name: TODO
@@ -7,7 +7,7 @@ $schema: param_schema.json#
7
7
  kind: parameter
8
8
  name: REPORT_CAUSE_IN_VSTVAL_ON_LANDING_PAD_SOFTWARE_CHECK
9
9
  description: |
10
- When true, `vstval` is written with the shadow stack cause (code=18) when a SoftwareCheck exception is raised into VS-mode due to a landing pad error.
10
+ When true, `vstval` is written with the landing pad fault cause (code=2) when a SoftwareCheck exception is raised into VS-mode due to a landing pad error.
11
11
 
12
12
  When false, `vstval` is written with 0.
13
13
  long_name: TODO
@@ -0,0 +1,18 @@
1
+ # Copyright (C) 2026 Harvey Mudd College
2
+ # SPDX-License-Identifier: BSD-3-Clause-Clear
3
+
4
+ # yaml-language-server: $schema=../../../schemas/param_schema.json
5
+
6
+ $schema: param_schema.json#
7
+ kind: parameter
8
+ name: SCONTEXT_IMPLEMENTED
9
+ description: |
10
+ Specifies if the scontext CSR is implemented
11
+ long_name: scontext CSR is implemented
12
+ schema:
13
+ type: boolean
14
+ definedBy:
15
+ extension:
16
+ allOf:
17
+ - name: Sdtrig
18
+ - name: S
@@ -9,9 +9,8 @@ name: SCOUNTENABLE_EN
9
9
  description: |
10
10
  Indicates which counters can delegated via `scounteren`
11
11
 
12
- An unimplemented counter cannot be specified, i.e., if
13
- HPM_COUNTER_EN[3] is false, it would be illegal to set
14
- SCOUNTENABLE_EN[3] to true.
12
+ `SCOUNTENABLE_EN[n]` controls whether `scounteren.HPM<n>` is writable. It does not
13
+ depend on whether `hpmcounter<n>`/`mhpmcounter<n>` is read-only zero.
15
14
 
16
15
  SCOUNTENABLE_EN[0:2] must all be false if `Zicntr` is not implemented.
17
16
  SCOUNTENABLE_EN[3:31] must all be false if `Zihpm` is not implemented.
@@ -29,14 +28,11 @@ requirements:
29
28
  }
30
29
  for (U32 i = 3; i < 32; i++) {
31
30
  !implemented?(ExtensionName::Zihpm) -> !SCOUNTENABLE_EN[i];
32
- (!HPM_COUNTER_EN[i]) -> !SCOUNTENABLE_EN[i];
33
31
  }
34
32
  reason: |
35
33
  Counters 0-2 are defined by Zicntr
36
34
 
37
35
  Counters 3..31 are defined by Zihpm
38
-
39
- When mhpmcounter[i] does not exist, it cannot be enabled.
40
36
  definedBy:
41
37
  extension:
42
38
  name: S
@@ -0,0 +1,27 @@
1
+ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
2
+ # SPDX-License-Identifier: BSD-3-Clause-Clear
3
+
4
+ # yaml-language-server: $schema=../../../schemas/param_schema.json
5
+
6
+ $schema: param_schema.json#
7
+ kind: parameter
8
+ name: SCTRDEPTH_DEPTH_LEGAL_VALUES
9
+ description: |
10
+ The set of supported actual depths for the Control Transfer Records (CTR) buffer.
11
+ long_name: Supported CTR buffer depths
12
+ schema:
13
+ type: array
14
+ items:
15
+ type: integer
16
+ enum:
17
+ - 16
18
+ - 32
19
+ - 64
20
+ - 128
21
+ - 256
22
+ maxItems: 5
23
+ minItems: 1
24
+ uniqueItems: true
25
+ definedBy:
26
+ extension:
27
+ name: Smctr
@@ -0,0 +1,45 @@
1
+ # Copyright (C) 2026 Harvey Mudd College
2
+ # SPDX-License-Identifier: BSD-3-Clause-Clear
3
+
4
+ # yaml-language-server: $schema=../../../schemas/param_schema.json
5
+
6
+ $schema: param_schema.json#
7
+ kind: parameter
8
+ name: SDTRIG_BREAKPOINT_REENTRANCY
9
+ description: |
10
+ How the hart prevents triggers with action=0 (breakpoint exception) from re-firing
11
+ inside their own handler (Debug spec 1.0, Sdtrig "Native Triggers").
12
+
13
+ * No_reentrancy_support: no specific support for reentrancy.
14
+ * Use_interrupt_enables: triggers with action=0 do not match or fire in M-mode while
15
+ mstatus.MIE is 0 (and likewise S/VS-mode with sstatus.SIE / vsstatus.SIE when delegated).
16
+ * Use_tcontrol: tcontrol.mte and tcontrol.mpte are implemented, and medeleg[3] is hard-wired to 0.
17
+ long_name: Breakpoint reentrancy mechanism
18
+ schema:
19
+ type: string
20
+ enum:
21
+ - No_reentrancy_support
22
+ - Use_interrupt_enables
23
+ - Use_tcontrol
24
+ requirements:
25
+ if:
26
+ param:
27
+ name: SDTRIG_BREAKPOINT_REENTRANCY
28
+ equal: Use_tcontrol
29
+ then:
30
+ allOf:
31
+ - param:
32
+ name: TCONTROL_IMPLEMENTED
33
+ equal: true
34
+ reason: The Use_tcontrol mechanism requires the tcontrol CSR.
35
+ - if:
36
+ extension:
37
+ name: S
38
+ then:
39
+ param:
40
+ name: MEDELEG_DELEGATABLE
41
+ index: 3
42
+ equal: false
43
+ definedBy:
44
+ extension:
45
+ name: Sdtrig