qiskit 2.1.0rc1__cp39-abi3-manylinux2014_aarch64.manylinux_2_17_aarch64.whl

qiskit/transpiler/passes/layout/_csp_custom_solver.py

@@ -0,0 +1,65 @@
+# This code is part of Qiskit.
+#
+# (C) Copyright IBM 2022.
+#
+# This code is licensed under the Apache License, Version 2.0. You may
+# obtain a copy of this license in the LICENSE.txt file in the root directory
+# of this source tree or at http://www.apache.org/licenses/LICENSE-2.0.
+#
+# Any modifications or derivative works of this code must retain this
+# copyright notice, and modified files need to carry a notice indicating
+# that they have been altered from the originals.
+
+"""A custom python-constraint solver used by the :class:`~.CSPLayout` pass"""
+from time import time
+
+from qiskit.utils import optionals as _optionals
+
+# This isn't ideal usage because we will import constraint at import time
+# but to ensure the CustomSolver class is defined we need to do this.
+# If constraint is not installed this will not raise a missing library
+# exception until CSPLayout is initialized
+if _optionals.HAS_CONSTRAINT:
+    from constraint import RecursiveBacktrackingSolver
+
+    class CustomSolver(RecursiveBacktrackingSolver):
+        """A wrap to RecursiveBacktrackingSolver to support ``call_limit``"""
+
+        # pylint: disable=invalid-name
+
+        def __init__(self, call_limit=None, time_limit=None):
+            self.call_limit = call_limit
+            self.time_limit = time_limit
+            self.call_current = None
+            self.time_start = None
+            self.time_current = None
+            super().__init__()
+
+        def limit_reached(self):
+            """Checks if a limit is reached."""
+            if self.call_current is not None:
+                self.call_current += 1
+                if self.call_current > self.call_limit:
+                    return True
+            if self.time_start is not None:
+                self.time_current = time() - self.time_start
+                if self.time_current > self.time_limit:
+                    return True
+            return False
+
+        def getSolution(self, domains, constraints, vconstraints):
+            """Wrap RecursiveBacktrackingSolver.getSolution to add the limits."""
+            if self.call_limit is not None:
+                self.call_current = 0
+            if self.time_limit is not None:
+                self.time_start = time()
+            return super().getSolution(domains, constraints, vconstraints)
+
+        def recursiveBacktracking(self, solutions, domains, vconstraints, assignments, single):
+            """Like ``constraint.RecursiveBacktrackingSolver.recursiveBacktracking`` but
+            limited in the amount of calls by ``self.call_limit``"""
+            if self.limit_reached():
+                return None
+            return super().recursiveBacktracking(
+                solutions, domains, vconstraints, assignments, single
+            )

qiskit/transpiler/passes/layout/apply_layout.py

@@ -0,0 +1,128 @@
+# This code is part of Qiskit.
+#
+# (C) Copyright IBM 2019.
+#
+# This code is licensed under the Apache License, Version 2.0. You may
+# obtain a copy of this license in the LICENSE.txt file in the root directory
+# of this source tree or at http://www.apache.org/licenses/LICENSE-2.0.
+#
+# Any modifications or derivative works of this code must retain this
+# copyright notice, and modified files need to carry a notice indicating
+# that they have been altered from the originals.
+
+"""Transform a circuit with virtual qubits into a circuit with physical qubits."""
+
+from qiskit.circuit import QuantumRegister
+from qiskit.dagcircuit import DAGCircuit, DAGOpNode
+from qiskit.transpiler.basepasses import TransformationPass
+from qiskit.transpiler.exceptions import TranspilerError
+from qiskit.transpiler.layout import Layout
+
+
+class ApplyLayout(TransformationPass):
+    """Transform a circuit with virtual qubits into a circuit with physical qubits.
+
+    Transforms a DAGCircuit with virtual qubits into a DAGCircuit with physical qubits
+    by applying the Layout given in `property_set`.
+    Requires either of passes to set/select Layout, e.g. `SetLayout`, `TrivialLayout`.
+    Assumes the Layout has full physical qubits.
+
+    If a post layout pass is run and sets the ``post_layout`` property set field with
+    a new layout to use after ``ApplyLayout`` has already run once this pass will
+    compact the layouts so that we apply
+    ``original_virtual`` -> ``existing_layout`` -> ``new_layout`` -> ``new_physical``
+    so that the output circuit and layout combination become:
+    ``original_virtual`` -> ``new_physical``
+    """
+
+    def run(self, dag):
+        """Run the ApplyLayout pass on ``dag``.
+
+        Args:
+            dag (DAGCircuit): DAG to map.
+
+        Returns:
+            DAGCircuit: A mapped DAG (with physical qubits).
+
+        Raises:
+            TranspilerError: if no layout is found in ``property_set`` or no full physical qubits.
+        """
+        layout = self.property_set["layout"]
+        if not layout:
+            raise TranspilerError(
+                "No 'layout' is found in property_set. Please run a Layout pass in advance."
+            )
+        if len(layout) != (1 + max(layout.get_physical_bits())):
+            raise TranspilerError("The 'layout' must be full (with ancilla).")
+
+        post_layout = self.property_set["post_layout"]
+        q = QuantumRegister(len(layout), "q")
+
+        new_dag = DAGCircuit()
+        new_dag.name = dag.name
+        new_dag.add_qreg(q)
+        for var in dag.iter_input_vars():
+            new_dag.add_input_var(var)
+        for var in dag.iter_captured_vars():
+            new_dag.add_captured_var(var)
+        for var in dag.iter_declared_vars():
+            new_dag.add_declared_var(var)
+        for stretch in dag.iter_captured_stretches():
+            new_dag.add_captured_stretch(stretch)
+        for stretch in dag.iter_declared_stretches():
+            new_dag.add_declared_stretch(stretch)
+        new_dag.metadata = dag.metadata
+        new_dag.add_clbits(dag.clbits)
+        for creg in dag.cregs.values():
+            new_dag.add_creg(creg)
+        if post_layout is None:
+            self.property_set["original_qubit_indices"] = {
+                bit: index for index, bit in enumerate(dag.qubits)
+            }
+            for qreg in dag.qregs.values():
+                self.property_set["layout"].add_register(qreg)
+            virtual_physical_map = layout.get_virtual_bits()
+            for node in dag.topological_op_nodes():
+                qargs = [q[virtual_physical_map[qarg]] for qarg in node.qargs]
+                new_dag._apply_op_node_back(
+                    DAGOpNode.from_instruction(
+                        node._to_circuit_instruction().replace(qubits=qargs)
+                    ),
+                    check=False,
+                )
+        else:
+            # First build a new layout object going from:
+            # old virtual -> old physical -> new virtual -> new physical
+            # to:
+            # old virtual -> new physical
+            full_layout = Layout()
+            old_phys_to_virtual = layout.get_physical_bits()
+            new_virtual_to_physical = post_layout.get_virtual_bits()
+            phys_map = list(range(len(new_dag.qubits)))
+            for new_virt, new_phys in new_virtual_to_physical.items():
+                old_phys = dag.find_bit(new_virt).index
+                old_virt = old_phys_to_virtual[old_phys]
+                phys_map[old_phys] = new_phys
+                full_layout.add(old_virt, new_phys)
+            for reg in layout.get_registers():
+                full_layout.add_register(reg)
+            # Apply new layout to the circuit
+            for node in dag.topological_op_nodes():
+                qargs = [q[new_virtual_to_physical[qarg]] for qarg in node.qargs]
+                new_dag._apply_op_node_back(
+                    DAGOpNode.from_instruction(
+                        node._to_circuit_instruction().replace(qubits=qargs)
+                    ),
+                    check=False,
+                )
+            self.property_set["layout"] = full_layout
+            if (final_layout := self.property_set["final_layout"]) is not None:
+                final_layout_mapping = {
+                    new_dag.qubits[phys_map[dag.find_bit(old_virt).index]]: phys_map[old_phys]
+                    for old_virt, old_phys in final_layout.get_virtual_bits().items()
+                }
+                out_layout = Layout(final_layout_mapping)
+                self.property_set["final_layout"] = out_layout
+        new_dag.global_phase = dag.global_phase
+
+        return new_dag

qiskit/transpiler/passes/layout/csp_layout.py

@@ -0,0 +1,132 @@
+# This code is part of Qiskit.
+#
+# (C) Copyright IBM 2019.
+#
+# This code is licensed under the Apache License, Version 2.0. You may
+# obtain a copy of this license in the LICENSE.txt file in the root directory
+# of this source tree or at http://www.apache.org/licenses/LICENSE-2.0.
+#
+# Any modifications or derivative works of this code must retain this
+# copyright notice, and modified files need to carry a notice indicating
+# that they have been altered from the originals.
+
+"""A pass for choosing a Layout of a circuit onto a Coupling graph, as a
+Constraint Satisfaction Problem. It tries to find a solution that fully
+satisfy the circuit, i.e. no further swap is needed. If no solution is
+found, no ``property_set['layout']`` is set.
+"""
+import random
+
+from qiskit.transpiler.layout import Layout
+from qiskit.transpiler.basepasses import AnalysisPass
+from qiskit.transpiler.exceptions import TranspilerError
+from qiskit.utils import optionals as _optionals
+from qiskit.transpiler.target import Target
+
+
+@_optionals.HAS_CONSTRAINT.require_in_instance
+class CSPLayout(AnalysisPass):
+    """If possible, chooses a Layout as a CSP, using backtracking."""
+
+    def __init__(
+        self,
+        coupling_map,
+        strict_direction=False,
+        seed=None,
+        call_limit=1000,
+        time_limit=10,
+    ):
+        """If possible, chooses a Layout as a CSP, using backtracking.
+
+        If not possible, does not set the layout property. In all the cases,
+        the property `CSPLayout_stop_reason` will be added with one of the
+        following values:
+
+        * solution found: If a perfect layout was found.
+        * nonexistent solution: If no perfect layout was found and every combination was checked.
+        * call limit reached: If no perfect layout was found and the call limit was reached.
+        * time limit reached: If no perfect layout was found and the time limit was reached.
+
+        Args:
+            coupling_map (Union[CouplingMap, Target]): Directed graph representing a coupling map.
+            strict_direction (bool): If True, considers the direction of the coupling map.
+                                     Default is False.
+            seed (int): Sets the seed of the PRNG.
+            call_limit (int): Amount of times that
+                ``constraint.RecursiveBacktrackingSolver.recursiveBacktracking`` will be called.
+                None means no call limit. Default: 1000.
+            time_limit (int): Amount of seconds that the pass will try to find a solution.
+                None means no time limit. Default: 10 seconds.
+        """
+        super().__init__()
+        if isinstance(coupling_map, Target):
+            self.target = coupling_map
+            self.coupling_map = self.target.build_coupling_map()
+        else:
+            self.target = None
+            self.coupling_map = coupling_map
+
+        self.strict_direction = strict_direction
+        self.call_limit = call_limit
+        self.time_limit = time_limit
+        self.seed = seed
+
+    def run(self, dag):
+        """run the layout method"""
+        if not self.coupling_map.is_connected():
+            raise TranspilerError(
+                "Coupling Map is disjoint, this pass can't be used with a disconnected coupling "
+                "map."
+            )
+        qubits = dag.qubits
+        cxs = set()
+
+        from constraint import Problem, AllDifferentConstraint, RecursiveBacktrackingSolver
+        from qiskit.transpiler.passes.layout._csp_custom_solver import CustomSolver
+
+        for gate in dag.two_qubit_ops():
+            cxs.add((qubits.index(gate.qargs[0]), qubits.index(gate.qargs[1])))
+        edges = set(self.coupling_map.get_edges())
+
+        if self.time_limit is None and self.call_limit is None:
+            solver = RecursiveBacktrackingSolver()
+        else:
+            solver = CustomSolver(call_limit=self.call_limit, time_limit=self.time_limit)
+
+        variables = list(range(len(qubits)))
+        variable_domains = list(self.coupling_map.physical_qubits)
+        random.Random(self.seed).shuffle(variable_domains)
+
+        problem = Problem(solver)
+        problem.addVariables(variables, variable_domains)
+        problem.addConstraint(AllDifferentConstraint())  # each wire is map to a single qubit
+
+        if self.strict_direction:
+
+            def constraint(control, target):
+                return (control, target) in edges
+
+        else:
+
+            def constraint(control, target):
+                return (control, target) in edges or (target, control) in edges
+
+        for pair in cxs:
+            problem.addConstraint(constraint, [pair[0], pair[1]])
+
+        solution = problem.getSolution()
+
+        if solution is None:
+            stop_reason = "nonexistent solution"
+            if isinstance(solver, CustomSolver):
+                if solver.time_current is not None and solver.time_current >= self.time_limit:
+                    stop_reason = "time limit reached"
+                elif solver.call_current is not None and solver.call_current >= self.call_limit:
+                    stop_reason = "call limit reached"
+        else:
+            stop_reason = "solution found"
+            self.property_set["layout"] = Layout({v: qubits[k] for k, v in solution.items()})
+            for reg in dag.qregs.values():
+                self.property_set["layout"].add_register(reg)
+
+        self.property_set["CSPLayout_stop_reason"] = stop_reason

qiskit/transpiler/passes/layout/dense_layout.py

@@ -0,0 +1,197 @@
+# This code is part of Qiskit.
+#
+# (C) Copyright IBM 2017, 2018.
+#
+# This code is licensed under the Apache License, Version 2.0. You may
+# obtain a copy of this license in the LICENSE.txt file in the root directory
+# of this source tree or at http://www.apache.org/licenses/LICENSE-2.0.
+#
+# Any modifications or derivative works of this code must retain this
+# copyright notice, and modified files need to carry a notice indicating
+# that they have been altered from the originals.
+
+"""Choose a Layout by finding the most connected subset of qubits."""
+
+
+import numpy as np
+import rustworkx
+
+from qiskit.transpiler.layout import Layout
+from qiskit.transpiler.basepasses import AnalysisPass
+from qiskit.transpiler.exceptions import TranspilerError
+from qiskit.transpiler.target import Target
+from qiskit._accelerate import disjoint_utils
+
+from qiskit._accelerate.dense_layout import best_subset
+
+
+class DenseLayout(AnalysisPass):
+    """Choose a Layout by finding the most connected subset of qubits.
+
+    This pass associates a physical qubit (int) to each virtual qubit
+    of the circuit (Qubit).
+
+    Note:
+        Even though a ``'layout'`` is not strictly a property of the DAG,
+        in the transpiler architecture it is best passed around between passes
+        by being set in ``property_set``.
+    """
+
+    def __init__(self, coupling_map=None, target=None):
+        """DenseLayout initializer.
+
+        Args:
+            coupling_map (Coupling): directed graph representing a coupling map.
+            target (Target): A target representing the target backend.
+        """
+        super().__init__()
+        self.coupling_map = coupling_map
+        self.target = target
+        self.adjacency_matrix = None
+        if target is not None:
+            self.coupling_map = target.build_coupling_map()
+
+    def run(self, dag):
+        """Run the DenseLayout pass on `dag`.
+
+        Pick a convenient layout depending on the best matching
+        qubit connectivity, and set the property `layout`.
+
+        Args:
+            dag (DAGCircuit): DAG to find layout for.
+
+        Raises:
+            TranspilerError: if dag wider than self.coupling_map
+        """
+        if self.coupling_map is None:
+            raise TranspilerError(
+                "A coupling_map or target with constrained qargs is necessary to run the pass."
+            )
+        if self.target is not None:
+            layout_components = disjoint_utils.run_pass_over_connected_components(
+                dag,
+                self.target,
+                self._inner_run,
+            )
+            if layout_components is None:
+                target = Target.from_configuration(
+                    basis_gates=["u", "cx"], coupling_map=self.coupling_map
+                )
+                layout_components = disjoint_utils.run_pass_over_connected_components(
+                    dag,
+                    target,
+                    self._inner_run,
+                )
+        else:
+            target = Target.from_configuration(
+                basis_gates=["u", "cx"], coupling_map=self.coupling_map
+            )
+            layout_components = disjoint_utils.run_pass_over_connected_components(
+                dag,
+                target,
+                self._inner_run,
+            )
+        layout_mapping = {}
+        for component in layout_components:
+            layout_mapping.update(component)
+        layout = Layout(layout_mapping)
+        for qreg in dag.qregs.values():
+            layout.add_register(qreg)
+        self.property_set["layout"] = layout
+
+    def _inner_run(self, dag, coupling_map):
+        num_dag_qubits = len(dag.qubits)
+        if num_dag_qubits > coupling_map.size():
+            raise TranspilerError("Number of qubits greater than device.")
+        num_cx = 0
+        num_meas = 0
+
+        if self.target is not None:
+            num_cx = 1
+            num_meas = 1
+        else:
+            # Get avg number of cx and meas per qubit
+            ops = dag.count_ops(recurse=True)
+            if "cx" in ops.keys():
+                num_cx = ops["cx"]
+            if "measure" in ops.keys():
+                num_meas = ops["measure"]
+
+        best_sub = self._best_subset(num_dag_qubits, num_meas, num_cx, coupling_map)
+        layout_mapping = {
+            qubit: coupling_map.graph[int(best_sub[i])] for i, qubit in enumerate(dag.qubits)
+        }
+        return layout_mapping
+
+    def _best_subset(self, num_qubits, num_meas, num_cx, coupling_map):
+        """Computes the qubit mapping with the best connectivity.
+
+        Args:
+            num_qubits (int): Number of subset qubits to consider.
+
+        Returns:
+            ndarray: Array of qubits to use for best connectivity mapping.
+        """
+        from scipy.sparse import coo_matrix, csgraph
+
+        if num_qubits == 1:
+            return np.array([0])
+        if num_qubits == 0:
+            return []
+
+        adjacency_matrix = rustworkx.adjacency_matrix(coupling_map.graph)
+        reverse_index_map = {v: k for k, v in enumerate(coupling_map.graph.nodes())}
+
+        error_mat, use_error = _build_error_matrix(
+            coupling_map.size(),
+            reverse_index_map,
+            target=self.target,
+        )
+
+        rows, cols, best_map = best_subset(
+            num_qubits,
+            adjacency_matrix,
+            num_meas,
+            num_cx,
+            use_error,
+            coupling_map.is_symmetric,
+            error_mat,
+        )
+        data = [1] * len(rows)
+        sp_sub_graph = coo_matrix((data, (rows, cols)), shape=(num_qubits, num_qubits)).tocsr()
+        perm = csgraph.reverse_cuthill_mckee(sp_sub_graph)
+        best_map = best_map[perm]
+        return best_map
+
+
+def _build_error_matrix(num_qubits, qubit_map, target=None):
+    error_mat = np.zeros((num_qubits, num_qubits))
+    use_error = False
+    if target is not None and target.qargs is not None:
+        for qargs in target.qargs:
+            # Ignore gates over 2q DenseLayout only works with 2q
+            if len(qargs) > 2:
+                continue
+            error = 0.0
+            ops = target.operation_names_for_qargs(qargs)
+            for op in ops:
+                props = target[op].get(qargs, None)
+                if props is not None and props.error is not None:
+                    # Use max error rate to represent operation error
+                    # on a qubit(s). If there is more than 1 operation available
+                    # we don't know what will be used on the qubits eventually
+                    # so we take the highest error operation as a proxy for
+                    # the possible worst case.
+                    error = max(error, props.error)
+            max_error = error
+            if any(qubit not in qubit_map for qubit in qargs):
+                continue
+            # TODO: Factor in T1 and T2 to error matrix after #7736
+            if len(qargs) == 1:
+                qubit = qubit_map[qargs[0]]
+                error_mat[qubit][qubit] = max_error
+                use_error = True
+            elif len(qargs) == 2:
+                error_mat[qubit_map[qargs[0]]][qubit_map[qargs[1]]] = max_error
+                use_error = True
+    return error_mat, use_error

qiskit/transpiler/passes/layout/disjoint_utils.py

@@ -0,0 +1,54 @@
+# This code is part of Qiskit.
+#
+# (C) Copyright IBM 2023.
+#
+# This code is licensed under the Apache License, Version 2.0. You may
+# obtain a copy of this license in the LICENSE.txt file in the root directory
+# of this source tree or at http://www.apache.org/licenses/LICENSE-2.0.
+#
+# Any modifications or derivative works of this code must retain this
+# copyright notice, and modified files need to carry a notice indicating
+# that they have been altered from the originals.
+
+"""This module contains common utils for disjoint coupling maps."""
+from __future__ import annotations
+from typing import Union
+
+from qiskit.dagcircuit.dagcircuit import DAGCircuit
+from qiskit.transpiler.coupling import CouplingMap
+from qiskit.transpiler.target import Target
+from qiskit.transpiler.exceptions import TranspilerError
+
+
+def require_layout_isolated_to_component(
+    dag: DAGCircuit, components_source: Union[Target, CouplingMap]
+):
+    """
+    Check that the layout of the dag does not require connectivity across connected components
+    in the CouplingMap
+
+    Args:
+        dag: DAGCircuit to check.
+        components_source: Target to check against.
+
+    Raises:
+        TranspilerError: Chosen layout is not valid for the target disjoint connectivity.
+    """
+    if isinstance(components_source, Target):
+        coupling_map = components_source.build_coupling_map(filter_idle_qubits=True)
+    else:
+        coupling_map = components_source
+    component_sets = [set(x.graph.nodes()) for x in coupling_map.connected_components()]
+    for inst in dag.two_qubit_ops():
+        component_index = None
+        for i, component_set in enumerate(component_sets):
+            if dag.find_bit(inst.qargs[0]).index in component_set:
+                component_index = i
+                break
+        if dag.find_bit(inst.qargs[1]).index not in component_sets[component_index]:
+            raise TranspilerError(
+                "The circuit has an invalid layout as two qubits need to interact in disconnected "
+                "components of the coupling map. The physical qubit "
+                f"{dag.find_bit(inst.qargs[1]).index} needs to interact with the "
+                f"qubit {dag.find_bit(inst.qargs[0]).index} and they belong to different components"
+            )

qiskit/transpiler/passes/layout/enlarge_with_ancilla.py

@@ -0,0 +1,49 @@
+# This code is part of Qiskit.
+#
+# (C) Copyright IBM 2017, 2019.
+#
+# This code is licensed under the Apache License, Version 2.0. You may
+# obtain a copy of this license in the LICENSE.txt file in the root directory
+# of this source tree or at http://www.apache.org/licenses/LICENSE-2.0.
+#
+# Any modifications or derivative works of this code must retain this
+# copyright notice, and modified files need to carry a notice indicating
+# that they have been altered from the originals.
+
+"""Extend the dag with virtual qubits that are in layout but not in the circuit yet."""
+
+from qiskit.transpiler.basepasses import TransformationPass
+from qiskit.transpiler.exceptions import TranspilerError
+
+
+class EnlargeWithAncilla(TransformationPass):
+    """Extend the dag with virtual qubits that are in layout but not in the circuit yet.
+
+    Extend the DAG circuit with new virtual qubits (ancilla) that are specified
+    in the layout, but not present in the circuit. Which qubits to add are
+    previously allocated in the ``layout`` property, by a previous pass.
+    """
+
+    def run(self, dag):
+        """Run the EnlargeWithAncilla pass on `dag`.
+
+        Args:
+            dag (DAGCircuit): DAG to extend.
+
+        Returns:
+            DAGCircuit: An extended DAG.
+
+        Raises:
+            TranspilerError: If there is no layout in the property set or not set at init time.
+        """
+        layout = self.property_set["layout"]
+
+        if layout is None:
+            raise TranspilerError('EnlargeWithAncilla requires property_set["layout"]')
+
+        new_qregs = {reg for reg in layout.get_registers() if reg not in dag.qregs.values()}
+
+        for qreg in new_qregs:
+            dag.add_qreg(qreg)
+
+        return dag