udb 0.1.9 → 0.1.14

data/.data/spec/std/isa/param/ZAWRS_NTO_IS_NOP.yaml

@@ -0,0 +1,19 @@
+# Copyright (c) 2025-26 Harvey Mudd College
+# Author: Ellen Yu (ellyu@hmc.edu)
+# SPDX-License-Identifier: BSD-3-Clause-Clear
+
+# yaml-language-server: $schema=../../../schemas/param_schema.json
+
+$schema: param_schema.json#
+kind: parameter
+name: ZAWRS_NTO_IS_NOP
+description: |
+  When true, WRS.NTO completes immediately, behaving as a no-op, rather than
+  stalling the hart.
+
+long_name: TODO
+schema:
+  type: boolean
+definedBy:
+  extension:
+    name: Zawrs

data/.data/spec/std/isa/profile/RVA20S64.yaml

@@ -38,7 +38,7 @@ extensions:
       Svbare is a new extension name introduced with RVA20.
   Sv39:
     presence: mandatory
-    version: "~> 1.11"
+    version: "~> 1.0"
   Svade:
     presence: mandatory
     version: "~> 1.0"
@@ -64,7 +64,7 @@ extensions:
       Sstvala is a new extension name introduced with RVA20.
   Sv48:
     presence: optional
-    version: "~> 1.11"
+    version: "~> 1.0"
   Ssu64xl:
     presence: optional
     version: "~> 1.0"
@@ -72,5 +72,12 @@ extensions:
       Ssu64xl is a new extension name introduced with RVA20.
 requirements:
   param:
-    name: U_MODE_ENDIANNESS
-    equal: little
+    allOf:
+      - name: U_MODE_ENDIANNESS
+        equal: little
+      - name: S_MODE_ENDIANNESS
+        equal: little
+      - name: SXLEN
+        includes: 64
+      - name: UXLEN
+        includes: 64

data/.data/spec/std/isa/profile/RVA20U64.yaml

@@ -8,7 +8,7 @@ kind: profile
 name: RVA20U64
 long_name: U-mode extensions for version 20 of the 64-bit Apps Processor profile
 marketing_name: RVA20U64
-mode: Unpriv
+mode: U
 base: 64
 release: { $ref: profile_release/RVA20.yaml# }
 introduction: |
@@ -21,21 +21,26 @@ extensions:
   $remove: Zifencei # Not allowed as an option for Unpriv ISA (only available in Priv ISA).
   A:
     presence: mandatory
+    version: ~> 2.1
   C:
     presence: mandatory
+    version: ~> 2.0
   D:
     presence: mandatory
+    version: ~> 2.2.0
   F:
     presence: mandatory
+    version: ~> 2.2.0
   M:
     presence: mandatory
+    version: ~> 2.0
   U:
     presence: mandatory
     version: "~> 1.0"
-  Zicsr:
+  Zicntr:
     presence: mandatory
     version: "~> 2.0"
-  Zicntr:
+  Zicsr:
     presence: mandatory
     version: "~> 2.0"
   Ziccif:
@@ -102,7 +107,11 @@ recommendations:
   - text: |
       Implementations are strongly recommended to raise illegal-instruction
       exceptions on attempts to execute unimplemented opcodes.
+
 requirements:
   param:
-    name: U_MODE_ENDIANNESS
-    equal: little
+    allOf:
+      - name: U_MODE_ENDIANNESS
+        equal: little
+      - name: UXLEN
+        includes: 64

data/.data/spec/std/isa/profile/RVA22S64.yaml

@@ -36,13 +36,13 @@ extensions:
     version: "~> 1.0"
   Sv39:
     presence: mandatory
-    version: "~> 1.12"
+    version: "~> 1.0"
   Sv48:
     presence: optional
-    version: "~> 1.12"
+    version: "~> 1.0"
   Sv57:
     presence: optional
-    version: "~> 1.12"
+    version: "~> 1.0"
   Svnapot:
     presence: optional
     version: "~> 1.0"
@@ -78,3 +78,14 @@ extensions:
       The Sha extension name was introduced in RVA23/RVB23 and wasn't
       in the ratified RVA22 profile but has since been added retroactively
       as a documentation-only change (doesn't affect requirements or functionality).
+requirements:
+  param:
+    allOf:
+      - name: U_MODE_ENDIANNESS
+        equal: little
+      - name: S_MODE_ENDIANNESS
+        equal: little
+      - name: SXLEN
+        includes: 64
+      - name: UXLEN
+        includes: 64

data/.data/spec/std/isa/profile/RVA22U64.yaml

@@ -8,7 +8,7 @@ kind: profile
 name: RVA22U64
 long_name: U-mode extensions for version 22 of the 64-bit Apps Processor profile
 marketing_name: RVA22U64
-mode: Unpriv
+mode: U
 base: 64
 release: { $ref: profile_release/RVA22.yaml# }
 introduction: |
@@ -138,3 +138,10 @@ extra_notes:
     text: |
       The Zfinx, Zdinx, Zhinx, Zhinxmin extensions are incompatible
       with the profile mandates to support the F and D extensions.
+requirements:
+  param:
+    allOf:
+      - name: U_MODE_ENDIANNESS
+        equal: little
+      - name: UXLEN
+        includes: 64

data/.data/spec/std/isa/profile/RVA23S64.yaml

@@ -48,8 +48,21 @@ extensions:
 
   Ssnpm:
     presence: mandatory
+    version: ~> 1.0
   #    Pointer masking, with *senvcfg*.PME supporting, at minimum
 
   Sha:
     presence: mandatory
+    version: ~> 1.0
   # collection of Hypervisor extensions
+requirements:
+  param:
+    allOf:
+      - name: U_MODE_ENDIANNESS
+        equal: little
+      - name: S_MODE_ENDIANNESS
+        equal: little
+      - name: SXLEN
+        includes: 64
+      - name: UXLEN
+        includes: 64

data/.data/spec/std/isa/profile/RVA23U64.yaml

@@ -8,7 +8,7 @@ kind: profile
 name: RVA23U64
 long_name: U-mode extensions for version 23 of the 64-bit Apps Processor profile
 marketing_name: RVA23U64
-mode: Unpriv
+mode: U
 base: 64
 release: { $ref: profile_release/RVA23.yaml# }
 introduction: |
@@ -34,21 +34,27 @@ extensions:
 
   Zfhmin:
     presence: mandatory
+    version: ~> 1.0
 
   V:
     presence: mandatory
+    version: ~> 1.0
 
   Zvfhmin:
     presence: mandatory
+    version: ~> 1.0
 
   Zvbb:
     presence: mandatory
+    version: ~> 1.0
 
   Zvkt:
     presence: mandatory
+    version: ~> 1.0
 
   Supm:
     presence: mandatory
+    version: ~> 1.0
 
   #--------------------------------------------
   # Zvbc is an expansion option in RVB23U64
@@ -60,6 +66,7 @@ extensions:
   Zvbc:
     presence:
       optional: development
+    version: ~> 1.0
 
   #########################################################################
   # TRANSITORY EXPANSION extensions in RVA23U64
@@ -68,3 +75,10 @@ extensions:
   #--------------------------------------------
   # (there are no Transitory expansion options in RVA23U64)
   #--------------------------------------------
+requirements:
+  param:
+    allOf:
+      - name: U_MODE_ENDIANNESS
+        equal: little
+      - name: UXLEN
+        includes: 64

data/.data/spec/std/isa/profile/RVB23S64.yaml

@@ -52,7 +52,7 @@ extensions:
   #########################################################################
   Zifencei:
     presence: mandatory
-    version: "~>1.0"
+    version: "~>2.0"
     note: |
       Instruction-Fetch fence instruction.
 
@@ -190,6 +190,7 @@ extensions:
   Sha:
     presence:
       optional: expansion
+    version: ~> 1.0
     note: |
       The set of augmented hypervisor extensions: H, Ssstateen,
       Shcounterenw, Shvstvala, Shtvala, Shvstvecd, Shvsatpa, Shgatpa
@@ -215,14 +216,14 @@ extensions:
   Sv48:
     presence:
       optional: expansion
-    version: "~>1.13"
+    version: "~>1.0"
     note: |
       Page-based 48-bit virtual-memory system
 
   Sv57:
     presence:
       optional: expansion
-    version: "~>1.13"
+    version: "~>1.0"
     note: |
       Page-based 57-bit virtual-memory system
 
@@ -297,3 +298,14 @@ recommendations:
   - text: |
       Implementations are strongly recommended to raise illegal-instruction
       exceptions on attempts to execute unimplemented opcodes.
+requirements:
+  param:
+    allOf:
+      - name: U_MODE_ENDIANNESS
+        equal: little
+      - name: S_MODE_ENDIANNESS
+        equal: little
+      - name: SXLEN
+        includes: 64
+      - name: UXLEN
+        includes: 64

data/.data/spec/std/isa/profile/RVB23U64.yaml

@@ -8,7 +8,7 @@ kind: profile
 name: RVB23U64
 long_name: U-mode extensions for version 23 of the 64-bit Bespoke Apps Processor profile
 marketing_name: RVB23U64
-mode: Unpriv
+mode: U
 base: 64
 release: { $ref: profile_release/RVB23.yaml# }
 introduction: |
@@ -271,3 +271,10 @@ extensions:
   #--------------------------------------------
   # (there are no Transitory expansion options in RVB23)
   #--------------------------------------------
+requirements:
+  param:
+    allOf:
+      - name: U_MODE_ENDIANNESS
+        equal: little
+      - name: UXLEN
+        includes: 64

data/.data/spec/std/isa/profile/RVI20U32.yaml

@@ -8,7 +8,7 @@ kind: profile
 name: RVI20U32
 long_name: U-mode extensions for version 20 of a 32-bit processor
 marketing_name: RVI20U32
-mode: Unpriv
+mode: U
 base: 32
 release: { $ref: profile_release/RVI20.yaml# }
 introduction: |
@@ -81,3 +81,10 @@ recommendations:
   - text: |
       Implementations are strongly recommended to raise illegal-instruction
       exceptions on attempts to execute unimplemented opcodes.
+requirements:
+  param:
+    allOf:
+      - name: U_MODE_ENDIANNESS
+        equal: little
+      - name: UXLEN
+        includes: 32

data/.data/spec/std/isa/profile/RVI20U64.yaml

@@ -10,3 +10,10 @@ long_name: U-mode extensions for version 20 of a 64-bit processor
 $inherits: "profile/RVI20U32.yaml#"
 base: 64
 marketing_name: RVI20U64
+requirements:
+  param:
+    allOf:
+      - name: U_MODE_ENDIANNESS
+        equal: little
+      - name: UXLEN
+        includes: 64

data/.data/spec/std/isa/register_file/F.yaml

@@ -1,7 +1,7 @@
 # Copyright (c) Animesh Agarwal
 # SPDX-License-Identifier: BSD-3-Clause-Clear
 
-# yaml-language-server: $schema=../../../../schemas/register_file_schema.json
+# yaml-language-server: $schema=../../../schemas/register_file_schema.json
 
 $schema: register_file_schema.json#
 kind: register_file
@@ -13,7 +13,8 @@ description: |
   participates in the standard calling convention defined by the RISC-V ABI spec.
 definedBy: F
 register_class: floating_point
-register_length: FLEN
+register_length(): |
+  return implemented?(ExtensionName::Q) ? 128 : (implemented?(ExtensionName::D) ? 64 : 32);
 registers:
   - name: f0
     abi_mnemonics: [ft0]

data/.data/spec/std/isa/register_file/V.yaml

@@ -1,7 +1,7 @@
 # Copyright (c) Animesh Agarwal
 # SPDX-License-Identifier: BSD-3-Clause-Clear
 
-# yaml-language-server: $schema=../../../../schemas/register_file_schema.json
+# yaml-language-server: $schema=../../../schemas/register_file_schema.json
 
 $schema: register_file_schema.json#
 kind: register_file
@@ -14,7 +14,7 @@ description: |
   participate in argument passing or return values.
 definedBy: V
 register_class: vector
-register_length: VLEN
+register_length(): return VLEN;
 registers:
   - name: v0
     caller_saved: true

data/.data/spec/std/isa/register_file/X.yaml

@@ -14,11 +14,12 @@ description: |
   visible integer state used by the calling convention and execution environment.
 definedBy: I
 register_class: general_purpose
-register_length: MXLEN
+register_length(): return MXLEN;
 registers:
   - name: x0
     abi_mnemonics: [zero]
     roles: [zero]
+    reset_value: "0"
     description: |
       Register x0 is hardwired with all bits equal to 0.
     arch_read(): |

data/lib/udb/ESPRESSO_VERSION

@@ -1 +1 @@
-espresso-1.0
+espresso-18f59c7

data/lib/udb/architecture.rb

@@ -6,7 +6,7 @@
 
 # The Architecture class is the API to the architecture database.
 # The "database" contains RISC-V standards including extensions, instructions,
-# CSRs, Profiles, and Certificates.
+# CSRs, and Profiles.
 # The Architecture class is used by backends to export the information in the
 # architecture database to create various outputs.
 #
@@ -21,8 +21,6 @@
 #   Instruction     instructions()      instruction_hash()      instruction(name)
 #   Csr             csrs()              csr_hash()              csr(name)
 #   Mmr             mmrs()              mmr_hash()              mmr(name)
-#   ProcCertClass   proc_cert_classes() proc_cert_class_hash()  proc_cert_class(name)
-#   ProcCertModel   proc_cert_models()  proc_cert_model_hash()  proc_cert_model(name)
 #   ProfileFamily   profile_families()  profile_family_hash()   profile_family(name)
 #   ProfileRelease  profile_releases()  profile_release_hash()  profile_release(name)
 #   Profile         profiles()          profile_hash()          profile(name)
@@ -48,7 +46,6 @@ require "pathname"
 require "sorbet-runtime"
 require "yaml"
 
-require_relative "obj/certificate"
 require_relative "obj/csr"
 require_relative "obj/csr_field"
 require_relative "obj/register_file"
@@ -128,7 +125,7 @@ module Udb
       },
       {
         fn_name: "register_file",
-        arch_dir: "register",
+        arch_dir: "register_file",
         klass: RegisterFile,
         kind: DatabaseObject::Kind::RegisterFile
       },
@@ -156,18 +153,6 @@ module Udb
         klass: InterruptCode,
         kind: DatabaseObject::Kind::InterruptCode
       },
-      {
-        fn_name: "proc_cert_class",
-        arch_dir: "proc_cert_class",
-        klass: ProcCertClass,
-        kind: DatabaseObject::Kind::ProcessorCertificateClass
-      },
-      {
-        fn_name: "proc_cert_model",
-        arch_dir: "proc_cert_model",
-        klass: ProcCertModel,
-        kind: DatabaseObject::Kind::ProcessorCertificateModel
-      },
       {
         fn_name: "manual",
         arch_dir: "manual",
@@ -229,7 +214,7 @@ module Udb
     def portfolio_classes
       return @portfolio_classes unless @portfolio_classes.nil?
 
-      @portfolio_classes = profile_families.concat(proc_cert_classes).sort_by!(&:name).freeze
+      @portfolio_classes = profile_families.sort_by!(&:name).freeze
     end
 
     # @return Hash of all portfolio classes defined in the architecture
@@ -252,7 +237,7 @@ module Udb
     def portfolios
       return @portfolios unless @portfolios.nil?
 
-      @portfolios = @profiles.concat(@certificates).sort_by!(&:name)
+      @portfolios = profiles.sort_by!(&:name)
     end
 
     # @return [Hash<String, Portfolio>] Hash of all portfolios defined in the architecture
@@ -285,12 +270,6 @@ module Udb
       obj = T.let(nil, T.untyped)
       obj =
         case file_path
-        when /^proc_cert_class.*/
-          proc_cert_class_name = File.basename(file_path, ".yaml")
-          proc_cert_class(proc_cert_class_name)
-        when /^proc_cert_model.*/
-          proc_cert_model_name = File.basename(file_path, ".yaml")
-          proc_cert_model(proc_cert_model_name)
         when /^csr.*/
           csr_name = File.basename(file_path, ".yaml")
           csr(csr_name)