crabstone 3.0.3 → 4.0.4

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (347) hide show
  1. checksums.yaml +5 -5
  2. data/CHANGES.md +59 -42
  3. data/README.md +37 -39
  4. data/lib/{arch → crabstone/arch/3}/arm.rb +28 -49
  5. data/lib/crabstone/arch/3/arm64.rb +124 -0
  6. data/lib/{arch → crabstone/arch/3}/arm64_const.rb +45 -86
  7. data/lib/{arch → crabstone/arch/3}/arm_const.rb +19 -47
  8. data/lib/crabstone/arch/3/mips.rb +57 -0
  9. data/lib/{arch → crabstone/arch/3}/mips_const.rb +18 -38
  10. data/lib/crabstone/arch/3/ppc.rb +73 -0
  11. data/lib/{arch → crabstone/arch/3}/ppc_const.rb +27 -43
  12. data/lib/crabstone/arch/3/sparc.rb +60 -0
  13. data/lib/{arch → crabstone/arch/3}/sparc_const.rb +49 -67
  14. data/lib/crabstone/arch/3/sysz.rb +67 -0
  15. data/lib/{arch → crabstone/arch/3}/sysz_const.rb +11 -25
  16. data/lib/crabstone/arch/3/x86.rb +82 -0
  17. data/lib/{arch → crabstone/arch/3}/x86_const.rb +15 -36
  18. data/lib/crabstone/arch/3/xcore.rb +59 -0
  19. data/lib/{arch → crabstone/arch/3}/xcore_const.rb +10 -22
  20. data/lib/crabstone/arch/4/arm.rb +110 -0
  21. data/lib/crabstone/arch/4/arm64.rb +125 -0
  22. data/lib/crabstone/arch/4/arm64_const.rb +1016 -0
  23. data/lib/crabstone/arch/4/arm_const.rb +785 -0
  24. data/lib/crabstone/arch/4/evm.rb +20 -0
  25. data/lib/crabstone/arch/4/evm_const.rb +161 -0
  26. data/lib/crabstone/arch/4/m680x.rb +106 -0
  27. data/lib/crabstone/arch/4/m680x_const.rb +426 -0
  28. data/lib/crabstone/arch/4/m68k.rb +129 -0
  29. data/lib/crabstone/arch/4/m68k_const.rb +496 -0
  30. data/lib/crabstone/arch/4/mips.rb +57 -0
  31. data/lib/crabstone/arch/4/mips_const.rb +869 -0
  32. data/lib/crabstone/arch/4/ppc.rb +73 -0
  33. data/lib/crabstone/arch/4/ppc_const.rb +1375 -0
  34. data/lib/crabstone/arch/4/sparc.rb +60 -0
  35. data/lib/crabstone/arch/4/sparc_const.rb +439 -0
  36. data/lib/crabstone/arch/4/sysz.rb +67 -0
  37. data/lib/crabstone/arch/4/sysz_const.rb +763 -0
  38. data/lib/crabstone/arch/4/tms320c64x.rb +87 -0
  39. data/lib/crabstone/arch/4/tms320c64x_const.rb +287 -0
  40. data/lib/crabstone/arch/4/x86.rb +91 -0
  41. data/lib/crabstone/arch/4/x86_const.rb +1972 -0
  42. data/lib/crabstone/arch/4/xcore.rb +59 -0
  43. data/lib/crabstone/arch/4/xcore_const.rb +171 -0
  44. data/lib/crabstone/arch/extension.rb +27 -0
  45. data/lib/crabstone/arch/register.rb +34 -0
  46. data/lib/crabstone/arch.rb +37 -0
  47. data/lib/crabstone/binding/3/detail.rb +36 -0
  48. data/lib/crabstone/binding/3/instruction.rb +23 -0
  49. data/lib/crabstone/binding/4/detail.rb +40 -0
  50. data/lib/crabstone/binding/4/instruction.rb +23 -0
  51. data/lib/crabstone/binding/structs.rb +32 -0
  52. data/lib/crabstone/binding.rb +59 -0
  53. data/lib/crabstone/constants.rb +110 -0
  54. data/lib/crabstone/cs_version.rb +57 -0
  55. data/lib/crabstone/disassembler.rb +147 -0
  56. data/lib/crabstone/error.rb +74 -0
  57. data/lib/crabstone/instruction.rb +178 -0
  58. data/lib/crabstone/version.rb +5 -0
  59. data/lib/crabstone.rb +5 -557
  60. metadata +142 -331
  61. data/MANIFEST +0 -312
  62. data/Rakefile +0 -27
  63. data/bin/genconst +0 -66
  64. data/bin/genreg +0 -99
  65. data/crabstone.gemspec +0 -27
  66. data/examples/hello_world.rb +0 -43
  67. data/lib/arch/arm64.rb +0 -167
  68. data/lib/arch/arm64_registers.rb +0 -295
  69. data/lib/arch/arm_registers.rb +0 -149
  70. data/lib/arch/mips.rb +0 -78
  71. data/lib/arch/mips_registers.rb +0 -208
  72. data/lib/arch/ppc.rb +0 -90
  73. data/lib/arch/ppc_registers.rb +0 -209
  74. data/lib/arch/sparc.rb +0 -79
  75. data/lib/arch/sparc_registers.rb +0 -121
  76. data/lib/arch/systemz.rb +0 -79
  77. data/lib/arch/sysz_registers.rb +0 -66
  78. data/lib/arch/x86.rb +0 -107
  79. data/lib/arch/x86_registers.rb +0 -265
  80. data/lib/arch/xcore.rb +0 -78
  81. data/lib/arch/xcore_registers.rb +0 -57
  82. data/test/MC/AArch64/basic-a64-instructions.s.cs +0 -2014
  83. data/test/MC/AArch64/gicv3-regs.s.cs +0 -111
  84. data/test/MC/AArch64/neon-2velem.s.cs +0 -113
  85. data/test/MC/AArch64/neon-3vdiff.s.cs +0 -143
  86. data/test/MC/AArch64/neon-aba-abd.s.cs +0 -28
  87. data/test/MC/AArch64/neon-across.s.cs +0 -40
  88. data/test/MC/AArch64/neon-add-pairwise.s.cs +0 -11
  89. data/test/MC/AArch64/neon-add-sub-instructions.s.cs +0 -21
  90. data/test/MC/AArch64/neon-bitwise-instructions.s.cs +0 -17
  91. data/test/MC/AArch64/neon-compare-instructions.s.cs +0 -136
  92. data/test/MC/AArch64/neon-crypto.s.cs +0 -15
  93. data/test/MC/AArch64/neon-extract.s.cs +0 -3
  94. data/test/MC/AArch64/neon-facge-facgt.s.cs +0 -13
  95. data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +0 -7
  96. data/test/MC/AArch64/neon-halving-add-sub.s.cs +0 -25
  97. data/test/MC/AArch64/neon-max-min-pairwise.s.cs +0 -37
  98. data/test/MC/AArch64/neon-max-min.s.cs +0 -37
  99. data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +0 -19
  100. data/test/MC/AArch64/neon-mov.s.cs +0 -74
  101. data/test/MC/AArch64/neon-mul-div-instructions.s.cs +0 -24
  102. data/test/MC/AArch64/neon-perm.s.cs +0 -43
  103. data/test/MC/AArch64/neon-rounding-halving-add.s.cs +0 -13
  104. data/test/MC/AArch64/neon-rounding-shift.s.cs +0 -15
  105. data/test/MC/AArch64/neon-saturating-add-sub.s.cs +0 -29
  106. data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +0 -15
  107. data/test/MC/AArch64/neon-saturating-shift.s.cs +0 -15
  108. data/test/MC/AArch64/neon-scalar-abs.s.cs +0 -8
  109. data/test/MC/AArch64/neon-scalar-add-sub.s.cs +0 -3
  110. data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +0 -13
  111. data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +0 -13
  112. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +0 -15
  113. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +0 -18
  114. data/test/MC/AArch64/neon-scalar-compare.s.cs +0 -12
  115. data/test/MC/AArch64/neon-scalar-cvt.s.cs +0 -34
  116. data/test/MC/AArch64/neon-scalar-dup.s.cs +0 -23
  117. data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +0 -10
  118. data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +0 -21
  119. data/test/MC/AArch64/neon-scalar-mul.s.cs +0 -13
  120. data/test/MC/AArch64/neon-scalar-neg.s.cs +0 -6
  121. data/test/MC/AArch64/neon-scalar-recip.s.cs +0 -11
  122. data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +0 -3
  123. data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +0 -3
  124. data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +0 -25
  125. data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +0 -9
  126. data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +0 -9
  127. data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +0 -42
  128. data/test/MC/AArch64/neon-scalar-shift.s.cs +0 -3
  129. data/test/MC/AArch64/neon-shift-left-long.s.cs +0 -13
  130. data/test/MC/AArch64/neon-shift.s.cs +0 -22
  131. data/test/MC/AArch64/neon-simd-copy.s.cs +0 -42
  132. data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +0 -197
  133. data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +0 -129
  134. data/test/MC/AArch64/neon-simd-misc.s.cs +0 -213
  135. data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +0 -107
  136. data/test/MC/AArch64/neon-simd-shift.s.cs +0 -151
  137. data/test/MC/AArch64/neon-tbl.s.cs +0 -21
  138. data/test/MC/AArch64/trace-regs.s.cs +0 -383
  139. data/test/MC/ARM/arm-aliases.s.cs +0 -7
  140. data/test/MC/ARM/arm-arithmetic-aliases.s.cs +0 -50
  141. data/test/MC/ARM/arm-it-block.s.cs +0 -2
  142. data/test/MC/ARM/arm-memory-instructions.s.cs +0 -138
  143. data/test/MC/ARM/arm-shift-encoding.s.cs +0 -50
  144. data/test/MC/ARM/arm-thumb-trustzone.s.cs +0 -3
  145. data/test/MC/ARM/arm-trustzone.s.cs +0 -3
  146. data/test/MC/ARM/arm_addrmode2.s.cs +0 -15
  147. data/test/MC/ARM/arm_addrmode3.s.cs +0 -9
  148. data/test/MC/ARM/arm_instructions.s.cs +0 -25
  149. data/test/MC/ARM/basic-arm-instructions-v8.s.cs +0 -10
  150. data/test/MC/ARM/basic-arm-instructions.s.cs +0 -997
  151. data/test/MC/ARM/basic-thumb-instructions.s.cs +0 -130
  152. data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +0 -1
  153. data/test/MC/ARM/basic-thumb2-instructions.s.cs +0 -1242
  154. data/test/MC/ARM/crc32-thumb.s.cs +0 -7
  155. data/test/MC/ARM/crc32.s.cs +0 -7
  156. data/test/MC/ARM/dot-req.s.cs +0 -3
  157. data/test/MC/ARM/fp-armv8.s.cs +0 -52
  158. data/test/MC/ARM/idiv-thumb.s.cs +0 -3
  159. data/test/MC/ARM/idiv.s.cs +0 -3
  160. data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +0 -15
  161. data/test/MC/ARM/load-store-acquire-release-v8.s.cs +0 -15
  162. data/test/MC/ARM/mode-switch.s.cs +0 -7
  163. data/test/MC/ARM/neon-abs-encoding.s.cs +0 -15
  164. data/test/MC/ARM/neon-absdiff-encoding.s.cs +0 -39
  165. data/test/MC/ARM/neon-add-encoding.s.cs +0 -119
  166. data/test/MC/ARM/neon-bitcount-encoding.s.cs +0 -15
  167. data/test/MC/ARM/neon-bitwise-encoding.s.cs +0 -126
  168. data/test/MC/ARM/neon-cmp-encoding.s.cs +0 -88
  169. data/test/MC/ARM/neon-convert-encoding.s.cs +0 -27
  170. data/test/MC/ARM/neon-crypto.s.cs +0 -16
  171. data/test/MC/ARM/neon-dup-encoding.s.cs +0 -13
  172. data/test/MC/ARM/neon-minmax-encoding.s.cs +0 -57
  173. data/test/MC/ARM/neon-mov-encoding.s.cs +0 -76
  174. data/test/MC/ARM/neon-mul-accum-encoding.s.cs +0 -39
  175. data/test/MC/ARM/neon-mul-encoding.s.cs +0 -72
  176. data/test/MC/ARM/neon-neg-encoding.s.cs +0 -15
  177. data/test/MC/ARM/neon-pairwise-encoding.s.cs +0 -47
  178. data/test/MC/ARM/neon-reciprocal-encoding.s.cs +0 -13
  179. data/test/MC/ARM/neon-reverse-encoding.s.cs +0 -13
  180. data/test/MC/ARM/neon-satshift-encoding.s.cs +0 -75
  181. data/test/MC/ARM/neon-shift-encoding.s.cs +0 -238
  182. data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +0 -97
  183. data/test/MC/ARM/neon-shuffle-encoding.s.cs +0 -59
  184. data/test/MC/ARM/neon-sub-encoding.s.cs +0 -82
  185. data/test/MC/ARM/neon-table-encoding.s.cs +0 -9
  186. data/test/MC/ARM/neon-v8.s.cs +0 -38
  187. data/test/MC/ARM/neon-vld-encoding.s.cs +0 -213
  188. data/test/MC/ARM/neon-vst-encoding.s.cs +0 -120
  189. data/test/MC/ARM/neon-vswp.s.cs +0 -3
  190. data/test/MC/ARM/neont2-abs-encoding.s.cs +0 -15
  191. data/test/MC/ARM/neont2-absdiff-encoding.s.cs +0 -39
  192. data/test/MC/ARM/neont2-add-encoding.s.cs +0 -65
  193. data/test/MC/ARM/neont2-bitcount-encoding.s.cs +0 -15
  194. data/test/MC/ARM/neont2-bitwise-encoding.s.cs +0 -15
  195. data/test/MC/ARM/neont2-cmp-encoding.s.cs +0 -17
  196. data/test/MC/ARM/neont2-convert-encoding.s.cs +0 -19
  197. data/test/MC/ARM/neont2-dup-encoding.s.cs +0 -19
  198. data/test/MC/ARM/neont2-minmax-encoding.s.cs +0 -57
  199. data/test/MC/ARM/neont2-mov-encoding.s.cs +0 -58
  200. data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +0 -41
  201. data/test/MC/ARM/neont2-mul-encoding.s.cs +0 -31
  202. data/test/MC/ARM/neont2-neg-encoding.s.cs +0 -15
  203. data/test/MC/ARM/neont2-pairwise-encoding.s.cs +0 -43
  204. data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +0 -13
  205. data/test/MC/ARM/neont2-reverse-encoding.s.cs +0 -13
  206. data/test/MC/ARM/neont2-satshift-encoding.s.cs +0 -75
  207. data/test/MC/ARM/neont2-shift-encoding.s.cs +0 -80
  208. data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +0 -97
  209. data/test/MC/ARM/neont2-shuffle-encoding.s.cs +0 -23
  210. data/test/MC/ARM/neont2-sub-encoding.s.cs +0 -23
  211. data/test/MC/ARM/neont2-table-encoding.s.cs +0 -9
  212. data/test/MC/ARM/neont2-vld-encoding.s.cs +0 -51
  213. data/test/MC/ARM/neont2-vst-encoding.s.cs +0 -48
  214. data/test/MC/ARM/simple-fp-encoding.s.cs +0 -157
  215. data/test/MC/ARM/thumb-fp-armv8.s.cs +0 -51
  216. data/test/MC/ARM/thumb-hints.s.cs +0 -12
  217. data/test/MC/ARM/thumb-neon-crypto.s.cs +0 -16
  218. data/test/MC/ARM/thumb-neon-v8.s.cs +0 -38
  219. data/test/MC/ARM/thumb-shift-encoding.s.cs +0 -19
  220. data/test/MC/ARM/thumb.s.cs +0 -19
  221. data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +0 -2
  222. data/test/MC/ARM/thumb2-branches.s.cs +0 -85
  223. data/test/MC/ARM/thumb2-mclass.s.cs +0 -41
  224. data/test/MC/ARM/thumb2-narrow-dp.ll.cs +0 -379
  225. data/test/MC/ARM/thumb2-pldw.s.cs +0 -2
  226. data/test/MC/ARM/vfp4-thumb.s.cs +0 -13
  227. data/test/MC/ARM/vfp4.s.cs +0 -13
  228. data/test/MC/ARM/vpush-vpop-thumb.s.cs +0 -9
  229. data/test/MC/ARM/vpush-vpop.s.cs +0 -9
  230. data/test/MC/Mips/hilo-addressing.s.cs +0 -4
  231. data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +0 -33
  232. data/test/MC/Mips/micromips-alu-instructions.s.cs +0 -33
  233. data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +0 -11
  234. data/test/MC/Mips/micromips-branch-instructions.s.cs +0 -11
  235. data/test/MC/Mips/micromips-expansions.s.cs +0 -20
  236. data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +0 -5
  237. data/test/MC/Mips/micromips-jump-instructions.s.cs +0 -6
  238. data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +0 -9
  239. data/test/MC/Mips/micromips-loadstore-instructions.s.cs +0 -9
  240. data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +0 -5
  241. data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +0 -5
  242. data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +0 -5
  243. data/test/MC/Mips/micromips-movcond-instructions.s.cs +0 -5
  244. data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +0 -5
  245. data/test/MC/Mips/micromips-multiply-instructions.s.cs +0 -5
  246. data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +0 -9
  247. data/test/MC/Mips/micromips-shift-instructions.s.cs +0 -9
  248. data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +0 -13
  249. data/test/MC/Mips/micromips-trap-instructions.s.cs +0 -13
  250. data/test/MC/Mips/mips-alu-instructions.s.cs +0 -53
  251. data/test/MC/Mips/mips-control-instructions-64.s.cs +0 -33
  252. data/test/MC/Mips/mips-control-instructions.s.cs +0 -33
  253. data/test/MC/Mips/mips-coprocessor-encodings.s.cs +0 -17
  254. data/test/MC/Mips/mips-dsp-instructions.s.cs +0 -43
  255. data/test/MC/Mips/mips-expansions.s.cs +0 -20
  256. data/test/MC/Mips/mips-fpu-instructions.s.cs +0 -93
  257. data/test/MC/Mips/mips-jump-instructions.s.cs +0 -1
  258. data/test/MC/Mips/mips-memory-instructions.s.cs +0 -17
  259. data/test/MC/Mips/mips-register-names.s.cs +0 -33
  260. data/test/MC/Mips/mips64-alu-instructions.s.cs +0 -47
  261. data/test/MC/Mips/mips64-instructions.s.cs +0 -3
  262. data/test/MC/Mips/mips64-register-names.s.cs +0 -33
  263. data/test/MC/Mips/mips_directives.s.cs +0 -12
  264. data/test/MC/Mips/nabi-regs.s.cs +0 -12
  265. data/test/MC/Mips/set-at-directive.s.cs +0 -6
  266. data/test/MC/Mips/test_2r.s.cs +0 -16
  267. data/test/MC/Mips/test_2rf.s.cs +0 -33
  268. data/test/MC/Mips/test_3r.s.cs +0 -243
  269. data/test/MC/Mips/test_3rf.s.cs +0 -83
  270. data/test/MC/Mips/test_bit.s.cs +0 -49
  271. data/test/MC/Mips/test_cbranch.s.cs +0 -11
  272. data/test/MC/Mips/test_ctrlregs.s.cs +0 -33
  273. data/test/MC/Mips/test_elm.s.cs +0 -16
  274. data/test/MC/Mips/test_elm_insert.s.cs +0 -4
  275. data/test/MC/Mips/test_elm_insve.s.cs +0 -5
  276. data/test/MC/Mips/test_i10.s.cs +0 -5
  277. data/test/MC/Mips/test_i5.s.cs +0 -45
  278. data/test/MC/Mips/test_i8.s.cs +0 -11
  279. data/test/MC/Mips/test_lsa.s.cs +0 -5
  280. data/test/MC/Mips/test_mi10.s.cs +0 -24
  281. data/test/MC/Mips/test_vec.s.cs +0 -8
  282. data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +0 -25
  283. data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +0 -35
  284. data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +0 -535
  285. data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +0 -110
  286. data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +0 -170
  287. data/test/MC/PowerPC/ppc64-encoding.s.cs +0 -202
  288. data/test/MC/PowerPC/ppc64-operands.s.cs +0 -32
  289. data/test/MC/README +0 -6
  290. data/test/MC/Sparc/sparc-alu-instructions.s.cs +0 -47
  291. data/test/MC/Sparc/sparc-atomic-instructions.s.cs +0 -7
  292. data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +0 -11
  293. data/test/MC/Sparc/sparc-fp-instructions.s.cs +0 -59
  294. data/test/MC/Sparc/sparc-mem-instructions.s.cs +0 -25
  295. data/test/MC/Sparc/sparc-vis.s.cs +0 -2
  296. data/test/MC/Sparc/sparc64-alu-instructions.s.cs +0 -13
  297. data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +0 -102
  298. data/test/MC/Sparc/sparcv8-instructions.s.cs +0 -7
  299. data/test/MC/Sparc/sparcv9-instructions.s.cs +0 -1
  300. data/test/MC/SystemZ/insn-good-z196.s.cs +0 -589
  301. data/test/MC/SystemZ/insn-good.s.cs +0 -2265
  302. data/test/MC/SystemZ/regs-good.s.cs +0 -45
  303. data/test/MC/X86/3DNow.s.cs +0 -29
  304. data/test/MC/X86/address-size.s.cs +0 -5
  305. data/test/MC/X86/avx512-encodings.s.cs +0 -12
  306. data/test/MC/X86/intel-syntax-encoding.s.cs +0 -30
  307. data/test/MC/X86/x86-32-avx.s.cs +0 -833
  308. data/test/MC/X86/x86-32-fma3.s.cs +0 -169
  309. data/test/MC/X86/x86-32-ms-inline-asm.s.cs +0 -27
  310. data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +0 -11
  311. data/test/MC/X86/x86_64-avx-encoding.s.cs +0 -1058
  312. data/test/MC/X86/x86_64-bmi-encoding.s.cs +0 -51
  313. data/test/MC/X86/x86_64-encoding.s.cs +0 -59
  314. data/test/MC/X86/x86_64-fma3-encoding.s.cs +0 -169
  315. data/test/MC/X86/x86_64-fma4-encoding.s.cs +0 -98
  316. data/test/MC/X86/x86_64-hle-encoding.s.cs +0 -3
  317. data/test/MC/X86/x86_64-imm-widths.s.cs +0 -27
  318. data/test/MC/X86/x86_64-rand-encoding.s.cs +0 -13
  319. data/test/MC/X86/x86_64-rtm-encoding.s.cs +0 -4
  320. data/test/MC/X86/x86_64-sse4a.s.cs +0 -1
  321. data/test/MC/X86/x86_64-tbm-encoding.s.cs +0 -40
  322. data/test/MC/X86/x86_64-xop-encoding.s.cs +0 -152
  323. data/test/README +0 -6
  324. data/test/test.rb +0 -205
  325. data/test/test.rb.SPEC +0 -235
  326. data/test/test_arm.rb +0 -202
  327. data/test/test_arm.rb.SPEC +0 -275
  328. data/test/test_arm64.rb +0 -150
  329. data/test/test_arm64.rb.SPEC +0 -116
  330. data/test/test_detail.rb +0 -228
  331. data/test/test_detail.rb.SPEC +0 -322
  332. data/test/test_exhaustive.rb +0 -80
  333. data/test/test_mips.rb +0 -118
  334. data/test/test_mips.rb.SPEC +0 -91
  335. data/test/test_ppc.rb +0 -137
  336. data/test/test_ppc.rb.SPEC +0 -84
  337. data/test/test_sanity.rb +0 -83
  338. data/test/test_skipdata.rb +0 -111
  339. data/test/test_skipdata.rb.SPEC +0 -58
  340. data/test/test_sparc.rb +0 -113
  341. data/test/test_sparc.rb.SPEC +0 -116
  342. data/test/test_sysz.rb +0 -111
  343. data/test/test_sysz.rb.SPEC +0 -61
  344. data/test/test_x86.rb +0 -189
  345. data/test/test_x86.rb.SPEC +0 -579
  346. data/test/test_xcore.rb +0 -100
  347. data/test/test_xcore.rb.SPEC +0 -75
data/test/MC/PowerPC/ppc64-encoding-ext.s.cs DELETED
@@ -1,535 +0,0 @@
1
- # CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CS_OPT_SYNTAX_NOREGNAME
2
- 0x4d,0x82,0x00,0x20 = beqlr 0
3
- 0x4d,0x86,0x00,0x20 = beqlr 1
4
- 0x4d,0x8a,0x00,0x20 = beqlr 2
5
- 0x4d,0x8e,0x00,0x20 = beqlr 3
6
- 0x4d,0x92,0x00,0x20 = beqlr 4
7
- 0x4d,0x96,0x00,0x20 = beqlr 5
8
- 0x4d,0x9a,0x00,0x20 = beqlr 6
9
- 0x4d,0x9e,0x00,0x20 = beqlr 7
10
- 0x4d,0x80,0x00,0x20 = bclr 12, 0, 0
11
- 0x4d,0x81,0x00,0x20 = bclr 12, 1, 0
12
- 0x4d,0x82,0x00,0x20 = bclr 12, 2, 0
13
- 0x4d,0x83,0x00,0x20 = bclr 12, 3, 0
14
- 0x4d,0x83,0x00,0x20 = bclr 12, 3, 0
15
- 0x4d,0x84,0x00,0x20 = bclr 12, 4, 0
16
- 0x4d,0x85,0x00,0x20 = bclr 12, 5, 0
17
- 0x4d,0x86,0x00,0x20 = bclr 12, 6, 0
18
- 0x4d,0x87,0x00,0x20 = bclr 12, 7, 0
19
- 0x4d,0x87,0x00,0x20 = bclr 12, 7, 0
20
- 0x4d,0x88,0x00,0x20 = bclr 12, 8, 0
21
- 0x4d,0x89,0x00,0x20 = bclr 12, 9, 0
22
- 0x4d,0x8a,0x00,0x20 = bclr 12, 10, 0
23
- 0x4d,0x8b,0x00,0x20 = bclr 12, 11, 0
24
- 0x4d,0x8b,0x00,0x20 = bclr 12, 11, 0
25
- 0x4d,0x8c,0x00,0x20 = bclr 12, 12, 0
26
- 0x4d,0x8d,0x00,0x20 = bclr 12, 13, 0
27
- 0x4d,0x8e,0x00,0x20 = bclr 12, 14, 0
28
- 0x4d,0x8f,0x00,0x20 = bclr 12, 15, 0
29
- 0x4d,0x8f,0x00,0x20 = bclr 12, 15, 0
30
- 0x4d,0x90,0x00,0x20 = bclr 12, 16, 0
31
- 0x4d,0x91,0x00,0x20 = bclr 12, 17, 0
32
- 0x4d,0x92,0x00,0x20 = bclr 12, 18, 0
33
- 0x4d,0x93,0x00,0x20 = bclr 12, 19, 0
34
- 0x4d,0x93,0x00,0x20 = bclr 12, 19, 0
35
- 0x4d,0x94,0x00,0x20 = bclr 12, 20, 0
36
- 0x4d,0x95,0x00,0x20 = bclr 12, 21, 0
37
- 0x4d,0x96,0x00,0x20 = bclr 12, 22, 0
38
- 0x4d,0x97,0x00,0x20 = bclr 12, 23, 0
39
- 0x4d,0x97,0x00,0x20 = bclr 12, 23, 0
40
- 0x4d,0x98,0x00,0x20 = bclr 12, 24, 0
41
- 0x4d,0x99,0x00,0x20 = bclr 12, 25, 0
42
- 0x4d,0x9a,0x00,0x20 = bclr 12, 26, 0
43
- 0x4d,0x9b,0x00,0x20 = bclr 12, 27, 0
44
- 0x4d,0x9b,0x00,0x20 = bclr 12, 27, 0
45
- 0x4d,0x9c,0x00,0x20 = bclr 12, 28, 0
46
- 0x4d,0x9d,0x00,0x20 = bclr 12, 29, 0
47
- 0x4d,0x9e,0x00,0x20 = bclr 12, 30, 0
48
- 0x4d,0x9f,0x00,0x20 = bclr 12, 31, 0
49
- 0x4d,0x9f,0x00,0x20 = bclr 12, 31, 0
50
- 0x4e,0x80,0x00,0x20 = blr
51
- 0x4e,0x80,0x04,0x20 = bctr
52
- 0x4e,0x80,0x00,0x21 = blrl
53
- 0x4e,0x80,0x04,0x21 = bctrl
54
- 0x4d,0x82,0x00,0x20 = bclr 12, 2, 0
55
- 0x4d,0x82,0x04,0x20 = bcctr 12, 2, 0
56
- 0x4d,0x82,0x00,0x21 = bclrl 12, 2, 0
57
- 0x4d,0x82,0x04,0x21 = bcctrl 12, 2, 0
58
- 0x4d,0xe2,0x00,0x20 = bclr 15, 2, 0
59
- 0x4d,0xe2,0x04,0x20 = bcctr 15, 2, 0
60
- 0x4d,0xe2,0x00,0x21 = bclrl 15, 2, 0
61
- 0x4d,0xe2,0x04,0x21 = bcctrl 15, 2, 0
62
- 0x4d,0xc2,0x00,0x20 = bclr 14, 2, 0
63
- 0x4d,0xc2,0x04,0x20 = bcctr 14, 2, 0
64
- 0x4d,0xc2,0x00,0x21 = bclrl 14, 2, 0
65
- 0x4d,0xc2,0x04,0x21 = bcctrl 14, 2, 0
66
- 0x4c,0x82,0x00,0x20 = bclr 4, 2, 0
67
- 0x4c,0x82,0x04,0x20 = bcctr 4, 2, 0
68
- 0x4c,0x82,0x00,0x21 = bclrl 4, 2, 0
69
- 0x4c,0x82,0x04,0x21 = bcctrl 4, 2, 0
70
- 0x4c,0xe2,0x00,0x20 = bclr 7, 2, 0
71
- 0x4c,0xe2,0x04,0x20 = bcctr 7, 2, 0
72
- 0x4c,0xe2,0x00,0x21 = bclrl 7, 2, 0
73
- 0x4c,0xe2,0x04,0x21 = bcctrl 7, 2, 0
74
- 0x4c,0xc2,0x00,0x20 = bclr 6, 2, 0
75
- 0x4c,0xc2,0x04,0x20 = bcctr 6, 2, 0
76
- 0x4c,0xc2,0x00,0x21 = bclrl 6, 2, 0
77
- 0x4c,0xc2,0x04,0x21 = bcctrl 6, 2, 0
78
- 0x4e,0x00,0x00,0x20 = bdnzlr
79
- 0x4e,0x00,0x00,0x21 = bdnzlrl
80
- 0x4f,0x20,0x00,0x20 = bdnzlr+
81
- 0x4f,0x20,0x00,0x21 = bdnzlrl+
82
- 0x4f,0x00,0x00,0x20 = bdnzlr-
83
- 0x4f,0x00,0x00,0x21 = bdnzlrl-
84
- 0x4d,0x02,0x00,0x20 = bclr 8, 2, 0
85
- 0x4d,0x02,0x00,0x21 = bclrl 8, 2, 0
86
- 0x4c,0x02,0x00,0x20 = bclr 0, 2, 0
87
- 0x4c,0x02,0x00,0x21 = bclrl 0, 2, 0
88
- 0x4e,0x40,0x00,0x20 = bdzlr
89
- 0x4e,0x40,0x00,0x21 = bdzlrl
90
- 0x4f,0x60,0x00,0x20 = bdzlr+
91
- 0x4f,0x60,0x00,0x21 = bdzlrl+
92
- 0x4f,0x40,0x00,0x20 = bdzlr-
93
- 0x4f,0x40,0x00,0x21 = bdzlrl-
94
- 0x4d,0x42,0x00,0x20 = bclr 10, 2, 0
95
- 0x4d,0x42,0x00,0x21 = bclrl 10, 2, 0
96
- 0x4c,0x42,0x00,0x20 = bclr 2, 2, 0
97
- 0x4c,0x42,0x00,0x21 = bclrl 2, 2, 0
98
- 0x4d,0x88,0x00,0x20 = bltlr 2
99
- 0x4d,0x80,0x00,0x20 = bltlr 0
100
- 0x4d,0x88,0x04,0x20 = bltctr 2
101
- 0x4d,0x80,0x04,0x20 = bltctr 0
102
- 0x4d,0x88,0x00,0x21 = bltlrl 2
103
- 0x4d,0x80,0x00,0x21 = bltlrl 0
104
- 0x4d,0x88,0x04,0x21 = bltctrl 2
105
- 0x4d,0x80,0x04,0x21 = bltctrl 0
106
- 0x4d,0xe8,0x00,0x20 = bltlr+ 2
107
- 0x4d,0xe0,0x00,0x20 = bltlr+ 0
108
- 0x4d,0xe8,0x04,0x20 = bltctr+ 2
109
- 0x4d,0xe0,0x04,0x20 = bltctr+ 0
110
- 0x4d,0xe8,0x00,0x21 = bltlrl+ 2
111
- 0x4d,0xe0,0x00,0x21 = bltlrl+ 0
112
- 0x4d,0xe8,0x04,0x21 = bltctrl+ 2
113
- 0x4d,0xe0,0x04,0x21 = bltctrl+ 0
114
- 0x4d,0xc8,0x00,0x20 = bltlr- 2
115
- 0x4d,0xc0,0x00,0x20 = bltlr- 0
116
- 0x4d,0xc8,0x04,0x20 = bltctr- 2
117
- 0x4d,0xc0,0x04,0x20 = bltctr- 0
118
- 0x4d,0xc8,0x00,0x21 = bltlrl- 2
119
- 0x4d,0xc0,0x00,0x21 = bltlrl- 0
120
- 0x4d,0xc8,0x04,0x21 = bltctrl- 2
121
- 0x4d,0xc0,0x04,0x21 = bltctrl- 0
122
- 0x4c,0x89,0x00,0x20 = blelr 2
123
- 0x4c,0x81,0x00,0x20 = blelr 0
124
- 0x4c,0x89,0x04,0x20 = blectr 2
125
- 0x4c,0x81,0x04,0x20 = blectr 0
126
- 0x4c,0x89,0x00,0x21 = blelrl 2
127
- 0x4c,0x81,0x00,0x21 = blelrl 0
128
- 0x4c,0x89,0x04,0x21 = blectrl 2
129
- 0x4c,0x81,0x04,0x21 = blectrl 0
130
- 0x4c,0xe9,0x00,0x20 = blelr+ 2
131
- 0x4c,0xe1,0x00,0x20 = blelr+ 0
132
- 0x4c,0xe9,0x04,0x20 = blectr+ 2
133
- 0x4c,0xe1,0x04,0x20 = blectr+ 0
134
- 0x4c,0xe9,0x00,0x21 = blelrl+ 2
135
- 0x4c,0xe1,0x00,0x21 = blelrl+ 0
136
- 0x4c,0xe9,0x04,0x21 = blectrl+ 2
137
- 0x4c,0xe1,0x04,0x21 = blectrl+ 0
138
- 0x4c,0xc9,0x00,0x20 = blelr- 2
139
- 0x4c,0xc1,0x00,0x20 = blelr- 0
140
- 0x4c,0xc9,0x04,0x20 = blectr- 2
141
- 0x4c,0xc1,0x04,0x20 = blectr- 0
142
- 0x4c,0xc9,0x00,0x21 = blelrl- 2
143
- 0x4c,0xc1,0x00,0x21 = blelrl- 0
144
- 0x4c,0xc9,0x04,0x21 = blectrl- 2
145
- 0x4c,0xc1,0x04,0x21 = blectrl- 0
146
- 0x4d,0x8a,0x00,0x20 = beqlr 2
147
- 0x4d,0x82,0x00,0x20 = beqlr 0
148
- 0x4d,0x8a,0x04,0x20 = beqctr 2
149
- 0x4d,0x82,0x04,0x20 = beqctr 0
150
- 0x4d,0x8a,0x00,0x21 = beqlrl 2
151
- 0x4d,0x82,0x00,0x21 = beqlrl 0
152
- 0x4d,0x8a,0x04,0x21 = beqctrl 2
153
- 0x4d,0x82,0x04,0x21 = beqctrl 0
154
- 0x4d,0xea,0x00,0x20 = beqlr+ 2
155
- 0x4d,0xe2,0x00,0x20 = beqlr+ 0
156
- 0x4d,0xea,0x04,0x20 = beqctr+ 2
157
- 0x4d,0xe2,0x04,0x20 = beqctr+ 0
158
- 0x4d,0xea,0x00,0x21 = beqlrl+ 2
159
- 0x4d,0xe2,0x00,0x21 = beqlrl+ 0
160
- 0x4d,0xea,0x04,0x21 = beqctrl+ 2
161
- 0x4d,0xe2,0x04,0x21 = beqctrl+ 0
162
- 0x4d,0xca,0x00,0x20 = beqlr- 2
163
- 0x4d,0xc2,0x00,0x20 = beqlr- 0
164
- 0x4d,0xca,0x04,0x20 = beqctr- 2
165
- 0x4d,0xc2,0x04,0x20 = beqctr- 0
166
- 0x4d,0xca,0x00,0x21 = beqlrl- 2
167
- 0x4d,0xc2,0x00,0x21 = beqlrl- 0
168
- 0x4d,0xca,0x04,0x21 = beqctrl- 2
169
- 0x4d,0xc2,0x04,0x21 = beqctrl- 0
170
- 0x4c,0x88,0x00,0x20 = bgelr 2
171
- 0x4c,0x80,0x00,0x20 = bgelr 0
172
- 0x4c,0x88,0x04,0x20 = bgectr 2
173
- 0x4c,0x80,0x04,0x20 = bgectr 0
174
- 0x4c,0x88,0x00,0x21 = bgelrl 2
175
- 0x4c,0x80,0x00,0x21 = bgelrl 0
176
- 0x4c,0x88,0x04,0x21 = bgectrl 2
177
- 0x4c,0x80,0x04,0x21 = bgectrl 0
178
- 0x4c,0xe8,0x00,0x20 = bgelr+ 2
179
- 0x4c,0xe0,0x00,0x20 = bgelr+ 0
180
- 0x4c,0xe8,0x04,0x20 = bgectr+ 2
181
- 0x4c,0xe0,0x04,0x20 = bgectr+ 0
182
- 0x4c,0xe8,0x00,0x21 = bgelrl+ 2
183
- 0x4c,0xe0,0x00,0x21 = bgelrl+ 0
184
- 0x4c,0xe8,0x04,0x21 = bgectrl+ 2
185
- 0x4c,0xe0,0x04,0x21 = bgectrl+ 0
186
- 0x4c,0xc8,0x00,0x20 = bgelr- 2
187
- 0x4c,0xc0,0x00,0x20 = bgelr- 0
188
- 0x4c,0xc8,0x04,0x20 = bgectr- 2
189
- 0x4c,0xc0,0x04,0x20 = bgectr- 0
190
- 0x4c,0xc8,0x00,0x21 = bgelrl- 2
191
- 0x4c,0xc0,0x00,0x21 = bgelrl- 0
192
- 0x4c,0xc8,0x04,0x21 = bgectrl- 2
193
- 0x4c,0xc0,0x04,0x21 = bgectrl- 0
194
- 0x4d,0x89,0x00,0x20 = bgtlr 2
195
- 0x4d,0x81,0x00,0x20 = bgtlr 0
196
- 0x4d,0x89,0x04,0x20 = bgtctr 2
197
- 0x4d,0x81,0x04,0x20 = bgtctr 0
198
- 0x4d,0x89,0x00,0x21 = bgtlrl 2
199
- 0x4d,0x81,0x00,0x21 = bgtlrl 0
200
- 0x4d,0x89,0x04,0x21 = bgtctrl 2
201
- 0x4d,0x81,0x04,0x21 = bgtctrl 0
202
- 0x4d,0xe9,0x00,0x20 = bgtlr+ 2
203
- 0x4d,0xe1,0x00,0x20 = bgtlr+ 0
204
- 0x4d,0xe9,0x04,0x20 = bgtctr+ 2
205
- 0x4d,0xe1,0x04,0x20 = bgtctr+ 0
206
- 0x4d,0xe9,0x00,0x21 = bgtlrl+ 2
207
- 0x4d,0xe1,0x00,0x21 = bgtlrl+ 0
208
- 0x4d,0xe9,0x04,0x21 = bgtctrl+ 2
209
- 0x4d,0xe1,0x04,0x21 = bgtctrl+ 0
210
- 0x4d,0xc9,0x00,0x20 = bgtlr- 2
211
- 0x4d,0xc1,0x00,0x20 = bgtlr- 0
212
- 0x4d,0xc9,0x04,0x20 = bgtctr- 2
213
- 0x4d,0xc1,0x04,0x20 = bgtctr- 0
214
- 0x4d,0xc9,0x00,0x21 = bgtlrl- 2
215
- 0x4d,0xc1,0x00,0x21 = bgtlrl- 0
216
- 0x4d,0xc9,0x04,0x21 = bgtctrl- 2
217
- 0x4d,0xc1,0x04,0x21 = bgtctrl- 0
218
- 0x4c,0x88,0x00,0x20 = bgelr 2
219
- 0x4c,0x80,0x00,0x20 = bgelr 0
220
- 0x4c,0x88,0x04,0x20 = bgectr 2
221
- 0x4c,0x80,0x04,0x20 = bgectr 0
222
- 0x4c,0x88,0x00,0x21 = bgelrl 2
223
- 0x4c,0x80,0x00,0x21 = bgelrl 0
224
- 0x4c,0x88,0x04,0x21 = bgectrl 2
225
- 0x4c,0x80,0x04,0x21 = bgectrl 0
226
- 0x4c,0xe8,0x00,0x20 = bgelr+ 2
227
- 0x4c,0xe0,0x00,0x20 = bgelr+ 0
228
- 0x4c,0xe8,0x04,0x20 = bgectr+ 2
229
- 0x4c,0xe0,0x04,0x20 = bgectr+ 0
230
- 0x4c,0xe8,0x00,0x21 = bgelrl+ 2
231
- 0x4c,0xe0,0x00,0x21 = bgelrl+ 0
232
- 0x4c,0xe8,0x04,0x21 = bgectrl+ 2
233
- 0x4c,0xe0,0x04,0x21 = bgectrl+ 0
234
- 0x4c,0xc8,0x00,0x20 = bgelr- 2
235
- 0x4c,0xc0,0x00,0x20 = bgelr- 0
236
- 0x4c,0xc8,0x04,0x20 = bgectr- 2
237
- 0x4c,0xc0,0x04,0x20 = bgectr- 0
238
- 0x4c,0xc8,0x00,0x21 = bgelrl- 2
239
- 0x4c,0xc0,0x00,0x21 = bgelrl- 0
240
- 0x4c,0xc8,0x04,0x21 = bgectrl- 2
241
- 0x4c,0xc0,0x04,0x21 = bgectrl- 0
242
- 0x4c,0x8a,0x00,0x20 = bnelr 2
243
- 0x4c,0x82,0x00,0x20 = bnelr 0
244
- 0x4c,0x8a,0x04,0x20 = bnectr 2
245
- 0x4c,0x82,0x04,0x20 = bnectr 0
246
- 0x4c,0x8a,0x00,0x21 = bnelrl 2
247
- 0x4c,0x82,0x00,0x21 = bnelrl 0
248
- 0x4c,0x8a,0x04,0x21 = bnectrl 2
249
- 0x4c,0x82,0x04,0x21 = bnectrl 0
250
- 0x4c,0xea,0x00,0x20 = bnelr+ 2
251
- 0x4c,0xe2,0x00,0x20 = bnelr+ 0
252
- 0x4c,0xea,0x04,0x20 = bnectr+ 2
253
- 0x4c,0xe2,0x04,0x20 = bnectr+ 0
254
- 0x4c,0xea,0x00,0x21 = bnelrl+ 2
255
- 0x4c,0xe2,0x00,0x21 = bnelrl+ 0
256
- 0x4c,0xea,0x04,0x21 = bnectrl+ 2
257
- 0x4c,0xe2,0x04,0x21 = bnectrl+ 0
258
- 0x4c,0xca,0x00,0x20 = bnelr- 2
259
- 0x4c,0xc2,0x00,0x20 = bnelr- 0
260
- 0x4c,0xca,0x04,0x20 = bnectr- 2
261
- 0x4c,0xc2,0x04,0x20 = bnectr- 0
262
- 0x4c,0xca,0x00,0x21 = bnelrl- 2
263
- 0x4c,0xc2,0x00,0x21 = bnelrl- 0
264
- 0x4c,0xca,0x04,0x21 = bnectrl- 2
265
- 0x4c,0xc2,0x04,0x21 = bnectrl- 0
266
- 0x4c,0x89,0x00,0x20 = blelr 2
267
- 0x4c,0x81,0x00,0x20 = blelr 0
268
- 0x4c,0x89,0x04,0x20 = blectr 2
269
- 0x4c,0x81,0x04,0x20 = blectr 0
270
- 0x4c,0x89,0x00,0x21 = blelrl 2
271
- 0x4c,0x81,0x00,0x21 = blelrl 0
272
- 0x4c,0x89,0x04,0x21 = blectrl 2
273
- 0x4c,0x81,0x04,0x21 = blectrl 0
274
- 0x4c,0xe9,0x00,0x20 = blelr+ 2
275
- 0x4c,0xe1,0x00,0x20 = blelr+ 0
276
- 0x4c,0xe9,0x04,0x20 = blectr+ 2
277
- 0x4c,0xe1,0x04,0x20 = blectr+ 0
278
- 0x4c,0xe9,0x00,0x21 = blelrl+ 2
279
- 0x4c,0xe1,0x00,0x21 = blelrl+ 0
280
- 0x4c,0xe9,0x04,0x21 = blectrl+ 2
281
- 0x4c,0xe1,0x04,0x21 = blectrl+ 0
282
- 0x4c,0xc9,0x00,0x20 = blelr- 2
283
- 0x4c,0xc1,0x00,0x20 = blelr- 0
284
- 0x4c,0xc9,0x04,0x20 = blectr- 2
285
- 0x4c,0xc1,0x04,0x20 = blectr- 0
286
- 0x4c,0xc9,0x00,0x21 = blelrl- 2
287
- 0x4c,0xc1,0x00,0x21 = blelrl- 0
288
- 0x4c,0xc9,0x04,0x21 = blectrl- 2
289
- 0x4c,0xc1,0x04,0x21 = blectrl- 0
290
- 0x4d,0x8b,0x00,0x20 = bunlr 2
291
- 0x4d,0x83,0x00,0x20 = bunlr 0
292
- 0x4d,0x8b,0x04,0x20 = bunctr 2
293
- 0x4d,0x83,0x04,0x20 = bunctr 0
294
- 0x4d,0x8b,0x00,0x21 = bunlrl 2
295
- 0x4d,0x83,0x00,0x21 = bunlrl 0
296
- 0x4d,0x8b,0x04,0x21 = bunctrl 2
297
- 0x4d,0x83,0x04,0x21 = bunctrl 0
298
- 0x4d,0xeb,0x00,0x20 = bunlr+ 2
299
- 0x4d,0xe3,0x00,0x20 = bunlr+ 0
300
- 0x4d,0xeb,0x04,0x20 = bunctr+ 2
301
- 0x4d,0xe3,0x04,0x20 = bunctr+ 0
302
- 0x4d,0xeb,0x00,0x21 = bunlrl+ 2
303
- 0x4d,0xe3,0x00,0x21 = bunlrl+ 0
304
- 0x4d,0xeb,0x04,0x21 = bunctrl+ 2
305
- 0x4d,0xe3,0x04,0x21 = bunctrl+ 0
306
- 0x4d,0xcb,0x00,0x20 = bunlr- 2
307
- 0x4d,0xc3,0x00,0x20 = bunlr- 0
308
- 0x4d,0xcb,0x04,0x20 = bunctr- 2
309
- 0x4d,0xc3,0x04,0x20 = bunctr- 0
310
- 0x4d,0xcb,0x00,0x21 = bunlrl- 2
311
- 0x4d,0xc3,0x00,0x21 = bunlrl- 0
312
- 0x4d,0xcb,0x04,0x21 = bunctrl- 2
313
- 0x4d,0xc3,0x04,0x21 = bunctrl- 0
314
- 0x4c,0x8b,0x00,0x20 = bnulr 2
315
- 0x4c,0x83,0x00,0x20 = bnulr 0
316
- 0x4c,0x8b,0x04,0x20 = bnuctr 2
317
- 0x4c,0x83,0x04,0x20 = bnuctr 0
318
- 0x4c,0x8b,0x00,0x21 = bnulrl 2
319
- 0x4c,0x83,0x00,0x21 = bnulrl 0
320
- 0x4c,0x8b,0x04,0x21 = bnuctrl 2
321
- 0x4c,0x83,0x04,0x21 = bnuctrl 0
322
- 0x4c,0xeb,0x00,0x20 = bnulr+ 2
323
- 0x4c,0xe3,0x00,0x20 = bnulr+ 0
324
- 0x4c,0xeb,0x04,0x20 = bnuctr+ 2
325
- 0x4c,0xe3,0x04,0x20 = bnuctr+ 0
326
- 0x4c,0xeb,0x00,0x21 = bnulrl+ 2
327
- 0x4c,0xe3,0x00,0x21 = bnulrl+ 0
328
- 0x4c,0xeb,0x04,0x21 = bnuctrl+ 2
329
- 0x4c,0xe3,0x04,0x21 = bnuctrl+ 0
330
- 0x4c,0xcb,0x00,0x20 = bnulr- 2
331
- 0x4c,0xc3,0x00,0x20 = bnulr- 0
332
- 0x4c,0xcb,0x04,0x20 = bnuctr- 2
333
- 0x4c,0xc3,0x04,0x20 = bnuctr- 0
334
- 0x4c,0xcb,0x00,0x21 = bnulrl- 2
335
- 0x4c,0xc3,0x00,0x21 = bnulrl- 0
336
- 0x4c,0xcb,0x04,0x21 = bnuctrl- 2
337
- 0x4c,0xc3,0x04,0x21 = bnuctrl- 0
338
- 0x4d,0x8b,0x00,0x20 = bunlr 2
339
- 0x4d,0x83,0x00,0x20 = bunlr 0
340
- 0x4d,0x8b,0x04,0x20 = bunctr 2
341
- 0x4d,0x83,0x04,0x20 = bunctr 0
342
- 0x4d,0x8b,0x00,0x21 = bunlrl 2
343
- 0x4d,0x83,0x00,0x21 = bunlrl 0
344
- 0x4d,0x8b,0x04,0x21 = bunctrl 2
345
- 0x4d,0x83,0x04,0x21 = bunctrl 0
346
- 0x4d,0xeb,0x00,0x20 = bunlr+ 2
347
- 0x4d,0xe3,0x00,0x20 = bunlr+ 0
348
- 0x4d,0xeb,0x04,0x20 = bunctr+ 2
349
- 0x4d,0xe3,0x04,0x20 = bunctr+ 0
350
- 0x4d,0xeb,0x00,0x21 = bunlrl+ 2
351
- 0x4d,0xe3,0x00,0x21 = bunlrl+ 0
352
- 0x4d,0xeb,0x04,0x21 = bunctrl+ 2
353
- 0x4d,0xe3,0x04,0x21 = bunctrl+ 0
354
- 0x4d,0xcb,0x00,0x20 = bunlr- 2
355
- 0x4d,0xc3,0x00,0x20 = bunlr- 0
356
- 0x4d,0xcb,0x04,0x20 = bunctr- 2
357
- 0x4d,0xc3,0x04,0x20 = bunctr- 0
358
- 0x4d,0xcb,0x00,0x21 = bunlrl- 2
359
- 0x4d,0xc3,0x00,0x21 = bunlrl- 0
360
- 0x4d,0xcb,0x04,0x21 = bunctrl- 2
361
- 0x4d,0xc3,0x04,0x21 = bunctrl- 0
362
- 0x4c,0x8b,0x00,0x20 = bnulr 2
363
- 0x4c,0x83,0x00,0x20 = bnulr 0
364
- 0x4c,0x8b,0x04,0x20 = bnuctr 2
365
- 0x4c,0x83,0x04,0x20 = bnuctr 0
366
- 0x4c,0x8b,0x00,0x21 = bnulrl 2
367
- 0x4c,0x83,0x00,0x21 = bnulrl 0
368
- 0x4c,0x8b,0x04,0x21 = bnuctrl 2
369
- 0x4c,0x83,0x04,0x21 = bnuctrl 0
370
- 0x4c,0xeb,0x00,0x20 = bnulr+ 2
371
- 0x4c,0xe3,0x00,0x20 = bnulr+ 0
372
- 0x4c,0xeb,0x04,0x20 = bnuctr+ 2
373
- 0x4c,0xe3,0x04,0x20 = bnuctr+ 0
374
- 0x4c,0xeb,0x00,0x21 = bnulrl+ 2
375
- 0x4c,0xe3,0x00,0x21 = bnulrl+ 0
376
- 0x4c,0xeb,0x04,0x21 = bnuctrl+ 2
377
- 0x4c,0xe3,0x04,0x21 = bnuctrl+ 0
378
- 0x4c,0xcb,0x00,0x20 = bnulr- 2
379
- 0x4c,0xc3,0x00,0x20 = bnulr- 0
380
- 0x4c,0xcb,0x04,0x20 = bnuctr- 2
381
- 0x4c,0xc3,0x04,0x20 = bnuctr- 0
382
- 0x4c,0xcb,0x00,0x21 = bnulrl- 2
383
- 0x4c,0xc3,0x00,0x21 = bnulrl- 0
384
- 0x4c,0xcb,0x04,0x21 = bnuctrl- 2
385
- 0x4c,0xc3,0x04,0x21 = bnuctrl- 0
386
- 0x4c,0x42,0x12,0x42 = creqv 2, 2, 2
387
- 0x4c,0x42,0x11,0x82 = crxor 2, 2, 2
388
- 0x4c,0x43,0x1b,0x82 = cror 2, 3, 3
389
- 0x4c,0x43,0x18,0x42 = crnor 2, 3, 3
390
- 0x38,0x43,0xff,0x80 = addi 2, 3, -128
391
- 0x3c,0x43,0xff,0x80 = addis 2, 3, -128
392
- 0x30,0x43,0xff,0x80 = addic 2, 3, -128
393
- 0x34,0x43,0xff,0x80 = addic. 2, 3, -128
394
- 0x7c,0x44,0x18,0x50 = subf 2, 4, 3
395
- 0x7c,0x44,0x18,0x51 = subf. 2, 4, 3
396
- 0x7c,0x44,0x18,0x10 = subfc 2, 4, 3
397
- 0x7c,0x44,0x18,0x11 = subfc. 2, 4, 3
398
- 0x2d,0x23,0x00,0x80 = cmpdi 2, 3, 128
399
- 0x2c,0x23,0x00,0x80 = cmpdi 0, 3, 128
400
- 0x7d,0x23,0x20,0x00 = cmpd 2, 3, 4
401
- 0x7c,0x23,0x20,0x00 = cmpd 0, 3, 4
402
- 0x29,0x23,0x00,0x80 = cmpldi 2, 3, 128
403
- 0x28,0x23,0x00,0x80 = cmpldi 0, 3, 128
404
- 0x7d,0x23,0x20,0x40 = cmpld 2, 3, 4
405
- 0x7c,0x23,0x20,0x40 = cmpld 0, 3, 4
406
- 0x2d,0x03,0x00,0x80 = cmpwi 2, 3, 128
407
- 0x2c,0x03,0x00,0x80 = cmpwi 0, 3, 128
408
- 0x7d,0x03,0x20,0x00 = cmpw 2, 3, 4
409
- 0x7c,0x03,0x20,0x00 = cmpw 0, 3, 4
410
- 0x29,0x03,0x00,0x80 = cmplwi 2, 3, 128
411
- 0x28,0x03,0x00,0x80 = cmplwi 0, 3, 128
412
- 0x7d,0x03,0x20,0x40 = cmplw 2, 3, 4
413
- 0x7c,0x03,0x20,0x40 = cmplw 0, 3, 4
414
- 0x0e,0x03,0x00,0x04 = twi 16, 3, 4
415
- 0x7e,0x03,0x20,0x08 = tw 16, 3, 4
416
- 0x0a,0x03,0x00,0x04 = tdi 16, 3, 4
417
- 0x7e,0x03,0x20,0x88 = td 16, 3, 4
418
- 0x0e,0x83,0x00,0x04 = twi 20, 3, 4
419
- 0x7e,0x83,0x20,0x08 = tw 20, 3, 4
420
- 0x0a,0x83,0x00,0x04 = tdi 20, 3, 4
421
- 0x7e,0x83,0x20,0x88 = td 20, 3, 4
422
- 0x0c,0x83,0x00,0x04 = twi 4, 3, 4
423
- 0x7c,0x83,0x20,0x08 = tw 4, 3, 4
424
- 0x08,0x83,0x00,0x04 = tdi 4, 3, 4
425
- 0x7c,0x83,0x20,0x88 = td 4, 3, 4
426
- 0x0d,0x83,0x00,0x04 = twi 12, 3, 4
427
- 0x7d,0x83,0x20,0x08 = tw 12, 3, 4
428
- 0x09,0x83,0x00,0x04 = tdi 12, 3, 4
429
- 0x7d,0x83,0x20,0x88 = td 12, 3, 4
430
- 0x0d,0x03,0x00,0x04 = twi 8, 3, 4
431
- 0x7d,0x03,0x20,0x08 = tw 8, 3, 4
432
- 0x09,0x03,0x00,0x04 = tdi 8, 3, 4
433
- 0x7d,0x03,0x20,0x88 = td 8, 3, 4
434
- 0x0d,0x83,0x00,0x04 = twi 12, 3, 4
435
- 0x7d,0x83,0x20,0x08 = tw 12, 3, 4
436
- 0x09,0x83,0x00,0x04 = tdi 12, 3, 4
437
- 0x7d,0x83,0x20,0x88 = td 12, 3, 4
438
- 0x0f,0x03,0x00,0x04 = twi 24, 3, 4
439
- 0x7f,0x03,0x20,0x08 = tw 24, 3, 4
440
- 0x0b,0x03,0x00,0x04 = tdi 24, 3, 4
441
- 0x7f,0x03,0x20,0x88 = td 24, 3, 4
442
- 0x0e,0x83,0x00,0x04 = twi 20, 3, 4
443
- 0x7e,0x83,0x20,0x08 = tw 20, 3, 4
444
- 0x0a,0x83,0x00,0x04 = tdi 20, 3, 4
445
- 0x7e,0x83,0x20,0x88 = td 20, 3, 4
446
- 0x0c,0x43,0x00,0x04 = twi 2, 3, 4
447
- 0x7c,0x43,0x20,0x08 = tw 2, 3, 4
448
- 0x08,0x43,0x00,0x04 = tdi 2, 3, 4
449
- 0x7c,0x43,0x20,0x88 = td 2, 3, 4
450
- 0x0c,0xc3,0x00,0x04 = twi 6, 3, 4
451
- 0x7c,0xc3,0x20,0x08 = tw 6, 3, 4
452
- 0x08,0xc3,0x00,0x04 = tdi 6, 3, 4
453
- 0x7c,0xc3,0x20,0x88 = td 6, 3, 4
454
- 0x0c,0xa3,0x00,0x04 = twi 5, 3, 4
455
- 0x7c,0xa3,0x20,0x08 = tw 5, 3, 4
456
- 0x08,0xa3,0x00,0x04 = tdi 5, 3, 4
457
- 0x7c,0xa3,0x20,0x88 = td 5, 3, 4
458
- 0x0c,0x23,0x00,0x04 = twi 1, 3, 4
459
- 0x7c,0x23,0x20,0x08 = tw 1, 3, 4
460
- 0x08,0x23,0x00,0x04 = tdi 1, 3, 4
461
- 0x7c,0x23,0x20,0x88 = td 1, 3, 4
462
- 0x0c,0xa3,0x00,0x04 = twi 5, 3, 4
463
- 0x7c,0xa3,0x20,0x08 = tw 5, 3, 4
464
- 0x08,0xa3,0x00,0x04 = tdi 5, 3, 4
465
- 0x7c,0xa3,0x20,0x88 = td 5, 3, 4
466
- 0x0c,0xc3,0x00,0x04 = twi 6, 3, 4
467
- 0x7c,0xc3,0x20,0x08 = tw 6, 3, 4
468
- 0x08,0xc3,0x00,0x04 = tdi 6, 3, 4
469
- 0x7c,0xc3,0x20,0x88 = td 6, 3, 4
470
- 0x0f,0xe3,0x00,0x04 = twi 31, 3, 4
471
- 0x7f,0xe3,0x20,0x08 = tw 31, 3, 4
472
- 0x0b,0xe3,0x00,0x04 = tdi 31, 3, 4
473
- 0x7f,0xe3,0x20,0x88 = td 31, 3, 4
474
- 0x7f,0xe0,0x00,0x08 = trap
475
- 0x78,0x62,0x28,0xc4 = rldicr 2, 3, 5, 3
476
- 0x78,0x62,0x28,0xc5 = rldicr. 2, 3, 5, 3
477
- 0x78,0x62,0x4f,0x20 = rldicl 2, 3, 9, 60
478
- 0x78,0x62,0x4f,0x21 = rldicl. 2, 3, 9, 60
479
- 0x78,0x62,0xb9,0x4e = rldimi 2, 3, 55, 5
480
- 0x78,0x62,0xb9,0x4f = rldimi. 2, 3, 55, 5
481
- 0x78,0x62,0x20,0x00 = rldicl 2, 3, 4, 0
482
- 0x78,0x62,0x20,0x01 = rldicl. 2, 3, 4, 0
483
- 0x78,0x62,0xe0,0x02 = rldicl 2, 3, 60, 0
484
- 0x78,0x62,0xe0,0x03 = rldicl. 2, 3, 60, 0
485
- 0x78,0x62,0x20,0x10 = rldcl 2, 3, 4, 0
486
- 0x78,0x62,0x20,0x11 = rldcl. 2, 3, 4, 0
487
- 0x78,0x62,0x26,0xe4 = sldi 2, 3, 4
488
- 0x78,0x62,0x26,0xe5 = rldicr. 2, 3, 4, 59
489
- 0x78,0x62,0xe1,0x02 = rldicl 2, 3, 60, 4
490
- 0x78,0x62,0xe1,0x03 = rldicl. 2, 3, 60, 4
491
- 0x78,0x62,0x01,0x00 = rldicl 2, 3, 0, 4
492
- 0x78,0x62,0x01,0x01 = rldicl. 2, 3, 0, 4
493
- 0x78,0x62,0x06,0xe4 = rldicr 2, 3, 0, 59
494
- 0x78,0x62,0x06,0xe5 = rldicr. 2, 3, 0, 59
495
- 0x78,0x62,0x20,0x48 = rldic 2, 3, 4, 1
496
- 0x78,0x62,0x20,0x49 = rldic. 2, 3, 4, 1
497
- 0x54,0x62,0x28,0x06 = rlwinm 2, 3, 5, 0, 3
498
- 0x54,0x62,0x28,0x07 = rlwinm. 2, 3, 5, 0, 3
499
- 0x54,0x62,0x4f,0x3e = rlwinm 2, 3, 9, 28, 31
500
- 0x54,0x62,0x4f,0x3f = rlwinm. 2, 3, 9, 28, 31
501
- 0x50,0x62,0xd9,0x50 = rlwimi 2, 3, 27, 5, 8
502
- 0x50,0x62,0xd9,0x51 = rlwimi. 2, 3, 27, 5, 8
503
- 0x50,0x62,0xb9,0x50 = rlwimi 2, 3, 23, 5, 8
504
- 0x50,0x62,0xb9,0x51 = rlwimi. 2, 3, 23, 5, 8
505
- 0x54,0x62,0x20,0x3e = rlwinm 2, 3, 4, 0, 31
506
- 0x54,0x62,0x20,0x3f = rlwinm. 2, 3, 4, 0, 31
507
- 0x54,0x62,0xe0,0x3e = rlwinm 2, 3, 28, 0, 31
508
- 0x54,0x62,0xe0,0x3f = rlwinm. 2, 3, 28, 0, 31
509
- 0x5c,0x62,0x20,0x3e = rlwnm 2, 3, 4, 0, 31
510
- 0x5c,0x62,0x20,0x3f = rlwnm. 2, 3, 4, 0, 31
511
- 0x54,0x62,0x20,0x36 = slwi 2, 3, 4
512
- 0x54,0x62,0x20,0x37 = rlwinm. 2, 3, 4, 0, 27
513
- 0x54,0x62,0xe1,0x3e = srwi 2, 3, 4
514
- 0x54,0x62,0xe1,0x3f = rlwinm. 2, 3, 28, 4, 31
515
- 0x54,0x62,0x01,0x3e = rlwinm 2, 3, 0, 4, 31
516
- 0x54,0x62,0x01,0x3f = rlwinm. 2, 3, 0, 4, 31
517
- 0x54,0x62,0x00,0x36 = rlwinm 2, 3, 0, 0, 27
518
- 0x54,0x62,0x00,0x37 = rlwinm. 2, 3, 0, 0, 27
519
- 0x54,0x62,0x20,0x76 = rlwinm 2, 3, 4, 1, 27
520
- 0x54,0x62,0x20,0x77 = rlwinm. 2, 3, 4, 1, 27
521
- 0x7c,0x41,0x03,0xa6 = mtspr 1, 2
522
- 0x7c,0x41,0x02,0xa6 = mfspr 2, 1
523
- 0x7c,0x48,0x03,0xa6 = mtlr 2
524
- 0x7c,0x48,0x02,0xa6 = mflr 2
525
- 0x7c,0x49,0x03,0xa6 = mtctr 2
526
- 0x7c,0x49,0x02,0xa6 = mfctr 2
527
- 0x60,0x00,0x00,0x00 = nop
528
- 0x68,0x00,0x00,0x00 = xori 0, 0, 0
529
- 0x38,0x40,0x00,0x80 = li 2, 128
530
- 0x3c,0x40,0x00,0x80 = lis 2, 128
531
- 0x7c,0x62,0x1b,0x78 = mr 2, 3
532
- 0x7c,0x62,0x1b,0x79 = or. 2, 3, 3
533
- 0x7c,0x62,0x18,0xf8 = nor 2, 3, 3
534
- 0x7c,0x62,0x18,0xf9 = nor. 2, 3, 3
535
- 0x7c,0x4f,0xf1,0x20 = mtcrf 255, 2
data/test/MC/PowerPC/ppc64-encoding-fp.s.cs DELETED
@@ -1,110 +0,0 @@
1
- # CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CS_OPT_SYNTAX_NOREGNAME
2
- 0xc0,0x44,0x00,0x80 = lfs 2, 128(4)
3
- 0x7c,0x43,0x24,0x2e = lfsx 2, 3, 4
4
- 0xc4,0x44,0x00,0x80 = lfsu 2, 128(4)
5
- 0x7c,0x43,0x24,0x6e = lfsux 2, 3, 4
6
- 0xc8,0x44,0x00,0x80 = lfd 2, 128(4)
7
- 0x7c,0x43,0x24,0xae = lfdx 2, 3, 4
8
- 0xcc,0x44,0x00,0x80 = lfdu 2, 128(4)
9
- 0x7c,0x43,0x24,0xee = lfdux 2, 3, 4
10
- 0x7c,0x43,0x26,0xae = lfiwax 2, 3, 4
11
- 0x7c,0x43,0x26,0xee = lfiwzx 2, 3, 4
12
- 0xd0,0x44,0x00,0x80 = stfs 2, 128(4)
13
- 0x7c,0x43,0x25,0x2e = stfsx 2, 3, 4
14
- 0xd4,0x44,0x00,0x80 = stfsu 2, 128(4)
15
- 0x7c,0x43,0x25,0x6e = stfsux 2, 3, 4
16
- 0xd8,0x44,0x00,0x80 = stfd 2, 128(4)
17
- 0x7c,0x43,0x25,0xae = stfdx 2, 3, 4
18
- 0xdc,0x44,0x00,0x80 = stfdu 2, 128(4)
19
- 0x7c,0x43,0x25,0xee = stfdux 2, 3, 4
20
- 0x7c,0x43,0x27,0xae = stfiwx 2, 3, 4
21
- 0xfc,0x40,0x18,0x90 = fmr 2, 3
22
- 0xfc,0x40,0x18,0x91 = fmr. 2, 3
23
- 0xfc,0x40,0x18,0x50 = fneg 2, 3
24
- 0xfc,0x40,0x18,0x51 = fneg. 2, 3
25
- 0xfc,0x40,0x1a,0x10 = fabs 2, 3
26
- 0xfc,0x40,0x1a,0x11 = fabs. 2, 3
27
- 0xfc,0x40,0x19,0x10 = fnabs 2, 3
28
- 0xfc,0x40,0x19,0x11 = fnabs. 2, 3
29
- 0xfc,0x43,0x20,0x10 = fcpsgn 2, 3, 4
30
- 0xfc,0x43,0x20,0x11 = fcpsgn. 2, 3, 4
31
- 0xfc,0x43,0x20,0x2a = fadd 2, 3, 4
32
- 0xfc,0x43,0x20,0x2b = fadd. 2, 3, 4
33
- 0xec,0x43,0x20,0x2a = fadds 2, 3, 4
34
- 0xec,0x43,0x20,0x2b = fadds. 2, 3, 4
35
- 0xfc,0x43,0x20,0x28 = fsub 2, 3, 4
36
- 0xfc,0x43,0x20,0x29 = fsub. 2, 3, 4
37
- 0xec,0x43,0x20,0x28 = fsubs 2, 3, 4
38
- 0xec,0x43,0x20,0x29 = fsubs. 2, 3, 4
39
- 0xfc,0x43,0x01,0x32 = fmul 2, 3, 4
40
- 0xfc,0x43,0x01,0x33 = fmul. 2, 3, 4
41
- 0xec,0x43,0x01,0x32 = fmuls 2, 3, 4
42
- 0xec,0x43,0x01,0x33 = fmuls. 2, 3, 4
43
- 0xfc,0x43,0x20,0x24 = fdiv 2, 3, 4
44
- 0xfc,0x43,0x20,0x25 = fdiv. 2, 3, 4
45
- 0xec,0x43,0x20,0x24 = fdivs 2, 3, 4
46
- 0xec,0x43,0x20,0x25 = fdivs. 2, 3, 4
47
- 0xfc,0x40,0x18,0x2c = fsqrt 2, 3
48
- 0xfc,0x40,0x18,0x2d = fsqrt. 2, 3
49
- 0xec,0x40,0x18,0x2c = fsqrts 2, 3
50
- 0xec,0x40,0x18,0x2d = fsqrts. 2, 3
51
- 0xfc,0x40,0x18,0x30 = fre 2, 3
52
- 0xfc,0x40,0x18,0x31 = fre. 2, 3
53
- 0xec,0x40,0x18,0x30 = fres 2, 3
54
- 0xec,0x40,0x18,0x31 = fres. 2, 3
55
- 0xfc,0x40,0x18,0x34 = frsqrte 2, 3
56
- 0xfc,0x40,0x18,0x35 = frsqrte. 2, 3
57
- 0xec,0x40,0x18,0x34 = frsqrtes 2, 3
58
- 0xec,0x40,0x18,0x35 = frsqrtes. 2, 3
59
- 0xfc,0x43,0x29,0x3a = fmadd 2, 3, 4, 5
60
- 0xfc,0x43,0x29,0x3b = fmadd. 2, 3, 4, 5
61
- 0xec,0x43,0x29,0x3a = fmadds 2, 3, 4, 5
62
- 0xec,0x43,0x29,0x3b = fmadds. 2, 3, 4, 5
63
- 0xfc,0x43,0x29,0x38 = fmsub 2, 3, 4, 5
64
- 0xfc,0x43,0x29,0x39 = fmsub. 2, 3, 4, 5
65
- 0xec,0x43,0x29,0x38 = fmsubs 2, 3, 4, 5
66
- 0xec,0x43,0x29,0x39 = fmsubs. 2, 3, 4, 5
67
- 0xfc,0x43,0x29,0x3e = fnmadd 2, 3, 4, 5
68
- 0xfc,0x43,0x29,0x3f = fnmadd. 2, 3, 4, 5
69
- 0xec,0x43,0x29,0x3e = fnmadds 2, 3, 4, 5
70
- 0xec,0x43,0x29,0x3f = fnmadds. 2, 3, 4, 5
71
- 0xfc,0x43,0x29,0x3c = fnmsub 2, 3, 4, 5
72
- 0xfc,0x43,0x29,0x3d = fnmsub. 2, 3, 4, 5
73
- 0xec,0x43,0x29,0x3c = fnmsubs 2, 3, 4, 5
74
- 0xec,0x43,0x29,0x3d = fnmsubs. 2, 3, 4, 5
75
- 0xfc,0x40,0x18,0x18 = frsp 2, 3
76
- 0xfc,0x40,0x18,0x19 = frsp. 2, 3
77
- 0xfc,0x40,0x1e,0x5c = fctid 2, 3
78
- 0xfc,0x40,0x1e,0x5d = fctid. 2, 3
79
- 0xfc,0x40,0x1e,0x5e = fctidz 2, 3
80
- 0xfc,0x40,0x1e,0x5f = fctidz. 2, 3
81
- 0xfc,0x40,0x1f,0x5e = fctiduz 2, 3
82
- 0xfc,0x40,0x1f,0x5f = fctiduz. 2, 3
83
- 0xfc,0x40,0x18,0x1c = fctiw 2, 3
84
- 0xfc,0x40,0x18,0x1d = fctiw. 2, 3
85
- 0xfc,0x40,0x18,0x1e = fctiwz 2, 3
86
- 0xfc,0x40,0x18,0x1f = fctiwz. 2, 3
87
- 0xfc,0x40,0x19,0x1e = fctiwuz 2, 3
88
- 0xfc,0x40,0x19,0x1f = fctiwuz. 2, 3
89
- 0xfc,0x40,0x1e,0x9c = fcfid 2, 3
90
- 0xfc,0x40,0x1e,0x9d = fcfid. 2, 3
91
- 0xfc,0x40,0x1f,0x9c = fcfidu 2, 3
92
- 0xfc,0x40,0x1f,0x9d = fcfidu. 2, 3
93
- 0xec,0x40,0x1e,0x9c = fcfids 2, 3
94
- 0xec,0x40,0x1e,0x9d = fcfids. 2, 3
95
- 0xec,0x40,0x1f,0x9c = fcfidus 2, 3
96
- 0xec,0x40,0x1f,0x9d = fcfidus. 2, 3
97
- 0xfc,0x40,0x1b,0x10 = frin 2, 3
98
- 0xfc,0x40,0x1b,0x11 = frin. 2, 3
99
- 0xfc,0x40,0x1b,0x90 = frip 2, 3
100
- 0xfc,0x40,0x1b,0x91 = frip. 2, 3
101
- 0xfc,0x40,0x1b,0x50 = friz 2, 3
102
- 0xfc,0x40,0x1b,0x51 = friz. 2, 3
103
- 0xfc,0x40,0x1b,0xd0 = frim 2, 3
104
- 0xfc,0x40,0x1b,0xd1 = frim. 2, 3
105
- 0xfd,0x03,0x20,0x00 = fcmpu 2, 3, 4
106
- 0xfc,0x43,0x29,0x2e = fsel 2, 3, 4, 5
107
- 0xfc,0x43,0x29,0x2f = fsel. 2, 3, 4, 5
108
- 0xfc,0x40,0x04,0x8e = mffs 2
109
- 0xff,0xe0,0x00,0x8c = mtfsb0 31
110
- 0xff,0xe0,0x00,0x4c = mtfsb1 31