crabstone 3.0.3 → 4.0.4
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- checksums.yaml +5 -5
- data/CHANGES.md +59 -42
- data/README.md +37 -39
- data/lib/{arch → crabstone/arch/3}/arm.rb +28 -49
- data/lib/crabstone/arch/3/arm64.rb +124 -0
- data/lib/{arch → crabstone/arch/3}/arm64_const.rb +45 -86
- data/lib/{arch → crabstone/arch/3}/arm_const.rb +19 -47
- data/lib/crabstone/arch/3/mips.rb +57 -0
- data/lib/{arch → crabstone/arch/3}/mips_const.rb +18 -38
- data/lib/crabstone/arch/3/ppc.rb +73 -0
- data/lib/{arch → crabstone/arch/3}/ppc_const.rb +27 -43
- data/lib/crabstone/arch/3/sparc.rb +60 -0
- data/lib/{arch → crabstone/arch/3}/sparc_const.rb +49 -67
- data/lib/crabstone/arch/3/sysz.rb +67 -0
- data/lib/{arch → crabstone/arch/3}/sysz_const.rb +11 -25
- data/lib/crabstone/arch/3/x86.rb +82 -0
- data/lib/{arch → crabstone/arch/3}/x86_const.rb +15 -36
- data/lib/crabstone/arch/3/xcore.rb +59 -0
- data/lib/{arch → crabstone/arch/3}/xcore_const.rb +10 -22
- data/lib/crabstone/arch/4/arm.rb +110 -0
- data/lib/crabstone/arch/4/arm64.rb +125 -0
- data/lib/crabstone/arch/4/arm64_const.rb +1016 -0
- data/lib/crabstone/arch/4/arm_const.rb +785 -0
- data/lib/crabstone/arch/4/evm.rb +20 -0
- data/lib/crabstone/arch/4/evm_const.rb +161 -0
- data/lib/crabstone/arch/4/m680x.rb +106 -0
- data/lib/crabstone/arch/4/m680x_const.rb +426 -0
- data/lib/crabstone/arch/4/m68k.rb +129 -0
- data/lib/crabstone/arch/4/m68k_const.rb +496 -0
- data/lib/crabstone/arch/4/mips.rb +57 -0
- data/lib/crabstone/arch/4/mips_const.rb +869 -0
- data/lib/crabstone/arch/4/ppc.rb +73 -0
- data/lib/crabstone/arch/4/ppc_const.rb +1375 -0
- data/lib/crabstone/arch/4/sparc.rb +60 -0
- data/lib/crabstone/arch/4/sparc_const.rb +439 -0
- data/lib/crabstone/arch/4/sysz.rb +67 -0
- data/lib/crabstone/arch/4/sysz_const.rb +763 -0
- data/lib/crabstone/arch/4/tms320c64x.rb +87 -0
- data/lib/crabstone/arch/4/tms320c64x_const.rb +287 -0
- data/lib/crabstone/arch/4/x86.rb +91 -0
- data/lib/crabstone/arch/4/x86_const.rb +1972 -0
- data/lib/crabstone/arch/4/xcore.rb +59 -0
- data/lib/crabstone/arch/4/xcore_const.rb +171 -0
- data/lib/crabstone/arch/extension.rb +27 -0
- data/lib/crabstone/arch/register.rb +34 -0
- data/lib/crabstone/arch.rb +37 -0
- data/lib/crabstone/binding/3/detail.rb +36 -0
- data/lib/crabstone/binding/3/instruction.rb +23 -0
- data/lib/crabstone/binding/4/detail.rb +40 -0
- data/lib/crabstone/binding/4/instruction.rb +23 -0
- data/lib/crabstone/binding/structs.rb +32 -0
- data/lib/crabstone/binding.rb +59 -0
- data/lib/crabstone/constants.rb +110 -0
- data/lib/crabstone/cs_version.rb +57 -0
- data/lib/crabstone/disassembler.rb +147 -0
- data/lib/crabstone/error.rb +74 -0
- data/lib/crabstone/instruction.rb +178 -0
- data/lib/crabstone/version.rb +5 -0
- data/lib/crabstone.rb +5 -557
- metadata +142 -331
- data/MANIFEST +0 -312
- data/Rakefile +0 -27
- data/bin/genconst +0 -66
- data/bin/genreg +0 -99
- data/crabstone.gemspec +0 -27
- data/examples/hello_world.rb +0 -43
- data/lib/arch/arm64.rb +0 -167
- data/lib/arch/arm64_registers.rb +0 -295
- data/lib/arch/arm_registers.rb +0 -149
- data/lib/arch/mips.rb +0 -78
- data/lib/arch/mips_registers.rb +0 -208
- data/lib/arch/ppc.rb +0 -90
- data/lib/arch/ppc_registers.rb +0 -209
- data/lib/arch/sparc.rb +0 -79
- data/lib/arch/sparc_registers.rb +0 -121
- data/lib/arch/systemz.rb +0 -79
- data/lib/arch/sysz_registers.rb +0 -66
- data/lib/arch/x86.rb +0 -107
- data/lib/arch/x86_registers.rb +0 -265
- data/lib/arch/xcore.rb +0 -78
- data/lib/arch/xcore_registers.rb +0 -57
- data/test/MC/AArch64/basic-a64-instructions.s.cs +0 -2014
- data/test/MC/AArch64/gicv3-regs.s.cs +0 -111
- data/test/MC/AArch64/neon-2velem.s.cs +0 -113
- data/test/MC/AArch64/neon-3vdiff.s.cs +0 -143
- data/test/MC/AArch64/neon-aba-abd.s.cs +0 -28
- data/test/MC/AArch64/neon-across.s.cs +0 -40
- data/test/MC/AArch64/neon-add-pairwise.s.cs +0 -11
- data/test/MC/AArch64/neon-add-sub-instructions.s.cs +0 -21
- data/test/MC/AArch64/neon-bitwise-instructions.s.cs +0 -17
- data/test/MC/AArch64/neon-compare-instructions.s.cs +0 -136
- data/test/MC/AArch64/neon-crypto.s.cs +0 -15
- data/test/MC/AArch64/neon-extract.s.cs +0 -3
- data/test/MC/AArch64/neon-facge-facgt.s.cs +0 -13
- data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +0 -7
- data/test/MC/AArch64/neon-halving-add-sub.s.cs +0 -25
- data/test/MC/AArch64/neon-max-min-pairwise.s.cs +0 -37
- data/test/MC/AArch64/neon-max-min.s.cs +0 -37
- data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +0 -19
- data/test/MC/AArch64/neon-mov.s.cs +0 -74
- data/test/MC/AArch64/neon-mul-div-instructions.s.cs +0 -24
- data/test/MC/AArch64/neon-perm.s.cs +0 -43
- data/test/MC/AArch64/neon-rounding-halving-add.s.cs +0 -13
- data/test/MC/AArch64/neon-rounding-shift.s.cs +0 -15
- data/test/MC/AArch64/neon-saturating-add-sub.s.cs +0 -29
- data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +0 -15
- data/test/MC/AArch64/neon-saturating-shift.s.cs +0 -15
- data/test/MC/AArch64/neon-scalar-abs.s.cs +0 -8
- data/test/MC/AArch64/neon-scalar-add-sub.s.cs +0 -3
- data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +0 -13
- data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +0 -13
- data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +0 -15
- data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +0 -18
- data/test/MC/AArch64/neon-scalar-compare.s.cs +0 -12
- data/test/MC/AArch64/neon-scalar-cvt.s.cs +0 -34
- data/test/MC/AArch64/neon-scalar-dup.s.cs +0 -23
- data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +0 -10
- data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +0 -21
- data/test/MC/AArch64/neon-scalar-mul.s.cs +0 -13
- data/test/MC/AArch64/neon-scalar-neg.s.cs +0 -6
- data/test/MC/AArch64/neon-scalar-recip.s.cs +0 -11
- data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +0 -3
- data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +0 -3
- data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +0 -25
- data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +0 -9
- data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +0 -9
- data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +0 -42
- data/test/MC/AArch64/neon-scalar-shift.s.cs +0 -3
- data/test/MC/AArch64/neon-shift-left-long.s.cs +0 -13
- data/test/MC/AArch64/neon-shift.s.cs +0 -22
- data/test/MC/AArch64/neon-simd-copy.s.cs +0 -42
- data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +0 -197
- data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +0 -129
- data/test/MC/AArch64/neon-simd-misc.s.cs +0 -213
- data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +0 -107
- data/test/MC/AArch64/neon-simd-shift.s.cs +0 -151
- data/test/MC/AArch64/neon-tbl.s.cs +0 -21
- data/test/MC/AArch64/trace-regs.s.cs +0 -383
- data/test/MC/ARM/arm-aliases.s.cs +0 -7
- data/test/MC/ARM/arm-arithmetic-aliases.s.cs +0 -50
- data/test/MC/ARM/arm-it-block.s.cs +0 -2
- data/test/MC/ARM/arm-memory-instructions.s.cs +0 -138
- data/test/MC/ARM/arm-shift-encoding.s.cs +0 -50
- data/test/MC/ARM/arm-thumb-trustzone.s.cs +0 -3
- data/test/MC/ARM/arm-trustzone.s.cs +0 -3
- data/test/MC/ARM/arm_addrmode2.s.cs +0 -15
- data/test/MC/ARM/arm_addrmode3.s.cs +0 -9
- data/test/MC/ARM/arm_instructions.s.cs +0 -25
- data/test/MC/ARM/basic-arm-instructions-v8.s.cs +0 -10
- data/test/MC/ARM/basic-arm-instructions.s.cs +0 -997
- data/test/MC/ARM/basic-thumb-instructions.s.cs +0 -130
- data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +0 -1
- data/test/MC/ARM/basic-thumb2-instructions.s.cs +0 -1242
- data/test/MC/ARM/crc32-thumb.s.cs +0 -7
- data/test/MC/ARM/crc32.s.cs +0 -7
- data/test/MC/ARM/dot-req.s.cs +0 -3
- data/test/MC/ARM/fp-armv8.s.cs +0 -52
- data/test/MC/ARM/idiv-thumb.s.cs +0 -3
- data/test/MC/ARM/idiv.s.cs +0 -3
- data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +0 -15
- data/test/MC/ARM/load-store-acquire-release-v8.s.cs +0 -15
- data/test/MC/ARM/mode-switch.s.cs +0 -7
- data/test/MC/ARM/neon-abs-encoding.s.cs +0 -15
- data/test/MC/ARM/neon-absdiff-encoding.s.cs +0 -39
- data/test/MC/ARM/neon-add-encoding.s.cs +0 -119
- data/test/MC/ARM/neon-bitcount-encoding.s.cs +0 -15
- data/test/MC/ARM/neon-bitwise-encoding.s.cs +0 -126
- data/test/MC/ARM/neon-cmp-encoding.s.cs +0 -88
- data/test/MC/ARM/neon-convert-encoding.s.cs +0 -27
- data/test/MC/ARM/neon-crypto.s.cs +0 -16
- data/test/MC/ARM/neon-dup-encoding.s.cs +0 -13
- data/test/MC/ARM/neon-minmax-encoding.s.cs +0 -57
- data/test/MC/ARM/neon-mov-encoding.s.cs +0 -76
- data/test/MC/ARM/neon-mul-accum-encoding.s.cs +0 -39
- data/test/MC/ARM/neon-mul-encoding.s.cs +0 -72
- data/test/MC/ARM/neon-neg-encoding.s.cs +0 -15
- data/test/MC/ARM/neon-pairwise-encoding.s.cs +0 -47
- data/test/MC/ARM/neon-reciprocal-encoding.s.cs +0 -13
- data/test/MC/ARM/neon-reverse-encoding.s.cs +0 -13
- data/test/MC/ARM/neon-satshift-encoding.s.cs +0 -75
- data/test/MC/ARM/neon-shift-encoding.s.cs +0 -238
- data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +0 -97
- data/test/MC/ARM/neon-shuffle-encoding.s.cs +0 -59
- data/test/MC/ARM/neon-sub-encoding.s.cs +0 -82
- data/test/MC/ARM/neon-table-encoding.s.cs +0 -9
- data/test/MC/ARM/neon-v8.s.cs +0 -38
- data/test/MC/ARM/neon-vld-encoding.s.cs +0 -213
- data/test/MC/ARM/neon-vst-encoding.s.cs +0 -120
- data/test/MC/ARM/neon-vswp.s.cs +0 -3
- data/test/MC/ARM/neont2-abs-encoding.s.cs +0 -15
- data/test/MC/ARM/neont2-absdiff-encoding.s.cs +0 -39
- data/test/MC/ARM/neont2-add-encoding.s.cs +0 -65
- data/test/MC/ARM/neont2-bitcount-encoding.s.cs +0 -15
- data/test/MC/ARM/neont2-bitwise-encoding.s.cs +0 -15
- data/test/MC/ARM/neont2-cmp-encoding.s.cs +0 -17
- data/test/MC/ARM/neont2-convert-encoding.s.cs +0 -19
- data/test/MC/ARM/neont2-dup-encoding.s.cs +0 -19
- data/test/MC/ARM/neont2-minmax-encoding.s.cs +0 -57
- data/test/MC/ARM/neont2-mov-encoding.s.cs +0 -58
- data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +0 -41
- data/test/MC/ARM/neont2-mul-encoding.s.cs +0 -31
- data/test/MC/ARM/neont2-neg-encoding.s.cs +0 -15
- data/test/MC/ARM/neont2-pairwise-encoding.s.cs +0 -43
- data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +0 -13
- data/test/MC/ARM/neont2-reverse-encoding.s.cs +0 -13
- data/test/MC/ARM/neont2-satshift-encoding.s.cs +0 -75
- data/test/MC/ARM/neont2-shift-encoding.s.cs +0 -80
- data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +0 -97
- data/test/MC/ARM/neont2-shuffle-encoding.s.cs +0 -23
- data/test/MC/ARM/neont2-sub-encoding.s.cs +0 -23
- data/test/MC/ARM/neont2-table-encoding.s.cs +0 -9
- data/test/MC/ARM/neont2-vld-encoding.s.cs +0 -51
- data/test/MC/ARM/neont2-vst-encoding.s.cs +0 -48
- data/test/MC/ARM/simple-fp-encoding.s.cs +0 -157
- data/test/MC/ARM/thumb-fp-armv8.s.cs +0 -51
- data/test/MC/ARM/thumb-hints.s.cs +0 -12
- data/test/MC/ARM/thumb-neon-crypto.s.cs +0 -16
- data/test/MC/ARM/thumb-neon-v8.s.cs +0 -38
- data/test/MC/ARM/thumb-shift-encoding.s.cs +0 -19
- data/test/MC/ARM/thumb.s.cs +0 -19
- data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +0 -2
- data/test/MC/ARM/thumb2-branches.s.cs +0 -85
- data/test/MC/ARM/thumb2-mclass.s.cs +0 -41
- data/test/MC/ARM/thumb2-narrow-dp.ll.cs +0 -379
- data/test/MC/ARM/thumb2-pldw.s.cs +0 -2
- data/test/MC/ARM/vfp4-thumb.s.cs +0 -13
- data/test/MC/ARM/vfp4.s.cs +0 -13
- data/test/MC/ARM/vpush-vpop-thumb.s.cs +0 -9
- data/test/MC/ARM/vpush-vpop.s.cs +0 -9
- data/test/MC/Mips/hilo-addressing.s.cs +0 -4
- data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +0 -33
- data/test/MC/Mips/micromips-alu-instructions.s.cs +0 -33
- data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +0 -11
- data/test/MC/Mips/micromips-branch-instructions.s.cs +0 -11
- data/test/MC/Mips/micromips-expansions.s.cs +0 -20
- data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +0 -5
- data/test/MC/Mips/micromips-jump-instructions.s.cs +0 -6
- data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +0 -9
- data/test/MC/Mips/micromips-loadstore-instructions.s.cs +0 -9
- data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +0 -5
- data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +0 -5
- data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +0 -5
- data/test/MC/Mips/micromips-movcond-instructions.s.cs +0 -5
- data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +0 -5
- data/test/MC/Mips/micromips-multiply-instructions.s.cs +0 -5
- data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +0 -9
- data/test/MC/Mips/micromips-shift-instructions.s.cs +0 -9
- data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +0 -13
- data/test/MC/Mips/micromips-trap-instructions.s.cs +0 -13
- data/test/MC/Mips/mips-alu-instructions.s.cs +0 -53
- data/test/MC/Mips/mips-control-instructions-64.s.cs +0 -33
- data/test/MC/Mips/mips-control-instructions.s.cs +0 -33
- data/test/MC/Mips/mips-coprocessor-encodings.s.cs +0 -17
- data/test/MC/Mips/mips-dsp-instructions.s.cs +0 -43
- data/test/MC/Mips/mips-expansions.s.cs +0 -20
- data/test/MC/Mips/mips-fpu-instructions.s.cs +0 -93
- data/test/MC/Mips/mips-jump-instructions.s.cs +0 -1
- data/test/MC/Mips/mips-memory-instructions.s.cs +0 -17
- data/test/MC/Mips/mips-register-names.s.cs +0 -33
- data/test/MC/Mips/mips64-alu-instructions.s.cs +0 -47
- data/test/MC/Mips/mips64-instructions.s.cs +0 -3
- data/test/MC/Mips/mips64-register-names.s.cs +0 -33
- data/test/MC/Mips/mips_directives.s.cs +0 -12
- data/test/MC/Mips/nabi-regs.s.cs +0 -12
- data/test/MC/Mips/set-at-directive.s.cs +0 -6
- data/test/MC/Mips/test_2r.s.cs +0 -16
- data/test/MC/Mips/test_2rf.s.cs +0 -33
- data/test/MC/Mips/test_3r.s.cs +0 -243
- data/test/MC/Mips/test_3rf.s.cs +0 -83
- data/test/MC/Mips/test_bit.s.cs +0 -49
- data/test/MC/Mips/test_cbranch.s.cs +0 -11
- data/test/MC/Mips/test_ctrlregs.s.cs +0 -33
- data/test/MC/Mips/test_elm.s.cs +0 -16
- data/test/MC/Mips/test_elm_insert.s.cs +0 -4
- data/test/MC/Mips/test_elm_insve.s.cs +0 -5
- data/test/MC/Mips/test_i10.s.cs +0 -5
- data/test/MC/Mips/test_i5.s.cs +0 -45
- data/test/MC/Mips/test_i8.s.cs +0 -11
- data/test/MC/Mips/test_lsa.s.cs +0 -5
- data/test/MC/Mips/test_mi10.s.cs +0 -24
- data/test/MC/Mips/test_vec.s.cs +0 -8
- data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +0 -25
- data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +0 -35
- data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +0 -535
- data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +0 -110
- data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +0 -170
- data/test/MC/PowerPC/ppc64-encoding.s.cs +0 -202
- data/test/MC/PowerPC/ppc64-operands.s.cs +0 -32
- data/test/MC/README +0 -6
- data/test/MC/Sparc/sparc-alu-instructions.s.cs +0 -47
- data/test/MC/Sparc/sparc-atomic-instructions.s.cs +0 -7
- data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +0 -11
- data/test/MC/Sparc/sparc-fp-instructions.s.cs +0 -59
- data/test/MC/Sparc/sparc-mem-instructions.s.cs +0 -25
- data/test/MC/Sparc/sparc-vis.s.cs +0 -2
- data/test/MC/Sparc/sparc64-alu-instructions.s.cs +0 -13
- data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +0 -102
- data/test/MC/Sparc/sparcv8-instructions.s.cs +0 -7
- data/test/MC/Sparc/sparcv9-instructions.s.cs +0 -1
- data/test/MC/SystemZ/insn-good-z196.s.cs +0 -589
- data/test/MC/SystemZ/insn-good.s.cs +0 -2265
- data/test/MC/SystemZ/regs-good.s.cs +0 -45
- data/test/MC/X86/3DNow.s.cs +0 -29
- data/test/MC/X86/address-size.s.cs +0 -5
- data/test/MC/X86/avx512-encodings.s.cs +0 -12
- data/test/MC/X86/intel-syntax-encoding.s.cs +0 -30
- data/test/MC/X86/x86-32-avx.s.cs +0 -833
- data/test/MC/X86/x86-32-fma3.s.cs +0 -169
- data/test/MC/X86/x86-32-ms-inline-asm.s.cs +0 -27
- data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +0 -11
- data/test/MC/X86/x86_64-avx-encoding.s.cs +0 -1058
- data/test/MC/X86/x86_64-bmi-encoding.s.cs +0 -51
- data/test/MC/X86/x86_64-encoding.s.cs +0 -59
- data/test/MC/X86/x86_64-fma3-encoding.s.cs +0 -169
- data/test/MC/X86/x86_64-fma4-encoding.s.cs +0 -98
- data/test/MC/X86/x86_64-hle-encoding.s.cs +0 -3
- data/test/MC/X86/x86_64-imm-widths.s.cs +0 -27
- data/test/MC/X86/x86_64-rand-encoding.s.cs +0 -13
- data/test/MC/X86/x86_64-rtm-encoding.s.cs +0 -4
- data/test/MC/X86/x86_64-sse4a.s.cs +0 -1
- data/test/MC/X86/x86_64-tbm-encoding.s.cs +0 -40
- data/test/MC/X86/x86_64-xop-encoding.s.cs +0 -152
- data/test/README +0 -6
- data/test/test.rb +0 -205
- data/test/test.rb.SPEC +0 -235
- data/test/test_arm.rb +0 -202
- data/test/test_arm.rb.SPEC +0 -275
- data/test/test_arm64.rb +0 -150
- data/test/test_arm64.rb.SPEC +0 -116
- data/test/test_detail.rb +0 -228
- data/test/test_detail.rb.SPEC +0 -322
- data/test/test_exhaustive.rb +0 -80
- data/test/test_mips.rb +0 -118
- data/test/test_mips.rb.SPEC +0 -91
- data/test/test_ppc.rb +0 -137
- data/test/test_ppc.rb.SPEC +0 -84
- data/test/test_sanity.rb +0 -83
- data/test/test_skipdata.rb +0 -111
- data/test/test_skipdata.rb.SPEC +0 -58
- data/test/test_sparc.rb +0 -113
- data/test/test_sparc.rb.SPEC +0 -116
- data/test/test_sysz.rb +0 -111
- data/test/test_sysz.rb.SPEC +0 -61
- data/test/test_x86.rb +0 -189
- data/test/test_x86.rb.SPEC +0 -579
- data/test/test_xcore.rb +0 -100
- data/test/test_xcore.rb.SPEC +0 -75
@@ -0,0 +1,59 @@
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# frozen_string_literal: true
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# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
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require 'ffi'
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require 'crabstone/arch/extension'
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require_relative 'xcore_const'
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module Crabstone
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module XCore
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class OperandMemory < FFI::Struct
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layout(
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:base, :uint8,
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:index, :uint8,
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:disp, :int,
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:direct, :int
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)
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end
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class OperandValue < FFI::Union
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layout(
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:reg, :uint,
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:imm, :int,
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:mem, OperandMemory
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)
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end
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class Operand < FFI::Struct
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layout(
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:type, :uint,
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:value, OperandValue
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)
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include Crabstone::Extension::Operand
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def reg?
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self[:type] == OP_REG
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end
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def imm?
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self[:type] == OP_IMM
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end
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def mem?
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self[:type] == OP_MEM
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end
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end
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class Instruction < FFI::Struct
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layout(
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:op_count, :uint8,
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:operands, [Operand, 8]
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)
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include Crabstone::Extension::Instruction
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end
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end
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end
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# frozen_string_literal: true
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# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
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require 'crabstone/arch/register'
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module Crabstone
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module XCore
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OP_INVALID = 0
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OP_REG = 1
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OP_IMM = 2
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OP_MEM = 3
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REG_INVALID = 0
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REG_CP = 1
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REG_DP = 2
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REG_LR = 3
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REG_SP = 4
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REG_R0 = 5
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REG_R1 = 6
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REG_R2 = 7
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REG_R3 = 8
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REG_R4 = 9
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REG_R5 = 10
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REG_R6 = 11
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REG_R7 = 12
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REG_R8 = 13
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REG_R9 = 14
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REG_R10 = 15
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REG_R11 = 16
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REG_PC = 17
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REG_SCP = 18
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REG_SSR = 19
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REG_ET = 20
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REG_ED = 21
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REG_SED = 22
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REG_KEP = 23
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REG_KSP = 24
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REG_ID = 25
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REG_ENDING = 26
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INS_INVALID = 0
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INS_ADD = 1
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INS_ANDNOT = 2
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INS_AND = 3
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INS_ASHR = 4
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INS_BAU = 5
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INS_BITREV = 6
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INS_BLA = 7
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INS_BLAT = 8
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INS_BL = 9
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INS_BF = 10
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INS_BT = 11
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INS_BU = 12
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INS_BRU = 13
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INS_BYTEREV = 14
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INS_CHKCT = 15
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INS_CLRE = 16
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INS_CLRPT = 17
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INS_CLRSR = 18
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INS_CLZ = 19
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INS_CRC8 = 20
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INS_CRC32 = 21
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INS_DCALL = 22
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INS_DENTSP = 23
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INS_DGETREG = 24
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INS_DIVS = 25
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INS_DIVU = 26
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INS_DRESTSP = 27
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INS_DRET = 28
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INS_ECALLF = 29
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INS_ECALLT = 30
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INS_EDU = 31
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INS_EEF = 32
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INS_EET = 33
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INS_EEU = 34
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INS_ENDIN = 35
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INS_ENTSP = 36
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INS_EQ = 37
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INS_EXTDP = 38
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INS_EXTSP = 39
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INS_FREER = 40
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INS_FREET = 41
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INS_GETD = 42
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INS_GET = 43
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INS_GETN = 44
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INS_GETR = 45
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INS_GETSR = 46
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INS_GETST = 47
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INS_GETTS = 48
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INS_INCT = 49
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INS_INIT = 50
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INS_INPW = 51
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INS_INSHR = 52
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INS_INT = 53
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INS_IN = 54
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INS_KCALL = 55
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INS_KENTSP = 56
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INS_KRESTSP = 57
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INS_KRET = 58
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INS_LADD = 59
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INS_LD16S = 60
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INS_LD8U = 61
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INS_LDA16 = 62
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INS_LDAP = 63
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INS_LDAW = 64
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INS_LDC = 65
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108
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INS_LDW = 66
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109
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INS_LDIVU = 67
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110
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INS_LMUL = 68
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111
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INS_LSS = 69
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112
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INS_LSUB = 70
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113
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INS_LSU = 71
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114
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INS_MACCS = 72
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115
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INS_MACCU = 73
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116
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INS_MJOIN = 74
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INS_MKMSK = 75
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118
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INS_MSYNC = 76
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INS_MUL = 77
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120
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INS_NEG = 78
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121
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INS_NOT = 79
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INS_OR = 80
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123
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INS_OUTCT = 81
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INS_OUTPW = 82
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INS_OUTSHR = 83
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INS_OUTT = 84
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127
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INS_OUT = 85
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128
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INS_PEEK = 86
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129
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INS_REMS = 87
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INS_REMU = 88
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INS_RETSP = 89
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INS_SETCLK = 90
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133
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INS_SET = 91
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134
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INS_SETC = 92
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135
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INS_SETD = 93
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INS_SETEV = 94
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137
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INS_SETN = 95
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INS_SETPSC = 96
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139
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INS_SETPT = 97
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140
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INS_SETRDY = 98
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141
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INS_SETSR = 99
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142
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INS_SETTW = 100
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143
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INS_SETV = 101
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INS_SEXT = 102
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145
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INS_SHL = 103
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INS_SHR = 104
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147
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INS_SSYNC = 105
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148
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+
INS_ST16 = 106
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149
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INS_ST8 = 107
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150
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INS_STW = 108
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151
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+
INS_SUB = 109
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152
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+
INS_SYNCR = 110
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153
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+
INS_TESTCT = 111
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154
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+
INS_TESTLCL = 112
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155
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INS_TESTWCT = 113
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+
INS_TSETMR = 114
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157
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INS_START = 115
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158
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INS_WAITEF = 116
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159
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+
INS_WAITET = 117
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160
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INS_WAITEU = 118
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161
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INS_XOR = 119
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162
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INS_ZEXT = 120
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INS_ENDING = 121
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164
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+
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165
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GRP_INVALID = 0
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+
GRP_JUMP = 1
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GRP_ENDING = 2
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168
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+
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169
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extend Register
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170
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end
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+
end
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1
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# frozen_string_literal: true
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module Crabstone
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# These modules is for +class Operand+ and +class Instruction+ to extend.
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# @private
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module Extension
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# For +class Operand+.
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module Operand
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def value
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self[:value].class.members.find do |s|
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return self[:value][s] if __send__("#{s}?".to_sym)
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+
end
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13
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+
end
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14
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+
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def valid?
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!value.nil?
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end
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18
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+
end
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19
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+
|
20
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# For +class Instruction+.
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21
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module Instruction
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def operands
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23
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+
self[:operands].take_while { |op| op[:type] != OP_INVALID }
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+
end
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+
end
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26
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+
end
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+
end
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@@ -0,0 +1,34 @@
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# frozen_string_literal: true
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2
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+
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3
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require 'set'
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4
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+
|
5
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+
module Crabstone
|
6
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# Module for arch/<version>/<arch>_const.rb to extend.
|
7
|
+
module Register
|
8
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+
# @param [Integer, String, Symbol] reg
|
9
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+
# @return [Integer]
|
10
|
+
def register(reg)
|
11
|
+
return reg if value?(reg)
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12
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+
|
13
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+
dict[reg.to_s.upcase] || invalid
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14
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+
end
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15
|
+
|
16
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+
private
|
17
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+
|
18
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+
def dict
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19
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+
return @dict if defined?(@dict)
|
20
|
+
|
21
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+
keys = constants.select { |k| k.to_s.start_with?('REG_') }
|
22
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+
@dict = keys.map { |k| [k.to_s[4..], const_get(k)] }.to_h.freeze
|
23
|
+
end
|
24
|
+
|
25
|
+
def value?(val)
|
26
|
+
@val_set ||= Set.new(dict.values)
|
27
|
+
@val_set.member?(val)
|
28
|
+
end
|
29
|
+
|
30
|
+
def invalid
|
31
|
+
dict['INVALID']
|
32
|
+
end
|
33
|
+
end
|
34
|
+
end
|
@@ -0,0 +1,37 @@
|
|
1
|
+
# frozen_string_literal: true
|
2
|
+
|
3
|
+
require 'crabstone/constants'
|
4
|
+
require 'crabstone/cs_version'
|
5
|
+
|
6
|
+
# require all files under 'crabstone/arch/<cs_major_version>'
|
7
|
+
Dir.glob(File.join(__dir__, 'arch', Crabstone.cs_major_version.to_s, '*.rb')).sort.each do |f|
|
8
|
+
require f
|
9
|
+
end
|
10
|
+
|
11
|
+
module Crabstone
|
12
|
+
module Arch
|
13
|
+
module_function
|
14
|
+
|
15
|
+
# @param [Integer] arch
|
16
|
+
# @return [Module]
|
17
|
+
# @example
|
18
|
+
# Arch.module_of(Crabstone::ARCH_X86)
|
19
|
+
# #=> Crabstone::X86
|
20
|
+
def module_of(arch)
|
21
|
+
case arch
|
22
|
+
when ARCH_ARM then ARM
|
23
|
+
when ARCH_ARM64 then ARM64
|
24
|
+
when ARCH_X86 then X86
|
25
|
+
when ARCH_MIPS then MIPS
|
26
|
+
when ARCH_PPC then PPC
|
27
|
+
when ARCH_SPARC then Sparc
|
28
|
+
when ARCH_SYSZ then SysZ
|
29
|
+
when ARCH_XCORE then XCore
|
30
|
+
when ARCH_M68K then M68K
|
31
|
+
when ARCH_TMS320C64X then TMS320C64X
|
32
|
+
when ARCH_M680X then M680X
|
33
|
+
when ARCH_EVM then EVM
|
34
|
+
end
|
35
|
+
end
|
36
|
+
end
|
37
|
+
end
|
@@ -0,0 +1,36 @@
|
|
1
|
+
# frozen_string_literal: true
|
2
|
+
|
3
|
+
# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
|
4
|
+
|
5
|
+
require 'ffi'
|
6
|
+
|
7
|
+
require 'crabstone/arch'
|
8
|
+
|
9
|
+
module Crabstone
|
10
|
+
module Binding
|
11
|
+
class Architecture < FFI::Union
|
12
|
+
layout(
|
13
|
+
:arm, ARM::Instruction,
|
14
|
+
:arm64, ARM64::Instruction,
|
15
|
+
:mips, MIPS::Instruction,
|
16
|
+
:ppc, PPC::Instruction,
|
17
|
+
:sparc, Sparc::Instruction,
|
18
|
+
:sysz, SysZ::Instruction,
|
19
|
+
:x86, X86::Instruction,
|
20
|
+
:xcore, XCore::Instruction
|
21
|
+
)
|
22
|
+
end
|
23
|
+
|
24
|
+
class Detail < FFI::Struct
|
25
|
+
layout(
|
26
|
+
:regs_read, [:uint8, 12],
|
27
|
+
:regs_read_count, :uint8,
|
28
|
+
:regs_write, [:uint8, 20],
|
29
|
+
:regs_write_count, :uint8,
|
30
|
+
:groups, [:uint8, 8],
|
31
|
+
:groups_count, :uint8,
|
32
|
+
:arch, Architecture
|
33
|
+
)
|
34
|
+
end
|
35
|
+
end
|
36
|
+
end
|
@@ -0,0 +1,23 @@
|
|
1
|
+
# frozen_string_literal: true
|
2
|
+
|
3
|
+
# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
|
4
|
+
|
5
|
+
require 'ffi'
|
6
|
+
|
7
|
+
require_relative 'detail'
|
8
|
+
|
9
|
+
module Crabstone
|
10
|
+
module Binding
|
11
|
+
class Instruction < FFI::ManagedStruct
|
12
|
+
layout(
|
13
|
+
:id, :uint32,
|
14
|
+
:address, :uint64,
|
15
|
+
:size, :uint16,
|
16
|
+
:bytes, [:uint8, 16],
|
17
|
+
:mnemonic, [:char, 32],
|
18
|
+
:op_str, [:char, 160],
|
19
|
+
:detail, Detail.by_ref
|
20
|
+
)
|
21
|
+
end
|
22
|
+
end
|
23
|
+
end
|
@@ -0,0 +1,40 @@
|
|
1
|
+
# frozen_string_literal: true
|
2
|
+
|
3
|
+
# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
|
4
|
+
|
5
|
+
require 'ffi'
|
6
|
+
|
7
|
+
require 'crabstone/arch'
|
8
|
+
|
9
|
+
module Crabstone
|
10
|
+
module Binding
|
11
|
+
class Architecture < FFI::Union
|
12
|
+
layout(
|
13
|
+
:arm, ARM::Instruction,
|
14
|
+
:arm64, ARM64::Instruction,
|
15
|
+
:evm, EVM::Instruction,
|
16
|
+
:m680x, M680X::Instruction,
|
17
|
+
:m68k, M68K::Instruction,
|
18
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+
:mips, MIPS::Instruction,
|
19
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+
:ppc, PPC::Instruction,
|
20
|
+
:sparc, Sparc::Instruction,
|
21
|
+
:sysz, SysZ::Instruction,
|
22
|
+
:tms320c64x, TMS320C64X::Instruction,
|
23
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+
:x86, X86::Instruction,
|
24
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+
:xcore, XCore::Instruction
|
25
|
+
)
|
26
|
+
end
|
27
|
+
|
28
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+
class Detail < FFI::Struct
|
29
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+
layout(
|
30
|
+
:regs_read, [:uint16, 12],
|
31
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+
:regs_read_count, :uint8,
|
32
|
+
:regs_write, [:uint16, 20],
|
33
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+
:regs_write_count, :uint8,
|
34
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+
:groups, [:uint8, 8],
|
35
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+
:groups_count, :uint8,
|
36
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+
:arch, Architecture
|
37
|
+
)
|
38
|
+
end
|
39
|
+
end
|
40
|
+
end
|
@@ -0,0 +1,23 @@
|
|
1
|
+
# frozen_string_literal: true
|
2
|
+
|
3
|
+
# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
|
4
|
+
|
5
|
+
require 'ffi'
|
6
|
+
|
7
|
+
require_relative 'detail'
|
8
|
+
|
9
|
+
module Crabstone
|
10
|
+
module Binding
|
11
|
+
class Instruction < FFI::ManagedStruct
|
12
|
+
layout(
|
13
|
+
:id, :uint32,
|
14
|
+
:address, :uint64,
|
15
|
+
:size, :uint16,
|
16
|
+
:bytes, [:uint8, 16],
|
17
|
+
:mnemonic, [:char, 32],
|
18
|
+
:op_str, [:char, 160],
|
19
|
+
:detail, Detail.by_ref
|
20
|
+
)
|
21
|
+
end
|
22
|
+
end
|
23
|
+
end
|
@@ -0,0 +1,32 @@
|
|
1
|
+
# frozen_string_literal: true
|
2
|
+
|
3
|
+
require 'ffi'
|
4
|
+
|
5
|
+
require 'crabstone/cs_version'
|
6
|
+
Crabstone.version_require 'crabstone/binding/%v/instruction'
|
7
|
+
|
8
|
+
module Crabstone
|
9
|
+
module Binding
|
10
|
+
# This is because JRuby FFI on x64 Windows thinks size_t is 32 bit
|
11
|
+
typedef(FFI::Platform::ADDRESS_SIZE == 32 ? :ulong : :ulong_long, :size_t)
|
12
|
+
|
13
|
+
# If one day these definitions change, move them to <version>/ dir.
|
14
|
+
|
15
|
+
typedef :size_t, :csh
|
16
|
+
typedef :size_t, :cs_opt_value
|
17
|
+
typedef :uint, :cs_opt_type
|
18
|
+
typedef :uint, :cs_err
|
19
|
+
typedef :uint, :cs_arch
|
20
|
+
typedef :uint, :cs_mode
|
21
|
+
|
22
|
+
callback :skipdata_cb, %i[pointer size_t size_t pointer], :size_t
|
23
|
+
|
24
|
+
class SkipdataConfig < FFI::Struct
|
25
|
+
layout(
|
26
|
+
:mnemonic, :pointer,
|
27
|
+
:callback, :skipdata_cb,
|
28
|
+
:unused, :pointer
|
29
|
+
)
|
30
|
+
end
|
31
|
+
end
|
32
|
+
end
|
@@ -0,0 +1,59 @@
|
|
1
|
+
# frozen_string_literal: true
|
2
|
+
|
3
|
+
require 'crabstone/constants'
|
4
|
+
require 'crabstone/binding/structs'
|
5
|
+
|
6
|
+
module Crabstone
|
7
|
+
module Binding
|
8
|
+
class Instruction < FFI::ManagedStruct
|
9
|
+
def self.release(obj)
|
10
|
+
detail_ptr = obj.+(Instruction.offset_of(:detail)).read_pointer
|
11
|
+
Binding.free(detail_ptr)
|
12
|
+
Binding.free(obj)
|
13
|
+
end
|
14
|
+
end
|
15
|
+
|
16
|
+
# These APIs still might be changed in a new Capstone version.
|
17
|
+
attach_function(
|
18
|
+
:cs_disasm,
|
19
|
+
%i[csh pointer size_t ulong_long size_t pointer],
|
20
|
+
:size_t
|
21
|
+
)
|
22
|
+
attach_function :cs_close, [:pointer], :cs_err
|
23
|
+
attach_function :cs_errno, [:csh], :cs_err
|
24
|
+
attach_function :cs_group_name, %i[csh uint], :string
|
25
|
+
attach_function :cs_insn_group, [:csh, Instruction, :uint], :bool
|
26
|
+
attach_function :cs_insn_name, %i[csh uint], :string
|
27
|
+
attach_function :cs_op_count, [:csh, Instruction, :uint], :cs_err
|
28
|
+
attach_function :cs_open, %i[cs_arch cs_mode pointer], :cs_err
|
29
|
+
attach_function :cs_option, %i[csh cs_opt_type cs_opt_value], :cs_err
|
30
|
+
attach_function :cs_reg_name, %i[csh uint], :string
|
31
|
+
attach_function :cs_reg_read, [:csh, Instruction, :uint], :bool
|
32
|
+
attach_function :cs_reg_write, [:csh, Instruction, :uint], :bool
|
33
|
+
attach_function :cs_strerror, [:cs_err], :string
|
34
|
+
attach_function :cs_support, [:cs_arch], :bool
|
35
|
+
# Already defined in cs_version.rb
|
36
|
+
# attach_function :cs_version, %i[pointer pointer], :uint
|
37
|
+
attach_function :memcpy, %i[pointer pointer size_t], :pointer
|
38
|
+
attach_function :malloc, [:size_t], :pointer
|
39
|
+
attach_function :free, [:pointer], :void
|
40
|
+
|
41
|
+
# Wrap to prevent function not found in elder Capstone.
|
42
|
+
def self.safe_attach(*args)
|
43
|
+
attach_function(*args)
|
44
|
+
rescue FFI::NotFoundError
|
45
|
+
end
|
46
|
+
|
47
|
+
# New APIs since Capstone 4.
|
48
|
+
safe_attach :cs_regs_access, [:csh, Instruction, :pointer, :pointer, :pointer, :pointer], :cs_err
|
49
|
+
end
|
50
|
+
|
51
|
+
# This is a C engine build option, so we can set it here, not when we
|
52
|
+
# instantiate a new Disassembler.
|
53
|
+
# Diet mode means:
|
54
|
+
# - No op_str or mnemonic in Instruction
|
55
|
+
# - No regs_read, regs_write or groups ( even with detail on )
|
56
|
+
# - No reg_name or insn_name id2str convenience functions
|
57
|
+
# - detail mode CAN still be on - so the arch insn operands MAY be available
|
58
|
+
DIET_MODE = Binding.cs_support(SUPPORT_DIET)
|
59
|
+
end
|
@@ -0,0 +1,110 @@
|
|
1
|
+
# frozen_string_literal: true
|
2
|
+
|
3
|
+
# XXX: Auto-gerneate this file?
|
4
|
+
# Constants in this file might be added in a newer Capstone version,
|
5
|
+
# but I expect they are always backward compatible.
|
6
|
+
|
7
|
+
require 'crabstone/version'
|
8
|
+
|
9
|
+
module Crabstone
|
10
|
+
# API version
|
11
|
+
BINDING_MAJ = VERSION.split('.').first.to_i
|
12
|
+
|
13
|
+
# architectures
|
14
|
+
ARCH_ARM = 0
|
15
|
+
ARCH_ARM64 = 1
|
16
|
+
ARCH_MIPS = 2
|
17
|
+
ARCH_X86 = 3
|
18
|
+
ARCH_PPC = 4
|
19
|
+
ARCH_SPARC = 5
|
20
|
+
ARCH_SYSZ = 6
|
21
|
+
ARCH_XCORE = 7
|
22
|
+
ARCH_M68K = 8
|
23
|
+
ARCH_TMS320C64X = 9
|
24
|
+
ARCH_M680X = 10
|
25
|
+
ARCH_EVM = 11
|
26
|
+
ARCH_MAX = 12
|
27
|
+
ARCH_ALL = 0xFFFF
|
28
|
+
|
29
|
+
# disasm mode
|
30
|
+
MODE_LITTLE_ENDIAN = 0 # little-endian mode (default mode)
|
31
|
+
MODE_ARM = 0 # 32-bit ARM
|
32
|
+
MODE_16 = 1 << 1 # 16-bit mode (X86)
|
33
|
+
MODE_32 = 1 << 2 # 32-bit mode (X86)
|
34
|
+
MODE_64 = 1 << 3 # 64-bit mode (X86, PPC)
|
35
|
+
MODE_THUMB = 1 << 4 # ARM's Thumb mode, including Thumb-2
|
36
|
+
MODE_MCLASS = 1 << 5 # ARM's Cortex-M series
|
37
|
+
MODE_V8 = 1 << 6 # ARMv8 A32 encodings for ARM
|
38
|
+
MODE_MICRO = 1 << 4 # MicroMips mode (MIPS)
|
39
|
+
MODE_MIPS3 = 1 << 5 # Mips III ISA
|
40
|
+
MODE_MIPS32R6 = 1 << 6 # Mips32r6 ISA
|
41
|
+
MODE_MIPSGP64 = 1 << 7 # General Purpose Registers are 64-bit wide (MIPS)
|
42
|
+
MODE_MODE_MIPS2 = 1 << 7 # Mips II ISA
|
43
|
+
MODE_V9 = 1 << 4 # SparcV9 mode (Sparc)
|
44
|
+
MODE_QPX = 1 << 4 # Quad Processing eXtensions mode (PPC)
|
45
|
+
MODE_M68K_000 = 1 << 1 # M68K 68000 mode
|
46
|
+
MODE_M68K_010 = 1 << 2 # M68K 68010 mode
|
47
|
+
MODE_M68K_020 = 1 << 3 # M68K 68020 mode
|
48
|
+
MODE_M68K_030 = 1 << 4 # M68K 68030 mode
|
49
|
+
MODE_M68K_040 = 1 << 5 # M68K 68040 mode
|
50
|
+
MODE_M68K_060 = 1 << 6 # M68K 68060 mode
|
51
|
+
MODE_BIG_ENDIAN = 1 << 31 # big-endian mode
|
52
|
+
MODE_MIPS32 = MODE_32 # Mips32 ISA (Mips)
|
53
|
+
MODE_MIPS64 = MODE_64 # Mips64 ISA (Mips)
|
54
|
+
MODE_M680X_6301 = 1 << 1 # M680X HD6301/3 mode
|
55
|
+
MODE_M680X_6309 = 1 << 2 # M680X HD6309 mode
|
56
|
+
MODE_M680X_6800 = 1 << 3 # M680X M6800/2 mode
|
57
|
+
MODE_M680X_6801 = 1 << 4 # M680X M6801/3 mode
|
58
|
+
MODE_M680X_6805 = 1 << 5 # M680X M6805 mode
|
59
|
+
MODE_M680X_6808 = 1 << 6 # M680X M68HC08 mode
|
60
|
+
MODE_M680X_6809 = 1 << 7 # M680X M6809 mode
|
61
|
+
MODE_M680X_6811 = 1 << 8 # M680X M68HC11 mode
|
62
|
+
MODE_M680X_CPU12 = 1 << 9 # M680X CPU12 mode
|
63
|
+
MODE_M680X_HCS08 = 1 << 10 # M680X HCS08 mode
|
64
|
+
|
65
|
+
# Capstone option type
|
66
|
+
OPT_SYNTAX = 1 # Intel X86 asm syntax (ARCH_X86 arch)
|
67
|
+
OPT_DETAIL = 2 # Break down instruction structure into details
|
68
|
+
OPT_MODE = 3 # Change engine's mode at run-time
|
69
|
+
OPT_MEM = 4 # Change engine's mode at run-time
|
70
|
+
OPT_SKIPDATA = 5 # Skip data when disassembling
|
71
|
+
OPT_SKIPDATA_SETUP = 6 # Setup user-defined function for SKIPDATA option
|
72
|
+
OPT_MNEMONIC = 7 # Customize instruction mnemonic
|
73
|
+
OPT_UNSIGNED = 8 # Print immediate in unsigned form
|
74
|
+
|
75
|
+
# Capstone option value
|
76
|
+
OPT_OFF = 0 # Turn OFF an option - default option of OPT_DETAIL
|
77
|
+
OPT_ON = 3 # Turn ON an option (OPT_DETAIL)
|
78
|
+
|
79
|
+
# Common instruction operand types - to be consistent across all architectures.
|
80
|
+
OP_INVALID = 0
|
81
|
+
OP_REG = 1
|
82
|
+
OP_IMM = 2
|
83
|
+
OP_MEM = 3
|
84
|
+
OP_FP = 4
|
85
|
+
|
86
|
+
# Common instruction groups - to be consistent across all architectures.
|
87
|
+
GRP_INVALID = 0 # uninitialized/invalid group.
|
88
|
+
GRP_JUMP = 1 # all jump instructions (conditional+direct+indirect jumps)
|
89
|
+
GRP_CALL = 2 # all call instructions
|
90
|
+
GRP_RET = 3 # all return instructions
|
91
|
+
GRP_INT = 4 # all interrupt instructions (int+syscall)
|
92
|
+
GRP_IRET = 5 # all interrupt return instructions
|
93
|
+
GRP_PRIVILEGE = 6 # all privileged instructions
|
94
|
+
|
95
|
+
# Access types for instruction operands.
|
96
|
+
AC_INVALID = 0 # Invalid/unitialized access type.
|
97
|
+
AC_READ = 1 << 0 # Operand that is read from.
|
98
|
+
AC_WRITE = 1 << 1 # Operand that is written to.
|
99
|
+
|
100
|
+
# Capstone syntax value
|
101
|
+
OPT_SYNTAX_DEFAULT = 0 # Default assembly syntax of all platforms (OPT_SYNTAX)
|
102
|
+
OPT_SYNTAX_INTEL = 1 # Intel X86 asm syntax - default syntax on X86 (OPT_SYNTAX, ARCH_X86)
|
103
|
+
OPT_SYNTAX_ATT = 2 # ATT asm syntax (OPT_SYNTAX, ARCH_X86)
|
104
|
+
OPT_SYNTAX_NOREGNAME = 3 # Asm syntax prints register name with only number - (OPT_SYNTAX, ARCH_PPC, ARCH_ARM)
|
105
|
+
OPT_SYNTAX_MASM = 4 # MASM syntax (CS_OPT_SYNTAX, CS_ARCH_X86)
|
106
|
+
|
107
|
+
# query id for cs_support()
|
108
|
+
SUPPORT_DIET = ARCH_ALL + 1
|
109
|
+
SUPPORT_X86_REDUCE = ARCH_ALL + 2
|
110
|
+
end
|