crabstone 3.0.3 → 4.0.4
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- checksums.yaml +5 -5
- data/CHANGES.md +59 -42
- data/README.md +37 -39
- data/lib/{arch → crabstone/arch/3}/arm.rb +28 -49
- data/lib/crabstone/arch/3/arm64.rb +124 -0
- data/lib/{arch → crabstone/arch/3}/arm64_const.rb +45 -86
- data/lib/{arch → crabstone/arch/3}/arm_const.rb +19 -47
- data/lib/crabstone/arch/3/mips.rb +57 -0
- data/lib/{arch → crabstone/arch/3}/mips_const.rb +18 -38
- data/lib/crabstone/arch/3/ppc.rb +73 -0
- data/lib/{arch → crabstone/arch/3}/ppc_const.rb +27 -43
- data/lib/crabstone/arch/3/sparc.rb +60 -0
- data/lib/{arch → crabstone/arch/3}/sparc_const.rb +49 -67
- data/lib/crabstone/arch/3/sysz.rb +67 -0
- data/lib/{arch → crabstone/arch/3}/sysz_const.rb +11 -25
- data/lib/crabstone/arch/3/x86.rb +82 -0
- data/lib/{arch → crabstone/arch/3}/x86_const.rb +15 -36
- data/lib/crabstone/arch/3/xcore.rb +59 -0
- data/lib/{arch → crabstone/arch/3}/xcore_const.rb +10 -22
- data/lib/crabstone/arch/4/arm.rb +110 -0
- data/lib/crabstone/arch/4/arm64.rb +125 -0
- data/lib/crabstone/arch/4/arm64_const.rb +1016 -0
- data/lib/crabstone/arch/4/arm_const.rb +785 -0
- data/lib/crabstone/arch/4/evm.rb +20 -0
- data/lib/crabstone/arch/4/evm_const.rb +161 -0
- data/lib/crabstone/arch/4/m680x.rb +106 -0
- data/lib/crabstone/arch/4/m680x_const.rb +426 -0
- data/lib/crabstone/arch/4/m68k.rb +129 -0
- data/lib/crabstone/arch/4/m68k_const.rb +496 -0
- data/lib/crabstone/arch/4/mips.rb +57 -0
- data/lib/crabstone/arch/4/mips_const.rb +869 -0
- data/lib/crabstone/arch/4/ppc.rb +73 -0
- data/lib/crabstone/arch/4/ppc_const.rb +1375 -0
- data/lib/crabstone/arch/4/sparc.rb +60 -0
- data/lib/crabstone/arch/4/sparc_const.rb +439 -0
- data/lib/crabstone/arch/4/sysz.rb +67 -0
- data/lib/crabstone/arch/4/sysz_const.rb +763 -0
- data/lib/crabstone/arch/4/tms320c64x.rb +87 -0
- data/lib/crabstone/arch/4/tms320c64x_const.rb +287 -0
- data/lib/crabstone/arch/4/x86.rb +91 -0
- data/lib/crabstone/arch/4/x86_const.rb +1972 -0
- data/lib/crabstone/arch/4/xcore.rb +59 -0
- data/lib/crabstone/arch/4/xcore_const.rb +171 -0
- data/lib/crabstone/arch/extension.rb +27 -0
- data/lib/crabstone/arch/register.rb +34 -0
- data/lib/crabstone/arch.rb +37 -0
- data/lib/crabstone/binding/3/detail.rb +36 -0
- data/lib/crabstone/binding/3/instruction.rb +23 -0
- data/lib/crabstone/binding/4/detail.rb +40 -0
- data/lib/crabstone/binding/4/instruction.rb +23 -0
- data/lib/crabstone/binding/structs.rb +32 -0
- data/lib/crabstone/binding.rb +59 -0
- data/lib/crabstone/constants.rb +110 -0
- data/lib/crabstone/cs_version.rb +57 -0
- data/lib/crabstone/disassembler.rb +147 -0
- data/lib/crabstone/error.rb +74 -0
- data/lib/crabstone/instruction.rb +178 -0
- data/lib/crabstone/version.rb +5 -0
- data/lib/crabstone.rb +5 -557
- metadata +142 -331
- data/MANIFEST +0 -312
- data/Rakefile +0 -27
- data/bin/genconst +0 -66
- data/bin/genreg +0 -99
- data/crabstone.gemspec +0 -27
- data/examples/hello_world.rb +0 -43
- data/lib/arch/arm64.rb +0 -167
- data/lib/arch/arm64_registers.rb +0 -295
- data/lib/arch/arm_registers.rb +0 -149
- data/lib/arch/mips.rb +0 -78
- data/lib/arch/mips_registers.rb +0 -208
- data/lib/arch/ppc.rb +0 -90
- data/lib/arch/ppc_registers.rb +0 -209
- data/lib/arch/sparc.rb +0 -79
- data/lib/arch/sparc_registers.rb +0 -121
- data/lib/arch/systemz.rb +0 -79
- data/lib/arch/sysz_registers.rb +0 -66
- data/lib/arch/x86.rb +0 -107
- data/lib/arch/x86_registers.rb +0 -265
- data/lib/arch/xcore.rb +0 -78
- data/lib/arch/xcore_registers.rb +0 -57
- data/test/MC/AArch64/basic-a64-instructions.s.cs +0 -2014
- data/test/MC/AArch64/gicv3-regs.s.cs +0 -111
- data/test/MC/AArch64/neon-2velem.s.cs +0 -113
- data/test/MC/AArch64/neon-3vdiff.s.cs +0 -143
- data/test/MC/AArch64/neon-aba-abd.s.cs +0 -28
- data/test/MC/AArch64/neon-across.s.cs +0 -40
- data/test/MC/AArch64/neon-add-pairwise.s.cs +0 -11
- data/test/MC/AArch64/neon-add-sub-instructions.s.cs +0 -21
- data/test/MC/AArch64/neon-bitwise-instructions.s.cs +0 -17
- data/test/MC/AArch64/neon-compare-instructions.s.cs +0 -136
- data/test/MC/AArch64/neon-crypto.s.cs +0 -15
- data/test/MC/AArch64/neon-extract.s.cs +0 -3
- data/test/MC/AArch64/neon-facge-facgt.s.cs +0 -13
- data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +0 -7
- data/test/MC/AArch64/neon-halving-add-sub.s.cs +0 -25
- data/test/MC/AArch64/neon-max-min-pairwise.s.cs +0 -37
- data/test/MC/AArch64/neon-max-min.s.cs +0 -37
- data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +0 -19
- data/test/MC/AArch64/neon-mov.s.cs +0 -74
- data/test/MC/AArch64/neon-mul-div-instructions.s.cs +0 -24
- data/test/MC/AArch64/neon-perm.s.cs +0 -43
- data/test/MC/AArch64/neon-rounding-halving-add.s.cs +0 -13
- data/test/MC/AArch64/neon-rounding-shift.s.cs +0 -15
- data/test/MC/AArch64/neon-saturating-add-sub.s.cs +0 -29
- data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +0 -15
- data/test/MC/AArch64/neon-saturating-shift.s.cs +0 -15
- data/test/MC/AArch64/neon-scalar-abs.s.cs +0 -8
- data/test/MC/AArch64/neon-scalar-add-sub.s.cs +0 -3
- data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +0 -13
- data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +0 -13
- data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +0 -15
- data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +0 -18
- data/test/MC/AArch64/neon-scalar-compare.s.cs +0 -12
- data/test/MC/AArch64/neon-scalar-cvt.s.cs +0 -34
- data/test/MC/AArch64/neon-scalar-dup.s.cs +0 -23
- data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +0 -10
- data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +0 -21
- data/test/MC/AArch64/neon-scalar-mul.s.cs +0 -13
- data/test/MC/AArch64/neon-scalar-neg.s.cs +0 -6
- data/test/MC/AArch64/neon-scalar-recip.s.cs +0 -11
- data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +0 -3
- data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +0 -3
- data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +0 -25
- data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +0 -9
- data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +0 -9
- data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +0 -42
- data/test/MC/AArch64/neon-scalar-shift.s.cs +0 -3
- data/test/MC/AArch64/neon-shift-left-long.s.cs +0 -13
- data/test/MC/AArch64/neon-shift.s.cs +0 -22
- data/test/MC/AArch64/neon-simd-copy.s.cs +0 -42
- data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +0 -197
- data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +0 -129
- data/test/MC/AArch64/neon-simd-misc.s.cs +0 -213
- data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +0 -107
- data/test/MC/AArch64/neon-simd-shift.s.cs +0 -151
- data/test/MC/AArch64/neon-tbl.s.cs +0 -21
- data/test/MC/AArch64/trace-regs.s.cs +0 -383
- data/test/MC/ARM/arm-aliases.s.cs +0 -7
- data/test/MC/ARM/arm-arithmetic-aliases.s.cs +0 -50
- data/test/MC/ARM/arm-it-block.s.cs +0 -2
- data/test/MC/ARM/arm-memory-instructions.s.cs +0 -138
- data/test/MC/ARM/arm-shift-encoding.s.cs +0 -50
- data/test/MC/ARM/arm-thumb-trustzone.s.cs +0 -3
- data/test/MC/ARM/arm-trustzone.s.cs +0 -3
- data/test/MC/ARM/arm_addrmode2.s.cs +0 -15
- data/test/MC/ARM/arm_addrmode3.s.cs +0 -9
- data/test/MC/ARM/arm_instructions.s.cs +0 -25
- data/test/MC/ARM/basic-arm-instructions-v8.s.cs +0 -10
- data/test/MC/ARM/basic-arm-instructions.s.cs +0 -997
- data/test/MC/ARM/basic-thumb-instructions.s.cs +0 -130
- data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +0 -1
- data/test/MC/ARM/basic-thumb2-instructions.s.cs +0 -1242
- data/test/MC/ARM/crc32-thumb.s.cs +0 -7
- data/test/MC/ARM/crc32.s.cs +0 -7
- data/test/MC/ARM/dot-req.s.cs +0 -3
- data/test/MC/ARM/fp-armv8.s.cs +0 -52
- data/test/MC/ARM/idiv-thumb.s.cs +0 -3
- data/test/MC/ARM/idiv.s.cs +0 -3
- data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +0 -15
- data/test/MC/ARM/load-store-acquire-release-v8.s.cs +0 -15
- data/test/MC/ARM/mode-switch.s.cs +0 -7
- data/test/MC/ARM/neon-abs-encoding.s.cs +0 -15
- data/test/MC/ARM/neon-absdiff-encoding.s.cs +0 -39
- data/test/MC/ARM/neon-add-encoding.s.cs +0 -119
- data/test/MC/ARM/neon-bitcount-encoding.s.cs +0 -15
- data/test/MC/ARM/neon-bitwise-encoding.s.cs +0 -126
- data/test/MC/ARM/neon-cmp-encoding.s.cs +0 -88
- data/test/MC/ARM/neon-convert-encoding.s.cs +0 -27
- data/test/MC/ARM/neon-crypto.s.cs +0 -16
- data/test/MC/ARM/neon-dup-encoding.s.cs +0 -13
- data/test/MC/ARM/neon-minmax-encoding.s.cs +0 -57
- data/test/MC/ARM/neon-mov-encoding.s.cs +0 -76
- data/test/MC/ARM/neon-mul-accum-encoding.s.cs +0 -39
- data/test/MC/ARM/neon-mul-encoding.s.cs +0 -72
- data/test/MC/ARM/neon-neg-encoding.s.cs +0 -15
- data/test/MC/ARM/neon-pairwise-encoding.s.cs +0 -47
- data/test/MC/ARM/neon-reciprocal-encoding.s.cs +0 -13
- data/test/MC/ARM/neon-reverse-encoding.s.cs +0 -13
- data/test/MC/ARM/neon-satshift-encoding.s.cs +0 -75
- data/test/MC/ARM/neon-shift-encoding.s.cs +0 -238
- data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +0 -97
- data/test/MC/ARM/neon-shuffle-encoding.s.cs +0 -59
- data/test/MC/ARM/neon-sub-encoding.s.cs +0 -82
- data/test/MC/ARM/neon-table-encoding.s.cs +0 -9
- data/test/MC/ARM/neon-v8.s.cs +0 -38
- data/test/MC/ARM/neon-vld-encoding.s.cs +0 -213
- data/test/MC/ARM/neon-vst-encoding.s.cs +0 -120
- data/test/MC/ARM/neon-vswp.s.cs +0 -3
- data/test/MC/ARM/neont2-abs-encoding.s.cs +0 -15
- data/test/MC/ARM/neont2-absdiff-encoding.s.cs +0 -39
- data/test/MC/ARM/neont2-add-encoding.s.cs +0 -65
- data/test/MC/ARM/neont2-bitcount-encoding.s.cs +0 -15
- data/test/MC/ARM/neont2-bitwise-encoding.s.cs +0 -15
- data/test/MC/ARM/neont2-cmp-encoding.s.cs +0 -17
- data/test/MC/ARM/neont2-convert-encoding.s.cs +0 -19
- data/test/MC/ARM/neont2-dup-encoding.s.cs +0 -19
- data/test/MC/ARM/neont2-minmax-encoding.s.cs +0 -57
- data/test/MC/ARM/neont2-mov-encoding.s.cs +0 -58
- data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +0 -41
- data/test/MC/ARM/neont2-mul-encoding.s.cs +0 -31
- data/test/MC/ARM/neont2-neg-encoding.s.cs +0 -15
- data/test/MC/ARM/neont2-pairwise-encoding.s.cs +0 -43
- data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +0 -13
- data/test/MC/ARM/neont2-reverse-encoding.s.cs +0 -13
- data/test/MC/ARM/neont2-satshift-encoding.s.cs +0 -75
- data/test/MC/ARM/neont2-shift-encoding.s.cs +0 -80
- data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +0 -97
- data/test/MC/ARM/neont2-shuffle-encoding.s.cs +0 -23
- data/test/MC/ARM/neont2-sub-encoding.s.cs +0 -23
- data/test/MC/ARM/neont2-table-encoding.s.cs +0 -9
- data/test/MC/ARM/neont2-vld-encoding.s.cs +0 -51
- data/test/MC/ARM/neont2-vst-encoding.s.cs +0 -48
- data/test/MC/ARM/simple-fp-encoding.s.cs +0 -157
- data/test/MC/ARM/thumb-fp-armv8.s.cs +0 -51
- data/test/MC/ARM/thumb-hints.s.cs +0 -12
- data/test/MC/ARM/thumb-neon-crypto.s.cs +0 -16
- data/test/MC/ARM/thumb-neon-v8.s.cs +0 -38
- data/test/MC/ARM/thumb-shift-encoding.s.cs +0 -19
- data/test/MC/ARM/thumb.s.cs +0 -19
- data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +0 -2
- data/test/MC/ARM/thumb2-branches.s.cs +0 -85
- data/test/MC/ARM/thumb2-mclass.s.cs +0 -41
- data/test/MC/ARM/thumb2-narrow-dp.ll.cs +0 -379
- data/test/MC/ARM/thumb2-pldw.s.cs +0 -2
- data/test/MC/ARM/vfp4-thumb.s.cs +0 -13
- data/test/MC/ARM/vfp4.s.cs +0 -13
- data/test/MC/ARM/vpush-vpop-thumb.s.cs +0 -9
- data/test/MC/ARM/vpush-vpop.s.cs +0 -9
- data/test/MC/Mips/hilo-addressing.s.cs +0 -4
- data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +0 -33
- data/test/MC/Mips/micromips-alu-instructions.s.cs +0 -33
- data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +0 -11
- data/test/MC/Mips/micromips-branch-instructions.s.cs +0 -11
- data/test/MC/Mips/micromips-expansions.s.cs +0 -20
- data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +0 -5
- data/test/MC/Mips/micromips-jump-instructions.s.cs +0 -6
- data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +0 -9
- data/test/MC/Mips/micromips-loadstore-instructions.s.cs +0 -9
- data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +0 -5
- data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +0 -5
- data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +0 -5
- data/test/MC/Mips/micromips-movcond-instructions.s.cs +0 -5
- data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +0 -5
- data/test/MC/Mips/micromips-multiply-instructions.s.cs +0 -5
- data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +0 -9
- data/test/MC/Mips/micromips-shift-instructions.s.cs +0 -9
- data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +0 -13
- data/test/MC/Mips/micromips-trap-instructions.s.cs +0 -13
- data/test/MC/Mips/mips-alu-instructions.s.cs +0 -53
- data/test/MC/Mips/mips-control-instructions-64.s.cs +0 -33
- data/test/MC/Mips/mips-control-instructions.s.cs +0 -33
- data/test/MC/Mips/mips-coprocessor-encodings.s.cs +0 -17
- data/test/MC/Mips/mips-dsp-instructions.s.cs +0 -43
- data/test/MC/Mips/mips-expansions.s.cs +0 -20
- data/test/MC/Mips/mips-fpu-instructions.s.cs +0 -93
- data/test/MC/Mips/mips-jump-instructions.s.cs +0 -1
- data/test/MC/Mips/mips-memory-instructions.s.cs +0 -17
- data/test/MC/Mips/mips-register-names.s.cs +0 -33
- data/test/MC/Mips/mips64-alu-instructions.s.cs +0 -47
- data/test/MC/Mips/mips64-instructions.s.cs +0 -3
- data/test/MC/Mips/mips64-register-names.s.cs +0 -33
- data/test/MC/Mips/mips_directives.s.cs +0 -12
- data/test/MC/Mips/nabi-regs.s.cs +0 -12
- data/test/MC/Mips/set-at-directive.s.cs +0 -6
- data/test/MC/Mips/test_2r.s.cs +0 -16
- data/test/MC/Mips/test_2rf.s.cs +0 -33
- data/test/MC/Mips/test_3r.s.cs +0 -243
- data/test/MC/Mips/test_3rf.s.cs +0 -83
- data/test/MC/Mips/test_bit.s.cs +0 -49
- data/test/MC/Mips/test_cbranch.s.cs +0 -11
- data/test/MC/Mips/test_ctrlregs.s.cs +0 -33
- data/test/MC/Mips/test_elm.s.cs +0 -16
- data/test/MC/Mips/test_elm_insert.s.cs +0 -4
- data/test/MC/Mips/test_elm_insve.s.cs +0 -5
- data/test/MC/Mips/test_i10.s.cs +0 -5
- data/test/MC/Mips/test_i5.s.cs +0 -45
- data/test/MC/Mips/test_i8.s.cs +0 -11
- data/test/MC/Mips/test_lsa.s.cs +0 -5
- data/test/MC/Mips/test_mi10.s.cs +0 -24
- data/test/MC/Mips/test_vec.s.cs +0 -8
- data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +0 -25
- data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +0 -35
- data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +0 -535
- data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +0 -110
- data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +0 -170
- data/test/MC/PowerPC/ppc64-encoding.s.cs +0 -202
- data/test/MC/PowerPC/ppc64-operands.s.cs +0 -32
- data/test/MC/README +0 -6
- data/test/MC/Sparc/sparc-alu-instructions.s.cs +0 -47
- data/test/MC/Sparc/sparc-atomic-instructions.s.cs +0 -7
- data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +0 -11
- data/test/MC/Sparc/sparc-fp-instructions.s.cs +0 -59
- data/test/MC/Sparc/sparc-mem-instructions.s.cs +0 -25
- data/test/MC/Sparc/sparc-vis.s.cs +0 -2
- data/test/MC/Sparc/sparc64-alu-instructions.s.cs +0 -13
- data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +0 -102
- data/test/MC/Sparc/sparcv8-instructions.s.cs +0 -7
- data/test/MC/Sparc/sparcv9-instructions.s.cs +0 -1
- data/test/MC/SystemZ/insn-good-z196.s.cs +0 -589
- data/test/MC/SystemZ/insn-good.s.cs +0 -2265
- data/test/MC/SystemZ/regs-good.s.cs +0 -45
- data/test/MC/X86/3DNow.s.cs +0 -29
- data/test/MC/X86/address-size.s.cs +0 -5
- data/test/MC/X86/avx512-encodings.s.cs +0 -12
- data/test/MC/X86/intel-syntax-encoding.s.cs +0 -30
- data/test/MC/X86/x86-32-avx.s.cs +0 -833
- data/test/MC/X86/x86-32-fma3.s.cs +0 -169
- data/test/MC/X86/x86-32-ms-inline-asm.s.cs +0 -27
- data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +0 -11
- data/test/MC/X86/x86_64-avx-encoding.s.cs +0 -1058
- data/test/MC/X86/x86_64-bmi-encoding.s.cs +0 -51
- data/test/MC/X86/x86_64-encoding.s.cs +0 -59
- data/test/MC/X86/x86_64-fma3-encoding.s.cs +0 -169
- data/test/MC/X86/x86_64-fma4-encoding.s.cs +0 -98
- data/test/MC/X86/x86_64-hle-encoding.s.cs +0 -3
- data/test/MC/X86/x86_64-imm-widths.s.cs +0 -27
- data/test/MC/X86/x86_64-rand-encoding.s.cs +0 -13
- data/test/MC/X86/x86_64-rtm-encoding.s.cs +0 -4
- data/test/MC/X86/x86_64-sse4a.s.cs +0 -1
- data/test/MC/X86/x86_64-tbm-encoding.s.cs +0 -40
- data/test/MC/X86/x86_64-xop-encoding.s.cs +0 -152
- data/test/README +0 -6
- data/test/test.rb +0 -205
- data/test/test.rb.SPEC +0 -235
- data/test/test_arm.rb +0 -202
- data/test/test_arm.rb.SPEC +0 -275
- data/test/test_arm64.rb +0 -150
- data/test/test_arm64.rb.SPEC +0 -116
- data/test/test_detail.rb +0 -228
- data/test/test_detail.rb.SPEC +0 -322
- data/test/test_exhaustive.rb +0 -80
- data/test/test_mips.rb +0 -118
- data/test/test_mips.rb.SPEC +0 -91
- data/test/test_ppc.rb +0 -137
- data/test/test_ppc.rb.SPEC +0 -84
- data/test/test_sanity.rb +0 -83
- data/test/test_skipdata.rb +0 -111
- data/test/test_skipdata.rb.SPEC +0 -58
- data/test/test_sparc.rb +0 -113
- data/test/test_sparc.rb.SPEC +0 -116
- data/test/test_sysz.rb +0 -111
- data/test/test_sysz.rb.SPEC +0 -61
- data/test/test_x86.rb +0 -189
- data/test/test_x86.rb.SPEC +0 -579
- data/test/test_xcore.rb +0 -100
- data/test/test_xcore.rb.SPEC +0 -75
data/test/MC/Mips/test_3r.s.cs
DELETED
@@ -1,243 +0,0 @@
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|
1
|
-
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
-
0x78,0x04,0x4e,0x90 = add_a.b $w26, $w9, $w4
|
3
|
-
0x78,0x3f,0xdd,0xd0 = add_a.h $w23, $w27, $w31
|
4
|
-
0x78,0x56,0x32,0xd0 = add_a.w $w11, $w6, $w22
|
5
|
-
0x78,0x60,0x51,0x90 = add_a.d $w6, $w10, $w0
|
6
|
-
0x78,0x93,0xc4,0xd0 = adds_a.b $w19, $w24, $w19
|
7
|
-
0x78,0xa4,0x36,0x50 = adds_a.h $w25, $w6, $w4
|
8
|
-
0x78,0xdb,0x8e,0x50 = adds_a.w $w25, $w17, $w27
|
9
|
-
0x78,0xfa,0x93,0xd0 = adds_a.d $w15, $w18, $w26
|
10
|
-
0x79,0x13,0x5f,0x50 = adds_s.b $w29, $w11, $w19
|
11
|
-
0x79,0x3a,0xb9,0x50 = adds_s.h $w5, $w23, $w26
|
12
|
-
0x79,0x4d,0x74,0x10 = adds_s.w $w16, $w14, $w13
|
13
|
-
0x79,0x7c,0x70,0x90 = adds_s.d $w2, $w14, $w28
|
14
|
-
0x79,0x8e,0x88,0xd0 = adds_u.b $w3, $w17, $w14
|
15
|
-
0x79,0xa4,0xf2,0x90 = adds_u.h $w10, $w30, $w4
|
16
|
-
0x79,0xd4,0x93,0xd0 = adds_u.w $w15, $w18, $w20
|
17
|
-
0x79,0xe9,0x57,0x90 = adds_u.d $w30, $w10, $w9
|
18
|
-
0x78,0x15,0xa6,0x0e = addv.b $w24, $w20, $w21
|
19
|
-
0x78,0x3b,0x69,0x0e = addv.h $w4, $w13, $w27
|
20
|
-
0x78,0x4e,0x5c,0xce = addv.w $w19, $w11, $w14
|
21
|
-
0x78,0x7f,0xa8,0x8e = addv.d $w2, $w21, $w31
|
22
|
-
0x7a,0x03,0x85,0xd1 = asub_s.b $w23, $w16, $w3
|
23
|
-
0x7a,0x39,0x8d,0x91 = asub_s.h $w22, $w17, $w25
|
24
|
-
0x7a,0x49,0x0e,0x11 = asub_s.w $w24, $w1, $w9
|
25
|
-
0x7a,0x6c,0x63,0x51 = asub_s.d $w13, $w12, $w12
|
26
|
-
0x7a,0x8b,0xea,0x91 = asub_u.b $w10, $w29, $w11
|
27
|
-
0x7a,0xaf,0x4c,0x91 = asub_u.h $w18, $w9, $w15
|
28
|
-
0x7a,0xdf,0x9a,0x91 = asub_u.w $w10, $w19, $w31
|
29
|
-
0x7a,0xe0,0x54,0x51 = asub_u.d $w17, $w10, $w0
|
30
|
-
0x7a,0x01,0x28,0x90 = ave_s.b $w2, $w5, $w1
|
31
|
-
0x7a,0x29,0x9c,0x10 = ave_s.h $w16, $w19, $w9
|
32
|
-
0x7a,0x45,0xfc,0x50 = ave_s.w $w17, $w31, $w5
|
33
|
-
0x7a,0x6a,0xce,0xd0 = ave_s.d $w27, $w25, $w10
|
34
|
-
0x7a,0x89,0x9c,0x10 = ave_u.b $w16, $w19, $w9
|
35
|
-
0x7a,0xab,0xe7,0x10 = ave_u.h $w28, $w28, $w11
|
36
|
-
0x7a,0xcb,0x62,0xd0 = ave_u.w $w11, $w12, $w11
|
37
|
-
0x7a,0xfc,0x9f,0x90 = ave_u.d $w30, $w19, $w28
|
38
|
-
0x7b,0x02,0x86,0x90 = aver_s.b $w26, $w16, $w2
|
39
|
-
0x7b,0x3b,0xdf,0xd0 = aver_s.h $w31, $w27, $w27
|
40
|
-
0x7b,0x59,0x97,0x10 = aver_s.w $w28, $w18, $w25
|
41
|
-
0x7b,0x7b,0xaf,0x50 = aver_s.d $w29, $w21, $w27
|
42
|
-
0x7b,0x83,0xd7,0x50 = aver_u.b $w29, $w26, $w3
|
43
|
-
0x7b,0xa9,0x94,0x90 = aver_u.h $w18, $w18, $w9
|
44
|
-
0x7b,0xdd,0xcc,0x50 = aver_u.w $w17, $w25, $w29
|
45
|
-
0x7b,0xf3,0xb5,0x90 = aver_u.d $w22, $w22, $w19
|
46
|
-
0x79,0x9d,0x78,0x8d = bclr.b $w2, $w15, $w29
|
47
|
-
0x79,0xbc,0xac,0x0d = bclr.h $w16, $w21, $w28
|
48
|
-
0x79,0xc9,0x14,0xcd = bclr.w $w19, $w2, $w9
|
49
|
-
0x79,0xe4,0xfe,0xcd = bclr.d $w27, $w31, $w4
|
50
|
-
0x7b,0x18,0x81,0x4d = binsl.b $w5, $w16, $w24
|
51
|
-
0x7b,0x2a,0x2f,0x8d = binsl.h $w30, $w5, $w10
|
52
|
-
0x7b,0x4d,0x7b,0x8d = binsl.w $w14, $w15, $w13
|
53
|
-
0x7b,0x6c,0xa5,0xcd = binsl.d $w23, $w20, $w12
|
54
|
-
0x7b,0x82,0x5d,0x8d = binsr.b $w22, $w11, $w2
|
55
|
-
0x7b,0xa6,0xd0,0x0d = binsr.h $w0, $w26, $w6
|
56
|
-
0x7b,0xdc,0x1e,0x8d = binsr.w $w26, $w3, $w28
|
57
|
-
0x7b,0xf5,0x00,0x0d = binsr.d $w0, $w0, $w21
|
58
|
-
0x7a,0x98,0x58,0x0d = bneg.b $w0, $w11, $w24
|
59
|
-
0x7a,0xa4,0x87,0x0d = bneg.h $w28, $w16, $w4
|
60
|
-
0x7a,0xd3,0xd0,0xcd = bneg.w $w3, $w26, $w19
|
61
|
-
0x7a,0xef,0xeb,0x4d = bneg.d $w13, $w29, $w15
|
62
|
-
0x7a,0x1f,0x2f,0xcd = bset.b $w31, $w5, $w31
|
63
|
-
0x7a,0x26,0x63,0x8d = bset.h $w14, $w12, $w6
|
64
|
-
0x7a,0x4c,0x4f,0xcd = bset.w $w31, $w9, $w12
|
65
|
-
0x7a,0x65,0xb1,0x4d = bset.d $w5, $w22, $w5
|
66
|
-
0x78,0x12,0xff,0xcf = ceq.b $w31, $w31, $w18
|
67
|
-
0x78,0x29,0xda,0x8f = ceq.h $w10, $w27, $w9
|
68
|
-
0x78,0x4e,0x2a,0x4f = ceq.w $w9, $w5, $w14
|
69
|
-
0x78,0x60,0x89,0x4f = ceq.d $w5, $w17, $w0
|
70
|
-
0x7a,0x09,0x25,0xcf = cle_s.b $w23, $w4, $w9
|
71
|
-
0x7a,0x33,0xdd,0x8f = cle_s.h $w22, $w27, $w19
|
72
|
-
0x7a,0x4a,0xd7,0x8f = cle_s.w $w30, $w26, $w10
|
73
|
-
0x7a,0x6a,0x2c,0x8f = cle_s.d $w18, $w5, $w10
|
74
|
-
0x7a,0x80,0xc8,0x4f = cle_u.b $w1, $w25, $w0
|
75
|
-
0x7a,0xbd,0x01,0xcf = cle_u.h $w7, $w0, $w29
|
76
|
-
0x7a,0xc1,0x96,0x4f = cle_u.w $w25, $w18, $w1
|
77
|
-
0x7a,0xfe,0x01,0x8f = cle_u.d $w6, $w0, $w30
|
78
|
-
0x79,0x15,0x16,0x4f = clt_s.b $w25, $w2, $w21
|
79
|
-
0x79,0x29,0x98,0x8f = clt_s.h $w2, $w19, $w9
|
80
|
-
0x79,0x50,0x45,0xcf = clt_s.w $w23, $w8, $w16
|
81
|
-
0x79,0x6c,0xf1,0xcf = clt_s.d $w7, $w30, $w12
|
82
|
-
0x79,0x8d,0xf8,0x8f = clt_u.b $w2, $w31, $w13
|
83
|
-
0x79,0xb7,0xfc,0x0f = clt_u.h $w16, $w31, $w23
|
84
|
-
0x79,0xc9,0xc0,0xcf = clt_u.w $w3, $w24, $w9
|
85
|
-
0x79,0xe1,0x01,0xcf = clt_u.d $w7, $w0, $w1
|
86
|
-
0x7a,0x12,0x1f,0x52 = div_s.b $w29, $w3, $w18
|
87
|
-
0x7a,0x2d,0x84,0x52 = div_s.h $w17, $w16, $w13
|
88
|
-
0x7a,0x5e,0xc9,0x12 = div_s.w $w4, $w25, $w30
|
89
|
-
0x7a,0x74,0x4f,0xd2 = div_s.d $w31, $w9, $w20
|
90
|
-
0x7a,0x8a,0xe9,0x92 = div_u.b $w6, $w29, $w10
|
91
|
-
0x7a,0xae,0xae,0x12 = div_u.h $w24, $w21, $w14
|
92
|
-
0x7a,0xd9,0x77,0x52 = div_u.w $w29, $w14, $w25
|
93
|
-
0x7a,0xf5,0x0f,0xd2 = div_u.d $w31, $w1, $w21
|
94
|
-
0x78,0x39,0xb5,0xd3 = dotp_s.h $w23, $w22, $w25
|
95
|
-
0x78,0x45,0x75,0x13 = dotp_s.w $w20, $w14, $w5
|
96
|
-
0x78,0x76,0x14,0x53 = dotp_s.d $w17, $w2, $w22
|
97
|
-
0x78,0xa6,0x13,0x53 = dotp_u.h $w13, $w2, $w6
|
98
|
-
0x78,0xd5,0xb3,0xd3 = dotp_u.w $w15, $w22, $w21
|
99
|
-
0x78,0xfa,0x81,0x13 = dotp_u.d $w4, $w16, $w26
|
100
|
-
0x79,0x36,0xe0,0x53 = dpadd_s.h $w1, $w28, $w22
|
101
|
-
0x79,0x4c,0x0a,0x93 = dpadd_s.w $w10, $w1, $w12
|
102
|
-
0x79,0x7b,0xa8,0xd3 = dpadd_s.d $w3, $w21, $w27
|
103
|
-
0x79,0xb4,0x2c,0x53 = dpadd_u.h $w17, $w5, $w20
|
104
|
-
0x79,0xd0,0x46,0x13 = dpadd_u.w $w24, $w8, $w16
|
105
|
-
0x79,0xf0,0xeb,0xd3 = dpadd_u.d $w15, $w29, $w16
|
106
|
-
0x7a,0x2c,0x59,0x13 = dpsub_s.h $w4, $w11, $w12
|
107
|
-
0x7a,0x46,0x39,0x13 = dpsub_s.w $w4, $w7, $w6
|
108
|
-
0x7a,0x7c,0x67,0xd3 = dpsub_s.d $w31, $w12, $w28
|
109
|
-
0x7a,0xb1,0xc9,0x13 = dpsub_u.h $w4, $w25, $w17
|
110
|
-
0x7a,0xd0,0xcc,0xd3 = dpsub_u.w $w19, $w25, $w16
|
111
|
-
0x7a,0xfa,0x51,0xd3 = dpsub_u.d $w7, $w10, $w26
|
112
|
-
0x7a,0x22,0xc7,0x15 = hadd_s.h $w28, $w24, $w2
|
113
|
-
0x7a,0x4b,0x8e,0x15 = hadd_s.w $w24, $w17, $w11
|
114
|
-
0x7a,0x74,0x7c,0x55 = hadd_s.d $w17, $w15, $w20
|
115
|
-
0x7a,0xb1,0xeb,0x15 = hadd_u.h $w12, $w29, $w17
|
116
|
-
0x7a,0xc6,0x2a,0x55 = hadd_u.w $w9, $w5, $w6
|
117
|
-
0x7a,0xe6,0xa0,0x55 = hadd_u.d $w1, $w20, $w6
|
118
|
-
0x7b,0x3d,0x74,0x15 = hsub_s.h $w16, $w14, $w29
|
119
|
-
0x7b,0x4b,0x6a,0x55 = hsub_s.w $w9, $w13, $w11
|
120
|
-
0x7b,0x6e,0x97,0x95 = hsub_s.d $w30, $w18, $w14
|
121
|
-
0x7b,0xae,0x61,0xd5 = hsub_u.h $w7, $w12, $w14
|
122
|
-
0x7b,0xc5,0x2d,0x55 = hsub_u.w $w21, $w5, $w5
|
123
|
-
0x7b,0xff,0x62,0xd5 = hsub_u.d $w11, $w12, $w31
|
124
|
-
0x7b,0x1e,0x84,0x94 = ilvev.b $w18, $w16, $w30
|
125
|
-
0x7b,0x2d,0x03,0x94 = ilvev.h $w14, $w0, $w13
|
126
|
-
0x7b,0x56,0xcb,0x14 = ilvev.w $w12, $w25, $w22
|
127
|
-
0x7b,0x63,0xdf,0x94 = ilvev.d $w30, $w27, $w3
|
128
|
-
0x7a,0x15,0x1f,0x54 = ilvl.b $w29, $w3, $w21
|
129
|
-
0x7a,0x31,0x56,0xd4 = ilvl.h $w27, $w10, $w17
|
130
|
-
0x7a,0x40,0x09,0x94 = ilvl.w $w6, $w1, $w0
|
131
|
-
0x7a,0x78,0x80,0xd4 = ilvl.d $w3, $w16, $w24
|
132
|
-
0x7b,0x94,0x2a,0xd4 = ilvod.b $w11, $w5, $w20
|
133
|
-
0x7b,0xbf,0x6c,0x94 = ilvod.h $w18, $w13, $w31
|
134
|
-
0x7b,0xd8,0x87,0x54 = ilvod.w $w29, $w16, $w24
|
135
|
-
0x7b,0xfd,0x65,0x94 = ilvod.d $w22, $w12, $w29
|
136
|
-
0x7a,0x86,0xf1,0x14 = ilvr.b $w4, $w30, $w6
|
137
|
-
0x7a,0xbd,0x9f,0x14 = ilvr.h $w28, $w19, $w29
|
138
|
-
0x7a,0xd5,0xa4,0x94 = ilvr.w $w18, $w20, $w21
|
139
|
-
0x7a,0xec,0xf5,0xd4 = ilvr.d $w23, $w30, $w12
|
140
|
-
0x78,0x9d,0xfc,0x52 = maddv.b $w17, $w31, $w29
|
141
|
-
0x78,0xa9,0xc1,0xd2 = maddv.h $w7, $w24, $w9
|
142
|
-
0x78,0xd4,0xb5,0x92 = maddv.w $w22, $w22, $w20
|
143
|
-
0x78,0xf4,0xd7,0x92 = maddv.d $w30, $w26, $w20
|
144
|
-
0x7b,0x17,0x5d,0xce = max_a.b $w23, $w11, $w23
|
145
|
-
0x7b,0x3e,0x2d,0x0e = max_a.h $w20, $w5, $w30
|
146
|
-
0x7b,0x5e,0x91,0xce = max_a.w $w7, $w18, $w30
|
147
|
-
0x7b,0x7f,0x42,0x0e = max_a.d $w8, $w8, $w31
|
148
|
-
0x79,0x13,0x0a,0x8e = max_s.b $w10, $w1, $w19
|
149
|
-
0x79,0x31,0xeb,0xce = max_s.h $w15, $w29, $w17
|
150
|
-
0x79,0x4e,0xeb,0xce = max_s.w $w15, $w29, $w14
|
151
|
-
0x79,0x63,0xc6,0x4e = max_s.d $w25, $w24, $w3
|
152
|
-
0x79,0x85,0xc3,0x0e = max_u.b $w12, $w24, $w5
|
153
|
-
0x79,0xa7,0x31,0x4e = max_u.h $w5, $w6, $w7
|
154
|
-
0x79,0xc7,0x24,0x0e = max_u.w $w16, $w4, $w7
|
155
|
-
0x79,0xf8,0x66,0x8e = max_u.d $w26, $w12, $w24
|
156
|
-
0x7b,0x81,0xd1,0x0e = min_a.b $w4, $w26, $w1
|
157
|
-
0x7b,0xbf,0x6b,0x0e = min_a.h $w12, $w13, $w31
|
158
|
-
0x7b,0xc0,0xa7,0x0e = min_a.w $w28, $w20, $w0
|
159
|
-
0x7b,0xf3,0xa3,0x0e = min_a.d $w12, $w20, $w19
|
160
|
-
0x7a,0x0e,0x1c,0xce = min_s.b $w19, $w3, $w14
|
161
|
-
0x7a,0x28,0xae,0xce = min_s.h $w27, $w21, $w8
|
162
|
-
0x7a,0x5e,0x70,0x0e = min_s.w $w0, $w14, $w30
|
163
|
-
0x7a,0x75,0x41,0x8e = min_s.d $w6, $w8, $w21
|
164
|
-
0x7a,0x88,0xd5,0x8e = min_u.b $w22, $w26, $w8
|
165
|
-
0x7a,0xac,0xd9,0xce = min_u.h $w7, $w27, $w12
|
166
|
-
0x7a,0xce,0xa2,0x0e = min_u.w $w8, $w20, $w14
|
167
|
-
0x7a,0xef,0x76,0x8e = min_u.d $w26, $w14, $w15
|
168
|
-
0x7b,0x1a,0x0c,0x92 = mod_s.b $w18, $w1, $w26
|
169
|
-
0x7b,0x3c,0xf7,0xd2 = mod_s.h $w31, $w30, $w28
|
170
|
-
0x7b,0x4d,0x30,0x92 = mod_s.w $w2, $w6, $w13
|
171
|
-
0x7b,0x76,0xdd,0x52 = mod_s.d $w21, $w27, $w22
|
172
|
-
0x7b,0x8d,0x3c,0x12 = mod_u.b $w16, $w7, $w13
|
173
|
-
0x7b,0xa7,0x46,0x12 = mod_u.h $w24, $w8, $w7
|
174
|
-
0x7b,0xd1,0x17,0x92 = mod_u.w $w30, $w2, $w17
|
175
|
-
0x7b,0xf9,0x17,0xd2 = mod_u.d $w31, $w2, $w25
|
176
|
-
0x79,0x0c,0x2b,0x92 = msubv.b $w14, $w5, $w12
|
177
|
-
0x79,0x3e,0x39,0x92 = msubv.h $w6, $w7, $w30
|
178
|
-
0x79,0x55,0x13,0x52 = msubv.w $w13, $w2, $w21
|
179
|
-
0x79,0x7b,0x74,0x12 = msubv.d $w16, $w14, $w27
|
180
|
-
0x78,0x0d,0x1d,0x12 = mulv.b $w20, $w3, $w13
|
181
|
-
0x78,0x2e,0xd6,0xd2 = mulv.h $w27, $w26, $w14
|
182
|
-
0x78,0x43,0xea,0x92 = mulv.w $w10, $w29, $w3
|
183
|
-
0x78,0x7d,0x99,0xd2 = mulv.d $w7, $w19, $w29
|
184
|
-
0x79,0x07,0xd9,0x54 = pckev.b $w5, $w27, $w7
|
185
|
-
0x79,0x3b,0x20,0x54 = pckev.h $w1, $w4, $w27
|
186
|
-
0x79,0x40,0xa7,0x94 = pckev.w $w30, $w20, $w0
|
187
|
-
0x79,0x6f,0x09,0x94 = pckev.d $w6, $w1, $w15
|
188
|
-
0x79,0x9e,0xe4,0x94 = pckod.b $w18, $w28, $w30
|
189
|
-
0x79,0xa8,0x2e,0x94 = pckod.h $w26, $w5, $w8
|
190
|
-
0x79,0xc2,0x22,0x54 = pckod.w $w9, $w4, $w2
|
191
|
-
0x79,0xf4,0xb7,0x94 = pckod.d $w30, $w22, $w20
|
192
|
-
0x78,0x0c,0xb9,0x54 = sld.b $w5, $w23[$12]
|
193
|
-
0x78,0x23,0xb8,0x54 = sld.h $w1, $w23[$3]
|
194
|
-
0x78,0x49,0x45,0x14 = sld.w $w20, $w8[$9]
|
195
|
-
0x78,0x7e,0xb9,0xd4 = sld.d $w7, $w23[$fp]
|
196
|
-
0x78,0x11,0x00,0xcd = sll.b $w3, $w0, $w17
|
197
|
-
0x78,0x23,0xdc,0x4d = sll.h $w17, $w27, $w3
|
198
|
-
0x78,0x46,0x3c,0x0d = sll.w $w16, $w7, $w6
|
199
|
-
0x78,0x7a,0x02,0x4d = sll.d $w9, $w0, $w26
|
200
|
-
0x78,0x81,0x0f,0x14 = splat.b $w28, $w1[$1]
|
201
|
-
0x78,0xab,0x58,0x94 = splat.h $w2, $w11[$11]
|
202
|
-
0x78,0xcb,0x05,0x94 = splat.w $w22, $w0[$11]
|
203
|
-
0x78,0xe2,0x00,0x14 = splat.d $w0, $w0[$2]
|
204
|
-
0x78,0x91,0x27,0x0d = sra.b $w28, $w4, $w17
|
205
|
-
0x78,0xa3,0x4b,0x4d = sra.h $w13, $w9, $w3
|
206
|
-
0x78,0xd3,0xae,0xcd = sra.w $w27, $w21, $w19
|
207
|
-
0x78,0xf7,0x47,0x8d = sra.d $w30, $w8, $w23
|
208
|
-
0x78,0x92,0x94,0xd5 = srar.b $w19, $w18, $w18
|
209
|
-
0x78,0xa8,0xb9,0xd5 = srar.h $w7, $w23, $w8
|
210
|
-
0x78,0xc2,0x60,0x55 = srar.w $w1, $w12, $w2
|
211
|
-
0x78,0xee,0x3d,0x55 = srar.d $w21, $w7, $w14
|
212
|
-
0x79,0x13,0x1b,0x0d = srl.b $w12, $w3, $w19
|
213
|
-
0x79,0x34,0xfd,0xcd = srl.h $w23, $w31, $w20
|
214
|
-
0x79,0x4b,0xdc,0x8d = srl.w $w18, $w27, $w11
|
215
|
-
0x79,0x7a,0x60,0xcd = srl.d $w3, $w12, $w26
|
216
|
-
0x79,0x0b,0xab,0xd5 = srlr.b $w15, $w21, $w11
|
217
|
-
0x79,0x33,0x6d,0x55 = srlr.h $w21, $w13, $w19
|
218
|
-
0x79,0x43,0xf1,0x95 = srlr.w $w6, $w30, $w3
|
219
|
-
0x79,0x6e,0x10,0x55 = srlr.d $w1, $w2, $w14
|
220
|
-
0x78,0x01,0x7e,0x51 = subs_s.b $w25, $w15, $w1
|
221
|
-
0x78,0x36,0xcf,0x11 = subs_s.h $w28, $w25, $w22
|
222
|
-
0x78,0x55,0x62,0x91 = subs_s.w $w10, $w12, $w21
|
223
|
-
0x78,0x72,0xa1,0x11 = subs_s.d $w4, $w20, $w18
|
224
|
-
0x78,0x99,0x35,0x51 = subs_u.b $w21, $w6, $w25
|
225
|
-
0x78,0xa7,0x50,0xd1 = subs_u.h $w3, $w10, $w7
|
226
|
-
0x78,0xca,0x7a,0x51 = subs_u.w $w9, $w15, $w10
|
227
|
-
0x78,0xea,0x99,0xd1 = subs_u.d $w7, $w19, $w10
|
228
|
-
0x79,0x0c,0x39,0x91 = subsus_u.b $w6, $w7, $w12
|
229
|
-
0x79,0x33,0xe9,0x91 = subsus_u.h $w6, $w29, $w19
|
230
|
-
0x79,0x47,0x79,0xd1 = subsus_u.w $w7, $w15, $w7
|
231
|
-
0x79,0x6f,0x1a,0x51 = subsus_u.d $w9, $w3, $w15
|
232
|
-
0x79,0x9f,0x1d,0x91 = subsuu_s.b $w22, $w3, $w31
|
233
|
-
0x79,0xb6,0xbc,0xd1 = subsuu_s.h $w19, $w23, $w22
|
234
|
-
0x79,0xcd,0x52,0x51 = subsuu_s.w $w9, $w10, $w13
|
235
|
-
0x79,0xe0,0x31,0x51 = subsuu_s.d $w5, $w6, $w0
|
236
|
-
0x78,0x93,0x69,0x8e = subv.b $w6, $w13, $w19
|
237
|
-
0x78,0xac,0xc9,0x0e = subv.h $w4, $w25, $w12
|
238
|
-
0x78,0xcb,0xde,0xce = subv.w $w27, $w27, $w11
|
239
|
-
0x78,0xea,0xc2,0x4e = subv.d $w9, $w24, $w10
|
240
|
-
0x78,0x05,0x80,0xd5 = vshf.b $w3, $w16, $w5
|
241
|
-
0x78,0x28,0x9d,0x15 = vshf.h $w20, $w19, $w8
|
242
|
-
0x78,0x59,0xf4,0x15 = vshf.w $w16, $w30, $w25
|
243
|
-
0x78,0x6f,0x5c,0xd5 = vshf.d $w19, $w11, $w15
|
data/test/MC/Mips/test_3rf.s.cs
DELETED
@@ -1,83 +0,0 @@
|
|
1
|
-
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
-
0x78,0x1c,0x9f,0x1b = fadd.w $w28, $w19, $w28
|
3
|
-
0x78,0x3d,0x13,0x5b = fadd.d $w13, $w2, $w29
|
4
|
-
0x78,0x19,0x5b,0x9a = fcaf.w $w14, $w11, $w25
|
5
|
-
0x78,0x33,0x08,0x5a = fcaf.d $w1, $w1, $w19
|
6
|
-
0x78,0x90,0xb8,0x5a = fceq.w $w1, $w23, $w16
|
7
|
-
0x78,0xb0,0x40,0x1a = fceq.d $w0, $w8, $w16
|
8
|
-
0x79,0x98,0x4c,0x1a = fcle.w $w16, $w9, $w24
|
9
|
-
0x79,0xa1,0x76,0xda = fcle.d $w27, $w14, $w1
|
10
|
-
0x79,0x08,0x47,0x1a = fclt.w $w28, $w8, $w8
|
11
|
-
0x79,0x2b,0xcf,0x9a = fclt.d $w30, $w25, $w11
|
12
|
-
0x78,0xd7,0x90,0x9c = fcne.w $w2, $w18, $w23
|
13
|
-
0x78,0xef,0xa3,0x9c = fcne.d $w14, $w20, $w15
|
14
|
-
0x78,0x59,0x92,0x9c = fcor.w $w10, $w18, $w25
|
15
|
-
0x78,0x6b,0xcc,0x5c = fcor.d $w17, $w25, $w11
|
16
|
-
0x78,0xd5,0x13,0x9a = fcueq.w $w14, $w2, $w21
|
17
|
-
0x78,0xe7,0x1f,0x5a = fcueq.d $w29, $w3, $w7
|
18
|
-
0x79,0xc3,0x2c,0x5a = fcule.w $w17, $w5, $w3
|
19
|
-
0x79,0xfe,0x0f,0xda = fcule.d $w31, $w1, $w30
|
20
|
-
0x79,0x49,0xc9,0x9a = fcult.w $w6, $w25, $w9
|
21
|
-
0x79,0x71,0x46,0xda = fcult.d $w27, $w8, $w17
|
22
|
-
0x78,0x48,0xa1,0x1a = fcun.w $w4, $w20, $w8
|
23
|
-
0x78,0x63,0x5f,0x5a = fcun.d $w29, $w11, $w3
|
24
|
-
0x78,0x93,0x93,0x5c = fcune.w $w13, $w18, $w19
|
25
|
-
0x78,0xb5,0xd4,0x1c = fcune.d $w16, $w26, $w21
|
26
|
-
0x78,0xc2,0xc3,0x5b = fdiv.w $w13, $w24, $w2
|
27
|
-
0x78,0xf9,0x24,0xdb = fdiv.d $w19, $w4, $w25
|
28
|
-
0x7a,0x10,0x02,0x1b = fexdo.h $w8, $w0, $w16
|
29
|
-
0x7a,0x3b,0x68,0x1b = fexdo.w $w0, $w13, $w27
|
30
|
-
0x79,0xc3,0x04,0x5b = fexp2.w $w17, $w0, $w3
|
31
|
-
0x79,0xea,0x05,0x9b = fexp2.d $w22, $w0, $w10
|
32
|
-
0x79,0x17,0x37,0x5b = fmadd.w $w29, $w6, $w23
|
33
|
-
0x79,0x35,0xe2,0xdb = fmadd.d $w11, $w28, $w21
|
34
|
-
0x7b,0x8d,0xb8,0x1b = fmax.w $w0, $w23, $w13
|
35
|
-
0x7b,0xa8,0x96,0x9b = fmax.d $w26, $w18, $w8
|
36
|
-
0x7b,0xca,0x82,0x9b = fmax_a.w $w10, $w16, $w10
|
37
|
-
0x7b,0xf6,0x4f,0x9b = fmax_a.d $w30, $w9, $w22
|
38
|
-
0x7b,0x1e,0x0e,0x1b = fmin.w $w24, $w1, $w30
|
39
|
-
0x7b,0x2a,0xde,0xdb = fmin.d $w27, $w27, $w10
|
40
|
-
0x7b,0x54,0xea,0x9b = fmin_a.w $w10, $w29, $w20
|
41
|
-
0x7b,0x78,0xf3,0x5b = fmin_a.d $w13, $w30, $w24
|
42
|
-
0x79,0x40,0xcc,0x5b = fmsub.w $w17, $w25, $w0
|
43
|
-
0x79,0x70,0x92,0x1b = fmsub.d $w8, $w18, $w16
|
44
|
-
0x78,0x8f,0x78,0xdb = fmul.w $w3, $w15, $w15
|
45
|
-
0x78,0xaa,0xf2,0x5b = fmul.d $w9, $w30, $w10
|
46
|
-
0x7a,0x0a,0x2e,0x5a = fsaf.w $w25, $w5, $w10
|
47
|
-
0x7a,0x3d,0x1e,0x5a = fsaf.d $w25, $w3, $w29
|
48
|
-
0x7a,0x8d,0x8a,0xda = fseq.w $w11, $w17, $w13
|
49
|
-
0x7a,0xbf,0x07,0x5a = fseq.d $w29, $w0, $w31
|
50
|
-
0x7b,0x9f,0xff,0x9a = fsle.w $w30, $w31, $w31
|
51
|
-
0x7b,0xb8,0xbc,0x9a = fsle.d $w18, $w23, $w24
|
52
|
-
0x7b,0x06,0x2b,0x1a = fslt.w $w12, $w5, $w6
|
53
|
-
0x7b,0x35,0xd4,0x1a = fslt.d $w16, $w26, $w21
|
54
|
-
0x7a,0xcc,0x0f,0x9c = fsne.w $w30, $w1, $w12
|
55
|
-
0x7a,0xf7,0x6b,0x9c = fsne.d $w14, $w13, $w23
|
56
|
-
0x7a,0x5b,0x6e,0xdc = fsor.w $w27, $w13, $w27
|
57
|
-
0x7a,0x6b,0xc3,0x1c = fsor.d $w12, $w24, $w11
|
58
|
-
0x78,0x41,0xd7,0xdb = fsub.w $w31, $w26, $w1
|
59
|
-
0x78,0x7b,0x8c,0xdb = fsub.d $w19, $w17, $w27
|
60
|
-
0x7a,0xd9,0xc4,0x1a = fsueq.w $w16, $w24, $w25
|
61
|
-
0x7a,0xee,0x74,0x9a = fsueq.d $w18, $w14, $w14
|
62
|
-
0x7b,0xcd,0xf5,0xda = fsule.w $w23, $w30, $w13
|
63
|
-
0x7b,0xfa,0x58,0x9a = fsule.d $w2, $w11, $w26
|
64
|
-
0x7b,0x56,0xd2,0xda = fsult.w $w11, $w26, $w22
|
65
|
-
0x7b,0x7e,0xb9,0x9a = fsult.d $w6, $w23, $w30
|
66
|
-
0x7a,0x5c,0x90,0xda = fsun.w $w3, $w18, $w28
|
67
|
-
0x7a,0x73,0x5c,0x9a = fsun.d $w18, $w11, $w19
|
68
|
-
0x7a,0x82,0xfc,0x1c = fsune.w $w16, $w31, $w2
|
69
|
-
0x7a,0xb1,0xd0,0xdc = fsune.d $w3, $w26, $w17
|
70
|
-
0x7a,0x98,0x24,0x1b = ftq.h $w16, $w4, $w24
|
71
|
-
0x7a,0xb9,0x29,0x5b = ftq.w $w5, $w5, $w25
|
72
|
-
0x79,0x4a,0xa4,0x1c = madd_q.h $w16, $w20, $w10
|
73
|
-
0x79,0x69,0x17,0x1c = madd_q.w $w28, $w2, $w9
|
74
|
-
0x7b,0x49,0x92,0x1c = maddr_q.h $w8, $w18, $w9
|
75
|
-
0x7b,0x70,0x67,0x5c = maddr_q.w $w29, $w12, $w16
|
76
|
-
0x79,0x8a,0xd6,0x1c = msub_q.h $w24, $w26, $w10
|
77
|
-
0x79,0xbc,0xf3,0x5c = msub_q.w $w13, $w30, $w28
|
78
|
-
0x7b,0x8b,0xab,0x1c = msubr_q.h $w12, $w21, $w11
|
79
|
-
0x7b,0xb4,0x70,0x5c = msubr_q.w $w1, $w14, $w20
|
80
|
-
0x79,0x1e,0x81,0x9c = mul_q.h $w6, $w16, $w30
|
81
|
-
0x79,0x24,0x0c,0x1c = mul_q.w $w16, $w1, $w4
|
82
|
-
0x7b,0x13,0xa1,0x9c = mulr_q.h $w6, $w20, $w19
|
83
|
-
0x7b,0x34,0x0e,0xdc = mulr_q.w $w27, $w1, $w20
|
data/test/MC/Mips/test_bit.s.cs
DELETED
@@ -1,49 +0,0 @@
|
|
1
|
-
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
-
0x79,0xf2,0xf5,0x49 = bclri.b $w21, $w30, 2
|
3
|
-
0x79,0xe0,0xae,0x09 = bclri.h $w24, $w21, 0
|
4
|
-
0x79,0xc3,0xf5,0xc9 = bclri.w $w23, $w30, 3
|
5
|
-
0x79,0x80,0x5a,0x49 = bclri.d $w9, $w11, 0
|
6
|
-
0x7b,0x71,0x66,0x49 = binsli.b $w25, $w12, 1
|
7
|
-
0x7b,0x60,0xb5,0x49 = binsli.h $w21, $w22, 0
|
8
|
-
0x7b,0x40,0x25,0x89 = binsli.w $w22, $w4, 0
|
9
|
-
0x7b,0x06,0x11,0x89 = binsli.d $w6, $w2, 6
|
10
|
-
0x7b,0xf0,0x9b,0xc9 = binsri.b $w15, $w19, 0
|
11
|
-
0x7b,0xe1,0xf2,0x09 = binsri.h $w8, $w30, 1
|
12
|
-
0x7b,0xc5,0x98,0x89 = binsri.w $w2, $w19, 5
|
13
|
-
0x7b,0x81,0xa4,0x89 = binsri.d $w18, $w20, 1
|
14
|
-
0x7a,0xf0,0x9e,0x09 = bnegi.b $w24, $w19, 0
|
15
|
-
0x7a,0xe3,0x5f,0x09 = bnegi.h $w28, $w11, 3
|
16
|
-
0x7a,0xc5,0xd8,0x49 = bnegi.w $w1, $w27, 5
|
17
|
-
0x7a,0x81,0xa9,0x09 = bnegi.d $w4, $w21, 1
|
18
|
-
0x7a,0x70,0x44,0x89 = bseti.b $w18, $w8, 0
|
19
|
-
0x7a,0x62,0x76,0x09 = bseti.h $w24, $w14, 2
|
20
|
-
0x7a,0x44,0x92,0x49 = bseti.w $w9, $w18, 4
|
21
|
-
0x7a,0x01,0x79,0xc9 = bseti.d $w7, $w15, 1
|
22
|
-
0x78,0x72,0xff,0xca = sat_s.b $w31, $w31, 2
|
23
|
-
0x78,0x60,0x9c,0xca = sat_s.h $w19, $w19, 0
|
24
|
-
0x78,0x40,0xec,0xca = sat_s.w $w19, $w29, 0
|
25
|
-
0x78,0x00,0xb2,0xca = sat_s.d $w11, $w22, 0
|
26
|
-
0x78,0xf3,0x68,0x4a = sat_u.b $w1, $w13, 3
|
27
|
-
0x78,0xe4,0xc7,0x8a = sat_u.h $w30, $w24, 4
|
28
|
-
0x78,0xc0,0x6f,0xca = sat_u.w $w31, $w13, 0
|
29
|
-
0x78,0x85,0x87,0x4a = sat_u.d $w29, $w16, 5
|
30
|
-
0x78,0x71,0x55,0xc9 = slli.b $w23, $w10, 1
|
31
|
-
0x78,0x61,0x92,0x49 = slli.h $w9, $w18, 1
|
32
|
-
0x78,0x44,0xea,0xc9 = slli.w $w11, $w29, 4
|
33
|
-
0x78,0x01,0xa6,0x49 = slli.d $w25, $w20, 1
|
34
|
-
0x78,0xf1,0xee,0x09 = srai.b $w24, $w29, 1
|
35
|
-
0x78,0xe0,0x30,0x49 = srai.h $w1, $w6, 0
|
36
|
-
0x78,0xc1,0xd1,0xc9 = srai.w $w7, $w26, 1
|
37
|
-
0x78,0x83,0xcd,0x09 = srai.d $w20, $w25, 3
|
38
|
-
0x79,0x70,0xc9,0x4a = srari.b $w5, $w25, 0
|
39
|
-
0x79,0x64,0x31,0xca = srari.h $w7, $w6, 4
|
40
|
-
0x79,0x45,0x5c,0x4a = srari.w $w17, $w11, 5
|
41
|
-
0x79,0x05,0xcd,0x4a = srari.d $w21, $w25, 5
|
42
|
-
0x79,0x72,0x00,0x89 = srli.b $w2, $w0, 2
|
43
|
-
0x79,0x62,0xff,0xc9 = srli.h $w31, $w31, 2
|
44
|
-
0x79,0x44,0x49,0x49 = srli.w $w5, $w9, 4
|
45
|
-
0x79,0x05,0xd6,0xc9 = srli.d $w27, $w26, 5
|
46
|
-
0x79,0xf0,0x1c,0x8a = srlri.b $w18, $w3, 0
|
47
|
-
0x79,0xe3,0x10,0x4a = srlri.h $w1, $w2, 3
|
48
|
-
0x79,0xc2,0xb2,0xca = srlri.w $w11, $w22, 2
|
49
|
-
0x79,0x86,0x56,0x0a = srlri.d $w24, $w10, 6
|
@@ -1,11 +0,0 @@
|
|
1
|
-
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
-
0x47,0x80,0x00,0x01 = bnz.b $w0, 4
|
3
|
-
0x47,0xa1,0x00,0x04 = bnz.h $w1, 16
|
4
|
-
0x47,0xc2,0x00,0x20 = bnz.w $w2, 128
|
5
|
-
0x47,0xe3,0xff,0xe0 = bnz.d $w3, -128
|
6
|
-
0x45,0xe0,0x00,0x01 = bnz.v $w0, 4
|
7
|
-
0x47,0x00,0x00,0x20 = bz.b $w0, 128
|
8
|
-
0x47,0x21,0x00,0x40 = bz.h $w1, 256
|
9
|
-
0x47,0x42,0x00,0x80 = bz.w $w2, 512
|
10
|
-
0x47,0x63,0xff,0x00 = bz.d $w3, -1024
|
11
|
-
0x45,0x60,0x00,0x01 = bz.v $w0, 4
|
@@ -1,33 +0,0 @@
|
|
1
|
-
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
-
0x78,0x7e,0x00,0x59 = cfcmsa $1, $0
|
3
|
-
0x78,0x7e,0x00,0x59 = cfcmsa $1, $0
|
4
|
-
0x78,0x7e,0x08,0x99 = cfcmsa $2, $1
|
5
|
-
0x78,0x7e,0x08,0x99 = cfcmsa $2, $1
|
6
|
-
0x78,0x7e,0x10,0xd9 = cfcmsa $3, $2
|
7
|
-
0x78,0x7e,0x10,0xd9 = cfcmsa $3, $2
|
8
|
-
0x78,0x7e,0x19,0x19 = cfcmsa $4, $3
|
9
|
-
0x78,0x7e,0x19,0x19 = cfcmsa $4, $3
|
10
|
-
0x78,0x7e,0x21,0x59 = cfcmsa $5, $4
|
11
|
-
0x78,0x7e,0x21,0x59 = cfcmsa $5, $4
|
12
|
-
0x78,0x7e,0x29,0x99 = cfcmsa $6, $5
|
13
|
-
0x78,0x7e,0x29,0x99 = cfcmsa $6, $5
|
14
|
-
0x78,0x7e,0x31,0xd9 = cfcmsa $7, $6
|
15
|
-
0x78,0x7e,0x31,0xd9 = cfcmsa $7, $6
|
16
|
-
0x78,0x7e,0x3a,0x19 = cfcmsa $8, $7
|
17
|
-
0x78,0x7e,0x3a,0x19 = cfcmsa $8, $7
|
18
|
-
0x78,0x3e,0x08,0x19 = ctcmsa $0, $1
|
19
|
-
0x78,0x3e,0x08,0x19 = ctcmsa $0, $1
|
20
|
-
0x78,0x3e,0x10,0x59 = ctcmsa $1, $2
|
21
|
-
0x78,0x3e,0x10,0x59 = ctcmsa $1, $2
|
22
|
-
0x78,0x3e,0x18,0x99 = ctcmsa $2, $3
|
23
|
-
0x78,0x3e,0x18,0x99 = ctcmsa $2, $3
|
24
|
-
0x78,0x3e,0x20,0xd9 = ctcmsa $3, $4
|
25
|
-
0x78,0x3e,0x20,0xd9 = ctcmsa $3, $4
|
26
|
-
0x78,0x3e,0x29,0x19 = ctcmsa $4, $5
|
27
|
-
0x78,0x3e,0x29,0x19 = ctcmsa $4, $5
|
28
|
-
0x78,0x3e,0x31,0x59 = ctcmsa $5, $6
|
29
|
-
0x78,0x3e,0x31,0x59 = ctcmsa $5, $6
|
30
|
-
0x78,0x3e,0x39,0x99 = ctcmsa $6, $7
|
31
|
-
0x78,0x3e,0x39,0x99 = ctcmsa $6, $7
|
32
|
-
0x78,0x3e,0x41,0xd9 = ctcmsa $7, $8
|
33
|
-
0x78,0x3e,0x41,0xd9 = ctcmsa $7, $8
|
data/test/MC/Mips/test_elm.s.cs
DELETED
@@ -1,16 +0,0 @@
|
|
1
|
-
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
-
0x78,0x82,0x43,0x59 = copy_s.b $13, $w8[2]
|
3
|
-
0x78,0xa0,0xc8,0x59 = copy_s.h $1, $w25[0]
|
4
|
-
0x78,0xb1,0x2d,0x99 = copy_s.w $22, $w5[1]
|
5
|
-
0x78,0xc4,0xa5,0x99 = copy_u.b $22, $w20[4]
|
6
|
-
0x78,0xe0,0x25,0x19 = copy_u.h $20, $w4[0]
|
7
|
-
0x78,0xf2,0x6f,0x99 = copy_u.w $fp, $w13[2]
|
8
|
-
0x78,0x04,0xe8,0x19 = sldi.b $w0, $w29[4]
|
9
|
-
0x78,0x20,0x8a,0x19 = sldi.h $w8, $w17[0]
|
10
|
-
0x78,0x32,0xdd,0x19 = sldi.w $w20, $w27[2]
|
11
|
-
0x78,0x38,0x61,0x19 = sldi.d $w4, $w12[0]
|
12
|
-
0x78,0x42,0x1e,0x59 = splati.b $w25, $w3[2]
|
13
|
-
0x78,0x61,0xe6,0x19 = splati.h $w24, $w28[1]
|
14
|
-
0x78,0x70,0x93,0x59 = splati.w $w13, $w18[0]
|
15
|
-
0x78,0x78,0x0f,0x19 = splati.d $w28, $w1[0]
|
16
|
-
0x78,0xbe,0xc5,0xd9 = move.v $w23, $w24
|
data/test/MC/Mips/test_i10.s.cs
DELETED
data/test/MC/Mips/test_i5.s.cs
DELETED
@@ -1,45 +0,0 @@
|
|
1
|
-
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
-
0x78,0x1e,0xf8,0xc6 = addvi.b $w3, $w31, 30
|
3
|
-
0x78,0x3a,0x6e,0x06 = addvi.h $w24, $w13, 26
|
4
|
-
0x78,0x5a,0xa6,0x86 = addvi.w $w26, $w20, 26
|
5
|
-
0x78,0x75,0x0c,0x06 = addvi.d $w16, $w1, 21
|
6
|
-
0x78,0x18,0xae,0x07 = ceqi.b $w24, $w21, -8
|
7
|
-
0x78,0x22,0x7f,0xc7 = ceqi.h $w31, $w15, 2
|
8
|
-
0x78,0x5f,0x0b,0x07 = ceqi.w $w12, $w1, -1
|
9
|
-
0x78,0x67,0xb6,0x07 = ceqi.d $w24, $w22, 7
|
10
|
-
0x7a,0x01,0x83,0x07 = clei_s.b $w12, $w16, 1
|
11
|
-
0x7a,0x37,0x50,0x87 = clei_s.h $w2, $w10, -9
|
12
|
-
0x7a,0x56,0x59,0x07 = clei_s.w $w4, $w11, -10
|
13
|
-
0x7a,0x76,0xe8,0x07 = clei_s.d $w0, $w29, -10
|
14
|
-
0x7a,0x83,0x8d,0x47 = clei_u.b $w21, $w17, 3
|
15
|
-
0x7a,0xb1,0x3f,0x47 = clei_u.h $w29, $w7, 17
|
16
|
-
0x7a,0xc2,0x08,0x47 = clei_u.w $w1, $w1, 2
|
17
|
-
0x7a,0xfd,0xde,0xc7 = clei_u.d $w27, $w27, 29
|
18
|
-
0x79,0x19,0x6c,0xc7 = clti_s.b $w19, $w13, -7
|
19
|
-
0x79,0x34,0x53,0xc7 = clti_s.h $w15, $w10, -12
|
20
|
-
0x79,0x4b,0x63,0x07 = clti_s.w $w12, $w12, 11
|
21
|
-
0x79,0x71,0xa7,0x47 = clti_s.d $w29, $w20, -15
|
22
|
-
0x79,0x9d,0x4b,0x87 = clti_u.b $w14, $w9, 29
|
23
|
-
0x79,0xb9,0xce,0x07 = clti_u.h $w24, $w25, 25
|
24
|
-
0x79,0xd6,0x08,0x47 = clti_u.w $w1, $w1, 22
|
25
|
-
0x79,0xe1,0xcd,0x47 = clti_u.d $w21, $w25, 1
|
26
|
-
0x79,0x01,0xad,0x86 = maxi_s.b $w22, $w21, 1
|
27
|
-
0x79,0x38,0x2f,0x46 = maxi_s.h $w29, $w5, -8
|
28
|
-
0x79,0x54,0x50,0x46 = maxi_s.w $w1, $w10, -12
|
29
|
-
0x79,0x70,0xeb,0x46 = maxi_s.d $w13, $w29, -16
|
30
|
-
0x79,0x8c,0x05,0x06 = maxi_u.b $w20, $w0, 12
|
31
|
-
0x79,0xa3,0x70,0x46 = maxi_u.h $w1, $w14, 3
|
32
|
-
0x79,0xcb,0xb6,0xc6 = maxi_u.w $w27, $w22, 11
|
33
|
-
0x79,0xe4,0x36,0x86 = maxi_u.d $w26, $w6, 4
|
34
|
-
0x7a,0x01,0x09,0x06 = mini_s.b $w4, $w1, 1
|
35
|
-
0x7a,0x37,0xde,0xc6 = mini_s.h $w27, $w27, -9
|
36
|
-
0x7a,0x49,0x5f,0x06 = mini_s.w $w28, $w11, 9
|
37
|
-
0x7a,0x6a,0x52,0xc6 = mini_s.d $w11, $w10, 10
|
38
|
-
0x7a,0x9b,0xbc,0x86 = mini_u.b $w18, $w23, 27
|
39
|
-
0x7a,0xb2,0xd1,0xc6 = mini_u.h $w7, $w26, 18
|
40
|
-
0x7a,0xda,0x62,0xc6 = mini_u.w $w11, $w12, 26
|
41
|
-
0x7a,0xe2,0x7a,0xc6 = mini_u.d $w11, $w15, 2
|
42
|
-
0x78,0x93,0xa6,0x06 = subvi.b $w24, $w20, 19
|
43
|
-
0x78,0xa4,0x9a,0xc6 = subvi.h $w11, $w19, 4
|
44
|
-
0x78,0xcb,0x53,0x06 = subvi.w $w12, $w10, 11
|
45
|
-
0x78,0xe7,0x84,0xc6 = subvi.d $w19, $w16, 7
|
data/test/MC/Mips/test_i8.s.cs
DELETED
@@ -1,11 +0,0 @@
|
|
1
|
-
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
-
0x78,0x30,0xe8,0x80 = andi.b $w2, $w29, 48
|
3
|
-
0x78,0x7e,0xb1,0x81 = bmnzi.b $w6, $w22, 126
|
4
|
-
0x79,0x58,0x0e,0xc1 = bmzi.b $w27, $w1, 88
|
5
|
-
0x7a,0xbd,0x1f,0x41 = bseli.b $w29, $w3, 189
|
6
|
-
0x7a,0x38,0x88,0x40 = nori.b $w1, $w17, 56
|
7
|
-
0x79,0x87,0xa6,0x80 = ori.b $w26, $w20, 135
|
8
|
-
0x78,0x69,0xf4,0xc2 = shf.b $w19, $w30, 105
|
9
|
-
0x79,0x4c,0x44,0x42 = shf.h $w17, $w8, 76
|
10
|
-
0x7a,0x5d,0x1b,0x82 = shf.w $w14, $w3, 93
|
11
|
-
0x7b,0x14,0x54,0x00 = xori.b $w16, $w10, 20
|
data/test/MC/Mips/test_lsa.s.cs
DELETED
data/test/MC/Mips/test_mi10.s.cs
DELETED
@@ -1,24 +0,0 @@
|
|
1
|
-
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
-
0x7a,0x00,0x08,0x20 = ld.b $w0, -512($1)
|
3
|
-
0x78,0x00,0x10,0x60 = ld.b $w1, 0($2)
|
4
|
-
0x79,0xff,0x18,0xa0 = ld.b $w2, 511($3)
|
5
|
-
0x7a,0x00,0x20,0xe1 = ld.h $w3, -1024($4)
|
6
|
-
0x7b,0x00,0x29,0x21 = ld.h $w4, -512($5)
|
7
|
-
0x78,0x00,0x31,0x61 = ld.h $w5, 0($6)
|
8
|
-
0x79,0x00,0x39,0xa1 = ld.h $w6, 512($7)
|
9
|
-
0x79,0xff,0x41,0xe1 = ld.h $w7, 1022($8)
|
10
|
-
0x7a,0x00,0x4a,0x22 = ld.w $w8, -2048($9)
|
11
|
-
0x7b,0x00,0x52,0x62 = ld.w $w9, -1024($10)
|
12
|
-
0x7b,0x80,0x5a,0xa2 = ld.w $w10, -512($11)
|
13
|
-
0x78,0x80,0x62,0xe2 = ld.w $w11, 512($12)
|
14
|
-
0x79,0x00,0x6b,0x22 = ld.w $w12, 1024($13)
|
15
|
-
0x79,0xff,0x73,0x62 = ld.w $w13, 2044($14)
|
16
|
-
0x7a,0x00,0x7b,0xa3 = ld.d $w14, -4096($15)
|
17
|
-
0x7b,0x00,0x83,0xe3 = ld.d $w15, -2048($16)
|
18
|
-
0x7b,0x80,0x8c,0x23 = ld.d $w16, -1024($17)
|
19
|
-
0x7b,0xc0,0x94,0x63 = ld.d $w17, -512($18)
|
20
|
-
0x78,0x00,0x9c,0xa3 = ld.d $w18, 0($19)
|
21
|
-
0x78,0x40,0xa4,0xe3 = ld.d $w19, 512($20)
|
22
|
-
0x78,0x80,0xad,0x23 = ld.d $w20, 1024($21)
|
23
|
-
0x79,0x00,0xb5,0x63 = ld.d $w21, 2048($22)
|
24
|
-
0x79,0xff,0xbd,0xa3 = ld.d $w22, 4088($23)
|
data/test/MC/Mips/test_vec.s.cs
DELETED
@@ -1,8 +0,0 @@
|
|
1
|
-
# CS_ARCH_MIPS, CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN, None
|
2
|
-
0x78,0x1b,0xa6,0x5e = and.v $w25, $w20, $w27
|
3
|
-
0x78,0x87,0x34,0x5e = bmnz.v $w17, $w6, $w7
|
4
|
-
0x78,0xa9,0x88,0xde = bmz.v $w3, $w17, $w9
|
5
|
-
0x78,0xce,0x02,0x1e = bsel.v $w8, $w0, $w14
|
6
|
-
0x78,0x40,0xf9,0xde = nor.v $w7, $w31, $w0
|
7
|
-
0x78,0x3e,0xd6,0x1e = or.v $w24, $w26, $w30
|
8
|
-
0x78,0x6f,0xd9,0xde = xor.v $w7, $w27, $w15
|
@@ -1,25 +0,0 @@
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|
1
|
-
# CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CS_OPT_SYNTAX_NOREGNAME
|
2
|
-
0x7c,0x02,0x1f,0xac = icbi 2, 3
|
3
|
-
0x7c,0x02,0x1a,0x2c = dcbt 2, 3
|
4
|
-
0x7c,0x02,0x19,0xec = dcbtst 2, 3
|
5
|
-
0x7c,0x02,0x1f,0xec = dcbz 2, 3
|
6
|
-
0x7c,0x02,0x18,0x6c = dcbst 2, 3
|
7
|
-
0x4c,0x00,0x01,0x2c = isync
|
8
|
-
0x7c,0x43,0x21,0x2d = stwcx. 2, 3, 4
|
9
|
-
0x7c,0x43,0x21,0xad = stdcx. 2, 3, 4
|
10
|
-
0x7c,0x40,0x04,0xac = sync 2
|
11
|
-
0x7c,0x00,0x06,0xac = eieio
|
12
|
-
0x7c,0x40,0x00,0x7c = wait 2
|
13
|
-
0x7c,0x02,0x18,0xac = dcbf 2, 3
|
14
|
-
0x7c,0x43,0x20,0x28 = lwarx 2, 3, 4
|
15
|
-
0x7c,0x43,0x20,0xa8 = ldarx 2, 3, 4
|
16
|
-
0x7c,0x00,0x04,0xac = sync 0
|
17
|
-
0x7c,0x00,0x04,0xac = sync 0
|
18
|
-
0x7c,0x20,0x04,0xac = sync 1
|
19
|
-
0x7c,0x40,0x04,0xac = sync 2
|
20
|
-
0x7c,0x00,0x00,0x7c = wait 0
|
21
|
-
0x7c,0x20,0x00,0x7c = wait 1
|
22
|
-
0x7c,0x40,0x00,0x7c = wait 2
|
23
|
-
0x7c,0x5b,0x1a,0xe6 = mftb 2, 123
|
24
|
-
0x7c,0x4c,0x42,0xe6 = mftb 2, 268
|
25
|
-
0x7c,0x4d,0x42,0xe6 = mftb 2, 269
|
@@ -1,35 +0,0 @@
|
|
1
|
-
# CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, CS_OPT_SYNTAX_NOREGNAME
|
2
|
-
0x7c,0x80,0x01,0x24 = mtmsr 4, 0
|
3
|
-
0x7c,0x81,0x01,0x24 = mtmsr 4, 1
|
4
|
-
0x7c,0x80,0x00,0xa6 = mfmsr 4
|
5
|
-
0x7c,0x80,0x01,0x64 = mtmsrd 4, 0
|
6
|
-
0x7c,0x81,0x01,0x64 = mtmsrd 4, 1
|
7
|
-
0x7c,0x90,0x42,0xa6 = mfspr 4, 272
|
8
|
-
0x7c,0x91,0x42,0xa6 = mfspr 4, 273
|
9
|
-
0x7c,0x92,0x42,0xa6 = mfspr 4, 274
|
10
|
-
0x7c,0x93,0x42,0xa6 = mfspr 4, 275
|
11
|
-
0x7c,0x90,0x43,0xa6 = mtspr 272, 4
|
12
|
-
0x7c,0x91,0x43,0xa6 = mtspr 273, 4
|
13
|
-
0x7c,0x92,0x43,0xa6 = mtspr 274, 4
|
14
|
-
0x7c,0x93,0x43,0xa6 = mtspr 275, 4
|
15
|
-
0x7c,0x90,0x43,0xa6 = mtspr 272, 4
|
16
|
-
0x7c,0x91,0x43,0xa6 = mtspr 273, 4
|
17
|
-
0x7c,0x92,0x43,0xa6 = mtspr 274, 4
|
18
|
-
0x7c,0x93,0x43,0xa6 = mtspr 275, 4
|
19
|
-
0x7c,0x98,0x43,0xa6 = mtspr 280, 4
|
20
|
-
0x7c,0x96,0x02,0xa6 = mfspr 4, 22
|
21
|
-
0x7c,0x96,0x03,0xa6 = mtspr 22, 4
|
22
|
-
0x7c,0x9f,0x42,0xa6 = mfspr 4, 287
|
23
|
-
0x7c,0x99,0x02,0xa6 = mfspr 4, 25
|
24
|
-
0x7c,0x99,0x03,0xa6 = mtspr 25, 4
|
25
|
-
0x7c,0x9a,0x02,0xa6 = mfspr 4, 26
|
26
|
-
0x7c,0x9a,0x03,0xa6 = mtspr 26, 4
|
27
|
-
0x7c,0x9b,0x02,0xa6 = mfspr 4, 27
|
28
|
-
0x7c,0x9b,0x03,0xa6 = mtspr 27, 4
|
29
|
-
0x7c,0x00,0x23,0x64 = slbie 4
|
30
|
-
0x7c,0x80,0x2b,0x24 = slbmte 4, 5
|
31
|
-
0x7c,0x80,0x2f,0x26 = slbmfee 4, 5
|
32
|
-
0x7c,0x00,0x03,0xe4 = slbia
|
33
|
-
0x7c,0x00,0x04,0x6c = tlbsync
|
34
|
-
0x7c,0x00,0x22,0x24 = tlbiel 4
|
35
|
-
0x7c,0x00,0x22,0x64 = tlbie 4,0
|