crabstone 3.0.3 → 4.0.4

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (347) hide show
  1. checksums.yaml +5 -5
  2. data/CHANGES.md +59 -42
  3. data/README.md +37 -39
  4. data/lib/{arch → crabstone/arch/3}/arm.rb +28 -49
  5. data/lib/crabstone/arch/3/arm64.rb +124 -0
  6. data/lib/{arch → crabstone/arch/3}/arm64_const.rb +45 -86
  7. data/lib/{arch → crabstone/arch/3}/arm_const.rb +19 -47
  8. data/lib/crabstone/arch/3/mips.rb +57 -0
  9. data/lib/{arch → crabstone/arch/3}/mips_const.rb +18 -38
  10. data/lib/crabstone/arch/3/ppc.rb +73 -0
  11. data/lib/{arch → crabstone/arch/3}/ppc_const.rb +27 -43
  12. data/lib/crabstone/arch/3/sparc.rb +60 -0
  13. data/lib/{arch → crabstone/arch/3}/sparc_const.rb +49 -67
  14. data/lib/crabstone/arch/3/sysz.rb +67 -0
  15. data/lib/{arch → crabstone/arch/3}/sysz_const.rb +11 -25
  16. data/lib/crabstone/arch/3/x86.rb +82 -0
  17. data/lib/{arch → crabstone/arch/3}/x86_const.rb +15 -36
  18. data/lib/crabstone/arch/3/xcore.rb +59 -0
  19. data/lib/{arch → crabstone/arch/3}/xcore_const.rb +10 -22
  20. data/lib/crabstone/arch/4/arm.rb +110 -0
  21. data/lib/crabstone/arch/4/arm64.rb +125 -0
  22. data/lib/crabstone/arch/4/arm64_const.rb +1016 -0
  23. data/lib/crabstone/arch/4/arm_const.rb +785 -0
  24. data/lib/crabstone/arch/4/evm.rb +20 -0
  25. data/lib/crabstone/arch/4/evm_const.rb +161 -0
  26. data/lib/crabstone/arch/4/m680x.rb +106 -0
  27. data/lib/crabstone/arch/4/m680x_const.rb +426 -0
  28. data/lib/crabstone/arch/4/m68k.rb +129 -0
  29. data/lib/crabstone/arch/4/m68k_const.rb +496 -0
  30. data/lib/crabstone/arch/4/mips.rb +57 -0
  31. data/lib/crabstone/arch/4/mips_const.rb +869 -0
  32. data/lib/crabstone/arch/4/ppc.rb +73 -0
  33. data/lib/crabstone/arch/4/ppc_const.rb +1375 -0
  34. data/lib/crabstone/arch/4/sparc.rb +60 -0
  35. data/lib/crabstone/arch/4/sparc_const.rb +439 -0
  36. data/lib/crabstone/arch/4/sysz.rb +67 -0
  37. data/lib/crabstone/arch/4/sysz_const.rb +763 -0
  38. data/lib/crabstone/arch/4/tms320c64x.rb +87 -0
  39. data/lib/crabstone/arch/4/tms320c64x_const.rb +287 -0
  40. data/lib/crabstone/arch/4/x86.rb +91 -0
  41. data/lib/crabstone/arch/4/x86_const.rb +1972 -0
  42. data/lib/crabstone/arch/4/xcore.rb +59 -0
  43. data/lib/crabstone/arch/4/xcore_const.rb +171 -0
  44. data/lib/crabstone/arch/extension.rb +27 -0
  45. data/lib/crabstone/arch/register.rb +34 -0
  46. data/lib/crabstone/arch.rb +37 -0
  47. data/lib/crabstone/binding/3/detail.rb +36 -0
  48. data/lib/crabstone/binding/3/instruction.rb +23 -0
  49. data/lib/crabstone/binding/4/detail.rb +40 -0
  50. data/lib/crabstone/binding/4/instruction.rb +23 -0
  51. data/lib/crabstone/binding/structs.rb +32 -0
  52. data/lib/crabstone/binding.rb +59 -0
  53. data/lib/crabstone/constants.rb +110 -0
  54. data/lib/crabstone/cs_version.rb +57 -0
  55. data/lib/crabstone/disassembler.rb +147 -0
  56. data/lib/crabstone/error.rb +74 -0
  57. data/lib/crabstone/instruction.rb +178 -0
  58. data/lib/crabstone/version.rb +5 -0
  59. data/lib/crabstone.rb +5 -557
  60. metadata +142 -331
  61. data/MANIFEST +0 -312
  62. data/Rakefile +0 -27
  63. data/bin/genconst +0 -66
  64. data/bin/genreg +0 -99
  65. data/crabstone.gemspec +0 -27
  66. data/examples/hello_world.rb +0 -43
  67. data/lib/arch/arm64.rb +0 -167
  68. data/lib/arch/arm64_registers.rb +0 -295
  69. data/lib/arch/arm_registers.rb +0 -149
  70. data/lib/arch/mips.rb +0 -78
  71. data/lib/arch/mips_registers.rb +0 -208
  72. data/lib/arch/ppc.rb +0 -90
  73. data/lib/arch/ppc_registers.rb +0 -209
  74. data/lib/arch/sparc.rb +0 -79
  75. data/lib/arch/sparc_registers.rb +0 -121
  76. data/lib/arch/systemz.rb +0 -79
  77. data/lib/arch/sysz_registers.rb +0 -66
  78. data/lib/arch/x86.rb +0 -107
  79. data/lib/arch/x86_registers.rb +0 -265
  80. data/lib/arch/xcore.rb +0 -78
  81. data/lib/arch/xcore_registers.rb +0 -57
  82. data/test/MC/AArch64/basic-a64-instructions.s.cs +0 -2014
  83. data/test/MC/AArch64/gicv3-regs.s.cs +0 -111
  84. data/test/MC/AArch64/neon-2velem.s.cs +0 -113
  85. data/test/MC/AArch64/neon-3vdiff.s.cs +0 -143
  86. data/test/MC/AArch64/neon-aba-abd.s.cs +0 -28
  87. data/test/MC/AArch64/neon-across.s.cs +0 -40
  88. data/test/MC/AArch64/neon-add-pairwise.s.cs +0 -11
  89. data/test/MC/AArch64/neon-add-sub-instructions.s.cs +0 -21
  90. data/test/MC/AArch64/neon-bitwise-instructions.s.cs +0 -17
  91. data/test/MC/AArch64/neon-compare-instructions.s.cs +0 -136
  92. data/test/MC/AArch64/neon-crypto.s.cs +0 -15
  93. data/test/MC/AArch64/neon-extract.s.cs +0 -3
  94. data/test/MC/AArch64/neon-facge-facgt.s.cs +0 -13
  95. data/test/MC/AArch64/neon-frsqrt-frecp.s.cs +0 -7
  96. data/test/MC/AArch64/neon-halving-add-sub.s.cs +0 -25
  97. data/test/MC/AArch64/neon-max-min-pairwise.s.cs +0 -37
  98. data/test/MC/AArch64/neon-max-min.s.cs +0 -37
  99. data/test/MC/AArch64/neon-mla-mls-instructions.s.cs +0 -19
  100. data/test/MC/AArch64/neon-mov.s.cs +0 -74
  101. data/test/MC/AArch64/neon-mul-div-instructions.s.cs +0 -24
  102. data/test/MC/AArch64/neon-perm.s.cs +0 -43
  103. data/test/MC/AArch64/neon-rounding-halving-add.s.cs +0 -13
  104. data/test/MC/AArch64/neon-rounding-shift.s.cs +0 -15
  105. data/test/MC/AArch64/neon-saturating-add-sub.s.cs +0 -29
  106. data/test/MC/AArch64/neon-saturating-rounding-shift.s.cs +0 -15
  107. data/test/MC/AArch64/neon-saturating-shift.s.cs +0 -15
  108. data/test/MC/AArch64/neon-scalar-abs.s.cs +0 -8
  109. data/test/MC/AArch64/neon-scalar-add-sub.s.cs +0 -3
  110. data/test/MC/AArch64/neon-scalar-by-elem-mla.s.cs +0 -13
  111. data/test/MC/AArch64/neon-scalar-by-elem-mul.s.cs +0 -13
  112. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mla.s.cs +0 -15
  113. data/test/MC/AArch64/neon-scalar-by-elem-saturating-mul.s.cs +0 -18
  114. data/test/MC/AArch64/neon-scalar-compare.s.cs +0 -12
  115. data/test/MC/AArch64/neon-scalar-cvt.s.cs +0 -34
  116. data/test/MC/AArch64/neon-scalar-dup.s.cs +0 -23
  117. data/test/MC/AArch64/neon-scalar-extract-narrow.s.cs +0 -10
  118. data/test/MC/AArch64/neon-scalar-fp-compare.s.cs +0 -21
  119. data/test/MC/AArch64/neon-scalar-mul.s.cs +0 -13
  120. data/test/MC/AArch64/neon-scalar-neg.s.cs +0 -6
  121. data/test/MC/AArch64/neon-scalar-recip.s.cs +0 -11
  122. data/test/MC/AArch64/neon-scalar-reduce-pairwise.s.cs +0 -3
  123. data/test/MC/AArch64/neon-scalar-rounding-shift.s.cs +0 -3
  124. data/test/MC/AArch64/neon-scalar-saturating-add-sub.s.cs +0 -25
  125. data/test/MC/AArch64/neon-scalar-saturating-rounding-shift.s.cs +0 -9
  126. data/test/MC/AArch64/neon-scalar-saturating-shift.s.cs +0 -9
  127. data/test/MC/AArch64/neon-scalar-shift-imm.s.cs +0 -42
  128. data/test/MC/AArch64/neon-scalar-shift.s.cs +0 -3
  129. data/test/MC/AArch64/neon-shift-left-long.s.cs +0 -13
  130. data/test/MC/AArch64/neon-shift.s.cs +0 -22
  131. data/test/MC/AArch64/neon-simd-copy.s.cs +0 -42
  132. data/test/MC/AArch64/neon-simd-ldst-multi-elem.s.cs +0 -197
  133. data/test/MC/AArch64/neon-simd-ldst-one-elem.s.cs +0 -129
  134. data/test/MC/AArch64/neon-simd-misc.s.cs +0 -213
  135. data/test/MC/AArch64/neon-simd-post-ldst-multi-elem.s.cs +0 -107
  136. data/test/MC/AArch64/neon-simd-shift.s.cs +0 -151
  137. data/test/MC/AArch64/neon-tbl.s.cs +0 -21
  138. data/test/MC/AArch64/trace-regs.s.cs +0 -383
  139. data/test/MC/ARM/arm-aliases.s.cs +0 -7
  140. data/test/MC/ARM/arm-arithmetic-aliases.s.cs +0 -50
  141. data/test/MC/ARM/arm-it-block.s.cs +0 -2
  142. data/test/MC/ARM/arm-memory-instructions.s.cs +0 -138
  143. data/test/MC/ARM/arm-shift-encoding.s.cs +0 -50
  144. data/test/MC/ARM/arm-thumb-trustzone.s.cs +0 -3
  145. data/test/MC/ARM/arm-trustzone.s.cs +0 -3
  146. data/test/MC/ARM/arm_addrmode2.s.cs +0 -15
  147. data/test/MC/ARM/arm_addrmode3.s.cs +0 -9
  148. data/test/MC/ARM/arm_instructions.s.cs +0 -25
  149. data/test/MC/ARM/basic-arm-instructions-v8.s.cs +0 -10
  150. data/test/MC/ARM/basic-arm-instructions.s.cs +0 -997
  151. data/test/MC/ARM/basic-thumb-instructions.s.cs +0 -130
  152. data/test/MC/ARM/basic-thumb2-instructions-v8.s.cs +0 -1
  153. data/test/MC/ARM/basic-thumb2-instructions.s.cs +0 -1242
  154. data/test/MC/ARM/crc32-thumb.s.cs +0 -7
  155. data/test/MC/ARM/crc32.s.cs +0 -7
  156. data/test/MC/ARM/dot-req.s.cs +0 -3
  157. data/test/MC/ARM/fp-armv8.s.cs +0 -52
  158. data/test/MC/ARM/idiv-thumb.s.cs +0 -3
  159. data/test/MC/ARM/idiv.s.cs +0 -3
  160. data/test/MC/ARM/load-store-acquire-release-v8-thumb.s.cs +0 -15
  161. data/test/MC/ARM/load-store-acquire-release-v8.s.cs +0 -15
  162. data/test/MC/ARM/mode-switch.s.cs +0 -7
  163. data/test/MC/ARM/neon-abs-encoding.s.cs +0 -15
  164. data/test/MC/ARM/neon-absdiff-encoding.s.cs +0 -39
  165. data/test/MC/ARM/neon-add-encoding.s.cs +0 -119
  166. data/test/MC/ARM/neon-bitcount-encoding.s.cs +0 -15
  167. data/test/MC/ARM/neon-bitwise-encoding.s.cs +0 -126
  168. data/test/MC/ARM/neon-cmp-encoding.s.cs +0 -88
  169. data/test/MC/ARM/neon-convert-encoding.s.cs +0 -27
  170. data/test/MC/ARM/neon-crypto.s.cs +0 -16
  171. data/test/MC/ARM/neon-dup-encoding.s.cs +0 -13
  172. data/test/MC/ARM/neon-minmax-encoding.s.cs +0 -57
  173. data/test/MC/ARM/neon-mov-encoding.s.cs +0 -76
  174. data/test/MC/ARM/neon-mul-accum-encoding.s.cs +0 -39
  175. data/test/MC/ARM/neon-mul-encoding.s.cs +0 -72
  176. data/test/MC/ARM/neon-neg-encoding.s.cs +0 -15
  177. data/test/MC/ARM/neon-pairwise-encoding.s.cs +0 -47
  178. data/test/MC/ARM/neon-reciprocal-encoding.s.cs +0 -13
  179. data/test/MC/ARM/neon-reverse-encoding.s.cs +0 -13
  180. data/test/MC/ARM/neon-satshift-encoding.s.cs +0 -75
  181. data/test/MC/ARM/neon-shift-encoding.s.cs +0 -238
  182. data/test/MC/ARM/neon-shiftaccum-encoding.s.cs +0 -97
  183. data/test/MC/ARM/neon-shuffle-encoding.s.cs +0 -59
  184. data/test/MC/ARM/neon-sub-encoding.s.cs +0 -82
  185. data/test/MC/ARM/neon-table-encoding.s.cs +0 -9
  186. data/test/MC/ARM/neon-v8.s.cs +0 -38
  187. data/test/MC/ARM/neon-vld-encoding.s.cs +0 -213
  188. data/test/MC/ARM/neon-vst-encoding.s.cs +0 -120
  189. data/test/MC/ARM/neon-vswp.s.cs +0 -3
  190. data/test/MC/ARM/neont2-abs-encoding.s.cs +0 -15
  191. data/test/MC/ARM/neont2-absdiff-encoding.s.cs +0 -39
  192. data/test/MC/ARM/neont2-add-encoding.s.cs +0 -65
  193. data/test/MC/ARM/neont2-bitcount-encoding.s.cs +0 -15
  194. data/test/MC/ARM/neont2-bitwise-encoding.s.cs +0 -15
  195. data/test/MC/ARM/neont2-cmp-encoding.s.cs +0 -17
  196. data/test/MC/ARM/neont2-convert-encoding.s.cs +0 -19
  197. data/test/MC/ARM/neont2-dup-encoding.s.cs +0 -19
  198. data/test/MC/ARM/neont2-minmax-encoding.s.cs +0 -57
  199. data/test/MC/ARM/neont2-mov-encoding.s.cs +0 -58
  200. data/test/MC/ARM/neont2-mul-accum-encoding.s.cs +0 -41
  201. data/test/MC/ARM/neont2-mul-encoding.s.cs +0 -31
  202. data/test/MC/ARM/neont2-neg-encoding.s.cs +0 -15
  203. data/test/MC/ARM/neont2-pairwise-encoding.s.cs +0 -43
  204. data/test/MC/ARM/neont2-reciprocal-encoding.s.cs +0 -13
  205. data/test/MC/ARM/neont2-reverse-encoding.s.cs +0 -13
  206. data/test/MC/ARM/neont2-satshift-encoding.s.cs +0 -75
  207. data/test/MC/ARM/neont2-shift-encoding.s.cs +0 -80
  208. data/test/MC/ARM/neont2-shiftaccum-encoding.s.cs +0 -97
  209. data/test/MC/ARM/neont2-shuffle-encoding.s.cs +0 -23
  210. data/test/MC/ARM/neont2-sub-encoding.s.cs +0 -23
  211. data/test/MC/ARM/neont2-table-encoding.s.cs +0 -9
  212. data/test/MC/ARM/neont2-vld-encoding.s.cs +0 -51
  213. data/test/MC/ARM/neont2-vst-encoding.s.cs +0 -48
  214. data/test/MC/ARM/simple-fp-encoding.s.cs +0 -157
  215. data/test/MC/ARM/thumb-fp-armv8.s.cs +0 -51
  216. data/test/MC/ARM/thumb-hints.s.cs +0 -12
  217. data/test/MC/ARM/thumb-neon-crypto.s.cs +0 -16
  218. data/test/MC/ARM/thumb-neon-v8.s.cs +0 -38
  219. data/test/MC/ARM/thumb-shift-encoding.s.cs +0 -19
  220. data/test/MC/ARM/thumb.s.cs +0 -19
  221. data/test/MC/ARM/thumb2-b.w-encodingT4.s.cs +0 -2
  222. data/test/MC/ARM/thumb2-branches.s.cs +0 -85
  223. data/test/MC/ARM/thumb2-mclass.s.cs +0 -41
  224. data/test/MC/ARM/thumb2-narrow-dp.ll.cs +0 -379
  225. data/test/MC/ARM/thumb2-pldw.s.cs +0 -2
  226. data/test/MC/ARM/vfp4-thumb.s.cs +0 -13
  227. data/test/MC/ARM/vfp4.s.cs +0 -13
  228. data/test/MC/ARM/vpush-vpop-thumb.s.cs +0 -9
  229. data/test/MC/ARM/vpush-vpop.s.cs +0 -9
  230. data/test/MC/Mips/hilo-addressing.s.cs +0 -4
  231. data/test/MC/Mips/micromips-alu-instructions-EB.s.cs +0 -33
  232. data/test/MC/Mips/micromips-alu-instructions.s.cs +0 -33
  233. data/test/MC/Mips/micromips-branch-instructions-EB.s.cs +0 -11
  234. data/test/MC/Mips/micromips-branch-instructions.s.cs +0 -11
  235. data/test/MC/Mips/micromips-expansions.s.cs +0 -20
  236. data/test/MC/Mips/micromips-jump-instructions-EB.s.cs +0 -5
  237. data/test/MC/Mips/micromips-jump-instructions.s.cs +0 -6
  238. data/test/MC/Mips/micromips-loadstore-instructions-EB.s.cs +0 -9
  239. data/test/MC/Mips/micromips-loadstore-instructions.s.cs +0 -9
  240. data/test/MC/Mips/micromips-loadstore-unaligned-EB.s.cs +0 -5
  241. data/test/MC/Mips/micromips-loadstore-unaligned.s.cs +0 -5
  242. data/test/MC/Mips/micromips-movcond-instructions-EB.s.cs +0 -5
  243. data/test/MC/Mips/micromips-movcond-instructions.s.cs +0 -5
  244. data/test/MC/Mips/micromips-multiply-instructions-EB.s.cs +0 -5
  245. data/test/MC/Mips/micromips-multiply-instructions.s.cs +0 -5
  246. data/test/MC/Mips/micromips-shift-instructions-EB.s.cs +0 -9
  247. data/test/MC/Mips/micromips-shift-instructions.s.cs +0 -9
  248. data/test/MC/Mips/micromips-trap-instructions-EB.s.cs +0 -13
  249. data/test/MC/Mips/micromips-trap-instructions.s.cs +0 -13
  250. data/test/MC/Mips/mips-alu-instructions.s.cs +0 -53
  251. data/test/MC/Mips/mips-control-instructions-64.s.cs +0 -33
  252. data/test/MC/Mips/mips-control-instructions.s.cs +0 -33
  253. data/test/MC/Mips/mips-coprocessor-encodings.s.cs +0 -17
  254. data/test/MC/Mips/mips-dsp-instructions.s.cs +0 -43
  255. data/test/MC/Mips/mips-expansions.s.cs +0 -20
  256. data/test/MC/Mips/mips-fpu-instructions.s.cs +0 -93
  257. data/test/MC/Mips/mips-jump-instructions.s.cs +0 -1
  258. data/test/MC/Mips/mips-memory-instructions.s.cs +0 -17
  259. data/test/MC/Mips/mips-register-names.s.cs +0 -33
  260. data/test/MC/Mips/mips64-alu-instructions.s.cs +0 -47
  261. data/test/MC/Mips/mips64-instructions.s.cs +0 -3
  262. data/test/MC/Mips/mips64-register-names.s.cs +0 -33
  263. data/test/MC/Mips/mips_directives.s.cs +0 -12
  264. data/test/MC/Mips/nabi-regs.s.cs +0 -12
  265. data/test/MC/Mips/set-at-directive.s.cs +0 -6
  266. data/test/MC/Mips/test_2r.s.cs +0 -16
  267. data/test/MC/Mips/test_2rf.s.cs +0 -33
  268. data/test/MC/Mips/test_3r.s.cs +0 -243
  269. data/test/MC/Mips/test_3rf.s.cs +0 -83
  270. data/test/MC/Mips/test_bit.s.cs +0 -49
  271. data/test/MC/Mips/test_cbranch.s.cs +0 -11
  272. data/test/MC/Mips/test_ctrlregs.s.cs +0 -33
  273. data/test/MC/Mips/test_elm.s.cs +0 -16
  274. data/test/MC/Mips/test_elm_insert.s.cs +0 -4
  275. data/test/MC/Mips/test_elm_insve.s.cs +0 -5
  276. data/test/MC/Mips/test_i10.s.cs +0 -5
  277. data/test/MC/Mips/test_i5.s.cs +0 -45
  278. data/test/MC/Mips/test_i8.s.cs +0 -11
  279. data/test/MC/Mips/test_lsa.s.cs +0 -5
  280. data/test/MC/Mips/test_mi10.s.cs +0 -24
  281. data/test/MC/Mips/test_vec.s.cs +0 -8
  282. data/test/MC/PowerPC/ppc64-encoding-bookII.s.cs +0 -25
  283. data/test/MC/PowerPC/ppc64-encoding-bookIII.s.cs +0 -35
  284. data/test/MC/PowerPC/ppc64-encoding-ext.s.cs +0 -535
  285. data/test/MC/PowerPC/ppc64-encoding-fp.s.cs +0 -110
  286. data/test/MC/PowerPC/ppc64-encoding-vmx.s.cs +0 -170
  287. data/test/MC/PowerPC/ppc64-encoding.s.cs +0 -202
  288. data/test/MC/PowerPC/ppc64-operands.s.cs +0 -32
  289. data/test/MC/README +0 -6
  290. data/test/MC/Sparc/sparc-alu-instructions.s.cs +0 -47
  291. data/test/MC/Sparc/sparc-atomic-instructions.s.cs +0 -7
  292. data/test/MC/Sparc/sparc-ctrl-instructions.s.cs +0 -11
  293. data/test/MC/Sparc/sparc-fp-instructions.s.cs +0 -59
  294. data/test/MC/Sparc/sparc-mem-instructions.s.cs +0 -25
  295. data/test/MC/Sparc/sparc-vis.s.cs +0 -2
  296. data/test/MC/Sparc/sparc64-alu-instructions.s.cs +0 -13
  297. data/test/MC/Sparc/sparc64-ctrl-instructions.s.cs +0 -102
  298. data/test/MC/Sparc/sparcv8-instructions.s.cs +0 -7
  299. data/test/MC/Sparc/sparcv9-instructions.s.cs +0 -1
  300. data/test/MC/SystemZ/insn-good-z196.s.cs +0 -589
  301. data/test/MC/SystemZ/insn-good.s.cs +0 -2265
  302. data/test/MC/SystemZ/regs-good.s.cs +0 -45
  303. data/test/MC/X86/3DNow.s.cs +0 -29
  304. data/test/MC/X86/address-size.s.cs +0 -5
  305. data/test/MC/X86/avx512-encodings.s.cs +0 -12
  306. data/test/MC/X86/intel-syntax-encoding.s.cs +0 -30
  307. data/test/MC/X86/x86-32-avx.s.cs +0 -833
  308. data/test/MC/X86/x86-32-fma3.s.cs +0 -169
  309. data/test/MC/X86/x86-32-ms-inline-asm.s.cs +0 -27
  310. data/test/MC/X86/x86_64-avx-clmul-encoding.s.cs +0 -11
  311. data/test/MC/X86/x86_64-avx-encoding.s.cs +0 -1058
  312. data/test/MC/X86/x86_64-bmi-encoding.s.cs +0 -51
  313. data/test/MC/X86/x86_64-encoding.s.cs +0 -59
  314. data/test/MC/X86/x86_64-fma3-encoding.s.cs +0 -169
  315. data/test/MC/X86/x86_64-fma4-encoding.s.cs +0 -98
  316. data/test/MC/X86/x86_64-hle-encoding.s.cs +0 -3
  317. data/test/MC/X86/x86_64-imm-widths.s.cs +0 -27
  318. data/test/MC/X86/x86_64-rand-encoding.s.cs +0 -13
  319. data/test/MC/X86/x86_64-rtm-encoding.s.cs +0 -4
  320. data/test/MC/X86/x86_64-sse4a.s.cs +0 -1
  321. data/test/MC/X86/x86_64-tbm-encoding.s.cs +0 -40
  322. data/test/MC/X86/x86_64-xop-encoding.s.cs +0 -152
  323. data/test/README +0 -6
  324. data/test/test.rb +0 -205
  325. data/test/test.rb.SPEC +0 -235
  326. data/test/test_arm.rb +0 -202
  327. data/test/test_arm.rb.SPEC +0 -275
  328. data/test/test_arm64.rb +0 -150
  329. data/test/test_arm64.rb.SPEC +0 -116
  330. data/test/test_detail.rb +0 -228
  331. data/test/test_detail.rb.SPEC +0 -322
  332. data/test/test_exhaustive.rb +0 -80
  333. data/test/test_mips.rb +0 -118
  334. data/test/test_mips.rb.SPEC +0 -91
  335. data/test/test_ppc.rb +0 -137
  336. data/test/test_ppc.rb.SPEC +0 -84
  337. data/test/test_sanity.rb +0 -83
  338. data/test/test_skipdata.rb +0 -111
  339. data/test/test_skipdata.rb.SPEC +0 -58
  340. data/test/test_sparc.rb +0 -113
  341. data/test/test_sparc.rb.SPEC +0 -116
  342. data/test/test_sysz.rb +0 -111
  343. data/test/test_sysz.rb.SPEC +0 -61
  344. data/test/test_x86.rb +0 -189
  345. data/test/test_x86.rb.SPEC +0 -579
  346. data/test/test_xcore.rb +0 -100
  347. data/test/test_xcore.rb.SPEC +0 -75
data/lib/arch/systemz.rb DELETED
@@ -1,79 +0,0 @@
1
- # Library by Nguyen Anh Quynh
2
- # Original binding by Nguyen Anh Quynh and Tan Sheng Di
3
- # Additional binding work by Ben Nagy
4
- # (c) 2013 COSEINC. All Rights Reserved.
5
-
6
- require 'ffi'
7
-
8
- require_relative 'sysz_const'
9
-
10
- module Crabstone
11
- module SysZ
12
-
13
- class MemoryOperand < FFI::Struct
14
- layout(
15
- :base, :uint8,
16
- :index, :uint8,
17
- :length, :uint64,
18
- :disp, :int64
19
- )
20
- end
21
-
22
- class OperandValue < FFI::Union
23
- layout(
24
- :reg, :uint,
25
- :imm, :int64,
26
- :mem, MemoryOperand
27
- )
28
- end
29
-
30
- class Operand < FFI::Struct
31
- layout(
32
- :type, :uint,
33
- :value, OperandValue
34
- )
35
-
36
- def value
37
- case self[:type]
38
- when *[OP_REG, OP_ACREG]
39
- self[:value][:reg]
40
- when OP_IMM
41
- self[:value][:imm]
42
- when OP_MEM
43
- self[:value][:mem]
44
- else
45
- nil
46
- end
47
- end
48
-
49
- def reg?
50
- [OP_REG, OP_ACREG].include? self[:type]
51
- end
52
-
53
- def imm?
54
- self[:type] == OP_IMM
55
- end
56
-
57
- def mem?
58
- self[:type] == OP_MEM
59
- end
60
-
61
- def valid?
62
- [OP_MEM, OP_IMM, OP_REG, OP_ACREG].include? self[:type]
63
- end
64
- end
65
-
66
- class Instruction < FFI::Struct
67
- layout(
68
- :cc, :uint,
69
- :op_count, :uint8,
70
- :operands, [Operand, 6],
71
- )
72
-
73
- def operands
74
- self[:operands].take_while {|op| op[:type].nonzero?}
75
- end
76
-
77
- end
78
- end
79
- end
@@ -1,66 +0,0 @@
1
- # Library by Nguyen Anh Quynh
2
- # Original binding by Nguyen Anh Quynh and Tan Sheng Di
3
- # Additional binding work by Ben Nagy
4
- # (c) 2013 COSEINC. All Rights Reserved.
5
-
6
- # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
7
- # Command: ./genreg /Users/ben/src/capstone/bindings/python/capstone/
8
- # 2015-05-02T13:24:08+12:00
9
-
10
- module Crabstone
11
- module SysZ
12
- REG_LOOKUP = {
13
- 'INVALID' => 0,
14
- '0' => 1,
15
- '1' => 2,
16
- '2' => 3,
17
- '3' => 4,
18
- '4' => 5,
19
- '5' => 6,
20
- '6' => 7,
21
- '7' => 8,
22
- '8' => 9,
23
- '9' => 10,
24
- '10' => 11,
25
- '11' => 12,
26
- '12' => 13,
27
- '13' => 14,
28
- '14' => 15,
29
- '15' => 16,
30
- 'CC' => 17,
31
- 'F0' => 18,
32
- 'F1' => 19,
33
- 'F2' => 20,
34
- 'F3' => 21,
35
- 'F4' => 22,
36
- 'F5' => 23,
37
- 'F6' => 24,
38
- 'F7' => 25,
39
- 'F8' => 26,
40
- 'F9' => 27,
41
- 'F10' => 28,
42
- 'F11' => 29,
43
- 'F12' => 30,
44
- 'F13' => 31,
45
- 'F14' => 32,
46
- 'F15' => 33,
47
- 'R0L' => 34
48
- }
49
-
50
- ID_LOOKUP = REG_LOOKUP.invert
51
-
52
- # alias registers
53
-
54
- SYM_LOOKUP = Hash[REG_LOOKUP.map {|k,v| [k.downcase.to_sym,v]}]
55
-
56
- def self.register reg
57
- return reg if ID_LOOKUP[reg]
58
- return SYM_LOOKUP[reg] if SYM_LOOKUP[reg]
59
- if reg.respond_to? :upcase
60
- return REG_LOOKUP[reg.upcase] || REG_LOOKUP['INVALID']
61
- end
62
- REG_LOOKUP['INVALID']
63
- end
64
-
65
- end
66
- end
data/lib/arch/x86.rb DELETED
@@ -1,107 +0,0 @@
1
- # Library by Nguyen Anh Quynh
2
- # Original binding by Nguyen Anh Quynh and Tan Sheng Di
3
- # Additional binding work by Ben Nagy
4
- # (c) 2013 COSEINC. All Rights Reserved.
5
-
6
- require 'ffi'
7
-
8
- require_relative 'x86_const'
9
-
10
- module Crabstone
11
- module X86
12
-
13
- class MemoryOperand < FFI::Struct
14
- layout(
15
- :segment, :uint,
16
- :base, :uint,
17
- :index, :uint,
18
- :scale, :int,
19
- :disp, :int64
20
- )
21
- end
22
-
23
- class OperandValue < FFI::Union
24
- layout(
25
- :reg, :uint,
26
- :imm, :int64,
27
- :fp, :double,
28
- :mem, MemoryOperand
29
- )
30
- end
31
-
32
- class Operand < FFI::Struct
33
- layout(
34
- :type, :uint,
35
- :value, OperandValue,
36
- :size, :uint8,
37
- :avx_bcast, :uint,
38
- :avx_zero_opmask, :bool
39
- )
40
-
41
- # A spoonful of sugar...
42
-
43
- def value
44
- case self[:type]
45
- when OP_REG
46
- self[:value][:reg]
47
- when OP_IMM
48
- self[:value][:imm]
49
- when OP_MEM
50
- self[:value][:mem]
51
- when OP_FP
52
- self[:value][:fp]
53
- else
54
- nil
55
- end
56
- end
57
-
58
- def reg?
59
- self[:type] == OP_REG
60
- end
61
-
62
- def imm?
63
- self[:type] == OP_IMM
64
- end
65
-
66
- def mem?
67
- self[:type] == OP_MEM
68
- end
69
-
70
- def fp?
71
- self[:type] == OP_FP
72
- end
73
-
74
- def valid?
75
- [OP_MEM, OP_IMM, OP_FP, OP_REG].include? self[:type]
76
- end
77
-
78
- end
79
-
80
- class Instruction < FFI::Struct
81
-
82
- layout(
83
- :prefix, [:uint8, 4],
84
- :opcode, [:uint8, 4],
85
- :rex, :uint8,
86
- :addr_size, :uint8,
87
- :modrm, :uint8,
88
- :sib, :uint8,
89
- :disp, :int32,
90
- :sib_index, :uint,
91
- :sib_scale, :int8,
92
- :sib_base, :uint,
93
- :sse_cc, :uint,
94
- :avx_cc, :uint,
95
- :avx_sae, :bool,
96
- :avx_rm, :uint,
97
- :op_count, :uint8,
98
- :operands, [Operand, 8]
99
- )
100
-
101
- def operands
102
- self[:operands].first self[:op_count]
103
- end
104
-
105
- end
106
- end
107
- end
@@ -1,265 +0,0 @@
1
- # Library by Nguyen Anh Quynh
2
- # Original binding by Nguyen Anh Quynh and Tan Sheng Di
3
- # Additional binding work by Ben Nagy
4
- # (c) 2013 COSEINC. All Rights Reserved.
5
-
6
- # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
7
- # Command: ./genreg /Users/ben/src/capstone/bindings/python/capstone/
8
- # 2015-05-02T13:24:08+12:00
9
-
10
- module Crabstone
11
- module X86
12
- REG_LOOKUP = {
13
- 'INVALID' => 0,
14
- 'AH' => 1,
15
- 'AL' => 2,
16
- 'AX' => 3,
17
- 'BH' => 4,
18
- 'BL' => 5,
19
- 'BP' => 6,
20
- 'BPL' => 7,
21
- 'BX' => 8,
22
- 'CH' => 9,
23
- 'CL' => 10,
24
- 'CS' => 11,
25
- 'CX' => 12,
26
- 'DH' => 13,
27
- 'DI' => 14,
28
- 'DIL' => 15,
29
- 'DL' => 16,
30
- 'DS' => 17,
31
- 'DX' => 18,
32
- 'EAX' => 19,
33
- 'EBP' => 20,
34
- 'EBX' => 21,
35
- 'ECX' => 22,
36
- 'EDI' => 23,
37
- 'EDX' => 24,
38
- 'EFLAGS' => 25,
39
- 'EIP' => 26,
40
- 'EIZ' => 27,
41
- 'ES' => 28,
42
- 'ESI' => 29,
43
- 'ESP' => 30,
44
- 'FPSW' => 31,
45
- 'FS' => 32,
46
- 'GS' => 33,
47
- 'IP' => 34,
48
- 'RAX' => 35,
49
- 'RBP' => 36,
50
- 'RBX' => 37,
51
- 'RCX' => 38,
52
- 'RDI' => 39,
53
- 'RDX' => 40,
54
- 'RIP' => 41,
55
- 'RIZ' => 42,
56
- 'RSI' => 43,
57
- 'RSP' => 44,
58
- 'SI' => 45,
59
- 'SIL' => 46,
60
- 'SP' => 47,
61
- 'SPL' => 48,
62
- 'SS' => 49,
63
- 'CR0' => 50,
64
- 'CR1' => 51,
65
- 'CR2' => 52,
66
- 'CR3' => 53,
67
- 'CR4' => 54,
68
- 'CR5' => 55,
69
- 'CR6' => 56,
70
- 'CR7' => 57,
71
- 'CR8' => 58,
72
- 'CR9' => 59,
73
- 'CR10' => 60,
74
- 'CR11' => 61,
75
- 'CR12' => 62,
76
- 'CR13' => 63,
77
- 'CR14' => 64,
78
- 'CR15' => 65,
79
- 'DR0' => 66,
80
- 'DR1' => 67,
81
- 'DR2' => 68,
82
- 'DR3' => 69,
83
- 'DR4' => 70,
84
- 'DR5' => 71,
85
- 'DR6' => 72,
86
- 'DR7' => 73,
87
- 'FP0' => 74,
88
- 'FP1' => 75,
89
- 'FP2' => 76,
90
- 'FP3' => 77,
91
- 'FP4' => 78,
92
- 'FP5' => 79,
93
- 'FP6' => 80,
94
- 'FP7' => 81,
95
- 'K0' => 82,
96
- 'K1' => 83,
97
- 'K2' => 84,
98
- 'K3' => 85,
99
- 'K4' => 86,
100
- 'K5' => 87,
101
- 'K6' => 88,
102
- 'K7' => 89,
103
- 'MM0' => 90,
104
- 'MM1' => 91,
105
- 'MM2' => 92,
106
- 'MM3' => 93,
107
- 'MM4' => 94,
108
- 'MM5' => 95,
109
- 'MM6' => 96,
110
- 'MM7' => 97,
111
- 'R8' => 98,
112
- 'R9' => 99,
113
- 'R10' => 100,
114
- 'R11' => 101,
115
- 'R12' => 102,
116
- 'R13' => 103,
117
- 'R14' => 104,
118
- 'R15' => 105,
119
- 'ST0' => 106,
120
- 'ST1' => 107,
121
- 'ST2' => 108,
122
- 'ST3' => 109,
123
- 'ST4' => 110,
124
- 'ST5' => 111,
125
- 'ST6' => 112,
126
- 'ST7' => 113,
127
- 'XMM0' => 114,
128
- 'XMM1' => 115,
129
- 'XMM2' => 116,
130
- 'XMM3' => 117,
131
- 'XMM4' => 118,
132
- 'XMM5' => 119,
133
- 'XMM6' => 120,
134
- 'XMM7' => 121,
135
- 'XMM8' => 122,
136
- 'XMM9' => 123,
137
- 'XMM10' => 124,
138
- 'XMM11' => 125,
139
- 'XMM12' => 126,
140
- 'XMM13' => 127,
141
- 'XMM14' => 128,
142
- 'XMM15' => 129,
143
- 'XMM16' => 130,
144
- 'XMM17' => 131,
145
- 'XMM18' => 132,
146
- 'XMM19' => 133,
147
- 'XMM20' => 134,
148
- 'XMM21' => 135,
149
- 'XMM22' => 136,
150
- 'XMM23' => 137,
151
- 'XMM24' => 138,
152
- 'XMM25' => 139,
153
- 'XMM26' => 140,
154
- 'XMM27' => 141,
155
- 'XMM28' => 142,
156
- 'XMM29' => 143,
157
- 'XMM30' => 144,
158
- 'XMM31' => 145,
159
- 'YMM0' => 146,
160
- 'YMM1' => 147,
161
- 'YMM2' => 148,
162
- 'YMM3' => 149,
163
- 'YMM4' => 150,
164
- 'YMM5' => 151,
165
- 'YMM6' => 152,
166
- 'YMM7' => 153,
167
- 'YMM8' => 154,
168
- 'YMM9' => 155,
169
- 'YMM10' => 156,
170
- 'YMM11' => 157,
171
- 'YMM12' => 158,
172
- 'YMM13' => 159,
173
- 'YMM14' => 160,
174
- 'YMM15' => 161,
175
- 'YMM16' => 162,
176
- 'YMM17' => 163,
177
- 'YMM18' => 164,
178
- 'YMM19' => 165,
179
- 'YMM20' => 166,
180
- 'YMM21' => 167,
181
- 'YMM22' => 168,
182
- 'YMM23' => 169,
183
- 'YMM24' => 170,
184
- 'YMM25' => 171,
185
- 'YMM26' => 172,
186
- 'YMM27' => 173,
187
- 'YMM28' => 174,
188
- 'YMM29' => 175,
189
- 'YMM30' => 176,
190
- 'YMM31' => 177,
191
- 'ZMM0' => 178,
192
- 'ZMM1' => 179,
193
- 'ZMM2' => 180,
194
- 'ZMM3' => 181,
195
- 'ZMM4' => 182,
196
- 'ZMM5' => 183,
197
- 'ZMM6' => 184,
198
- 'ZMM7' => 185,
199
- 'ZMM8' => 186,
200
- 'ZMM9' => 187,
201
- 'ZMM10' => 188,
202
- 'ZMM11' => 189,
203
- 'ZMM12' => 190,
204
- 'ZMM13' => 191,
205
- 'ZMM14' => 192,
206
- 'ZMM15' => 193,
207
- 'ZMM16' => 194,
208
- 'ZMM17' => 195,
209
- 'ZMM18' => 196,
210
- 'ZMM19' => 197,
211
- 'ZMM20' => 198,
212
- 'ZMM21' => 199,
213
- 'ZMM22' => 200,
214
- 'ZMM23' => 201,
215
- 'ZMM24' => 202,
216
- 'ZMM25' => 203,
217
- 'ZMM26' => 204,
218
- 'ZMM27' => 205,
219
- 'ZMM28' => 206,
220
- 'ZMM29' => 207,
221
- 'ZMM30' => 208,
222
- 'ZMM31' => 209,
223
- 'R8B' => 210,
224
- 'R9B' => 211,
225
- 'R10B' => 212,
226
- 'R11B' => 213,
227
- 'R12B' => 214,
228
- 'R13B' => 215,
229
- 'R14B' => 216,
230
- 'R15B' => 217,
231
- 'R8D' => 218,
232
- 'R9D' => 219,
233
- 'R10D' => 220,
234
- 'R11D' => 221,
235
- 'R12D' => 222,
236
- 'R13D' => 223,
237
- 'R14D' => 224,
238
- 'R15D' => 225,
239
- 'R8W' => 226,
240
- 'R9W' => 227,
241
- 'R10W' => 228,
242
- 'R11W' => 229,
243
- 'R12W' => 230,
244
- 'R13W' => 231,
245
- 'R14W' => 232,
246
- 'R15W' => 233
247
- }
248
-
249
- ID_LOOKUP = REG_LOOKUP.invert
250
-
251
- # alias registers
252
-
253
- SYM_LOOKUP = Hash[REG_LOOKUP.map {|k,v| [k.downcase.to_sym,v]}]
254
-
255
- def self.register reg
256
- return reg if ID_LOOKUP[reg]
257
- return SYM_LOOKUP[reg] if SYM_LOOKUP[reg]
258
- if reg.respond_to? :upcase
259
- return REG_LOOKUP[reg.upcase] || REG_LOOKUP['INVALID']
260
- end
261
- REG_LOOKUP['INVALID']
262
- end
263
-
264
- end
265
- end
data/lib/arch/xcore.rb DELETED
@@ -1,78 +0,0 @@
1
- # Library by Nguyen Anh Quynh
2
- # Original binding by Nguyen Anh Quynh and Tan Sheng Di
3
- # Additional binding work by Ben Nagy
4
- # (c) 2013 COSEINC. All Rights Reserved.
5
-
6
- require 'ffi'
7
-
8
- require_relative 'xcore_const'
9
-
10
- module Crabstone
11
- module XCore
12
-
13
- class MemoryOperand < FFI::Struct
14
- layout(
15
- :base, :uint8,
16
- :index, :uint8,
17
- :disp, :int32,
18
- :direct, :int
19
- )
20
- end
21
-
22
- class OperandValue < FFI::Union
23
- layout(
24
- :reg, :uint,
25
- :imm, :int32,
26
- :mem, MemoryOperand
27
- )
28
- end
29
-
30
- class Operand < FFI::Struct
31
- layout(
32
- :type, :uint,
33
- :value, OperandValue
34
- )
35
-
36
- def value
37
- case self[:type]
38
- when OP_REG
39
- self[:value][:reg]
40
- when OP_IMM
41
- self[:value][:imm]
42
- when OP_MEM
43
- self[:value][:mem]
44
- else
45
- nil
46
- end
47
- end
48
-
49
- def reg?
50
- self[:type] == OP_REG
51
- end
52
-
53
- def imm?
54
- self[:type] == OP_IMM
55
- end
56
-
57
- def mem?
58
- self[:type] == OP_MEM
59
- end
60
-
61
- def valid?
62
- [OP_MEM, OP_IMM, OP_REG].include? self[:type]
63
- end
64
- end
65
-
66
- class Instruction < FFI::Struct
67
- layout(
68
- :op_count, :uint8,
69
- :operands, [Operand, 8],
70
- )
71
-
72
- def operands
73
- self[:operands].take_while {|op| op[:type].nonzero?}
74
- end
75
-
76
- end
77
- end
78
- end
@@ -1,57 +0,0 @@
1
- # Library by Nguyen Anh Quynh
2
- # Original binding by Nguyen Anh Quynh and Tan Sheng Di
3
- # Additional binding work by Ben Nagy
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- # (c) 2013 COSEINC. All Rights Reserved.
5
-
6
- # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
7
- # Command: ./genreg /Users/ben/src/capstone/bindings/python/capstone/
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- # 2015-05-02T13:24:08+12:00
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-
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- module Crabstone
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- module XCore
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- REG_LOOKUP = {
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- 'INVALID' => 0,
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- 'CP' => 1,
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- 'DP' => 2,
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- 'LR' => 3,
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- 'SP' => 4,
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- 'R0' => 5,
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- 'R1' => 6,
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- 'R2' => 7,
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- 'R3' => 8,
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- 'R4' => 9,
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- 'R5' => 10,
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- 'R6' => 11,
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- 'R7' => 12,
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- 'R8' => 13,
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- 'R9' => 14,
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- 'R10' => 15,
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- 'R11' => 16,
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- 'PC' => 17,
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- 'SCP' => 18,
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- 'SSR' => 19,
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- 'ET' => 20,
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- 'ED' => 21,
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- 'SED' => 22,
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- 'KEP' => 23,
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- 'KSP' => 24,
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- 'ID' => 25
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- }
40
-
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- ID_LOOKUP = REG_LOOKUP.invert
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-
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- # alias registers
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-
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- SYM_LOOKUP = Hash[REG_LOOKUP.map {|k,v| [k.downcase.to_sym,v]}]
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-
47
- def self.register reg
48
- return reg if ID_LOOKUP[reg]
49
- return SYM_LOOKUP[reg] if SYM_LOOKUP[reg]
50
- if reg.respond_to? :upcase
51
- return REG_LOOKUP[reg.upcase] || REG_LOOKUP['INVALID']
52
- end
53
- REG_LOOKUP['INVALID']
54
- end
55
-
56
- end
57
- end