crabstone 3.0.3 → 4.0.4

data/lib/crabstone/arch/3/xcore.rb

@@ -0,0 +1,59 @@
+# frozen_string_literal: true
+
+# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
+
+require 'ffi'
+
+require 'crabstone/arch/extension'
+require_relative 'xcore_const'
+
+module Crabstone
+  module XCore
+    class OperandMemory < FFI::Struct
+      layout(
+        :base, :uint8,
+        :index, :uint8,
+        :disp, :int,
+        :direct, :int
+      )
+    end
+
+    class OperandValue < FFI::Union
+      layout(
+        :reg, :uint,
+        :imm, :int,
+        :mem, OperandMemory
+      )
+    end
+
+    class Operand < FFI::Struct
+      layout(
+        :type, :uint,
+        :value, OperandValue
+      )
+
+      include Crabstone::Extension::Operand
+
+      def reg?
+        self[:type] == OP_REG
+      end
+
+      def imm?
+        self[:type] == OP_IMM
+      end
+
+      def mem?
+        self[:type] == OP_MEM
+      end
+    end
+
+    class Instruction < FFI::Struct
+      layout(
+        :op_count, :uint8,
+        :operands, [Operand, 8]
+      )
+
+      include Crabstone::Extension::Instruction
+    end
+  end
+end

data/lib/{arch → crabstone/arch/3}/xcore_const.rb

@@ -1,24 +1,16 @@
-# Library by Nguyen Anh Quynh
-# Original binding by Nguyen Anh Quynh and Tan Sheng Di
-# Additional binding work by Ben Nagy
-# (c) 2013 COSEINC. All Rights Reserved.
+# frozen_string_literal: true
 
 # THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
-# Command: ./genconst /Users/ben/src/capstone/bindings/python/capstone/
-# 2015-05-02T13:24:01+12:00
+
+require 'crabstone/arch/register'
 
 module Crabstone
   module XCore
-
-    # Operand type for instruction's operands
-    
     OP_INVALID = 0
     OP_REG = 1
     OP_IMM = 2
     OP_MEM = 3
-    
-    # XCore registers
-    
+
     REG_INVALID = 0
     REG_CP = 1
     REG_DP = 2
@@ -36,8 +28,7 @@ module Crabstone
     REG_R9 = 14
     REG_R10 = 15
     REG_R11 = 16
-    
-    # pseudo registers
+
     REG_PC = 17
     REG_SCP = 18
     REG_SSR = 19
@@ -48,9 +39,7 @@ module Crabstone
     REG_KSP = 24
     REG_ID = 25
     REG_ENDING = 26
-    
-    # XCore instruction
-    
+
     INS_INVALID = 0
     INS_ADD = 1
     INS_ANDNOT = 2
@@ -173,13 +162,12 @@ module Crabstone
     INS_XOR = 119
     INS_ZEXT = 120
     INS_ENDING = 121
-    
-    # Group of XCore instructions
-    
+
     GRP_INVALID = 0
-    
-    # Generic groups
+
     GRP_JUMP = 1
     GRP_ENDING = 2
+
+    extend Register
   end
 end

data/lib/crabstone/arch/4/arm.rb

@@ -0,0 +1,110 @@
+# frozen_string_literal: true
+
+# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
+
+require 'ffi'
+
+require 'crabstone/arch/extension'
+require_relative 'arm_const'
+
+module Crabstone
+  module ARM
+    class OperandShift < FFI::Struct
+      layout(
+        :type, :uint,
+        :value, :uint
+      )
+    end
+
+    class OperandMemory < FFI::Struct
+      layout(
+        :base, :uint,
+        :index, :uint,
+        :scale, :int,
+        :disp, :int,
+        :lshift, :int
+      )
+    end
+
+    class OperandValue < FFI::Union
+      layout(
+        :reg, :uint,
+        :imm, :int,
+        :fp, :double,
+        :mem, OperandMemory,
+        :setend, :int
+      )
+    end
+
+    class Operand < FFI::Struct
+      layout(
+        :vector_index, :int,
+        :shift, OperandShift,
+        :type, :uint,
+        :value, OperandValue,
+        :subtracted, :bool,
+        :access, :uint8,
+        :neon_lane, :int8
+      )
+
+      include Crabstone::Extension::Operand
+
+      def reg?
+        [
+          OP_REG,
+          OP_SYSREG
+        ].include?(self[:type])
+      end
+
+      def imm?
+        [
+          OP_IMM,
+          OP_CIMM,
+          OP_PIMM
+        ].include?(self[:type])
+      end
+
+      def mem?
+        self[:type] == OP_MEM
+      end
+
+      def fp?
+        self[:type] == OP_FP
+      end
+
+      def cimm?
+        self[:type] == OP_CIMM
+      end
+
+      def pimm?
+        self[:type] == OP_PIMM
+      end
+
+      def setend?
+        self[:type] == OP_SETEND
+      end
+
+      def sysreg?
+        self[:type] == OP_SYSREG
+      end
+    end
+
+    class Instruction < FFI::Struct
+      layout(
+        :usermode, :bool,
+        :vector_size, :int,
+        :vector_data, :int,
+        :cps_mode, :int,
+        :cps_flag, :int,
+        :cc, :uint,
+        :update_flags, :bool,
+        :writeback, :bool,
+        :mem_barrier, :int,
+        :op_count, :uint8,
+        :operands, [Operand, 36]
+      )
+
+      include Crabstone::Extension::Instruction
+    end
+  end
+end

data/lib/crabstone/arch/4/arm64.rb

@@ -0,0 +1,125 @@
+# frozen_string_literal: true
+
+# THIS FILE WAS AUTO-GENERATED -- DO NOT EDIT!
+
+require 'ffi'
+
+require 'crabstone/arch/extension'
+require_relative 'arm64_const'
+
+module Crabstone
+  module ARM64
+    class OperandShift < FFI::Struct
+      layout(
+        :type, :uint,
+        :value, :uint
+      )
+    end
+
+    class OperandMemory < FFI::Struct
+      layout(
+        :base, :uint,
+        :index, :uint,
+        :disp, :int
+      )
+    end
+
+    class OperandValue < FFI::Union
+      layout(
+        :reg, :uint,
+        :imm, :long,
+        :fp, :double,
+        :mem, OperandMemory,
+        :pstate, :int,
+        :sys, :uint,
+        :prefetch, :int,
+        :barrier, :int
+      )
+    end
+
+    class Operand < FFI::Struct
+      layout(
+        :vector_index, :int,
+        :vas, :int,
+        :vess, :int,
+        :shift, OperandShift,
+        :ext, :uint,
+        :type, :uint,
+        :value, OperandValue,
+        :access, :uint8
+      )
+      def shift?
+        self[:shift][:type] != SFT_INVALID
+      end
+
+      def ext?
+        self[:ext] != EXT_INVALID
+      end
+
+      include Crabstone::Extension::Operand
+
+      def reg?
+        [
+          OP_REG,
+          OP_REG_MRS,
+          OP_REG_MSR
+        ].include?(self[:type])
+      end
+
+      def imm?
+        [
+          OP_IMM,
+          OP_CIMM
+        ].include?(self[:type])
+      end
+
+      def mem?
+        self[:type] == OP_MEM
+      end
+
+      def fp?
+        self[:type] == OP_FP
+      end
+
+      def cimm?
+        self[:type] == OP_CIMM
+      end
+
+      def reg_mrs?
+        self[:type] == OP_REG_MRS
+      end
+
+      def reg_msr?
+        self[:type] == OP_REG_MSR
+      end
+
+      def pstate?
+        self[:type] == OP_PSTATE
+      end
+
+      def sys?
+        self[:type] == OP_SYS
+      end
+
+      def prefetch?
+        self[:type] == OP_PREFETCH
+      end
+
+      def barrier?
+        self[:type] == OP_BARRIER
+      end
+    end
+
+    class Instruction < FFI::Struct
+      layout(
+        :cc, :uint,
+        :update_flags, :bool,
+        :writeback, :bool,
+        :op_count, :uint8,
+        :operands, [Operand, 8]
+      )
+
+      include Crabstone::Extension::Instruction
+    end
+  end
+end