HDLRuby 2.0.8

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Files changed (224) hide show
  1. checksums.yaml +7 -0
  2. data/.gitignore +9 -0
  3. data/.travis.yml +5 -0
  4. data/.yardopts +1 -0
  5. data/Gemfile +4 -0
  6. data/HDLRuby.gemspec +36 -0
  7. data/LICENSE.txt +21 -0
  8. data/README.md +2774 -0
  9. data/README.pdf +0 -0
  10. data/Rakefile +10 -0
  11. data/bin/console +14 -0
  12. data/bin/setup +8 -0
  13. data/exe/hdrcc +3 -0
  14. data/lib/HDLRuby/alcc.rb +137 -0
  15. data/lib/HDLRuby/backend/hruby_allocator.rb +69 -0
  16. data/lib/HDLRuby/backend/hruby_c_allocator.rb +76 -0
  17. data/lib/HDLRuby/hdr_samples/adder.rb +7 -0
  18. data/lib/HDLRuby/hdr_samples/adder_assign_error.rb +11 -0
  19. data/lib/HDLRuby/hdr_samples/adder_bench.rb +27 -0
  20. data/lib/HDLRuby/hdr_samples/adder_gen.rb +7 -0
  21. data/lib/HDLRuby/hdr_samples/adder_nodef_error.rb +7 -0
  22. data/lib/HDLRuby/hdr_samples/addsub.rb +19 -0
  23. data/lib/HDLRuby/hdr_samples/addsubz.rb +22 -0
  24. data/lib/HDLRuby/hdr_samples/alu.rb +47 -0
  25. data/lib/HDLRuby/hdr_samples/calculator.rb +48 -0
  26. data/lib/HDLRuby/hdr_samples/counter_bench.rb +83 -0
  27. data/lib/HDLRuby/hdr_samples/dff.rb +9 -0
  28. data/lib/HDLRuby/hdr_samples/dff_bench.rb +66 -0
  29. data/lib/HDLRuby/hdr_samples/dff_counter.rb +20 -0
  30. data/lib/HDLRuby/hdr_samples/include.rb +14 -0
  31. data/lib/HDLRuby/hdr_samples/instance_open.rb +23 -0
  32. data/lib/HDLRuby/hdr_samples/mei8.rb +256 -0
  33. data/lib/HDLRuby/hdr_samples/mei8_bench.rb +309 -0
  34. data/lib/HDLRuby/hdr_samples/multer_gen.rb +8 -0
  35. data/lib/HDLRuby/hdr_samples/multer_seq.rb +29 -0
  36. data/lib/HDLRuby/hdr_samples/neural/a.rb +9 -0
  37. data/lib/HDLRuby/hdr_samples/neural/a_sub.rb +5 -0
  38. data/lib/HDLRuby/hdr_samples/neural/bw.rb +23 -0
  39. data/lib/HDLRuby/hdr_samples/neural/counter.rb +16 -0
  40. data/lib/HDLRuby/hdr_samples/neural/dadz.rb +9 -0
  41. data/lib/HDLRuby/hdr_samples/neural/dadz_sub.rb +4 -0
  42. data/lib/HDLRuby/hdr_samples/neural/forward.rb +153 -0
  43. data/lib/HDLRuby/hdr_samples/neural/forward_sub.rb +62 -0
  44. data/lib/HDLRuby/hdr_samples/neural/forward_sub_rand.rb +41 -0
  45. data/lib/HDLRuby/hdr_samples/neural/forward_sub_rand_typedef.rb +47 -0
  46. data/lib/HDLRuby/hdr_samples/neural/mem.rb +30 -0
  47. data/lib/HDLRuby/hdr_samples/neural/random.rb +23 -0
  48. data/lib/HDLRuby/hdr_samples/neural/selector.rb +29 -0
  49. data/lib/HDLRuby/hdr_samples/neural/sigmoid.rb +20 -0
  50. data/lib/HDLRuby/hdr_samples/neural/z.rb +33 -0
  51. data/lib/HDLRuby/hdr_samples/prog.obj +256 -0
  52. data/lib/HDLRuby/hdr_samples/ram.rb +18 -0
  53. data/lib/HDLRuby/hdr_samples/register_with_code_bench.rb +98 -0
  54. data/lib/HDLRuby/hdr_samples/rom.rb +10 -0
  55. data/lib/HDLRuby/hdr_samples/struct.rb +14 -0
  56. data/lib/HDLRuby/hdr_samples/sumprod.rb +29 -0
  57. data/lib/HDLRuby/hdr_samples/sw_encrypt_bench.rb +103 -0
  58. data/lib/HDLRuby/hdr_samples/sw_encrypt_cpu_bench.rb +261 -0
  59. data/lib/HDLRuby/hdr_samples/sw_encrypt_cpusim_bench.rb +302 -0
  60. data/lib/HDLRuby/hdr_samples/system_open.rb +11 -0
  61. data/lib/HDLRuby/hdr_samples/tuple.rb +16 -0
  62. data/lib/HDLRuby/hdr_samples/with_channel.rb +118 -0
  63. data/lib/HDLRuby/hdr_samples/with_class.rb +199 -0
  64. data/lib/HDLRuby/hdr_samples/with_decoder.rb +17 -0
  65. data/lib/HDLRuby/hdr_samples/with_fsm.rb +34 -0
  66. data/lib/HDLRuby/hdr_samples/with_reconf.rb +103 -0
  67. data/lib/HDLRuby/hdrcc.rb +623 -0
  68. data/lib/HDLRuby/high_samples/_adder_fault.rb +23 -0
  69. data/lib/HDLRuby/high_samples/_generic_transmission2.rb +146 -0
  70. data/lib/HDLRuby/high_samples/adder.rb +21 -0
  71. data/lib/HDLRuby/high_samples/adder_common_errors.rb +25 -0
  72. data/lib/HDLRuby/high_samples/addsub.rb +33 -0
  73. data/lib/HDLRuby/high_samples/addsubz.rb +37 -0
  74. data/lib/HDLRuby/high_samples/after.rb +28 -0
  75. data/lib/HDLRuby/high_samples/all_signals.rb +29 -0
  76. data/lib/HDLRuby/high_samples/alu.rb +61 -0
  77. data/lib/HDLRuby/high_samples/anonymous.rb +41 -0
  78. data/lib/HDLRuby/high_samples/before.rb +28 -0
  79. data/lib/HDLRuby/high_samples/blockblock.rb +26 -0
  80. data/lib/HDLRuby/high_samples/bugs/dadz.rb +22 -0
  81. data/lib/HDLRuby/high_samples/bugs/misample_instan.rb +20 -0
  82. data/lib/HDLRuby/high_samples/bugs/misample_updown.rb +22 -0
  83. data/lib/HDLRuby/high_samples/bugs/sample_add.rb +16 -0
  84. data/lib/HDLRuby/high_samples/bugs/sample_barrel.rb +13 -0
  85. data/lib/HDLRuby/high_samples/bugs/sample_daice.rb +57 -0
  86. data/lib/HDLRuby/high_samples/bugs/sample_kumiawase.rb +52 -0
  87. data/lib/HDLRuby/high_samples/bugs/sample_multi.rb +18 -0
  88. data/lib/HDLRuby/high_samples/bugs/sample_sub.rb +14 -0
  89. data/lib/HDLRuby/high_samples/bugs/z2.rb +32 -0
  90. data/lib/HDLRuby/high_samples/case.rb +32 -0
  91. data/lib/HDLRuby/high_samples/case2.rb +30 -0
  92. data/lib/HDLRuby/high_samples/change.rb +23 -0
  93. data/lib/HDLRuby/high_samples/clocks.rb +35 -0
  94. data/lib/HDLRuby/high_samples/comparer.rb +21 -0
  95. data/lib/HDLRuby/high_samples/conditionals.rb +29 -0
  96. data/lib/HDLRuby/high_samples/dff.rb +23 -0
  97. data/lib/HDLRuby/high_samples/each.rb +28 -0
  98. data/lib/HDLRuby/high_samples/exporter.rb +42 -0
  99. data/lib/HDLRuby/high_samples/functions.rb +60 -0
  100. data/lib/HDLRuby/high_samples/if_seq.rb +26 -0
  101. data/lib/HDLRuby/high_samples/inherit_as_dff.rb +32 -0
  102. data/lib/HDLRuby/high_samples/inherit_dff.rb +36 -0
  103. data/lib/HDLRuby/high_samples/instance.rb +37 -0
  104. data/lib/HDLRuby/high_samples/memory.rb +64 -0
  105. data/lib/HDLRuby/high_samples/multi_file.rb +27 -0
  106. data/lib/HDLRuby/high_samples/overload.rb +32 -0
  107. data/lib/HDLRuby/high_samples/paper_after.rb +49 -0
  108. data/lib/HDLRuby/high_samples/ram.rb +27 -0
  109. data/lib/HDLRuby/high_samples/registers.rb +139 -0
  110. data/lib/HDLRuby/high_samples/rom.rb +23 -0
  111. data/lib/HDLRuby/high_samples/scopeblockname.rb +37 -0
  112. data/lib/HDLRuby/high_samples/scopescope.rb +26 -0
  113. data/lib/HDLRuby/high_samples/shift.rb +31 -0
  114. data/lib/HDLRuby/high_samples/shift2.rb +40 -0
  115. data/lib/HDLRuby/high_samples/simple_instance.rb +31 -0
  116. data/lib/HDLRuby/high_samples/test_all.sh +10 -0
  117. data/lib/HDLRuby/high_samples/typedef.rb +24 -0
  118. data/lib/HDLRuby/high_samples/values.rb +70 -0
  119. data/lib/HDLRuby/high_samples/vector.rb +22 -0
  120. data/lib/HDLRuby/high_samples/with_decoder.rb +30 -0
  121. data/lib/HDLRuby/high_samples/with_fsm.rb +46 -0
  122. data/lib/HDLRuby/high_samples/with_pipe.rb +43 -0
  123. data/lib/HDLRuby/high_samples/with_seq.rb +25 -0
  124. data/lib/HDLRuby/hruby_bstr.rb +1085 -0
  125. data/lib/HDLRuby/hruby_check.rb +317 -0
  126. data/lib/HDLRuby/hruby_db.rb +432 -0
  127. data/lib/HDLRuby/hruby_error.rb +44 -0
  128. data/lib/HDLRuby/hruby_high.rb +4103 -0
  129. data/lib/HDLRuby/hruby_low.rb +4735 -0
  130. data/lib/HDLRuby/hruby_low2c.rb +1986 -0
  131. data/lib/HDLRuby/hruby_low2high.rb +738 -0
  132. data/lib/HDLRuby/hruby_low2seq.rb +248 -0
  133. data/lib/HDLRuby/hruby_low2sym.rb +126 -0
  134. data/lib/HDLRuby/hruby_low2vhd.rb +1437 -0
  135. data/lib/HDLRuby/hruby_low_bool2select.rb +295 -0
  136. data/lib/HDLRuby/hruby_low_cleanup.rb +193 -0
  137. data/lib/HDLRuby/hruby_low_fix_types.rb +437 -0
  138. data/lib/HDLRuby/hruby_low_mutable.rb +1803 -0
  139. data/lib/HDLRuby/hruby_low_resolve.rb +165 -0
  140. data/lib/HDLRuby/hruby_low_skeleton.rb +129 -0
  141. data/lib/HDLRuby/hruby_low_with_bool.rb +141 -0
  142. data/lib/HDLRuby/hruby_low_with_port.rb +167 -0
  143. data/lib/HDLRuby/hruby_low_with_var.rb +302 -0
  144. data/lib/HDLRuby/hruby_low_without_bit2vector.rb +88 -0
  145. data/lib/HDLRuby/hruby_low_without_concat.rb +162 -0
  146. data/lib/HDLRuby/hruby_low_without_connection.rb +113 -0
  147. data/lib/HDLRuby/hruby_low_without_namespace.rb +718 -0
  148. data/lib/HDLRuby/hruby_low_without_outread.rb +107 -0
  149. data/lib/HDLRuby/hruby_low_without_select.rb +206 -0
  150. data/lib/HDLRuby/hruby_serializer.rb +398 -0
  151. data/lib/HDLRuby/hruby_tools.rb +37 -0
  152. data/lib/HDLRuby/hruby_types.rb +239 -0
  153. data/lib/HDLRuby/hruby_values.rb +64 -0
  154. data/lib/HDLRuby/hruby_verilog.rb +1888 -0
  155. data/lib/HDLRuby/hruby_verilog_name.rb +52 -0
  156. data/lib/HDLRuby/low_samples/adder.yaml +97 -0
  157. data/lib/HDLRuby/low_samples/after.yaml +228 -0
  158. data/lib/HDLRuby/low_samples/before.yaml +223 -0
  159. data/lib/HDLRuby/low_samples/blockblock.yaml +48 -0
  160. data/lib/HDLRuby/low_samples/bugs/sample_add.yaml +97 -0
  161. data/lib/HDLRuby/low_samples/bugs/sample_daice.yaml +444 -0
  162. data/lib/HDLRuby/low_samples/bugs/sample_kumiawase.yaml +332 -0
  163. data/lib/HDLRuby/low_samples/bugs/sample_sub.yaml +97 -0
  164. data/lib/HDLRuby/low_samples/bugs/seqpar.yaml +184 -0
  165. data/lib/HDLRuby/low_samples/case.yaml +327 -0
  166. data/lib/HDLRuby/low_samples/change.yaml +135 -0
  167. data/lib/HDLRuby/low_samples/clocks.yaml +674 -0
  168. data/lib/HDLRuby/low_samples/cloner.rb +22 -0
  169. data/lib/HDLRuby/low_samples/comparer.yaml +85 -0
  170. data/lib/HDLRuby/low_samples/conditionals.yaml +133 -0
  171. data/lib/HDLRuby/low_samples/dff.yaml +107 -0
  172. data/lib/HDLRuby/low_samples/each.yaml +1328 -0
  173. data/lib/HDLRuby/low_samples/exporter.yaml +226 -0
  174. data/lib/HDLRuby/low_samples/functions.yaml +298 -0
  175. data/lib/HDLRuby/low_samples/generic_transmission.yaml +597 -0
  176. data/lib/HDLRuby/low_samples/inherit_as_dff.yaml +125 -0
  177. data/lib/HDLRuby/low_samples/inherit_dff.yaml +107 -0
  178. data/lib/HDLRuby/low_samples/load_yaml.rb +11 -0
  179. data/lib/HDLRuby/low_samples/memory.yaml +678 -0
  180. data/lib/HDLRuby/low_samples/namespace_extractor.rb +23 -0
  181. data/lib/HDLRuby/low_samples/overload.yaml +226 -0
  182. data/lib/HDLRuby/low_samples/paper_after.yaml +431 -0
  183. data/lib/HDLRuby/low_samples/port_maker.rb +14 -0
  184. data/lib/HDLRuby/low_samples/ram.yaml +207 -0
  185. data/lib/HDLRuby/low_samples/registers.yaml +228 -0
  186. data/lib/HDLRuby/low_samples/rom.yaml +2950 -0
  187. data/lib/HDLRuby/low_samples/shift.yaml +230 -0
  188. data/lib/HDLRuby/low_samples/shift2.yaml +2095 -0
  189. data/lib/HDLRuby/low_samples/simple_instance.yaml +102 -0
  190. data/lib/HDLRuby/low_samples/test_all.sh +43 -0
  191. data/lib/HDLRuby/low_samples/typedef.yaml +115 -0
  192. data/lib/HDLRuby/low_samples/values.yaml +577 -0
  193. data/lib/HDLRuby/low_samples/variable_maker.rb +14 -0
  194. data/lib/HDLRuby/low_samples/vector.yaml +56 -0
  195. data/lib/HDLRuby/low_samples/with_seq.yaml +188 -0
  196. data/lib/HDLRuby/low_samples/yaml2hdr.rb +10 -0
  197. data/lib/HDLRuby/low_samples/yaml2vhd.rb +19 -0
  198. data/lib/HDLRuby/sim/Makefile +19 -0
  199. data/lib/HDLRuby/sim/hruby_sim.h +590 -0
  200. data/lib/HDLRuby/sim/hruby_sim_calc.c +2362 -0
  201. data/lib/HDLRuby/sim/hruby_sim_core.c +589 -0
  202. data/lib/HDLRuby/sim/hruby_sim_list.c +93 -0
  203. data/lib/HDLRuby/sim/hruby_sim_vizualize.c +91 -0
  204. data/lib/HDLRuby/sim/hruby_value_pool.c +64 -0
  205. data/lib/HDLRuby/std/channel.rb +354 -0
  206. data/lib/HDLRuby/std/clocks.rb +165 -0
  207. data/lib/HDLRuby/std/counters.rb +82 -0
  208. data/lib/HDLRuby/std/decoder.rb +214 -0
  209. data/lib/HDLRuby/std/fsm.rb +516 -0
  210. data/lib/HDLRuby/std/pipeline.rb +220 -0
  211. data/lib/HDLRuby/std/reconf.rb +309 -0
  212. data/lib/HDLRuby/test_hruby_bstr.rb +2259 -0
  213. data/lib/HDLRuby/test_hruby_high.rb +594 -0
  214. data/lib/HDLRuby/test_hruby_high_low.rb +99 -0
  215. data/lib/HDLRuby/test_hruby_low.rb +934 -0
  216. data/lib/HDLRuby/v_samples/adder.v +10 -0
  217. data/lib/HDLRuby/v_samples/dff.v +12 -0
  218. data/lib/HDLRuby/v_samples/ram.v +20 -0
  219. data/lib/HDLRuby/v_samples/rom.v +270 -0
  220. data/lib/HDLRuby/version.rb +3 -0
  221. data/lib/HDLRuby.rb +11 -0
  222. data/makedoc +1 -0
  223. data/metadata.yaml +4 -0
  224. metadata +299 -0
@@ -0,0 +1,199 @@
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+ # A class for a handshake transmission.
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+
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+ class Handshaker
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+
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+ ## Create a new handshaker for transmitting +type+ data.
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+ def initialize(type)
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+ # Sets the date type.
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+ type = type.to_type
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+ @type = type
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+ buffer = read_valid = read_ready = write_valid = write_ready = nil
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+ HDLRuby::High.cur_system.open do
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+ # Declares the registers used for the handshake
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+ # The data buffer.
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+ buffer = type.inner(HDLRuby.uniq_name)
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+ # Declares the handshake control singals.
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+ read_valid = inner(HDLRuby.uniq_name)
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+ read_ready = inner(HDLRuby.uniq_name)
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+ write_valid = inner(HDLRuby.uniq_name)
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+ write_ready = inner(HDLRuby.uniq_name)
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+ end
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+ @buffer = buffer
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+ @read_valid = read_valid
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+ @read_ready = read_ready
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+ @write_valid = write_valid
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+ @write_ready = write_ready
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+ # puts "@buffer=#{@buffer}"
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+ # puts "@read_valid=#{@read_valid}"
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+ end
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+
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+ # Generate the reset of the handshaker.
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+ def reset
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+ read_valid = @read_valid
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+ read_ready = @read_ready
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+ write_valid = @write_valid
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+ write_ready = @write_ready
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+ HDLRuby::High.cur_system.open do
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+ par do
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+ read_valid <= 0
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+ read_ready <= 0
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+ write_valid <= 1
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+ write_ready <= 1
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+ end
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+ end
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+ end
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+
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+ ## Declares the signals used for input from the handshaker and
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+ # do the connections of the upper SystemI
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+ def input
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+ ibuffer = iread_valid = iread_ready = iwrite_valid = iwrite_ready =nil
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+ type = @type
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+ buffer = @buffer
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+ read_valid = @read_valid
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+ read_ready = @read_ready
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+ write_valid = @write_valid
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+ write_ready = @write_ready
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+ HDLRuby::High.cur_system.open do
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+ # Declares the input signals
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+ ibuffer = type.input(HDLRuby.uniq_name)
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+ iread_valid = input(HDLRuby.uniq_name)
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+ iread_ready = input(HDLRuby.uniq_name)
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+ iwrite_valid = output(HDLRuby.uniq_name)
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+ iwrite_ready = output(HDLRuby.uniq_name)
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+ end
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+ @ibuffer = ibuffer
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+ @iread_valid = iread_valid
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+ @iread_ready = iread_ready
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+ @iwrite_valid = iwrite_valid
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+ @iwrite_ready = iwrite_ready
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+ end
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+
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+ ## Declares the signals used for output to the handshaker and
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+ # do the connections of the upper SystemI
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+ def output
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+ obuffer = oread_valid = oread_ready = owrite_valid = owrite_ready =nil
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+ type = @type
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+ buffer = @buffer
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+ read_valid = @read_valid
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+ read_ready = @read_ready
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+ write_valid = @write_valid
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+ write_ready = @write_ready
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+ HDLRuby::High.cur_system.open do
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+ obuffer = type.output(HDLRuby.uniq_name)
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+ oread_valid = output(HDLRuby.uniq_name)
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+ oread_ready = output(HDLRuby.uniq_name)
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+ owrite_valid = input(HDLRuby.uniq_name)
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+ owrite_ready = input(HDLRuby.uniq_name)
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+ end
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+ @obuffer = obuffer
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+ @oread_valid = oread_valid
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+ @oread_ready = oread_ready
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+ @owrite_valid = owrite_valid
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+ @owrite_ready = owrite_ready
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+ end
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+
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+ ## Gets the port of the handshaker as a list of signals.
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+ def get_port
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+ return [@buffer,@read_valid,@read_ready,@write_valid,@write_ready]
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+ end
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+ alias_method :to_a, :get_port
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+
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+ ## Generates a blocking read.
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+ def read(target,&blk)
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+ ibuffer = @ibuffer
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+ iread_valid = @iread_valid
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+ iread_ready = @iread_ready
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+ iwrite_valid = @iwrite_valid
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+ iwrite_ready = @iwrite_ready
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+ HDLRuby::High.cur_block.open do
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+ hif(iread_valid) do
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+ iwrite_valid <= 0
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+ iwrite_ready <= 0
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+ hif(iread_ready) do
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+ target <= ibuffer
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+ iwrite_valid <= 1
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+ blk.call if blk
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+ end
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+ end
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+ helse do
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+ iwrite_ready <= 1
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+ end
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+ end
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+ end
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+
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+ ## Generates a blocking write.
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+ def write(target,&blk)
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+ obuffer = @obuffer
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+ oread_valid = @oread_valid
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+ oread_ready = @oread_ready
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+ owrite_valid = @owrite_valid
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+ owrite_ready = @owrite_ready
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+ HDLRuby::High.cur_block.open do
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+ hif(owrite_valid) do
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+ oread_valid <= 0
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+ oread_ready <= 0
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+ hif(owrite_ready) do
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+ obuffer <= target
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+ oread_valid <= 1
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+ blk.call if blk
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+ end
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+ end
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+ helse do
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+ oread_ready <= 1
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+ end
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+ end
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+ end
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+ end
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+
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+
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+
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+ # A system generating data and sending them through hadnshake.
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+ # +hs_port+ is the handshaker.
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+ system :hs_producer do |hs_port|
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+ input :clk
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+ input :rst
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+ hs_port.output
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+
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+ [8].inner :counter
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+
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+ par(clk.posedge) do
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+ hif(rst) { counter <= 0 }
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+ helse do
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+ hs_port.write(counter) { counter <= counter + 1 }
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+ end
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+ end
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+ end
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+
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+ # A system consuming data obtained from a handshaker.
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+ # +hs_port+ is the handshaker.
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+ system :hs_consummer do |hs_port|
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+ input :clk
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+ hs_port.input
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+
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+ [8].inner :value
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+
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+ par(clk.posedge) do
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+ hs_port.read(value)
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+ end
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+ end
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+
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+ # A system testing the producer/consumer.
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+ system :hs_test do
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+ input :clk,:rst
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+
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+ # Declares the handshaker
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+ hs = Handshaker.new([8])
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+
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+ # Sets the reset.
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+ hs.reset.at(rst.posedge)
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+
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+ # Instantiate the producer.
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+ hs_producer(hs).(:producer).(clk,rst,*hs)
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+ # Instantiate the consummer.
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+ hs_consummer(hs).(:consummer).(clk,*hs)
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+ end
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+
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+
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+
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+ # Idea: core / container / ?
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+ # -> pour SW et reconfigurable.
@@ -0,0 +1,17 @@
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+ require '../std/decoder.rb'
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+ include HDLRuby::High::Std
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+
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+ # Implementation of a decoder.
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+ system :my_decoder do
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+ [7..0].input :a
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+ [7..0].output :z
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+
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+ decoder(a) do
10
+ entry("1000uuvv") { z <= u + v }
11
+ entry("101uuuvv") { z <= u - v }
12
+ entry("1100uuvv") { z <= u & v }
13
+ entry("1101uuvv") { z <= u | v }
14
+ entry("1110uuvv") { z <= u ^ v }
15
+ default { z <= 0 }
16
+ end
17
+ end
@@ -0,0 +1,34 @@
1
+ require '../std/fsm.rb'
2
+
3
+ include HDLRuby::High::Std
4
+
5
+ # Implementation of a fsm.
6
+ system :my_fsm do
7
+ input :clk,:rst
8
+ [7..0].input :a, :b
9
+ [7..0].output :z
10
+
11
+ # fsm :fsmI
12
+ # fsmI.for_event { clk.posedge }
13
+ # # Shortcut: fsmI.for_event(clk)
14
+ # fsmI.for_reset { rst }
15
+ # # Shortcut: fsmI.for_reset(rst)
16
+ # fsmI do
17
+ # state { z <= 0 }
18
+ # state(:there) { z <= a+b }
19
+ # state do
20
+ # hif (a>0) { z <= a-b }
21
+ # helse { goto(:there) }
22
+ # end
23
+ # end
24
+ # Other alternative:
25
+ fsm(clk.posedge,rst) do
26
+ reset { z <= 0 }
27
+ state { z <= a+b }
28
+ state(:there) do
29
+ hif (z!=0) { z <= a-b }
30
+ goto(z==0,:end,:there)
31
+ end
32
+ state(:end) { goto(:end) }
33
+ end
34
+ end
@@ -0,0 +1,103 @@
1
+ require '../std/reconf.rb'
2
+
3
+ include HDLRuby::High::Std
4
+
5
+
6
+
7
+
8
+ # Implementation of a vivado partial reconfiguration system.
9
+ reconf(:vivado_reconf) do |clk,rst|
10
+
11
+ # Get access to the interface of the reconfigurable component.
12
+ inputs = each_input
13
+ outputs = each_output
14
+ inouts = each_inout
15
+
16
+ # Create the main system with the interface and a channel for
17
+ # handling the reconfiguration.
18
+ main = system do
19
+ # Declares the inputs.
20
+ inputs.each do |i|
21
+ i.type.input(i.name)
22
+ end
23
+ # Declares the outputs.
24
+ outputs.each do |o|
25
+ o.type.output(o.name)
26
+ end
27
+ # Declares the inouts.
28
+ inouts.each do |io|
29
+ io.type.inout(io.name)
30
+ end
31
+ # An that's all: in vivado the main system is to be a black-box.
32
+ end
33
+
34
+ # And set it as the main system.
35
+ set_main(main)
36
+
37
+ # The switching circuit.
38
+ # reconfer = vivado_reconfigurer :do_reconf # Will be that later
39
+ # reconfer.clk <= clk
40
+ # reconfer.rst <= rst
41
+ reconfer = proc do |idx|
42
+ puts "Instantiating reconfiguration circuits with #{idx}"
43
+ end
44
+
45
+ # Defines the reconfiguring procedure: switch to system idx.
46
+ switcher do |idx,ruby_block|
47
+ reconfer.call(idx)
48
+ ruby_block.call
49
+ end
50
+
51
+ end
52
+
53
+
54
+ # Some system that can be used for recponfiguration.
55
+ system :sys0 do
56
+ input :clk,:rst
57
+ input :d
58
+ output :q
59
+
60
+ q <= d
61
+ end
62
+
63
+ system :sys1 do
64
+ input :clk,:rst
65
+ input :d
66
+ output :q
67
+
68
+ (q <= d).at(clk.posedge)
69
+ end
70
+
71
+ system :sys2 do
72
+ input :clk,:rst
73
+ input :d
74
+ output :q
75
+
76
+ (q <= d & ~rst).at(clk.posedge)
77
+ end
78
+
79
+ # A system with a reconfifurable part.
80
+ system :with_reconf do
81
+ input :clk,:rst
82
+ input :d
83
+ output :q
84
+ [2].input :conf # The configuration number
85
+
86
+ inner :wait_reconf
87
+
88
+ # Create a reconfigurable component.
89
+ vivado_reconf(clk,rst).(:my_reconf)
90
+ # It is to be reconfigured to sys0, sys1 or sys2
91
+ my_reconf.(sys0, sys1, sys2)
92
+
93
+ # Connect the reconfigurable instance.
94
+ my_reconf.instance.(clk,rst,d,q)
95
+
96
+ par(clk.posedge) do
97
+ hif(rst) { wait_reconf <= 0 }
98
+ helsif(conf != 0 && my_reconf.index != conf && wait_reconf == 0) do
99
+ wait_reconf <= 1
100
+ my_reconf.switch(conf) { wait_reconf <= 0 }
101
+ end
102
+ end
103
+ end