HDLRuby 2.0.8

data/lib/HDLRuby/low_samples/overload.yaml

@@ -0,0 +1,226 @@
+---
+Type:
+  name: signed
+---
+TypeVector:
+  name: integer
+  base: signed
+  range:
+  - 31
+  - 0
+---
+Type:
+  name: void
+---
+Type:
+  name: bit
+---
+SystemT:
+  name: adderI::T_
+  inputs:
+  - SignalI:
+      name: x
+      type:
+        TypeDef:
+          name: sat16
+          def:
+            TypeVector:
+              name: ''
+              base: bit
+              range:
+              - 15
+              - 0
+  - SignalI:
+      name: y
+      type:
+        TypeDef:
+          name: sat16
+          def:
+            TypeVector:
+              name: ''
+              base: bit
+              range:
+              - 15
+              - 0
+  outputs:
+  - SignalI:
+      name: s
+      type:
+        TypeVector:
+          name: ''
+          base: bit
+          range:
+          - 15
+          - 0
+  inouts: []
+  scope:
+    Scope:
+      name: ''
+      scopes:
+      - Scope:
+          name: ''
+          scopes: []
+          inners:
+          - SignalI:
+              name: res
+              type:
+                TypeVector:
+                  name: ''
+                  base: bit
+                  range:
+                  - 16
+                  - 0
+          systemIs: []
+          connections: []
+          behaviors:
+          - Behavior:
+              events: []
+              block:
+                Block:
+                  mode: seq
+                  name: ''
+                  inners: []
+                  statements:
+                  - Transmit:
+                      left:
+                        RefName:
+                          type:
+                            TypeVector:
+                              name: ''
+                              base: bit
+                              range:
+                              - 16
+                              - 0
+                          ref:
+                            RefThis:
+                              type: void
+                          name: res
+                      right:
+                        Binary:
+                          type:
+                            TypeVector:
+                              name: ''
+                              base: bit
+                              range:
+                              - 16
+                              - 0
+                          operator: "+"
+                          left:
+                            Cast:
+                              type:
+                                TypeVector:
+                                  name: ''
+                                  base: bit
+                                  range:
+                                  - 15
+                                  - 0
+                              child:
+                                RefName:
+                                  type:
+                                    TypeDef:
+                                      name: sat16
+                                      def:
+                                        TypeVector:
+                                          name: ''
+                                          base: bit
+                                          range:
+                                          - 15
+                                          - 0
+                                  ref:
+                                    RefThis:
+                                      type: void
+                                  name: x
+                          right:
+                            RefName:
+                              type:
+                                TypeDef:
+                                  name: sat16
+                                  def:
+                                    TypeVector:
+                                      name: ''
+                                      base: bit
+                                      range:
+                                      - 15
+                                      - 0
+                              ref:
+                                RefThis:
+                                  type: void
+                              name: y
+                  - If:
+                      condition:
+                        RefIndex:
+                          type: bit
+                          ref:
+                            RefName:
+                              type:
+                                TypeVector:
+                                  name: ''
+                                  base: bit
+                                  range:
+                                  - 16
+                                  - 0
+                              ref:
+                                RefThis:
+                                  type: void
+                              name: res
+                          index:
+                            Value:
+                              type: integer
+                              content: 16
+                      'yes':
+                        Block:
+                          mode: seq
+                          name: ''
+                          inners: []
+                          statements:
+                          - Transmit:
+                              left:
+                                RefName:
+                                  type:
+                                    TypeVector:
+                                      name: ''
+                                      base: bit
+                                      range:
+                                      - 16
+                                      - 0
+                                  ref:
+                                    RefThis:
+                                      type: void
+                                  name: res
+                              right:
+                                Value:
+                                  type: integer
+                                  content: 65535
+                      'no': 
+                      noifs: []
+      inners: []
+      systemIs: []
+      connections:
+      - Connection:
+          left:
+            RefName:
+              type:
+                TypeVector:
+                  name: ''
+                  base: bit
+                  range:
+                  - 15
+                  - 0
+              ref:
+                RefThis:
+                  type: void
+              name: s
+          right:
+            RefName:
+              type:
+                TypeVector:
+                  name: ''
+                  base: bit
+                  range:
+                  - 16
+                  - 0
+              ref:
+                RefThis:
+                  type: void
+              name: res
+      behaviors: []

data/lib/HDLRuby/low_samples/paper_after.yaml

@@ -0,0 +1,431 @@
+---
+Type:
+  name: signed
+---
+TypeVector:
+  name: integer
+  base: signed
+  range:
+  - 31
+  - 0
+---
+Type:
+  name: void
+---
+Type:
+  name: bit
+---
+SystemT:
+  name: test_after0I::T_
+  inputs:
+  - SignalI:
+      name: clk
+      type: bit
+  - SignalI:
+      name: rst
+      type: bit
+  outputs: []
+  inouts: []
+  scope:
+    Scope:
+      name: ''
+      scopes: []
+      inners:
+      - SignalI:
+          name: sig0
+          type: bit
+      - SignalI:
+          name: sig1
+          type: bit
+      - SignalI:
+          name: ":0"
+          type:
+            TypeVector:
+              name: ''
+              base: bit
+              range:
+              - 3
+              - 0
+      systemIs: []
+      connections: []
+      behaviors:
+      - Behavior:
+          events:
+          - Event:
+              type: posedge
+              ref:
+                RefName:
+                  type: bit
+                  ref:
+                    RefThis:
+                      type: void
+                  name: clk
+          - Event:
+              type: posedge
+              ref:
+                RefName:
+                  type: bit
+                  ref:
+                    RefThis:
+                      type: void
+                  name: rst
+          block:
+            Block:
+              mode: par
+              name: ''
+              inners: []
+              statements:
+              - If:
+                  condition:
+                    RefName:
+                      type: bit
+                      ref:
+                        RefThis:
+                          type: void
+                      name: rst
+                  'yes':
+                    Block:
+                      mode: par
+                      name: ''
+                      inners: []
+                      statements:
+                      - Transmit:
+                          left:
+                            RefName:
+                              type:
+                                TypeVector:
+                                  name: ''
+                                  base: bit
+                                  range:
+                                  - 3
+                                  - 0
+                              ref:
+                                RefThis:
+                                  type: void
+                              name: ":0"
+                          right:
+                            Value:
+                              type: integer
+                              content: 0
+                  'no':
+                    Block:
+                      mode: par
+                      name: ''
+                      inners: []
+                      statements:
+                      - Transmit:
+                          left:
+                            RefName:
+                              type:
+                                TypeVector:
+                                  name: ''
+                                  base: bit
+                                  range:
+                                  - 3
+                                  - 0
+                              ref:
+                                RefThis:
+                                  type: void
+                              name: ":0"
+                          right:
+                            Binary:
+                              type:
+                                TypeVector:
+                                  name: ''
+                                  base: signed
+                                  range:
+                                  - 32
+                                  - 0
+                              operator: "+"
+                              left:
+                                RefName:
+                                  type:
+                                    TypeVector:
+                                      name: ''
+                                      base: bit
+                                      range:
+                                      - 3
+                                      - 0
+                                  ref:
+                                    RefThis:
+                                      type: void
+                                  name: ":0"
+                              right:
+                                Value:
+                                  type: integer
+                                  content: 1
+                  noifs: []
+      - Behavior:
+          events: []
+          block:
+            Block:
+              mode: par
+              name: ''
+              inners: []
+              statements:
+              - If:
+                  condition:
+                    Binary:
+                      type:
+                        TypeVector:
+                          name: ''
+                          base: signed
+                          range:
+                          - 31
+                          - 0
+                      operator: ">="
+                      left:
+                        RefName:
+                          type:
+                            TypeVector:
+                              name: ''
+                              base: bit
+                              range:
+                              - 3
+                              - 0
+                          ref:
+                            RefThis:
+                              type: void
+                          name: ":0"
+                      right:
+                        Value:
+                          type: integer
+                          content: 10
+                  'yes':
+                    Block:
+                      mode: par
+                      name: ''
+                      inners: []
+                      statements:
+                      - Transmit:
+                          left:
+                            RefName:
+                              type: bit
+                              ref:
+                                RefThis:
+                                  type: void
+                              name: sig0
+                          right:
+                            Value:
+                              type: integer
+                              content: 1
+                  'no':
+                    Block:
+                      mode: par
+                      name: ''
+                      inners: []
+                      statements:
+                      - Transmit:
+                          left:
+                            RefName:
+                              type: bit
+                              ref:
+                                RefThis:
+                                  type: void
+                              name: sig0
+                          right:
+                            Value:
+                              type: integer
+                              content: 0
+                  noifs: []
+      - Behavior:
+          events:
+          - Event:
+              type: posedge
+              ref:
+                RefName:
+                  type: bit
+                  ref:
+                    RefThis:
+                      type: void
+                  name: clk
+          - Event:
+              type: posedge
+              ref:
+                RefName:
+                  type: bit
+                  ref:
+                    RefThis:
+                      type: void
+                  name: rst
+          block:
+            Block:
+              mode: par
+              name: ''
+              inners:
+              - SignalI:
+                  name: ":1"
+                  type:
+                    TypeVector:
+                      name: ''
+                      base: bit
+                      range:
+                      - 4
+                      - 0
+              statements:
+              - Transmit:
+                  left:
+                    RefName:
+                      type: bit
+                      ref:
+                        RefThis:
+                          type: void
+                      name: sig1
+                  right:
+                    Value:
+                      type: integer
+                      content: 0
+              - If:
+                  condition:
+                    RefName:
+                      type: bit
+                      ref:
+                        RefThis:
+                          type: void
+                      name: __universe__rst__
+                  'yes':
+                    Block:
+                      mode: par
+                      name: ''
+                      inners: []
+                      statements:
+                      - Transmit:
+                          left:
+                            RefName:
+                              type:
+                                TypeVector:
+                                  name: ''
+                                  base: bit
+                                  range:
+                                  - 4
+                                  - 0
+                              ref:
+                                RefThis:
+                                  type: void
+                              name: ":1"
+                          right:
+                            Value:
+                              type: integer
+                              content: 0
+                  'no': 
+                  noifs:
+                  - - Binary:
+                        type:
+                          TypeVector:
+                            name: ''
+                            base: signed
+                            range:
+                            - 31
+                            - 0
+                        operator: "<"
+                        left:
+                          RefName:
+                            type:
+                              TypeVector:
+                                name: ''
+                                base: bit
+                                range:
+                                - 4
+                                - 0
+                            ref:
+                              RefThis:
+                                type: void
+                            name: ":1"
+                        right:
+                          Value:
+                            type: integer
+                            content: 20
+                    - Block:
+                        mode: par
+                        name: ''
+                        inners: []
+                        statements:
+                        - Transmit:
+                            left:
+                              RefName:
+                                type:
+                                  TypeVector:
+                                    name: ''
+                                    base: bit
+                                    range:
+                                    - 4
+                                    - 0
+                                ref:
+                                  RefThis:
+                                    type: void
+                                name: ":1"
+                            right:
+                              Binary:
+                                type:
+                                  TypeVector:
+                                    name: ''
+                                    base: signed
+                                    range:
+                                    - 32
+                                    - 0
+                                operator: "+"
+                                left:
+                                  RefName:
+                                    type:
+                                      TypeVector:
+                                        name: ''
+                                        base: bit
+                                        range:
+                                        - 4
+                                        - 0
+                                    ref:
+                                      RefThis:
+                                        type: void
+                                    name: ":1"
+                                right:
+                                  Value:
+                                    type: integer
+                                    content: 1
+              - If:
+                  condition:
+                    Binary:
+                      type:
+                        TypeVector:
+                          name: ''
+                          base: signed
+                          range:
+                          - 31
+                          - 0
+                      operator: ">="
+                      left:
+                        RefName:
+                          type:
+                            TypeVector:
+                              name: ''
+                              base: bit
+                              range:
+                              - 4
+                              - 0
+                          ref:
+                            RefThis:
+                              type: void
+                          name: ":1"
+                      right:
+                        Value:
+                          type: integer
+                          content: 20
+                  'yes':
+                    Block:
+                      mode: par
+                      name: ''
+                      inners: []
+                      statements:
+                      - Transmit:
+                          left:
+                            RefName:
+                              type: bit
+                              ref:
+                                RefThis:
+                                  type: void
+                              name: sig1
+                          right:
+                            Value:
+                              type: integer
+                              content: 1
+                  'no': 
+                  noifs: []

data/lib/HDLRuby/low_samples/port_maker.rb

@@ -0,0 +1,14 @@
+# Simple program for testing the port wire generation for HDLRuby::Low instances.
+require 'pp'
+require 'HDLRuby'
+require 'HDLRuby/hruby_low_with_port.rb'
+include HDLRuby::Low
+
+# Read a yaml file.
+hardwares = HDLRuby::from_yaml(File.read($*[0]))
+
+# Generate the variables.
+hardwares[-1].with_port!
+
+# Displays the result
+puts hardwares[-1].to_yaml