RubyGems - HDLRuby - Versions diffs - 2.0.8 - Mend

HDLRuby 2.0.8

Files changed (224) hide show

checksums.yaml +7 -0
data/.gitignore +9 -0
data/.travis.yml +5 -0
data/.yardopts +1 -0
data/Gemfile +4 -0
data/HDLRuby.gemspec +36 -0
data/LICENSE.txt +21 -0
data/README.md +2774 -0
data/README.pdf +0 -0
data/Rakefile +10 -0
data/bin/console +14 -0
data/bin/setup +8 -0
data/exe/hdrcc +3 -0
data/lib/HDLRuby/alcc.rb +137 -0
data/lib/HDLRuby/backend/hruby_allocator.rb +69 -0
data/lib/HDLRuby/backend/hruby_c_allocator.rb +76 -0
data/lib/HDLRuby/hdr_samples/adder.rb +7 -0
data/lib/HDLRuby/hdr_samples/adder_assign_error.rb +11 -0
data/lib/HDLRuby/hdr_samples/adder_bench.rb +27 -0
data/lib/HDLRuby/hdr_samples/adder_gen.rb +7 -0
data/lib/HDLRuby/hdr_samples/adder_nodef_error.rb +7 -0
data/lib/HDLRuby/hdr_samples/addsub.rb +19 -0
data/lib/HDLRuby/hdr_samples/addsubz.rb +22 -0
data/lib/HDLRuby/hdr_samples/alu.rb +47 -0
data/lib/HDLRuby/hdr_samples/calculator.rb +48 -0
data/lib/HDLRuby/hdr_samples/counter_bench.rb +83 -0
data/lib/HDLRuby/hdr_samples/dff.rb +9 -0
data/lib/HDLRuby/hdr_samples/dff_bench.rb +66 -0
data/lib/HDLRuby/hdr_samples/dff_counter.rb +20 -0
data/lib/HDLRuby/hdr_samples/include.rb +14 -0
data/lib/HDLRuby/hdr_samples/instance_open.rb +23 -0
data/lib/HDLRuby/hdr_samples/mei8.rb +256 -0
data/lib/HDLRuby/hdr_samples/mei8_bench.rb +309 -0
data/lib/HDLRuby/hdr_samples/multer_gen.rb +8 -0
data/lib/HDLRuby/hdr_samples/multer_seq.rb +29 -0
data/lib/HDLRuby/hdr_samples/neural/a.rb +9 -0
data/lib/HDLRuby/hdr_samples/neural/a_sub.rb +5 -0
data/lib/HDLRuby/hdr_samples/neural/bw.rb +23 -0
data/lib/HDLRuby/hdr_samples/neural/counter.rb +16 -0
data/lib/HDLRuby/hdr_samples/neural/dadz.rb +9 -0
data/lib/HDLRuby/hdr_samples/neural/dadz_sub.rb +4 -0
data/lib/HDLRuby/hdr_samples/neural/forward.rb +153 -0
data/lib/HDLRuby/hdr_samples/neural/forward_sub.rb +62 -0
data/lib/HDLRuby/hdr_samples/neural/forward_sub_rand.rb +41 -0
data/lib/HDLRuby/hdr_samples/neural/forward_sub_rand_typedef.rb +47 -0
data/lib/HDLRuby/hdr_samples/neural/mem.rb +30 -0
data/lib/HDLRuby/hdr_samples/neural/random.rb +23 -0
data/lib/HDLRuby/hdr_samples/neural/selector.rb +29 -0
data/lib/HDLRuby/hdr_samples/neural/sigmoid.rb +20 -0
data/lib/HDLRuby/hdr_samples/neural/z.rb +33 -0
data/lib/HDLRuby/hdr_samples/prog.obj +256 -0
data/lib/HDLRuby/hdr_samples/ram.rb +18 -0
data/lib/HDLRuby/hdr_samples/register_with_code_bench.rb +98 -0
data/lib/HDLRuby/hdr_samples/rom.rb +10 -0
data/lib/HDLRuby/hdr_samples/struct.rb +14 -0
data/lib/HDLRuby/hdr_samples/sumprod.rb +29 -0
data/lib/HDLRuby/hdr_samples/sw_encrypt_bench.rb +103 -0
data/lib/HDLRuby/hdr_samples/sw_encrypt_cpu_bench.rb +261 -0
data/lib/HDLRuby/hdr_samples/sw_encrypt_cpusim_bench.rb +302 -0
data/lib/HDLRuby/hdr_samples/system_open.rb +11 -0
data/lib/HDLRuby/hdr_samples/tuple.rb +16 -0
data/lib/HDLRuby/hdr_samples/with_channel.rb +118 -0
data/lib/HDLRuby/hdr_samples/with_class.rb +199 -0
data/lib/HDLRuby/hdr_samples/with_decoder.rb +17 -0
data/lib/HDLRuby/hdr_samples/with_fsm.rb +34 -0
data/lib/HDLRuby/hdr_samples/with_reconf.rb +103 -0
data/lib/HDLRuby/hdrcc.rb +623 -0
data/lib/HDLRuby/high_samples/_adder_fault.rb +23 -0
data/lib/HDLRuby/high_samples/_generic_transmission2.rb +146 -0
data/lib/HDLRuby/high_samples/adder.rb +21 -0
data/lib/HDLRuby/high_samples/adder_common_errors.rb +25 -0
data/lib/HDLRuby/high_samples/addsub.rb +33 -0
data/lib/HDLRuby/high_samples/addsubz.rb +37 -0
data/lib/HDLRuby/high_samples/after.rb +28 -0
data/lib/HDLRuby/high_samples/all_signals.rb +29 -0
data/lib/HDLRuby/high_samples/alu.rb +61 -0
data/lib/HDLRuby/high_samples/anonymous.rb +41 -0
data/lib/HDLRuby/high_samples/before.rb +28 -0
data/lib/HDLRuby/high_samples/blockblock.rb +26 -0
data/lib/HDLRuby/high_samples/bugs/dadz.rb +22 -0
data/lib/HDLRuby/high_samples/bugs/misample_instan.rb +20 -0
data/lib/HDLRuby/high_samples/bugs/misample_updown.rb +22 -0
data/lib/HDLRuby/high_samples/bugs/sample_add.rb +16 -0
data/lib/HDLRuby/high_samples/bugs/sample_barrel.rb +13 -0
data/lib/HDLRuby/high_samples/bugs/sample_daice.rb +57 -0
data/lib/HDLRuby/high_samples/bugs/sample_kumiawase.rb +52 -0
data/lib/HDLRuby/high_samples/bugs/sample_multi.rb +18 -0
data/lib/HDLRuby/high_samples/bugs/sample_sub.rb +14 -0
data/lib/HDLRuby/high_samples/bugs/z2.rb +32 -0
data/lib/HDLRuby/high_samples/case.rb +32 -0
data/lib/HDLRuby/high_samples/case2.rb +30 -0
data/lib/HDLRuby/high_samples/change.rb +23 -0
data/lib/HDLRuby/high_samples/clocks.rb +35 -0
data/lib/HDLRuby/high_samples/comparer.rb +21 -0
data/lib/HDLRuby/high_samples/conditionals.rb +29 -0
data/lib/HDLRuby/high_samples/dff.rb +23 -0
data/lib/HDLRuby/high_samples/each.rb +28 -0
data/lib/HDLRuby/high_samples/exporter.rb +42 -0
data/lib/HDLRuby/high_samples/functions.rb +60 -0
data/lib/HDLRuby/high_samples/if_seq.rb +26 -0
data/lib/HDLRuby/high_samples/inherit_as_dff.rb +32 -0
data/lib/HDLRuby/high_samples/inherit_dff.rb +36 -0
data/lib/HDLRuby/high_samples/instance.rb +37 -0
data/lib/HDLRuby/high_samples/memory.rb +64 -0
data/lib/HDLRuby/high_samples/multi_file.rb +27 -0
data/lib/HDLRuby/high_samples/overload.rb +32 -0
data/lib/HDLRuby/high_samples/paper_after.rb +49 -0
data/lib/HDLRuby/high_samples/ram.rb +27 -0
data/lib/HDLRuby/high_samples/registers.rb +139 -0
data/lib/HDLRuby/high_samples/rom.rb +23 -0
data/lib/HDLRuby/high_samples/scopeblockname.rb +37 -0
data/lib/HDLRuby/high_samples/scopescope.rb +26 -0
data/lib/HDLRuby/high_samples/shift.rb +31 -0
data/lib/HDLRuby/high_samples/shift2.rb +40 -0
data/lib/HDLRuby/high_samples/simple_instance.rb +31 -0
data/lib/HDLRuby/high_samples/test_all.sh +10 -0
data/lib/HDLRuby/high_samples/typedef.rb +24 -0
data/lib/HDLRuby/high_samples/values.rb +70 -0
data/lib/HDLRuby/high_samples/vector.rb +22 -0
data/lib/HDLRuby/high_samples/with_decoder.rb +30 -0
data/lib/HDLRuby/high_samples/with_fsm.rb +46 -0
data/lib/HDLRuby/high_samples/with_pipe.rb +43 -0
data/lib/HDLRuby/high_samples/with_seq.rb +25 -0
data/lib/HDLRuby/hruby_bstr.rb +1085 -0
data/lib/HDLRuby/hruby_check.rb +317 -0
data/lib/HDLRuby/hruby_db.rb +432 -0
data/lib/HDLRuby/hruby_error.rb +44 -0
data/lib/HDLRuby/hruby_high.rb +4103 -0
data/lib/HDLRuby/hruby_low.rb +4735 -0
data/lib/HDLRuby/hruby_low2c.rb +1986 -0
data/lib/HDLRuby/hruby_low2high.rb +738 -0
data/lib/HDLRuby/hruby_low2seq.rb +248 -0
data/lib/HDLRuby/hruby_low2sym.rb +126 -0
data/lib/HDLRuby/hruby_low2vhd.rb +1437 -0
data/lib/HDLRuby/hruby_low_bool2select.rb +295 -0
data/lib/HDLRuby/hruby_low_cleanup.rb +193 -0
data/lib/HDLRuby/hruby_low_fix_types.rb +437 -0
data/lib/HDLRuby/hruby_low_mutable.rb +1803 -0
data/lib/HDLRuby/hruby_low_resolve.rb +165 -0
data/lib/HDLRuby/hruby_low_skeleton.rb +129 -0
data/lib/HDLRuby/hruby_low_with_bool.rb +141 -0
data/lib/HDLRuby/hruby_low_with_port.rb +167 -0
data/lib/HDLRuby/hruby_low_with_var.rb +302 -0
data/lib/HDLRuby/hruby_low_without_bit2vector.rb +88 -0
data/lib/HDLRuby/hruby_low_without_concat.rb +162 -0
data/lib/HDLRuby/hruby_low_without_connection.rb +113 -0
data/lib/HDLRuby/hruby_low_without_namespace.rb +718 -0
data/lib/HDLRuby/hruby_low_without_outread.rb +107 -0
data/lib/HDLRuby/hruby_low_without_select.rb +206 -0
data/lib/HDLRuby/hruby_serializer.rb +398 -0
data/lib/HDLRuby/hruby_tools.rb +37 -0
data/lib/HDLRuby/hruby_types.rb +239 -0
data/lib/HDLRuby/hruby_values.rb +64 -0
data/lib/HDLRuby/hruby_verilog.rb +1888 -0
data/lib/HDLRuby/hruby_verilog_name.rb +52 -0
data/lib/HDLRuby/low_samples/adder.yaml +97 -0
data/lib/HDLRuby/low_samples/after.yaml +228 -0
data/lib/HDLRuby/low_samples/before.yaml +223 -0
data/lib/HDLRuby/low_samples/blockblock.yaml +48 -0
data/lib/HDLRuby/low_samples/bugs/sample_add.yaml +97 -0
data/lib/HDLRuby/low_samples/bugs/sample_daice.yaml +444 -0
data/lib/HDLRuby/low_samples/bugs/sample_kumiawase.yaml +332 -0
data/lib/HDLRuby/low_samples/bugs/sample_sub.yaml +97 -0
data/lib/HDLRuby/low_samples/bugs/seqpar.yaml +184 -0
data/lib/HDLRuby/low_samples/case.yaml +327 -0
data/lib/HDLRuby/low_samples/change.yaml +135 -0
data/lib/HDLRuby/low_samples/clocks.yaml +674 -0
data/lib/HDLRuby/low_samples/cloner.rb +22 -0
data/lib/HDLRuby/low_samples/comparer.yaml +85 -0
data/lib/HDLRuby/low_samples/conditionals.yaml +133 -0
data/lib/HDLRuby/low_samples/dff.yaml +107 -0
data/lib/HDLRuby/low_samples/each.yaml +1328 -0
data/lib/HDLRuby/low_samples/exporter.yaml +226 -0
data/lib/HDLRuby/low_samples/functions.yaml +298 -0
data/lib/HDLRuby/low_samples/generic_transmission.yaml +597 -0
data/lib/HDLRuby/low_samples/inherit_as_dff.yaml +125 -0
data/lib/HDLRuby/low_samples/inherit_dff.yaml +107 -0
data/lib/HDLRuby/low_samples/load_yaml.rb +11 -0
data/lib/HDLRuby/low_samples/memory.yaml +678 -0
data/lib/HDLRuby/low_samples/namespace_extractor.rb +23 -0
data/lib/HDLRuby/low_samples/overload.yaml +226 -0
data/lib/HDLRuby/low_samples/paper_after.yaml +431 -0
data/lib/HDLRuby/low_samples/port_maker.rb +14 -0
data/lib/HDLRuby/low_samples/ram.yaml +207 -0
data/lib/HDLRuby/low_samples/registers.yaml +228 -0
data/lib/HDLRuby/low_samples/rom.yaml +2950 -0
data/lib/HDLRuby/low_samples/shift.yaml +230 -0
data/lib/HDLRuby/low_samples/shift2.yaml +2095 -0
data/lib/HDLRuby/low_samples/simple_instance.yaml +102 -0
data/lib/HDLRuby/low_samples/test_all.sh +43 -0
data/lib/HDLRuby/low_samples/typedef.yaml +115 -0
data/lib/HDLRuby/low_samples/values.yaml +577 -0
data/lib/HDLRuby/low_samples/variable_maker.rb +14 -0
data/lib/HDLRuby/low_samples/vector.yaml +56 -0
data/lib/HDLRuby/low_samples/with_seq.yaml +188 -0
data/lib/HDLRuby/low_samples/yaml2hdr.rb +10 -0
data/lib/HDLRuby/low_samples/yaml2vhd.rb +19 -0
data/lib/HDLRuby/sim/Makefile +19 -0
data/lib/HDLRuby/sim/hruby_sim.h +590 -0
data/lib/HDLRuby/sim/hruby_sim_calc.c +2362 -0
data/lib/HDLRuby/sim/hruby_sim_core.c +589 -0
data/lib/HDLRuby/sim/hruby_sim_list.c +93 -0
data/lib/HDLRuby/sim/hruby_sim_vizualize.c +91 -0
data/lib/HDLRuby/sim/hruby_value_pool.c +64 -0
data/lib/HDLRuby/std/channel.rb +354 -0
data/lib/HDLRuby/std/clocks.rb +165 -0
data/lib/HDLRuby/std/counters.rb +82 -0
data/lib/HDLRuby/std/decoder.rb +214 -0
data/lib/HDLRuby/std/fsm.rb +516 -0
data/lib/HDLRuby/std/pipeline.rb +220 -0
data/lib/HDLRuby/std/reconf.rb +309 -0
data/lib/HDLRuby/test_hruby_bstr.rb +2259 -0
data/lib/HDLRuby/test_hruby_high.rb +594 -0
data/lib/HDLRuby/test_hruby_high_low.rb +99 -0
data/lib/HDLRuby/test_hruby_low.rb +934 -0
data/lib/HDLRuby/v_samples/adder.v +10 -0
data/lib/HDLRuby/v_samples/dff.v +12 -0
data/lib/HDLRuby/v_samples/ram.v +20 -0
data/lib/HDLRuby/v_samples/rom.v +270 -0
data/lib/HDLRuby/version.rb +3 -0
data/lib/HDLRuby.rb +11 -0
data/makedoc +1 -0
data/metadata.yaml +4 -0
metadata +299 -0

data/lib/HDLRuby/low_samples/shift.yaml ADDED Viewed

@@ -0,0 +1,230 @@
+---
+Type:
+  name: signed
+---
+TypeVector:
+  name: integer
+  base: signed
+  range:
+  - 31
+  - 0
+---
+Type:
+  name: void
+---
+Type:
+  name: bit
+---
+SystemT:
+  name: shift16I::T_
+  inputs:
+  - SignalI:
+      name: clk
+      type: bit
+  - SignalI:
+      name: rst
+      type: bit
+  - SignalI:
+      name: din
+      type: bit
+  outputs:
+  - SignalI:
+      name: dout
+      type: bit
+  inouts: []
+  scope:
+    Scope:
+      name: ''
+      scopes: []
+      inners:
+      - SignalI:
+          name: reg
+          type:
+            TypeVector:
+              name: ''
+              base: bit
+              range:
+              - 15
+              - 0
+      systemIs: []
+      connections:
+      - Connection:
+          left:
+            RefName:
+              type: bit
+              ref:
+                RefThis:
+                  type: void
+              name: dout
+          right:
+            RefIndex:
+              type: bit
+              ref:
+                RefName:
+                  type:
+                    TypeVector:
+                      name: ''
+                      base: bit
+                      range:
+                      - 15
+                      - 0
+                  ref:
+                    RefThis:
+                      type: void
+                  name: reg
+              index:
+                Value:
+                  type: integer
+                  content: 15
+      behaviors:
+      - Behavior:
+          events:
+          - Event:
+              type: posedge
+              ref:
+                RefName:
+                  type: bit
+                  ref:
+                    RefThis:
+                      type: void
+                  name: clk
+          block:
+            Block:
+              mode: par
+              name: ''
+              inners: []
+              statements:
+              - If:
+                  condition:
+                    RefName:
+                      type: bit
+                      ref:
+                        RefThis:
+                          type: void
+                      name: rst
+                  'yes':
+                    Block:
+                      mode: par
+                      name: ''
+                      inners: []
+                      statements:
+                      - Transmit:
+                          left:
+                            RefName:
+                              type:
+                                TypeVector:
+                                  name: ''
+                                  base: bit
+                                  range:
+                                  - 15
+                                  - 0
+                              ref:
+                                RefThis:
+                                  type: void
+                              name: reg
+                          right:
+                            Value:
+                              type: integer
+                              content: 0
+                  'no':
+                    Block:
+                      mode: seq
+                      name: ''
+                      inners: []
+                      statements:
+                      - Transmit:
+                          left:
+                            RefIndex:
+                              type: bit
+                              ref:
+                                RefName:
+                                  type:
+                                    TypeVector:
+                                      name: ''
+                                      base: bit
+                                      range:
+                                      - 15
+                                      - 0
+                                  ref:
+                                    RefThis:
+                                      type: void
+                                  name: reg
+                              index:
+                                Value:
+                                  type: integer
+                                  content: 0
+                          right:
+                            RefName:
+                              type: bit
+                              ref:
+                                RefThis:
+                                  type: void
+                              name: din
+                      - Transmit:
+                          left:
+                            RefRange:
+                              type:
+                                TypeVector:
+                                  name: ''
+                                  base: bit
+                                  range:
+                                  - Value:
+                                      type: integer
+                                      content: 15
+                                  - Value:
+                                      type: integer
+                                      content: 1
+                              ref:
+                                RefName:
+                                  type:
+                                    TypeVector:
+                                      name: ''
+                                      base: bit
+                                      range:
+                                      - 15
+                                      - 0
+                                  ref:
+                                    RefThis:
+                                      type: void
+                                  name: reg
+                              range:
+                              - Value:
+                                  type: integer
+                                  content: 15
+                              - Value:
+                                  type: integer
+                                  content: 1
+                          right:
+                            RefRange:
+                              type:
+                                TypeVector:
+                                  name: ''
+                                  base: bit
+                                  range:
+                                  - Value:
+                                      type: integer
+                                      content: 14
+                                  - Value:
+                                      type: integer
+                                      content: 0
+                              ref:
+                                RefName:
+                                  type:
+                                    TypeVector:
+                                      name: ''
+                                      base: bit
+                                      range:
+                                      - 15
+                                      - 0
+                                  ref:
+                                    RefThis:
+                                      type: void
+                                  name: reg
+                              range:
+                              - Value:
+                                  type: integer
+                                  content: 14
+                              - Value:
+                                  type: integer
+                                  content: 0
+                  noifs: []