HDLRuby 2.0.8
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- checksums.yaml +7 -0
- data/.gitignore +9 -0
- data/.travis.yml +5 -0
- data/.yardopts +1 -0
- data/Gemfile +4 -0
- data/HDLRuby.gemspec +36 -0
- data/LICENSE.txt +21 -0
- data/README.md +2774 -0
- data/README.pdf +0 -0
- data/Rakefile +10 -0
- data/bin/console +14 -0
- data/bin/setup +8 -0
- data/exe/hdrcc +3 -0
- data/lib/HDLRuby/alcc.rb +137 -0
- data/lib/HDLRuby/backend/hruby_allocator.rb +69 -0
- data/lib/HDLRuby/backend/hruby_c_allocator.rb +76 -0
- data/lib/HDLRuby/hdr_samples/adder.rb +7 -0
- data/lib/HDLRuby/hdr_samples/adder_assign_error.rb +11 -0
- data/lib/HDLRuby/hdr_samples/adder_bench.rb +27 -0
- data/lib/HDLRuby/hdr_samples/adder_gen.rb +7 -0
- data/lib/HDLRuby/hdr_samples/adder_nodef_error.rb +7 -0
- data/lib/HDLRuby/hdr_samples/addsub.rb +19 -0
- data/lib/HDLRuby/hdr_samples/addsubz.rb +22 -0
- data/lib/HDLRuby/hdr_samples/alu.rb +47 -0
- data/lib/HDLRuby/hdr_samples/calculator.rb +48 -0
- data/lib/HDLRuby/hdr_samples/counter_bench.rb +83 -0
- data/lib/HDLRuby/hdr_samples/dff.rb +9 -0
- data/lib/HDLRuby/hdr_samples/dff_bench.rb +66 -0
- data/lib/HDLRuby/hdr_samples/dff_counter.rb +20 -0
- data/lib/HDLRuby/hdr_samples/include.rb +14 -0
- data/lib/HDLRuby/hdr_samples/instance_open.rb +23 -0
- data/lib/HDLRuby/hdr_samples/mei8.rb +256 -0
- data/lib/HDLRuby/hdr_samples/mei8_bench.rb +309 -0
- data/lib/HDLRuby/hdr_samples/multer_gen.rb +8 -0
- data/lib/HDLRuby/hdr_samples/multer_seq.rb +29 -0
- data/lib/HDLRuby/hdr_samples/neural/a.rb +9 -0
- data/lib/HDLRuby/hdr_samples/neural/a_sub.rb +5 -0
- data/lib/HDLRuby/hdr_samples/neural/bw.rb +23 -0
- data/lib/HDLRuby/hdr_samples/neural/counter.rb +16 -0
- data/lib/HDLRuby/hdr_samples/neural/dadz.rb +9 -0
- data/lib/HDLRuby/hdr_samples/neural/dadz_sub.rb +4 -0
- data/lib/HDLRuby/hdr_samples/neural/forward.rb +153 -0
- data/lib/HDLRuby/hdr_samples/neural/forward_sub.rb +62 -0
- data/lib/HDLRuby/hdr_samples/neural/forward_sub_rand.rb +41 -0
- data/lib/HDLRuby/hdr_samples/neural/forward_sub_rand_typedef.rb +47 -0
- data/lib/HDLRuby/hdr_samples/neural/mem.rb +30 -0
- data/lib/HDLRuby/hdr_samples/neural/random.rb +23 -0
- data/lib/HDLRuby/hdr_samples/neural/selector.rb +29 -0
- data/lib/HDLRuby/hdr_samples/neural/sigmoid.rb +20 -0
- data/lib/HDLRuby/hdr_samples/neural/z.rb +33 -0
- data/lib/HDLRuby/hdr_samples/prog.obj +256 -0
- data/lib/HDLRuby/hdr_samples/ram.rb +18 -0
- data/lib/HDLRuby/hdr_samples/register_with_code_bench.rb +98 -0
- data/lib/HDLRuby/hdr_samples/rom.rb +10 -0
- data/lib/HDLRuby/hdr_samples/struct.rb +14 -0
- data/lib/HDLRuby/hdr_samples/sumprod.rb +29 -0
- data/lib/HDLRuby/hdr_samples/sw_encrypt_bench.rb +103 -0
- data/lib/HDLRuby/hdr_samples/sw_encrypt_cpu_bench.rb +261 -0
- data/lib/HDLRuby/hdr_samples/sw_encrypt_cpusim_bench.rb +302 -0
- data/lib/HDLRuby/hdr_samples/system_open.rb +11 -0
- data/lib/HDLRuby/hdr_samples/tuple.rb +16 -0
- data/lib/HDLRuby/hdr_samples/with_channel.rb +118 -0
- data/lib/HDLRuby/hdr_samples/with_class.rb +199 -0
- data/lib/HDLRuby/hdr_samples/with_decoder.rb +17 -0
- data/lib/HDLRuby/hdr_samples/with_fsm.rb +34 -0
- data/lib/HDLRuby/hdr_samples/with_reconf.rb +103 -0
- data/lib/HDLRuby/hdrcc.rb +623 -0
- data/lib/HDLRuby/high_samples/_adder_fault.rb +23 -0
- data/lib/HDLRuby/high_samples/_generic_transmission2.rb +146 -0
- data/lib/HDLRuby/high_samples/adder.rb +21 -0
- data/lib/HDLRuby/high_samples/adder_common_errors.rb +25 -0
- data/lib/HDLRuby/high_samples/addsub.rb +33 -0
- data/lib/HDLRuby/high_samples/addsubz.rb +37 -0
- data/lib/HDLRuby/high_samples/after.rb +28 -0
- data/lib/HDLRuby/high_samples/all_signals.rb +29 -0
- data/lib/HDLRuby/high_samples/alu.rb +61 -0
- data/lib/HDLRuby/high_samples/anonymous.rb +41 -0
- data/lib/HDLRuby/high_samples/before.rb +28 -0
- data/lib/HDLRuby/high_samples/blockblock.rb +26 -0
- data/lib/HDLRuby/high_samples/bugs/dadz.rb +22 -0
- data/lib/HDLRuby/high_samples/bugs/misample_instan.rb +20 -0
- data/lib/HDLRuby/high_samples/bugs/misample_updown.rb +22 -0
- data/lib/HDLRuby/high_samples/bugs/sample_add.rb +16 -0
- data/lib/HDLRuby/high_samples/bugs/sample_barrel.rb +13 -0
- data/lib/HDLRuby/high_samples/bugs/sample_daice.rb +57 -0
- data/lib/HDLRuby/high_samples/bugs/sample_kumiawase.rb +52 -0
- data/lib/HDLRuby/high_samples/bugs/sample_multi.rb +18 -0
- data/lib/HDLRuby/high_samples/bugs/sample_sub.rb +14 -0
- data/lib/HDLRuby/high_samples/bugs/z2.rb +32 -0
- data/lib/HDLRuby/high_samples/case.rb +32 -0
- data/lib/HDLRuby/high_samples/case2.rb +30 -0
- data/lib/HDLRuby/high_samples/change.rb +23 -0
- data/lib/HDLRuby/high_samples/clocks.rb +35 -0
- data/lib/HDLRuby/high_samples/comparer.rb +21 -0
- data/lib/HDLRuby/high_samples/conditionals.rb +29 -0
- data/lib/HDLRuby/high_samples/dff.rb +23 -0
- data/lib/HDLRuby/high_samples/each.rb +28 -0
- data/lib/HDLRuby/high_samples/exporter.rb +42 -0
- data/lib/HDLRuby/high_samples/functions.rb +60 -0
- data/lib/HDLRuby/high_samples/if_seq.rb +26 -0
- data/lib/HDLRuby/high_samples/inherit_as_dff.rb +32 -0
- data/lib/HDLRuby/high_samples/inherit_dff.rb +36 -0
- data/lib/HDLRuby/high_samples/instance.rb +37 -0
- data/lib/HDLRuby/high_samples/memory.rb +64 -0
- data/lib/HDLRuby/high_samples/multi_file.rb +27 -0
- data/lib/HDLRuby/high_samples/overload.rb +32 -0
- data/lib/HDLRuby/high_samples/paper_after.rb +49 -0
- data/lib/HDLRuby/high_samples/ram.rb +27 -0
- data/lib/HDLRuby/high_samples/registers.rb +139 -0
- data/lib/HDLRuby/high_samples/rom.rb +23 -0
- data/lib/HDLRuby/high_samples/scopeblockname.rb +37 -0
- data/lib/HDLRuby/high_samples/scopescope.rb +26 -0
- data/lib/HDLRuby/high_samples/shift.rb +31 -0
- data/lib/HDLRuby/high_samples/shift2.rb +40 -0
- data/lib/HDLRuby/high_samples/simple_instance.rb +31 -0
- data/lib/HDLRuby/high_samples/test_all.sh +10 -0
- data/lib/HDLRuby/high_samples/typedef.rb +24 -0
- data/lib/HDLRuby/high_samples/values.rb +70 -0
- data/lib/HDLRuby/high_samples/vector.rb +22 -0
- data/lib/HDLRuby/high_samples/with_decoder.rb +30 -0
- data/lib/HDLRuby/high_samples/with_fsm.rb +46 -0
- data/lib/HDLRuby/high_samples/with_pipe.rb +43 -0
- data/lib/HDLRuby/high_samples/with_seq.rb +25 -0
- data/lib/HDLRuby/hruby_bstr.rb +1085 -0
- data/lib/HDLRuby/hruby_check.rb +317 -0
- data/lib/HDLRuby/hruby_db.rb +432 -0
- data/lib/HDLRuby/hruby_error.rb +44 -0
- data/lib/HDLRuby/hruby_high.rb +4103 -0
- data/lib/HDLRuby/hruby_low.rb +4735 -0
- data/lib/HDLRuby/hruby_low2c.rb +1986 -0
- data/lib/HDLRuby/hruby_low2high.rb +738 -0
- data/lib/HDLRuby/hruby_low2seq.rb +248 -0
- data/lib/HDLRuby/hruby_low2sym.rb +126 -0
- data/lib/HDLRuby/hruby_low2vhd.rb +1437 -0
- data/lib/HDLRuby/hruby_low_bool2select.rb +295 -0
- data/lib/HDLRuby/hruby_low_cleanup.rb +193 -0
- data/lib/HDLRuby/hruby_low_fix_types.rb +437 -0
- data/lib/HDLRuby/hruby_low_mutable.rb +1803 -0
- data/lib/HDLRuby/hruby_low_resolve.rb +165 -0
- data/lib/HDLRuby/hruby_low_skeleton.rb +129 -0
- data/lib/HDLRuby/hruby_low_with_bool.rb +141 -0
- data/lib/HDLRuby/hruby_low_with_port.rb +167 -0
- data/lib/HDLRuby/hruby_low_with_var.rb +302 -0
- data/lib/HDLRuby/hruby_low_without_bit2vector.rb +88 -0
- data/lib/HDLRuby/hruby_low_without_concat.rb +162 -0
- data/lib/HDLRuby/hruby_low_without_connection.rb +113 -0
- data/lib/HDLRuby/hruby_low_without_namespace.rb +718 -0
- data/lib/HDLRuby/hruby_low_without_outread.rb +107 -0
- data/lib/HDLRuby/hruby_low_without_select.rb +206 -0
- data/lib/HDLRuby/hruby_serializer.rb +398 -0
- data/lib/HDLRuby/hruby_tools.rb +37 -0
- data/lib/HDLRuby/hruby_types.rb +239 -0
- data/lib/HDLRuby/hruby_values.rb +64 -0
- data/lib/HDLRuby/hruby_verilog.rb +1888 -0
- data/lib/HDLRuby/hruby_verilog_name.rb +52 -0
- data/lib/HDLRuby/low_samples/adder.yaml +97 -0
- data/lib/HDLRuby/low_samples/after.yaml +228 -0
- data/lib/HDLRuby/low_samples/before.yaml +223 -0
- data/lib/HDLRuby/low_samples/blockblock.yaml +48 -0
- data/lib/HDLRuby/low_samples/bugs/sample_add.yaml +97 -0
- data/lib/HDLRuby/low_samples/bugs/sample_daice.yaml +444 -0
- data/lib/HDLRuby/low_samples/bugs/sample_kumiawase.yaml +332 -0
- data/lib/HDLRuby/low_samples/bugs/sample_sub.yaml +97 -0
- data/lib/HDLRuby/low_samples/bugs/seqpar.yaml +184 -0
- data/lib/HDLRuby/low_samples/case.yaml +327 -0
- data/lib/HDLRuby/low_samples/change.yaml +135 -0
- data/lib/HDLRuby/low_samples/clocks.yaml +674 -0
- data/lib/HDLRuby/low_samples/cloner.rb +22 -0
- data/lib/HDLRuby/low_samples/comparer.yaml +85 -0
- data/lib/HDLRuby/low_samples/conditionals.yaml +133 -0
- data/lib/HDLRuby/low_samples/dff.yaml +107 -0
- data/lib/HDLRuby/low_samples/each.yaml +1328 -0
- data/lib/HDLRuby/low_samples/exporter.yaml +226 -0
- data/lib/HDLRuby/low_samples/functions.yaml +298 -0
- data/lib/HDLRuby/low_samples/generic_transmission.yaml +597 -0
- data/lib/HDLRuby/low_samples/inherit_as_dff.yaml +125 -0
- data/lib/HDLRuby/low_samples/inherit_dff.yaml +107 -0
- data/lib/HDLRuby/low_samples/load_yaml.rb +11 -0
- data/lib/HDLRuby/low_samples/memory.yaml +678 -0
- data/lib/HDLRuby/low_samples/namespace_extractor.rb +23 -0
- data/lib/HDLRuby/low_samples/overload.yaml +226 -0
- data/lib/HDLRuby/low_samples/paper_after.yaml +431 -0
- data/lib/HDLRuby/low_samples/port_maker.rb +14 -0
- data/lib/HDLRuby/low_samples/ram.yaml +207 -0
- data/lib/HDLRuby/low_samples/registers.yaml +228 -0
- data/lib/HDLRuby/low_samples/rom.yaml +2950 -0
- data/lib/HDLRuby/low_samples/shift.yaml +230 -0
- data/lib/HDLRuby/low_samples/shift2.yaml +2095 -0
- data/lib/HDLRuby/low_samples/simple_instance.yaml +102 -0
- data/lib/HDLRuby/low_samples/test_all.sh +43 -0
- data/lib/HDLRuby/low_samples/typedef.yaml +115 -0
- data/lib/HDLRuby/low_samples/values.yaml +577 -0
- data/lib/HDLRuby/low_samples/variable_maker.rb +14 -0
- data/lib/HDLRuby/low_samples/vector.yaml +56 -0
- data/lib/HDLRuby/low_samples/with_seq.yaml +188 -0
- data/lib/HDLRuby/low_samples/yaml2hdr.rb +10 -0
- data/lib/HDLRuby/low_samples/yaml2vhd.rb +19 -0
- data/lib/HDLRuby/sim/Makefile +19 -0
- data/lib/HDLRuby/sim/hruby_sim.h +590 -0
- data/lib/HDLRuby/sim/hruby_sim_calc.c +2362 -0
- data/lib/HDLRuby/sim/hruby_sim_core.c +589 -0
- data/lib/HDLRuby/sim/hruby_sim_list.c +93 -0
- data/lib/HDLRuby/sim/hruby_sim_vizualize.c +91 -0
- data/lib/HDLRuby/sim/hruby_value_pool.c +64 -0
- data/lib/HDLRuby/std/channel.rb +354 -0
- data/lib/HDLRuby/std/clocks.rb +165 -0
- data/lib/HDLRuby/std/counters.rb +82 -0
- data/lib/HDLRuby/std/decoder.rb +214 -0
- data/lib/HDLRuby/std/fsm.rb +516 -0
- data/lib/HDLRuby/std/pipeline.rb +220 -0
- data/lib/HDLRuby/std/reconf.rb +309 -0
- data/lib/HDLRuby/test_hruby_bstr.rb +2259 -0
- data/lib/HDLRuby/test_hruby_high.rb +594 -0
- data/lib/HDLRuby/test_hruby_high_low.rb +99 -0
- data/lib/HDLRuby/test_hruby_low.rb +934 -0
- data/lib/HDLRuby/v_samples/adder.v +10 -0
- data/lib/HDLRuby/v_samples/dff.v +12 -0
- data/lib/HDLRuby/v_samples/ram.v +20 -0
- data/lib/HDLRuby/v_samples/rom.v +270 -0
- data/lib/HDLRuby/version.rb +3 -0
- data/lib/HDLRuby.rb +11 -0
- data/makedoc +1 -0
- data/metadata.yaml +4 -0
- metadata +299 -0
|
@@ -0,0 +1,146 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
|
|
3
|
+
configure_high
|
|
4
|
+
|
|
5
|
+
require 'HDLRuby/std/channel'
|
|
6
|
+
include HDLRuby::High::Std
|
|
7
|
+
|
|
8
|
+
# Some very complex system which sends 8 bit values.
|
|
9
|
+
system :systemA do |typ|
|
|
10
|
+
input :clk, :rst
|
|
11
|
+
typ :data
|
|
12
|
+
[7..0].inner :count
|
|
13
|
+
|
|
14
|
+
par(clk.posedge) do
|
|
15
|
+
hif data.can_write? do
|
|
16
|
+
# count <= mux(rst == 0, 0, count + 1)
|
|
17
|
+
count <= (rst == 0).mux(0, count + 1)
|
|
18
|
+
data <= count
|
|
19
|
+
end
|
|
20
|
+
end
|
|
21
|
+
end
|
|
22
|
+
|
|
23
|
+
|
|
24
|
+
# Another extremly complex system which recieves 8 bit values.
|
|
25
|
+
system :systemB do |typ|
|
|
26
|
+
input :clk
|
|
27
|
+
typ :data
|
|
28
|
+
output :result
|
|
29
|
+
|
|
30
|
+
par(clk.posedge) do
|
|
31
|
+
hif data.can_read? do
|
|
32
|
+
result <= mux(data == 0, 0, 1)
|
|
33
|
+
end
|
|
34
|
+
end
|
|
35
|
+
end
|
|
36
|
+
|
|
37
|
+
|
|
38
|
+
# A system connecting A to B directly.
|
|
39
|
+
system :directAB do
|
|
40
|
+
input :clk, :rst
|
|
41
|
+
output :result
|
|
42
|
+
|
|
43
|
+
[7..0].inner :a2b
|
|
44
|
+
|
|
45
|
+
systemA(:sysA,[7..0]).(clk: clk, data: a2b, rst: rst)
|
|
46
|
+
systemB(:sysB,[7..0]).(clk: clk, data: a2b, result: result)
|
|
47
|
+
end
|
|
48
|
+
|
|
49
|
+
# Instantiate it for checking.
|
|
50
|
+
directAB :directABI
|
|
51
|
+
|
|
52
|
+
# The type used for the buffered serialized communication.
|
|
53
|
+
channel :swriteT do
|
|
54
|
+
[7..0].output :data
|
|
55
|
+
output :ready
|
|
56
|
+
input :ack
|
|
57
|
+
end
|
|
58
|
+
swriteT.on_write! do |chan,stmnt|
|
|
59
|
+
hif chan.ready == 0 do
|
|
60
|
+
chan.ready <= 1
|
|
61
|
+
end
|
|
62
|
+
helse do
|
|
63
|
+
(chan.ready <= 0).hif(chan.ack == 1)
|
|
64
|
+
end
|
|
65
|
+
stmnt
|
|
66
|
+
end
|
|
67
|
+
swriteT.can_write! do |chan|
|
|
68
|
+
chan.ack == 1
|
|
69
|
+
end
|
|
70
|
+
channel :sreadT do
|
|
71
|
+
[7..0].input :data
|
|
72
|
+
input :ready
|
|
73
|
+
output :ack
|
|
74
|
+
end
|
|
75
|
+
sreadT.on_read! do |chan,ref,stmnt|
|
|
76
|
+
hif chan.ready == 1 & chan.ack == 0 do
|
|
77
|
+
chan.ack <= 1
|
|
78
|
+
ref <= chan.data
|
|
79
|
+
end
|
|
80
|
+
helse do
|
|
81
|
+
ack <= 0
|
|
82
|
+
end
|
|
83
|
+
stmnt
|
|
84
|
+
end
|
|
85
|
+
sreadT.can_read! do
|
|
86
|
+
ready == 1
|
|
87
|
+
end
|
|
88
|
+
|
|
89
|
+
# A system connecting A to B through a serial interface.
|
|
90
|
+
system :serialAB do
|
|
91
|
+
input :clk, :rst
|
|
92
|
+
output :result
|
|
93
|
+
|
|
94
|
+
swriteT :swrite # Channel for serial write
|
|
95
|
+
sreadT :sread # Channel for serial read
|
|
96
|
+
|
|
97
|
+
inner :sdat # Serial data line
|
|
98
|
+
inner :ctrl # Serial control line
|
|
99
|
+
inner :wr_cnt # Serial write counter
|
|
100
|
+
inner :rd_cnt # Serial read counter
|
|
101
|
+
|
|
102
|
+
# Handle the serial transmission writer side.
|
|
103
|
+
par(clk.posedge) do
|
|
104
|
+
hif (swrite.ready) {
|
|
105
|
+
wr_cnt <= 0
|
|
106
|
+
ctrl <= 1
|
|
107
|
+
swrite.ack <= 0
|
|
108
|
+
}
|
|
109
|
+
helsif (ctrl == 1) {
|
|
110
|
+
wr_scnt <= wr_scnt + 1
|
|
111
|
+
sdat <= swrite.data[wr_scnt]
|
|
112
|
+
hif (swrite.scnt == 7) {
|
|
113
|
+
ctrl <= 0
|
|
114
|
+
swrite.ack <= 1
|
|
115
|
+
}
|
|
116
|
+
}
|
|
117
|
+
end
|
|
118
|
+
|
|
119
|
+
# Handle the serial transmission reader side.
|
|
120
|
+
par(clk.negedge) do
|
|
121
|
+
hif (ctrl == 1) do
|
|
122
|
+
rd_scnt <= rd_scnt + 1
|
|
123
|
+
sread.data[rd_scnt] <= sdat
|
|
124
|
+
hif(rd_scnt == 7) do
|
|
125
|
+
sread.ready <= 1
|
|
126
|
+
rd_scnt = 0
|
|
127
|
+
end
|
|
128
|
+
end
|
|
129
|
+
hif(sread.ack) do
|
|
130
|
+
sread.ready <= 0
|
|
131
|
+
end
|
|
132
|
+
end
|
|
133
|
+
|
|
134
|
+
systemA(:sysA,bufT).(clk: clk, data: bufA, rst: rst)
|
|
135
|
+
systemB(:sysB,bufT).(clk: clk, data: bufB, result: result)
|
|
136
|
+
end
|
|
137
|
+
|
|
138
|
+
|
|
139
|
+
# Instantiate it for checking.
|
|
140
|
+
serialAB :serialABI
|
|
141
|
+
|
|
142
|
+
# Generate the low level representation.
|
|
143
|
+
low = serialABI.to_low
|
|
144
|
+
|
|
145
|
+
# Displays it
|
|
146
|
+
puts low.to_yaml
|
|
@@ -0,0 +1,21 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
|
|
3
|
+
configure_high
|
|
4
|
+
|
|
5
|
+
|
|
6
|
+
# A simple 16-bit adder
|
|
7
|
+
system :adder do
|
|
8
|
+
[15..0].input :x,:y
|
|
9
|
+
[16..0].output :s
|
|
10
|
+
|
|
11
|
+
s <= x + y
|
|
12
|
+
end
|
|
13
|
+
|
|
14
|
+
# Instantiate it for checking.
|
|
15
|
+
adder :adderI
|
|
16
|
+
|
|
17
|
+
# Generate the low level representation.
|
|
18
|
+
low = adderI.systemT.to_low
|
|
19
|
+
|
|
20
|
+
# Displays it
|
|
21
|
+
puts low.to_yaml
|
|
@@ -0,0 +1,25 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
|
|
3
|
+
configure_high
|
|
4
|
+
|
|
5
|
+
|
|
6
|
+
# A simple 16-bit adder
|
|
7
|
+
system :adder do
|
|
8
|
+
[15..0].input :x,:y
|
|
9
|
+
[16..0].output :s
|
|
10
|
+
|
|
11
|
+
s <= x + y
|
|
12
|
+
|
|
13
|
+
s = "tot"
|
|
14
|
+
|
|
15
|
+
S = "TT"
|
|
16
|
+
end
|
|
17
|
+
|
|
18
|
+
# Instantiate it for checking.
|
|
19
|
+
adder :adderI
|
|
20
|
+
|
|
21
|
+
# Generate the low level representation.
|
|
22
|
+
low = adderI.systemT.to_low
|
|
23
|
+
|
|
24
|
+
# Displays it
|
|
25
|
+
puts low.to_yaml
|
|
@@ -0,0 +1,33 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
|
|
3
|
+
configure_high
|
|
4
|
+
|
|
5
|
+
# An adder-suber
|
|
6
|
+
system :addsub do
|
|
7
|
+
input :opr
|
|
8
|
+
[15..0].input :x,:y
|
|
9
|
+
[16..0].output :s
|
|
10
|
+
|
|
11
|
+
# The only adder instance.
|
|
12
|
+
instance :add do
|
|
13
|
+
[15..0].input :x,:y
|
|
14
|
+
input :cin
|
|
15
|
+
[16..0].output :s
|
|
16
|
+
|
|
17
|
+
s <= x+y+cin
|
|
18
|
+
end
|
|
19
|
+
|
|
20
|
+
# Control part for choosing between add and sub.
|
|
21
|
+
hif(opr) { add.(x,~y,1,s) }
|
|
22
|
+
helse { add.(x,y,0,s) }
|
|
23
|
+
end
|
|
24
|
+
|
|
25
|
+
|
|
26
|
+
# Instantiate it for checking.
|
|
27
|
+
addsub :addsubI
|
|
28
|
+
|
|
29
|
+
# Generate the low level representation.
|
|
30
|
+
low = addsubI.systemT.to_low
|
|
31
|
+
|
|
32
|
+
# Displays it
|
|
33
|
+
puts low.to_yaml
|
|
@@ -0,0 +1,37 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
|
|
3
|
+
configure_high
|
|
4
|
+
|
|
5
|
+
# An extended adder-suber
|
|
6
|
+
system :addsub do
|
|
7
|
+
[1..0].input :opr
|
|
8
|
+
[15..0].input :x,:y
|
|
9
|
+
[16..0].output :s
|
|
10
|
+
|
|
11
|
+
# The only adder instance.
|
|
12
|
+
instance :add do
|
|
13
|
+
[15..0].input :x,:y
|
|
14
|
+
input :cin
|
|
15
|
+
[16..0].output :s
|
|
16
|
+
|
|
17
|
+
s <= x+y+cin
|
|
18
|
+
end
|
|
19
|
+
|
|
20
|
+
|
|
21
|
+
# Some computation.
|
|
22
|
+
hcase(opr)
|
|
23
|
+
hwhen(0) { add.(0,0,0,s) }
|
|
24
|
+
hwhen(1) { add.(x,y,0,s) }
|
|
25
|
+
hwhen(2) { add.(x,~y,1,s) }
|
|
26
|
+
helse { add.(0,~y,1,s) }
|
|
27
|
+
end
|
|
28
|
+
|
|
29
|
+
|
|
30
|
+
# Instantiate it for checking.
|
|
31
|
+
addsub :addsubI
|
|
32
|
+
|
|
33
|
+
# Generate the low level representation.
|
|
34
|
+
low = addsubI.systemT.to_low
|
|
35
|
+
|
|
36
|
+
# Displays it
|
|
37
|
+
puts low.to_yaml
|
|
@@ -0,0 +1,28 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
|
|
3
|
+
configure_high
|
|
4
|
+
|
|
5
|
+
|
|
6
|
+
require 'HDLRuby/std/counters'
|
|
7
|
+
include HDLRuby::High::Std
|
|
8
|
+
|
|
9
|
+
|
|
10
|
+
# A simple test of the after construct
|
|
11
|
+
system :with_after do
|
|
12
|
+
input :clk,:rst
|
|
13
|
+
output :timeout
|
|
14
|
+
|
|
15
|
+
par(clk.posedge,rst.posedge) do
|
|
16
|
+
timeout <= 0
|
|
17
|
+
after(100,rst) { timeout <= 1 }
|
|
18
|
+
end
|
|
19
|
+
end
|
|
20
|
+
|
|
21
|
+
# Instantiate it for checking.
|
|
22
|
+
with_after :with_afterI
|
|
23
|
+
|
|
24
|
+
# Generate the low level representation.
|
|
25
|
+
low = with_afterI.systemT.to_low
|
|
26
|
+
|
|
27
|
+
# Displays it
|
|
28
|
+
puts low.to_yaml
|
|
@@ -0,0 +1,29 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
|
|
3
|
+
configure_high
|
|
4
|
+
|
|
5
|
+
|
|
6
|
+
# A simple 16-bit adder
|
|
7
|
+
system :adder do
|
|
8
|
+
[15..0].input :x,:y
|
|
9
|
+
[16..0].output :s
|
|
10
|
+
|
|
11
|
+
s <= x + y
|
|
12
|
+
|
|
13
|
+
cur_system.open do
|
|
14
|
+
puts "Inputs: ", cur_system.get_all_inputs
|
|
15
|
+
puts "Outputs: ", cur_system.get_all_outputs
|
|
16
|
+
puts "InOuts: ", cur_system.get_all_inouts
|
|
17
|
+
puts "Signals: ", cur_system.get_all_signals
|
|
18
|
+
end
|
|
19
|
+
end
|
|
20
|
+
|
|
21
|
+
|
|
22
|
+
# Instantiate it for checking.
|
|
23
|
+
adder :adderI
|
|
24
|
+
#
|
|
25
|
+
# # Generate the low level representation.
|
|
26
|
+
# low = adderI.to_low
|
|
27
|
+
#
|
|
28
|
+
# # Displays it
|
|
29
|
+
# puts low.to_yaml
|
|
@@ -0,0 +1,61 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
|
|
3
|
+
configure_high
|
|
4
|
+
|
|
5
|
+
|
|
6
|
+
# A simple ALU
|
|
7
|
+
system :alu do
|
|
8
|
+
[4].input :opr
|
|
9
|
+
[16].input :x,:y
|
|
10
|
+
[16].output :s
|
|
11
|
+
output :zf, :cf, :sf, :vf
|
|
12
|
+
|
|
13
|
+
# The only adder instance.
|
|
14
|
+
instance :add do
|
|
15
|
+
[16].input :x,:y
|
|
16
|
+
input :cin
|
|
17
|
+
[17].output :s
|
|
18
|
+
|
|
19
|
+
s <= x+y+cin
|
|
20
|
+
end
|
|
21
|
+
|
|
22
|
+
# The control part for choosing between 0, add, sub and neg.
|
|
23
|
+
par do
|
|
24
|
+
# The main computation: s and cf
|
|
25
|
+
# Default connections
|
|
26
|
+
cf <= 0
|
|
27
|
+
vf <= 0
|
|
28
|
+
add.(0,0,0)
|
|
29
|
+
# Depending on the operator
|
|
30
|
+
hcase(opr)
|
|
31
|
+
hwhen(1) { s <= x }
|
|
32
|
+
hwhen(2) { s <= y }
|
|
33
|
+
hwhen(3) { add.(x ,y ,0,[cf,s])
|
|
34
|
+
vf <= (~x[15] & ~y[15] & s[15]) | (x[15] & y[15] & ~s[15]) }
|
|
35
|
+
hwhen(4) { add.(x ,~y,1,[cf,s])
|
|
36
|
+
vf <= (~x[15] & y[15] & s[15]) | (x[15] & ~y[15] & ~s[15]) }
|
|
37
|
+
hwhen(5) { add.(0 ,~y,1,[cf,s])
|
|
38
|
+
vf <= (~y[15] & s[15]) }
|
|
39
|
+
hwhen(6) { add.(~x,0 ,1,[cf,s])
|
|
40
|
+
vf <= (x[15] & ~s[15]) }
|
|
41
|
+
hwhen(7) { s <= x & y }
|
|
42
|
+
hwhen(8) { s <= x | y }
|
|
43
|
+
hwhen(9) { s <= x ^ y }
|
|
44
|
+
hwhen(10){ s <= ~x }
|
|
45
|
+
hwhen(11){ s <= ~y }
|
|
46
|
+
helse { s <= 0 }
|
|
47
|
+
|
|
48
|
+
# The remaining flags.
|
|
49
|
+
zf <= (s == 0)
|
|
50
|
+
sf <= s[15]
|
|
51
|
+
end
|
|
52
|
+
end
|
|
53
|
+
|
|
54
|
+
# Instantiate it for checking.
|
|
55
|
+
alu :aluI
|
|
56
|
+
|
|
57
|
+
# Generate the low level representation.
|
|
58
|
+
low = aluI.systemT.to_low
|
|
59
|
+
|
|
60
|
+
# Displays it
|
|
61
|
+
puts low.to_yaml
|
|
@@ -0,0 +1,41 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
|
|
3
|
+
configure_high
|
|
4
|
+
|
|
5
|
+
|
|
6
|
+
# A 32-bit or made of two 16-bit ones declared with anonymous system.
|
|
7
|
+
system :or32 do
|
|
8
|
+
[31..0].input :x,:y
|
|
9
|
+
[32..0].output :s
|
|
10
|
+
|
|
11
|
+
instance :or0 do
|
|
12
|
+
[15..0].input :x,:y
|
|
13
|
+
[16..0].output :s
|
|
14
|
+
|
|
15
|
+
s <= x | y
|
|
16
|
+
end
|
|
17
|
+
|
|
18
|
+
instance :or1 do
|
|
19
|
+
[15..0].input :x,:y
|
|
20
|
+
[16..0].output :s
|
|
21
|
+
|
|
22
|
+
s <= x | y
|
|
23
|
+
end
|
|
24
|
+
|
|
25
|
+
or0.x <= x[15..0]
|
|
26
|
+
or0.y <= y[15..0]
|
|
27
|
+
s[15..0] <= or0.s[15..0]
|
|
28
|
+
|
|
29
|
+
or1.x <= x[31..16]
|
|
30
|
+
or1.y <= y[31..16]
|
|
31
|
+
s[31..16] <= or0.s[31..16]
|
|
32
|
+
end
|
|
33
|
+
|
|
34
|
+
# Instantiate it for checking.
|
|
35
|
+
or32 :or32I
|
|
36
|
+
|
|
37
|
+
# Generate the low level representation.
|
|
38
|
+
low = or32I.systemT.to_low
|
|
39
|
+
|
|
40
|
+
# Displays it
|
|
41
|
+
puts low.to_yaml
|
|
@@ -0,0 +1,28 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
|
|
3
|
+
configure_high
|
|
4
|
+
|
|
5
|
+
|
|
6
|
+
require 'HDLRuby/std/counters'
|
|
7
|
+
include HDLRuby::High::Std
|
|
8
|
+
|
|
9
|
+
|
|
10
|
+
# A simple test of the before construct
|
|
11
|
+
system :with_before do
|
|
12
|
+
input :clk,:rst
|
|
13
|
+
output :timeout
|
|
14
|
+
|
|
15
|
+
par(clk.posedge,rst.posedge) do
|
|
16
|
+
timeout <= 1
|
|
17
|
+
before(100,rst) { timeout <= 0 }
|
|
18
|
+
end
|
|
19
|
+
end
|
|
20
|
+
|
|
21
|
+
# Instantiate it for checking.
|
|
22
|
+
with_before :with_beforeI
|
|
23
|
+
|
|
24
|
+
# Generate the low level representation.
|
|
25
|
+
low = with_beforeI.systemT.to_low
|
|
26
|
+
|
|
27
|
+
# Displays it
|
|
28
|
+
puts low.to_yaml
|
|
@@ -0,0 +1,26 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
|
|
3
|
+
configure_high
|
|
4
|
+
|
|
5
|
+
# System with blocks in blocks.
|
|
6
|
+
system :blockblock do
|
|
7
|
+
input :i0,:i1
|
|
8
|
+
output :o0,:o1
|
|
9
|
+
inner :s0
|
|
10
|
+
|
|
11
|
+
par do
|
|
12
|
+
inner :s0
|
|
13
|
+
sub do
|
|
14
|
+
inner :s0
|
|
15
|
+
end
|
|
16
|
+
end
|
|
17
|
+
end
|
|
18
|
+
|
|
19
|
+
# Instantiate it for checking.
|
|
20
|
+
blockblock :blockblockI
|
|
21
|
+
|
|
22
|
+
# Generate the low level representation.
|
|
23
|
+
low = blockblockI.systemT.to_low
|
|
24
|
+
|
|
25
|
+
# Displays it
|
|
26
|
+
puts low.to_yaml
|
|
@@ -0,0 +1,22 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
configure_high
|
|
3
|
+
|
|
4
|
+
system :dadz do
|
|
5
|
+
input :clk,:res
|
|
6
|
+
signed[31..0].input :a
|
|
7
|
+
signed[31..0].output :dadz
|
|
8
|
+
signed[63..0].inner :tmp_dadz
|
|
9
|
+
|
|
10
|
+
par(clk.posedge,res.posedge)do
|
|
11
|
+
hif(res==_1)do
|
|
12
|
+
tmp_dadz<=0
|
|
13
|
+
end
|
|
14
|
+
helse do
|
|
15
|
+
tmp_dadz<=(_00000001000000000000000000000000-a)*a
|
|
16
|
+
end
|
|
17
|
+
end
|
|
18
|
+
dadz<=tmp_dadz[55..24]
|
|
19
|
+
end
|
|
20
|
+
|
|
21
|
+
dadz :dadzI
|
|
22
|
+
puts dadzI.to_low.to_yaml
|
|
@@ -0,0 +1,20 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
configure_high
|
|
3
|
+
|
|
4
|
+
#インスタンス化
|
|
5
|
+
system :top do
|
|
6
|
+
input :a,:b
|
|
7
|
+
output :c,:d
|
|
8
|
+
andgate(:i0).( a: a, b: b, y: d )
|
|
9
|
+
andgate(:i1).( c, a , b )
|
|
10
|
+
end
|
|
11
|
+
|
|
12
|
+
system :andgate do
|
|
13
|
+
input :a,:b
|
|
14
|
+
output :y
|
|
15
|
+
y <= a & b
|
|
16
|
+
end
|
|
17
|
+
|
|
18
|
+
top :topI
|
|
19
|
+
|
|
20
|
+
puts topI.to_low.to_yaml
|
|
@@ -0,0 +1,22 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
configure_high
|
|
3
|
+
|
|
4
|
+
system :updown_cnt do
|
|
5
|
+
|
|
6
|
+
input :ck,:res,:down
|
|
7
|
+
[3..0].output :q
|
|
8
|
+
[3..0].inner :q
|
|
9
|
+
|
|
10
|
+
hif (res) do
|
|
11
|
+
q<=_b4h0
|
|
12
|
+
end
|
|
13
|
+
helsif(down) do
|
|
14
|
+
q<=q-_b4h1
|
|
15
|
+
end
|
|
16
|
+
helse do
|
|
17
|
+
q<=q+_b4h1
|
|
18
|
+
end
|
|
19
|
+
end
|
|
20
|
+
|
|
21
|
+
updown_cnt :updown_cntI
|
|
22
|
+
puts updown_cntI.to_low.to_yaml
|
|
@@ -0,0 +1,57 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
configure_high
|
|
3
|
+
|
|
4
|
+
#電子サイコロ
|
|
5
|
+
system :saikoro do
|
|
6
|
+
|
|
7
|
+
input :ck,:reset,:enable
|
|
8
|
+
[6..0].output :lamp
|
|
9
|
+
[2..0].inner :cnt
|
|
10
|
+
|
|
11
|
+
#1始まりの6進カウンタ
|
|
12
|
+
par(ck.posedge,reset.posedge) do
|
|
13
|
+
hif(reset==_b1b1) do
|
|
14
|
+
cnt<=_b3h1
|
|
15
|
+
end
|
|
16
|
+
helsif(enable==_b1b1) do
|
|
17
|
+
hif(cnt<=_b3h6) do
|
|
18
|
+
cnt<=_b3h1
|
|
19
|
+
end
|
|
20
|
+
helse do
|
|
21
|
+
cnt<=cnt+_b3h1
|
|
22
|
+
end
|
|
23
|
+
end
|
|
24
|
+
end
|
|
25
|
+
|
|
26
|
+
# [6..0].function :dec
|
|
27
|
+
# [2..0].input :din
|
|
28
|
+
par do
|
|
29
|
+
hcase(cnt)
|
|
30
|
+
hwhen _b3h1 do
|
|
31
|
+
lamp <= _b7b0001000
|
|
32
|
+
end
|
|
33
|
+
hwhen _b3h2 do
|
|
34
|
+
lamp <= _b7b1000001
|
|
35
|
+
end
|
|
36
|
+
hwhen _b3h3 do
|
|
37
|
+
lamp <= _b7b0011100
|
|
38
|
+
end
|
|
39
|
+
hwhen _b3h4 do
|
|
40
|
+
lamp <= _b7b1010101
|
|
41
|
+
end
|
|
42
|
+
hwhen _b3h5 do
|
|
43
|
+
lamp <= _b7b1011101
|
|
44
|
+
end
|
|
45
|
+
hwhen _b3h6 do
|
|
46
|
+
lamp <= _b7b1110111
|
|
47
|
+
end
|
|
48
|
+
helse do
|
|
49
|
+
lamp <= _b7bxxxxxxx
|
|
50
|
+
end
|
|
51
|
+
end
|
|
52
|
+
|
|
53
|
+
# lamp<=dec(cnt)
|
|
54
|
+
end
|
|
55
|
+
|
|
56
|
+
saikoro :saikoroI
|
|
57
|
+
puts saikoroI.to_low.to_yaml
|
|
@@ -0,0 +1,52 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
configure_high
|
|
3
|
+
|
|
4
|
+
#組み合わせ回路
|
|
5
|
+
system :led7seg do
|
|
6
|
+
[3..0].input :in0
|
|
7
|
+
[6..0].output :out
|
|
8
|
+
[6..0].inner :out
|
|
9
|
+
|
|
10
|
+
par do
|
|
11
|
+
hcase(in0)
|
|
12
|
+
hwhen 0 do
|
|
13
|
+
out <= _b7b0111111
|
|
14
|
+
end
|
|
15
|
+
hwhen 1 do
|
|
16
|
+
out <= _b7b0000110
|
|
17
|
+
end
|
|
18
|
+
hwhen 2 do
|
|
19
|
+
out <= _b7b1011011
|
|
20
|
+
end
|
|
21
|
+
hwhen 3 do
|
|
22
|
+
out <= _b7b1001111
|
|
23
|
+
end
|
|
24
|
+
hwhen 4 do
|
|
25
|
+
out <= _b7b1100110
|
|
26
|
+
end
|
|
27
|
+
hwhen 5 do
|
|
28
|
+
out <= _b7b1111101
|
|
29
|
+
end
|
|
30
|
+
hwhen 6 do
|
|
31
|
+
out <= _b7b1111101
|
|
32
|
+
end
|
|
33
|
+
hwhen 7 do
|
|
34
|
+
out <= _b7b0000111
|
|
35
|
+
end
|
|
36
|
+
hwhen 8 do
|
|
37
|
+
out <= _b7b1111111
|
|
38
|
+
end
|
|
39
|
+
hwhen 9 do
|
|
40
|
+
out <= _b7b1100111
|
|
41
|
+
end
|
|
42
|
+
helse do
|
|
43
|
+
out <= 0
|
|
44
|
+
end
|
|
45
|
+
|
|
46
|
+
|
|
47
|
+
end
|
|
48
|
+
end
|
|
49
|
+
|
|
50
|
+
led7seg :led7segI
|
|
51
|
+
|
|
52
|
+
puts led7segI.to_low.to_yaml
|
|
@@ -0,0 +1,18 @@
|
|
|
1
|
+
require 'HDLRuby'
|
|
2
|
+
configure_high
|
|
3
|
+
|
|
4
|
+
system :deconder do
|
|
5
|
+
|
|
6
|
+
[7..0].input :address
|
|
7
|
+
[1..0].output :ce
|
|
8
|
+
|
|
9
|
+
# bit[1..0].inner :ce
|
|
10
|
+
|
|
11
|
+
ce[0]<= (address[7..0]==_b8h0)
|
|
12
|
+
ce[1]<= (address[7..0]==_b8h1)
|
|
13
|
+
|
|
14
|
+
end
|
|
15
|
+
|
|
16
|
+
deconder :deconderI
|
|
17
|
+
|
|
18
|
+
puts deconderI.to_low.to_yaml
|