udb 0.1.16 → 0.1.17
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- checksums.yaml +4 -4
- data/.data/cfgs/example_rv64_with_overlay.yaml +20 -0
- data/.data/cfgs/mc100-32-full-example.yaml +6 -0
- data/.data/cfgs/qc_iu.yaml +14 -0
- data/.data/cfgs/rv32-riscv-tests.yaml +9 -0
- data/.data/cfgs/rv32-vector.yaml +10 -1
- data/.data/cfgs/rv64-riscv-tests.yaml +9 -0
- data/.data/cfgs/rv64-vector.yaml +11 -2
- data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.mva01s.yaml +2 -2
- data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.mvsa01.yaml +2 -2
- data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.pop.yaml +2 -2
- data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.popret.yaml +2 -2
- data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.popretz.yaml +2 -2
- data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.push.yaml +2 -2
- data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.pushfp.yaml +2 -2
- data/.data/spec/schemas/README.adoc +4 -1
- data/.data/spec/schemas/csr_schema.json +2 -2
- data/.data/spec/std/isa/csr/H/hgeie.yaml +38 -0
- data/.data/spec/std/isa/csr/H/hgeip.yaml +33 -0
- data/.data/spec/std/isa/csr/H/hideleg.yaml +120 -0
- data/.data/spec/std/isa/csr/H/hie.yaml +74 -0
- data/.data/spec/std/isa/csr/H/hip.yaml +88 -0
- data/.data/spec/std/isa/csr/H/hvip.yaml +46 -0
- data/.data/spec/std/isa/csr/H/vsie.yaml +86 -0
- data/.data/spec/std/isa/csr/H/vsip.yaml +98 -0
- data/.data/spec/std/isa/csr/H/vsscratch.yaml +29 -0
- data/.data/spec/std/isa/csr/I/pmpaddr0.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr1.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr10.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr11.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr12.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr13.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr14.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr15.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr16.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr17.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr18.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr19.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr2.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr20.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr21.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr22.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr23.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr24.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr25.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr26.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr27.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr28.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr29.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr3.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr30.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr31.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr32.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr33.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr34.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr35.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr36.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr37.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr38.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr39.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr4.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr40.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr41.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr42.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr43.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr44.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr45.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr46.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr47.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr48.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr49.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr5.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr50.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr51.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr52.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr53.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr54.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr55.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr56.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr57.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr58.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr59.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr6.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr60.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr61.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr62.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr63.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr7.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr8.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr9.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddrN.layout +7 -7
- data/.data/spec/std/isa/csr/Smcsrind/mireg.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/mireg2.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/mireg3.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/mireg4.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/mireg5.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/mireg6.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/sireg.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/sireg2.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/sireg3.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/sireg4.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/sireg5.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/sireg6.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/vsireg.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/vsireg2.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/vsireg3.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/vsireg4.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/vsireg5.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/vsireg6.yaml +2 -2
- data/.data/spec/std/isa/csr/Smctr/sctrctl.yaml +1 -1
- data/.data/spec/std/isa/csr/Smctr/sctrdepth.yaml +43 -0
- data/.data/spec/std/isa/csr/Smctr/sctrstatus.yaml +37 -0
- data/.data/spec/std/isa/csr/Smctr/vsctrctl.yaml +3 -1
- data/.data/spec/std/isa/csr/Sstc/stimecmp.yaml +42 -0
- data/.data/spec/std/isa/csr/Sstc/stimecmph.yaml +43 -0
- data/.data/spec/std/isa/csr/Sstc/vstimecmp.yaml +45 -0
- data/.data/spec/std/isa/csr/Sstc/vstimecmph.yaml +46 -0
- data/.data/spec/std/isa/csr/V/vcsr.yaml +1 -1
- data/.data/spec/std/isa/csr/V/vl.yaml +1 -1
- data/.data/spec/std/isa/csr/V/vlenb.yaml +1 -1
- data/.data/spec/std/isa/csr/V/vstart.yaml +1 -1
- data/.data/spec/std/isa/csr/V/vtype.yaml +20 -1
- data/.data/spec/std/isa/csr/V/vxrm.yaml +1 -1
- data/.data/spec/std/isa/csr/V/vxsat.yaml +1 -1
- data/.data/spec/std/isa/csr/Zicntr/mcountinhibit.layout +1 -15
- data/.data/spec/std/isa/csr/Zicntr/mcountinhibit.yaml +29 -267
- data/.data/spec/std/isa/csr/mideleg.yaml +57 -9
- data/.data/spec/std/isa/csr/mie.yaml +18 -9
- data/.data/spec/std/isa/csr/mip.yaml +21 -10
- data/.data/spec/std/isa/csr/misa.yaml +11 -7
- data/.data/spec/std/isa/csr/mstatus.yaml +2 -2
- data/.data/spec/std/isa/csr/schema.adoc +10 -4
- data/.data/spec/std/isa/csr/senvcfg.yaml +6 -12
- data/.data/spec/std/isa/csr/sstateen0.yaml +1 -1
- data/.data/spec/std/isa/csr/sstateen1.yaml +2 -3
- data/.data/spec/std/isa/csr/sstateen2.yaml +2 -3
- data/.data/spec/std/isa/csr/sstateen3.yaml +2 -3
- data/.data/spec/std/isa/csr/tcontrol.yaml +37 -0
- data/.data/spec/std/isa/csr/tinfo.yaml +44 -0
- data/.data/spec/std/isa/ext/Smctr.yaml +1 -1
- data/.data/spec/std/isa/ext/Ssctr.yaml +1 -1
- data/.data/spec/std/isa/ext/Ssstrict.yaml +2 -2
- data/.data/spec/std/isa/ext/Sv32.yaml +2 -2
- data/.data/spec/std/isa/ext/Svpbmt.yaml +2 -2
- data/.data/spec/std/isa/ext/Zaamo.yaml +1 -1
- data/.data/spec/std/isa/ext/Zbc.yaml +4 -0
- data/.data/spec/std/isa/ext/Zvfbfa.yaml +24 -0
- data/.data/spec/std/isa/ext/Zvfofp4min.yaml +21 -0
- data/.data/spec/std/isa/ext/Zvfofp8min.yaml +20 -0
- data/.data/spec/std/isa/inst/B/andn.yaml +0 -4
- data/.data/spec/std/isa/inst/B/orn.yaml +0 -4
- data/.data/spec/std/isa/inst/B/rev8.yaml +0 -4
- data/.data/spec/std/isa/inst/B/rol.yaml +0 -4
- data/.data/spec/std/isa/inst/B/rolw.yaml +0 -4
- data/.data/spec/std/isa/inst/B/ror.yaml +0 -4
- data/.data/spec/std/isa/inst/B/rori.yaml +0 -4
- data/.data/spec/std/isa/inst/B/roriw.yaml +0 -4
- data/.data/spec/std/isa/inst/B/rorw.yaml +0 -4
- data/.data/spec/std/isa/inst/B/xnor.yaml +0 -4
- data/.data/spec/std/isa/inst/C/c.addi.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.addi16sp.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.addi4spn.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.addiw.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.beqz.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.bnez.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.ebreak.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.j.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.jal.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.jalr.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.jr.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.ld.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.ldsp.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.li.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.lui.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.lw.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.lwsp.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.mv.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.nop.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.sd.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.sdsp.yaml +5 -5
- data/.data/spec/std/isa/inst/C/c.sw.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.swsp.yaml +2 -2
- data/.data/spec/std/isa/inst/I/ld.yaml +9 -4
- data/.data/spec/std/isa/inst/I/sd.yaml +9 -4
- data/.data/spec/std/isa/inst/I/wfi.yaml +1 -1
- data/.data/spec/std/isa/inst/M/div.yaml +2 -2
- data/.data/spec/std/isa/inst/M/divu.yaml +2 -2
- data/.data/spec/std/isa/inst/M/divuw.yaml +2 -2
- data/.data/spec/std/isa/inst/M/divw.yaml +2 -2
- data/.data/spec/std/isa/inst/M/mul.yaml +0 -4
- data/.data/spec/std/isa/inst/M/mulh.yaml +0 -4
- data/.data/spec/std/isa/inst/M/mulhsu.yaml +0 -4
- data/.data/spec/std/isa/inst/M/mulhu.yaml +0 -4
- data/.data/spec/std/isa/inst/M/mulw.yaml +0 -4
- data/.data/spec/std/isa/inst/M/rem.yaml +2 -2
- data/.data/spec/std/isa/inst/M/remu.yaml +2 -2
- data/.data/spec/std/isa/inst/M/remuw.yaml +2 -2
- data/.data/spec/std/isa/inst/M/remw.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vfadd.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfadd.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfclass.v.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmacc.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmacc.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmadd.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmadd.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmax.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmax.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmerge.vfm.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmin.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmin.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmsac.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmsac.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmsub.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmsub.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmul.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmul.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmv.f.s.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmv.s.f.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmv.v.f.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfncvt.f.f.w.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfncvt.rod.f.f.w.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfncvt.rtz.x.f.w.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfncvt.rtz.xu.f.w.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfncvt.x.f.w.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfncvt.xu.f.w.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfnmacc.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfnmacc.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfnmadd.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfnmadd.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfnmsac.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfnmsac.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfnmsub.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfnmsub.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfrec7.v.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfrsqrt7.v.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfrsub.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfsgnj.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfsgnj.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfsgnjn.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfsgnjn.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfsgnjx.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfsgnjx.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfslide1down.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfslide1up.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfsub.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfsub.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwadd.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwadd.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwadd.wf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwadd.wv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwcvt.f.f.v.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwcvt.f.x.v.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwcvt.f.xu.v.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwmacc.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwmacc.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwmsac.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwmsac.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwmul.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwmul.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwnmacc.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwnmacc.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwnmsac.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwnmsac.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwsub.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwsub.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwsub.wf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwsub.wv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vmfeq.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vmfeq.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vmfge.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vmfgt.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vmfle.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vmfle.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vmflt.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vmflt.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vmfne.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vmfne.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/Zaamo/amoadd.SIZE.AQRL.layout +1 -5
- data/.data/spec/std/isa/inst/Zaamo/amoadd.d.aq.yaml +0 -4
- data/.data/spec/std/isa/inst/Zaamo/amoadd.d.aqrl.yaml +0 -4
- data/.data/spec/std/isa/inst/Zaamo/amoadd.d.rl.yaml +0 -4
- data/.data/spec/std/isa/inst/Zaamo/amoadd.d.yaml +0 -4
- data/.data/spec/std/isa/inst/Zaamo/amoadd.w.aq.yaml +1 -5
- data/.data/spec/std/isa/inst/Zaamo/amoadd.w.aqrl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zaamo/amoadd.w.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zaamo/amoadd.w.yaml +1 -5
- data/.data/spec/std/isa/inst/Zaamo/amoand.SIZE.AQRL.layout +1 -5
- data/.data/spec/std/isa/inst/Zaamo/amoand.d.aq.yaml +0 -4
- data/.data/spec/std/isa/inst/Zaamo/amoand.d.aqrl.yaml +0 -4
- data/.data/spec/std/isa/inst/Zaamo/amoand.d.rl.yaml +0 -4
- data/.data/spec/std/isa/inst/Zaamo/amoand.d.yaml +0 -4
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- data/.data/spec/std/isa/param/MCOUNTENABLE_EN.yaml +2 -5
- data/.data/spec/std/isa/param/MEI_INTR_IMPL.yaml +28 -0
- data/.data/spec/std/isa/param/MSI_INTR_IMPL.yaml +28 -0
- data/.data/spec/std/isa/param/MSTATUS_FS_LEGAL_VALUES.yaml +8 -15
- data/.data/spec/std/isa/param/MSTATUS_VS_LEGAL_VALUES.yaml +7 -15
- data/.data/spec/std/isa/param/MTI_INTR_IMPL.yaml +28 -0
- data/.data/spec/std/isa/param/MTVAL_WIDTH.yaml +17 -5
- data/.data/spec/std/isa/param/MUTABLE_MISA_A.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_B.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_C.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_D.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_F.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_M.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_Q.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_U.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_V.yaml +1 -1
- data/.data/spec/std/isa/param/{PMLEN.yaml → NON_STANDARD_EXTENSION_IMPLEMENTED.yaml} +6 -9
- data/.data/spec/std/isa/param/NUM_EXTERNAL_GUEST_INTERRUPTS.yaml +1 -1
- data/.data/spec/std/isa/param/NUM_PMP_ENTRIES.yaml +1 -1
- data/.data/spec/std/isa/param/REPORT_CAUSE_IN_MTVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml +1 -1
- data/.data/spec/std/isa/param/REPORT_CAUSE_IN_STVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml +1 -1
- data/.data/spec/std/isa/param/REPORT_CAUSE_IN_VSTVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml +1 -1
- data/.data/spec/std/isa/param/SCOUNTENABLE_EN.yaml +2 -6
- data/.data/spec/std/isa/param/SCTRDEPTH_DEPTH_LEGAL_VALUES.yaml +27 -0
- data/.data/spec/std/isa/param/SEI_INTR_IMPL.yaml +28 -0
- data/.data/spec/std/isa/param/SSI_INTR_IMPL.yaml +28 -0
- data/.data/spec/std/isa/param/STI_INTR_IMPL.yaml +33 -0
- data/.data/spec/std/isa/param/STVAL_WIDTH.yaml +81 -0
- data/.data/spec/std/isa/param/SUPPORTED_PMLEN_SMMPM.yaml +40 -0
- data/.data/spec/std/isa/param/SUPPORTED_PMLEN_SMNPM.yaml +42 -0
- data/.data/spec/std/isa/param/SUPPORTED_PMLEN_SSNPM.yaml +42 -0
- data/.data/spec/std/isa/param/TRAP_ON_ECALL_FROM_S.yaml +1 -1
- data/.data/spec/std/isa/param/TRAP_ON_ECALL_FROM_U.yaml +1 -1
- data/.data/spec/std/isa/param/TRAP_ON_ECALL_FROM_VS.yaml +1 -1
- data/.data/spec/std/isa/param/TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY.yaml +1 -1
- data/.data/spec/std/isa/param/VSEI_INTR_IMPL.yaml +28 -0
- data/.data/spec/std/isa/param/VSSI_INTR_IMPL.yaml +28 -0
- data/.data/spec/std/isa/param/VSTI_INTR_IMPL.yaml +33 -0
- data/.data/spec/std/isa/param/WFI_FINITE.yaml +20 -0
- data/.data/spec/std/isa/param/WFI_U_MODE.yaml +20 -0
- data/lib/udb/Z3_VERSION +1 -1
- data/lib/udb/log.rb +16 -0
- data/lib/udb/obj/csr.rb +38 -45
- data/lib/udb/obj/database_obj.rb +1 -1
- data/lib/udb/obj/exception_code.rb +3 -3
- data/lib/udb/version.rb +1 -1
- metadata +79 -10
|
@@ -48,16 +48,16 @@ fields:
|
|
|
48
48
|
return csr_value.ADDR;
|
|
49
49
|
}
|
|
50
50
|
sw_read(): |
|
|
51
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-
# when the mode is NAPOT and PMP_GRANULARITY >=
|
|
51
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+
# when the mode is NAPOT and PMP_GRANULARITY >= 4,
|
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52
52
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# bits (PMP_GRANULARITY-4):0 must read as ones
|
|
53
53
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if (MXLEN == 32) {
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54
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-
if ((PMP_GRANULARITY >=
|
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54
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+
if ((PMP_GRANULARITY >= 4) &&
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55
55
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(CSR[pmpcfg1].pmp5cfg[4] == 1)) {
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56
56
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return CSR[pmpaddr5].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
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57
57
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|
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58
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-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
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+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
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59
59
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# bits (PMP_GRANULARITY-3):0 must read as zeros
|
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60
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-
} else if ((PMP_GRANULARITY >=
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60
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+
} else if ((PMP_GRANULARITY >= 3) &&
|
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61
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(CSR[pmpcfg1].pmp5cfg[4] == 0)) {
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Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
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return CSR[pmpaddr5].ADDR & ~mask;
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@@ -67,13 +67,13 @@ sw_read(): |
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67
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return CSR[pmpaddr5].ADDR;
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}
|
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69
69
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} else {
|
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70
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-
if ((PMP_GRANULARITY >=
|
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70
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+
if ((PMP_GRANULARITY >= 4) &&
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71
71
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(CSR[pmpcfg0].pmp5cfg[4] == 1)) {
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72
72
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return CSR[pmpaddr5].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
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73
73
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|
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74
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-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
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74
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+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
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|
75
75
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# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
76
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-
} else if ((PMP_GRANULARITY >=
|
|
76
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+
} else if ((PMP_GRANULARITY >= 3) &&
|
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77
77
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(CSR[pmpcfg0].pmp5cfg[4] == 0)) {
|
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78
78
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Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
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return CSR[pmpaddr5].ADDR & ~mask;
|
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@@ -48,16 +48,16 @@ fields:
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48
48
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return csr_value.ADDR;
|
|
49
49
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}
|
|
50
50
|
sw_read(): |
|
|
51
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-
# when the mode is NAPOT and PMP_GRANULARITY >=
|
|
51
|
+
# when the mode is NAPOT and PMP_GRANULARITY >= 4,
|
|
52
52
|
# bits (PMP_GRANULARITY-4):0 must read as ones
|
|
53
53
|
if (MXLEN == 32) {
|
|
54
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-
if ((PMP_GRANULARITY >=
|
|
54
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
55
55
|
(CSR[pmpcfg12].pmp50cfg[4] == 1)) {
|
|
56
56
|
return CSR[pmpaddr50].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
57
57
|
|
|
58
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
58
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
59
59
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
60
|
-
} else if ((PMP_GRANULARITY >=
|
|
60
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
61
61
|
(CSR[pmpcfg12].pmp50cfg[4] == 0)) {
|
|
62
62
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
63
63
|
return CSR[pmpaddr50].ADDR & ~mask;
|
|
@@ -67,13 +67,13 @@ sw_read(): |
|
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67
67
|
return CSR[pmpaddr50].ADDR;
|
|
68
68
|
}
|
|
69
69
|
} else {
|
|
70
|
-
if ((PMP_GRANULARITY >=
|
|
70
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
71
71
|
(CSR[pmpcfg12].pmp50cfg[4] == 1)) {
|
|
72
72
|
return CSR[pmpaddr50].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
73
73
|
|
|
74
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
74
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
75
75
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
76
|
-
} else if ((PMP_GRANULARITY >=
|
|
76
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
77
77
|
(CSR[pmpcfg12].pmp50cfg[4] == 0)) {
|
|
78
78
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
79
79
|
return CSR[pmpaddr50].ADDR & ~mask;
|
|
@@ -48,16 +48,16 @@ fields:
|
|
|
48
48
|
return csr_value.ADDR;
|
|
49
49
|
}
|
|
50
50
|
sw_read(): |
|
|
51
|
-
# when the mode is NAPOT and PMP_GRANULARITY >=
|
|
51
|
+
# when the mode is NAPOT and PMP_GRANULARITY >= 4,
|
|
52
52
|
# bits (PMP_GRANULARITY-4):0 must read as ones
|
|
53
53
|
if (MXLEN == 32) {
|
|
54
|
-
if ((PMP_GRANULARITY >=
|
|
54
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
55
55
|
(CSR[pmpcfg12].pmp51cfg[4] == 1)) {
|
|
56
56
|
return CSR[pmpaddr51].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
57
57
|
|
|
58
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
58
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
59
59
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
60
|
-
} else if ((PMP_GRANULARITY >=
|
|
60
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
61
61
|
(CSR[pmpcfg12].pmp51cfg[4] == 0)) {
|
|
62
62
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
63
63
|
return CSR[pmpaddr51].ADDR & ~mask;
|
|
@@ -67,13 +67,13 @@ sw_read(): |
|
|
|
67
67
|
return CSR[pmpaddr51].ADDR;
|
|
68
68
|
}
|
|
69
69
|
} else {
|
|
70
|
-
if ((PMP_GRANULARITY >=
|
|
70
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
71
71
|
(CSR[pmpcfg12].pmp51cfg[4] == 1)) {
|
|
72
72
|
return CSR[pmpaddr51].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
73
73
|
|
|
74
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
74
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
75
75
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
76
|
-
} else if ((PMP_GRANULARITY >=
|
|
76
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
77
77
|
(CSR[pmpcfg12].pmp51cfg[4] == 0)) {
|
|
78
78
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
79
79
|
return CSR[pmpaddr51].ADDR & ~mask;
|
|
@@ -48,16 +48,16 @@ fields:
|
|
|
48
48
|
return csr_value.ADDR;
|
|
49
49
|
}
|
|
50
50
|
sw_read(): |
|
|
51
|
-
# when the mode is NAPOT and PMP_GRANULARITY >=
|
|
51
|
+
# when the mode is NAPOT and PMP_GRANULARITY >= 4,
|
|
52
52
|
# bits (PMP_GRANULARITY-4):0 must read as ones
|
|
53
53
|
if (MXLEN == 32) {
|
|
54
|
-
if ((PMP_GRANULARITY >=
|
|
54
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
55
55
|
(CSR[pmpcfg13].pmp52cfg[4] == 1)) {
|
|
56
56
|
return CSR[pmpaddr52].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
57
57
|
|
|
58
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
58
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
59
59
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
60
|
-
} else if ((PMP_GRANULARITY >=
|
|
60
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
61
61
|
(CSR[pmpcfg13].pmp52cfg[4] == 0)) {
|
|
62
62
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
63
63
|
return CSR[pmpaddr52].ADDR & ~mask;
|
|
@@ -67,13 +67,13 @@ sw_read(): |
|
|
|
67
67
|
return CSR[pmpaddr52].ADDR;
|
|
68
68
|
}
|
|
69
69
|
} else {
|
|
70
|
-
if ((PMP_GRANULARITY >=
|
|
70
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
71
71
|
(CSR[pmpcfg12].pmp52cfg[4] == 1)) {
|
|
72
72
|
return CSR[pmpaddr52].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
73
73
|
|
|
74
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
74
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
75
75
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
76
|
-
} else if ((PMP_GRANULARITY >=
|
|
76
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
77
77
|
(CSR[pmpcfg12].pmp52cfg[4] == 0)) {
|
|
78
78
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
79
79
|
return CSR[pmpaddr52].ADDR & ~mask;
|
|
@@ -48,16 +48,16 @@ fields:
|
|
|
48
48
|
return csr_value.ADDR;
|
|
49
49
|
}
|
|
50
50
|
sw_read(): |
|
|
51
|
-
# when the mode is NAPOT and PMP_GRANULARITY >=
|
|
51
|
+
# when the mode is NAPOT and PMP_GRANULARITY >= 4,
|
|
52
52
|
# bits (PMP_GRANULARITY-4):0 must read as ones
|
|
53
53
|
if (MXLEN == 32) {
|
|
54
|
-
if ((PMP_GRANULARITY >=
|
|
54
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
55
55
|
(CSR[pmpcfg13].pmp53cfg[4] == 1)) {
|
|
56
56
|
return CSR[pmpaddr53].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
57
57
|
|
|
58
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
58
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
59
59
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
60
|
-
} else if ((PMP_GRANULARITY >=
|
|
60
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
61
61
|
(CSR[pmpcfg13].pmp53cfg[4] == 0)) {
|
|
62
62
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
63
63
|
return CSR[pmpaddr53].ADDR & ~mask;
|
|
@@ -67,13 +67,13 @@ sw_read(): |
|
|
|
67
67
|
return CSR[pmpaddr53].ADDR;
|
|
68
68
|
}
|
|
69
69
|
} else {
|
|
70
|
-
if ((PMP_GRANULARITY >=
|
|
70
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
71
71
|
(CSR[pmpcfg12].pmp53cfg[4] == 1)) {
|
|
72
72
|
return CSR[pmpaddr53].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
73
73
|
|
|
74
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
74
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
75
75
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
76
|
-
} else if ((PMP_GRANULARITY >=
|
|
76
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
77
77
|
(CSR[pmpcfg12].pmp53cfg[4] == 0)) {
|
|
78
78
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
79
79
|
return CSR[pmpaddr53].ADDR & ~mask;
|
|
@@ -48,16 +48,16 @@ fields:
|
|
|
48
48
|
return csr_value.ADDR;
|
|
49
49
|
}
|
|
50
50
|
sw_read(): |
|
|
51
|
-
# when the mode is NAPOT and PMP_GRANULARITY >=
|
|
51
|
+
# when the mode is NAPOT and PMP_GRANULARITY >= 4,
|
|
52
52
|
# bits (PMP_GRANULARITY-4):0 must read as ones
|
|
53
53
|
if (MXLEN == 32) {
|
|
54
|
-
if ((PMP_GRANULARITY >=
|
|
54
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
55
55
|
(CSR[pmpcfg13].pmp54cfg[4] == 1)) {
|
|
56
56
|
return CSR[pmpaddr54].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
57
57
|
|
|
58
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
58
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
59
59
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
60
|
-
} else if ((PMP_GRANULARITY >=
|
|
60
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
61
61
|
(CSR[pmpcfg13].pmp54cfg[4] == 0)) {
|
|
62
62
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
63
63
|
return CSR[pmpaddr54].ADDR & ~mask;
|
|
@@ -67,13 +67,13 @@ sw_read(): |
|
|
|
67
67
|
return CSR[pmpaddr54].ADDR;
|
|
68
68
|
}
|
|
69
69
|
} else {
|
|
70
|
-
if ((PMP_GRANULARITY >=
|
|
70
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
71
71
|
(CSR[pmpcfg12].pmp54cfg[4] == 1)) {
|
|
72
72
|
return CSR[pmpaddr54].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
73
73
|
|
|
74
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
74
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
75
75
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
76
|
-
} else if ((PMP_GRANULARITY >=
|
|
76
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
77
77
|
(CSR[pmpcfg12].pmp54cfg[4] == 0)) {
|
|
78
78
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
79
79
|
return CSR[pmpaddr54].ADDR & ~mask;
|
|
@@ -48,16 +48,16 @@ fields:
|
|
|
48
48
|
return csr_value.ADDR;
|
|
49
49
|
}
|
|
50
50
|
sw_read(): |
|
|
51
|
-
# when the mode is NAPOT and PMP_GRANULARITY >=
|
|
51
|
+
# when the mode is NAPOT and PMP_GRANULARITY >= 4,
|
|
52
52
|
# bits (PMP_GRANULARITY-4):0 must read as ones
|
|
53
53
|
if (MXLEN == 32) {
|
|
54
|
-
if ((PMP_GRANULARITY >=
|
|
54
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
55
55
|
(CSR[pmpcfg13].pmp55cfg[4] == 1)) {
|
|
56
56
|
return CSR[pmpaddr55].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
57
57
|
|
|
58
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
58
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
59
59
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
60
|
-
} else if ((PMP_GRANULARITY >=
|
|
60
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
61
61
|
(CSR[pmpcfg13].pmp55cfg[4] == 0)) {
|
|
62
62
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
63
63
|
return CSR[pmpaddr55].ADDR & ~mask;
|
|
@@ -67,13 +67,13 @@ sw_read(): |
|
|
|
67
67
|
return CSR[pmpaddr55].ADDR;
|
|
68
68
|
}
|
|
69
69
|
} else {
|
|
70
|
-
if ((PMP_GRANULARITY >=
|
|
70
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
71
71
|
(CSR[pmpcfg12].pmp55cfg[4] == 1)) {
|
|
72
72
|
return CSR[pmpaddr55].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
73
73
|
|
|
74
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
74
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
75
75
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
76
|
-
} else if ((PMP_GRANULARITY >=
|
|
76
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
77
77
|
(CSR[pmpcfg12].pmp55cfg[4] == 0)) {
|
|
78
78
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
79
79
|
return CSR[pmpaddr55].ADDR & ~mask;
|
|
@@ -48,16 +48,16 @@ fields:
|
|
|
48
48
|
return csr_value.ADDR;
|
|
49
49
|
}
|
|
50
50
|
sw_read(): |
|
|
51
|
-
# when the mode is NAPOT and PMP_GRANULARITY >=
|
|
51
|
+
# when the mode is NAPOT and PMP_GRANULARITY >= 4,
|
|
52
52
|
# bits (PMP_GRANULARITY-4):0 must read as ones
|
|
53
53
|
if (MXLEN == 32) {
|
|
54
|
-
if ((PMP_GRANULARITY >=
|
|
54
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
55
55
|
(CSR[pmpcfg14].pmp56cfg[4] == 1)) {
|
|
56
56
|
return CSR[pmpaddr56].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
57
57
|
|
|
58
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
58
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
59
59
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
60
|
-
} else if ((PMP_GRANULARITY >=
|
|
60
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
61
61
|
(CSR[pmpcfg14].pmp56cfg[4] == 0)) {
|
|
62
62
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
63
63
|
return CSR[pmpaddr56].ADDR & ~mask;
|
|
@@ -67,13 +67,13 @@ sw_read(): |
|
|
|
67
67
|
return CSR[pmpaddr56].ADDR;
|
|
68
68
|
}
|
|
69
69
|
} else {
|
|
70
|
-
if ((PMP_GRANULARITY >=
|
|
70
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
71
71
|
(CSR[pmpcfg14].pmp56cfg[4] == 1)) {
|
|
72
72
|
return CSR[pmpaddr56].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
73
73
|
|
|
74
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
74
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
75
75
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
76
|
-
} else if ((PMP_GRANULARITY >=
|
|
76
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
77
77
|
(CSR[pmpcfg14].pmp56cfg[4] == 0)) {
|
|
78
78
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
79
79
|
return CSR[pmpaddr56].ADDR & ~mask;
|
|
@@ -48,16 +48,16 @@ fields:
|
|
|
48
48
|
return csr_value.ADDR;
|
|
49
49
|
}
|
|
50
50
|
sw_read(): |
|
|
51
|
-
# when the mode is NAPOT and PMP_GRANULARITY >=
|
|
51
|
+
# when the mode is NAPOT and PMP_GRANULARITY >= 4,
|
|
52
52
|
# bits (PMP_GRANULARITY-4):0 must read as ones
|
|
53
53
|
if (MXLEN == 32) {
|
|
54
|
-
if ((PMP_GRANULARITY >=
|
|
54
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
55
55
|
(CSR[pmpcfg14].pmp57cfg[4] == 1)) {
|
|
56
56
|
return CSR[pmpaddr57].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
57
57
|
|
|
58
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
58
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
59
59
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
60
|
-
} else if ((PMP_GRANULARITY >=
|
|
60
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
61
61
|
(CSR[pmpcfg14].pmp57cfg[4] == 0)) {
|
|
62
62
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
63
63
|
return CSR[pmpaddr57].ADDR & ~mask;
|
|
@@ -67,13 +67,13 @@ sw_read(): |
|
|
|
67
67
|
return CSR[pmpaddr57].ADDR;
|
|
68
68
|
}
|
|
69
69
|
} else {
|
|
70
|
-
if ((PMP_GRANULARITY >=
|
|
70
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
71
71
|
(CSR[pmpcfg14].pmp57cfg[4] == 1)) {
|
|
72
72
|
return CSR[pmpaddr57].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
73
73
|
|
|
74
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
74
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
75
75
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
76
|
-
} else if ((PMP_GRANULARITY >=
|
|
76
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
77
77
|
(CSR[pmpcfg14].pmp57cfg[4] == 0)) {
|
|
78
78
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
79
79
|
return CSR[pmpaddr57].ADDR & ~mask;
|
|
@@ -48,16 +48,16 @@ fields:
|
|
|
48
48
|
return csr_value.ADDR;
|
|
49
49
|
}
|
|
50
50
|
sw_read(): |
|
|
51
|
-
# when the mode is NAPOT and PMP_GRANULARITY >=
|
|
51
|
+
# when the mode is NAPOT and PMP_GRANULARITY >= 4,
|
|
52
52
|
# bits (PMP_GRANULARITY-4):0 must read as ones
|
|
53
53
|
if (MXLEN == 32) {
|
|
54
|
-
if ((PMP_GRANULARITY >=
|
|
54
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
55
55
|
(CSR[pmpcfg14].pmp58cfg[4] == 1)) {
|
|
56
56
|
return CSR[pmpaddr58].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
57
57
|
|
|
58
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
58
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
59
59
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
60
|
-
} else if ((PMP_GRANULARITY >=
|
|
60
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
61
61
|
(CSR[pmpcfg14].pmp58cfg[4] == 0)) {
|
|
62
62
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
63
63
|
return CSR[pmpaddr58].ADDR & ~mask;
|
|
@@ -67,13 +67,13 @@ sw_read(): |
|
|
|
67
67
|
return CSR[pmpaddr58].ADDR;
|
|
68
68
|
}
|
|
69
69
|
} else {
|
|
70
|
-
if ((PMP_GRANULARITY >=
|
|
70
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
71
71
|
(CSR[pmpcfg14].pmp58cfg[4] == 1)) {
|
|
72
72
|
return CSR[pmpaddr58].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
73
73
|
|
|
74
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
74
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
75
75
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
76
|
-
} else if ((PMP_GRANULARITY >=
|
|
76
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
77
77
|
(CSR[pmpcfg14].pmp58cfg[4] == 0)) {
|
|
78
78
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
79
79
|
return CSR[pmpaddr58].ADDR & ~mask;
|
|
@@ -48,16 +48,16 @@ fields:
|
|
|
48
48
|
return csr_value.ADDR;
|
|
49
49
|
}
|
|
50
50
|
sw_read(): |
|
|
51
|
-
# when the mode is NAPOT and PMP_GRANULARITY >=
|
|
51
|
+
# when the mode is NAPOT and PMP_GRANULARITY >= 4,
|
|
52
52
|
# bits (PMP_GRANULARITY-4):0 must read as ones
|
|
53
53
|
if (MXLEN == 32) {
|
|
54
|
-
if ((PMP_GRANULARITY >=
|
|
54
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
55
55
|
(CSR[pmpcfg14].pmp59cfg[4] == 1)) {
|
|
56
56
|
return CSR[pmpaddr59].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
57
57
|
|
|
58
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
58
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
59
59
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
60
|
-
} else if ((PMP_GRANULARITY >=
|
|
60
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
61
61
|
(CSR[pmpcfg14].pmp59cfg[4] == 0)) {
|
|
62
62
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
63
63
|
return CSR[pmpaddr59].ADDR & ~mask;
|
|
@@ -67,13 +67,13 @@ sw_read(): |
|
|
|
67
67
|
return CSR[pmpaddr59].ADDR;
|
|
68
68
|
}
|
|
69
69
|
} else {
|
|
70
|
-
if ((PMP_GRANULARITY >=
|
|
70
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
71
71
|
(CSR[pmpcfg14].pmp59cfg[4] == 1)) {
|
|
72
72
|
return CSR[pmpaddr59].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
73
73
|
|
|
74
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
74
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
75
75
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
76
|
-
} else if ((PMP_GRANULARITY >=
|
|
76
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
77
77
|
(CSR[pmpcfg14].pmp59cfg[4] == 0)) {
|
|
78
78
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
79
79
|
return CSR[pmpaddr59].ADDR & ~mask;
|
|
@@ -48,16 +48,16 @@ fields:
|
|
|
48
48
|
return csr_value.ADDR;
|
|
49
49
|
}
|
|
50
50
|
sw_read(): |
|
|
51
|
-
# when the mode is NAPOT and PMP_GRANULARITY >=
|
|
51
|
+
# when the mode is NAPOT and PMP_GRANULARITY >= 4,
|
|
52
52
|
# bits (PMP_GRANULARITY-4):0 must read as ones
|
|
53
53
|
if (MXLEN == 32) {
|
|
54
|
-
if ((PMP_GRANULARITY >=
|
|
54
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
55
55
|
(CSR[pmpcfg1].pmp6cfg[4] == 1)) {
|
|
56
56
|
return CSR[pmpaddr6].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
57
57
|
|
|
58
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
58
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
59
59
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
60
|
-
} else if ((PMP_GRANULARITY >=
|
|
60
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
61
61
|
(CSR[pmpcfg1].pmp6cfg[4] == 0)) {
|
|
62
62
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
63
63
|
return CSR[pmpaddr6].ADDR & ~mask;
|
|
@@ -67,13 +67,13 @@ sw_read(): |
|
|
|
67
67
|
return CSR[pmpaddr6].ADDR;
|
|
68
68
|
}
|
|
69
69
|
} else {
|
|
70
|
-
if ((PMP_GRANULARITY >=
|
|
70
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
71
71
|
(CSR[pmpcfg0].pmp6cfg[4] == 1)) {
|
|
72
72
|
return CSR[pmpaddr6].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
73
73
|
|
|
74
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
74
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
75
75
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
76
|
-
} else if ((PMP_GRANULARITY >=
|
|
76
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
77
77
|
(CSR[pmpcfg0].pmp6cfg[4] == 0)) {
|
|
78
78
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
79
79
|
return CSR[pmpaddr6].ADDR & ~mask;
|
|
@@ -48,16 +48,16 @@ fields:
|
|
|
48
48
|
return csr_value.ADDR;
|
|
49
49
|
}
|
|
50
50
|
sw_read(): |
|
|
51
|
-
# when the mode is NAPOT and PMP_GRANULARITY >=
|
|
51
|
+
# when the mode is NAPOT and PMP_GRANULARITY >= 4,
|
|
52
52
|
# bits (PMP_GRANULARITY-4):0 must read as ones
|
|
53
53
|
if (MXLEN == 32) {
|
|
54
|
-
if ((PMP_GRANULARITY >=
|
|
54
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
55
55
|
(CSR[pmpcfg15].pmp60cfg[4] == 1)) {
|
|
56
56
|
return CSR[pmpaddr60].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
57
57
|
|
|
58
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
58
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
59
59
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
60
|
-
} else if ((PMP_GRANULARITY >=
|
|
60
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
61
61
|
(CSR[pmpcfg15].pmp60cfg[4] == 0)) {
|
|
62
62
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
63
63
|
return CSR[pmpaddr60].ADDR & ~mask;
|
|
@@ -67,13 +67,13 @@ sw_read(): |
|
|
|
67
67
|
return CSR[pmpaddr60].ADDR;
|
|
68
68
|
}
|
|
69
69
|
} else {
|
|
70
|
-
if ((PMP_GRANULARITY >=
|
|
70
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
71
71
|
(CSR[pmpcfg14].pmp60cfg[4] == 1)) {
|
|
72
72
|
return CSR[pmpaddr60].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
73
73
|
|
|
74
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
74
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
75
75
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
76
|
-
} else if ((PMP_GRANULARITY >=
|
|
76
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
77
77
|
(CSR[pmpcfg14].pmp60cfg[4] == 0)) {
|
|
78
78
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
79
79
|
return CSR[pmpaddr60].ADDR & ~mask;
|
|
@@ -48,16 +48,16 @@ fields:
|
|
|
48
48
|
return csr_value.ADDR;
|
|
49
49
|
}
|
|
50
50
|
sw_read(): |
|
|
51
|
-
# when the mode is NAPOT and PMP_GRANULARITY >=
|
|
51
|
+
# when the mode is NAPOT and PMP_GRANULARITY >= 4,
|
|
52
52
|
# bits (PMP_GRANULARITY-4):0 must read as ones
|
|
53
53
|
if (MXLEN == 32) {
|
|
54
|
-
if ((PMP_GRANULARITY >=
|
|
54
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
55
55
|
(CSR[pmpcfg15].pmp61cfg[4] == 1)) {
|
|
56
56
|
return CSR[pmpaddr61].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
57
57
|
|
|
58
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
58
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
59
59
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
60
|
-
} else if ((PMP_GRANULARITY >=
|
|
60
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
61
61
|
(CSR[pmpcfg15].pmp61cfg[4] == 0)) {
|
|
62
62
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
63
63
|
return CSR[pmpaddr61].ADDR & ~mask;
|
|
@@ -67,13 +67,13 @@ sw_read(): |
|
|
|
67
67
|
return CSR[pmpaddr61].ADDR;
|
|
68
68
|
}
|
|
69
69
|
} else {
|
|
70
|
-
if ((PMP_GRANULARITY >=
|
|
70
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
71
71
|
(CSR[pmpcfg14].pmp61cfg[4] == 1)) {
|
|
72
72
|
return CSR[pmpaddr61].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
73
73
|
|
|
74
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
74
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
75
75
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
76
|
-
} else if ((PMP_GRANULARITY >=
|
|
76
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
77
77
|
(CSR[pmpcfg14].pmp61cfg[4] == 0)) {
|
|
78
78
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
79
79
|
return CSR[pmpaddr61].ADDR & ~mask;
|
|
@@ -48,16 +48,16 @@ fields:
|
|
|
48
48
|
return csr_value.ADDR;
|
|
49
49
|
}
|
|
50
50
|
sw_read(): |
|
|
51
|
-
# when the mode is NAPOT and PMP_GRANULARITY >=
|
|
51
|
+
# when the mode is NAPOT and PMP_GRANULARITY >= 4,
|
|
52
52
|
# bits (PMP_GRANULARITY-4):0 must read as ones
|
|
53
53
|
if (MXLEN == 32) {
|
|
54
|
-
if ((PMP_GRANULARITY >=
|
|
54
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
55
55
|
(CSR[pmpcfg15].pmp62cfg[4] == 1)) {
|
|
56
56
|
return CSR[pmpaddr62].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
57
57
|
|
|
58
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
58
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
59
59
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
60
|
-
} else if ((PMP_GRANULARITY >=
|
|
60
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
61
61
|
(CSR[pmpcfg15].pmp62cfg[4] == 0)) {
|
|
62
62
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
63
63
|
return CSR[pmpaddr62].ADDR & ~mask;
|
|
@@ -67,13 +67,13 @@ sw_read(): |
|
|
|
67
67
|
return CSR[pmpaddr62].ADDR;
|
|
68
68
|
}
|
|
69
69
|
} else {
|
|
70
|
-
if ((PMP_GRANULARITY >=
|
|
70
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
71
71
|
(CSR[pmpcfg14].pmp62cfg[4] == 1)) {
|
|
72
72
|
return CSR[pmpaddr62].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
73
73
|
|
|
74
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
74
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
75
75
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
76
|
-
} else if ((PMP_GRANULARITY >=
|
|
76
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
77
77
|
(CSR[pmpcfg14].pmp62cfg[4] == 0)) {
|
|
78
78
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
79
79
|
return CSR[pmpaddr62].ADDR & ~mask;
|
|
@@ -48,16 +48,16 @@ fields:
|
|
|
48
48
|
return csr_value.ADDR;
|
|
49
49
|
}
|
|
50
50
|
sw_read(): |
|
|
51
|
-
# when the mode is NAPOT and PMP_GRANULARITY >=
|
|
51
|
+
# when the mode is NAPOT and PMP_GRANULARITY >= 4,
|
|
52
52
|
# bits (PMP_GRANULARITY-4):0 must read as ones
|
|
53
53
|
if (MXLEN == 32) {
|
|
54
|
-
if ((PMP_GRANULARITY >=
|
|
54
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
55
55
|
(CSR[pmpcfg15].pmp63cfg[4] == 1)) {
|
|
56
56
|
return CSR[pmpaddr63].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
57
57
|
|
|
58
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
58
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
59
59
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
60
|
-
} else if ((PMP_GRANULARITY >=
|
|
60
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
61
61
|
(CSR[pmpcfg15].pmp63cfg[4] == 0)) {
|
|
62
62
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
63
63
|
return CSR[pmpaddr63].ADDR & ~mask;
|
|
@@ -67,13 +67,13 @@ sw_read(): |
|
|
|
67
67
|
return CSR[pmpaddr63].ADDR;
|
|
68
68
|
}
|
|
69
69
|
} else {
|
|
70
|
-
if ((PMP_GRANULARITY >=
|
|
70
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
71
71
|
(CSR[pmpcfg14].pmp63cfg[4] == 1)) {
|
|
72
72
|
return CSR[pmpaddr63].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
73
73
|
|
|
74
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
74
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
75
75
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
76
|
-
} else if ((PMP_GRANULARITY >=
|
|
76
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
77
77
|
(CSR[pmpcfg14].pmp63cfg[4] == 0)) {
|
|
78
78
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
79
79
|
return CSR[pmpaddr63].ADDR & ~mask;
|
|
@@ -48,16 +48,16 @@ fields:
|
|
|
48
48
|
return csr_value.ADDR;
|
|
49
49
|
}
|
|
50
50
|
sw_read(): |
|
|
51
|
-
# when the mode is NAPOT and PMP_GRANULARITY >=
|
|
51
|
+
# when the mode is NAPOT and PMP_GRANULARITY >= 4,
|
|
52
52
|
# bits (PMP_GRANULARITY-4):0 must read as ones
|
|
53
53
|
if (MXLEN == 32) {
|
|
54
|
-
if ((PMP_GRANULARITY >=
|
|
54
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
55
55
|
(CSR[pmpcfg1].pmp7cfg[4] == 1)) {
|
|
56
56
|
return CSR[pmpaddr7].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
57
57
|
|
|
58
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
58
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
59
59
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
60
|
-
} else if ((PMP_GRANULARITY >=
|
|
60
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
61
61
|
(CSR[pmpcfg1].pmp7cfg[4] == 0)) {
|
|
62
62
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
63
63
|
return CSR[pmpaddr7].ADDR & ~mask;
|
|
@@ -67,13 +67,13 @@ sw_read(): |
|
|
|
67
67
|
return CSR[pmpaddr7].ADDR;
|
|
68
68
|
}
|
|
69
69
|
} else {
|
|
70
|
-
if ((PMP_GRANULARITY >=
|
|
70
|
+
if ((PMP_GRANULARITY >= 4) &&
|
|
71
71
|
(CSR[pmpcfg0].pmp7cfg[4] == 1)) {
|
|
72
72
|
return CSR[pmpaddr7].ADDR | {PMP_GRANULARITY-3{1'b1}};
|
|
73
73
|
|
|
74
|
-
# when the mode is OFF or TOR and PMP_GRANULARITY >=
|
|
74
|
+
# when the mode is OFF or TOR and PMP_GRANULARITY >= 3,
|
|
75
75
|
# bits (PMP_GRANULARITY-3):0 must read as zeros
|
|
76
|
-
} else if ((PMP_GRANULARITY >=
|
|
76
|
+
} else if ((PMP_GRANULARITY >= 3) &&
|
|
77
77
|
(CSR[pmpcfg0].pmp7cfg[4] == 0)) {
|
|
78
78
|
Bits<PHYS_ADDR_WIDTH-2> mask = {PMP_GRANULARITY-2{1'b1}};
|
|
79
79
|
return CSR[pmpaddr7].ADDR & ~mask;
|