udb 0.1.16 → 0.1.17

data/.data/spec/std/isa/param/TRAP_ON_ECALL_FROM_VS.yaml

@@ -11,7 +11,7 @@ description: |
 
   The spec states that implementations may handle ECALLs transparently
   without raising a trap, in which case the EEI must provide a builtin.
-long_name: TODO
+long_name: "Trap on ECALL from VS-mode"
 schema:
   type: boolean
   default: true

data/.data/spec/std/isa/param/TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY.yaml

@@ -17,7 +17,7 @@ description: |
 
   TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY has no effect when
   some virtual translation mode is supported.
-long_name: TODO
+long_name: "Trap on SFENCE.VMA when satp.MODE is read-only"
 schema:
   type: boolean
   default: false

data/.data/spec/std/isa/param/VSEI_INTR_IMPL.yaml

@@ -0,0 +1,28 @@
+# Copyright (C) Qualcomm Technologies, Inc. and/or its subsidiaries.
+# SPDX-License-Identifier: BSD-3-Clause-Clear
+
+# yaml-language-server: $schema=../../../schemas/param_schema.json
+
+$schema: param_schema.json#
+kind: parameter
+name: VSEI_INTR_IMPL
+description: |
+  Whether or not virtual supervisor-level external interrupts are implemented.
+
+  Possible values:
+
+  true::
+    Virtual supervisor-level external interrupts are implemented.
+    `mie.VSEIE` and `mideleg.VSEI` are writable.
+
+  false::
+    Virtual supervisor-level external interrupts are not implemented.
+    `mie.VSEIE`, `mip.VSEIP`, and `mideleg.VSEI` are read-only zero.
+long_name: Virtual supervisor-level external interrupts are implemented
+schema:
+  type: boolean
+definedBy:
+  extension:
+    allOf:
+      - name: Zicsr
+      - name: H

data/.data/spec/std/isa/param/VSSI_INTR_IMPL.yaml

@@ -0,0 +1,28 @@
+# Copyright (C) Qualcomm Technologies, Inc. and/or its subsidiaries.
+# SPDX-License-Identifier: BSD-3-Clause-Clear
+
+# yaml-language-server: $schema=../../../schemas/param_schema.json
+
+$schema: param_schema.json#
+kind: parameter
+name: VSSI_INTR_IMPL
+description: |
+  Whether or not virtual supervisor-level software interrupts are implemented.
+
+  Possible values:
+
+  true::
+    Virtual supervisor-level software interrupts are implemented.
+    `mie.VSSIE` and `mideleg.VSSI` are writable.
+
+  false::
+    Virtual supervisor-level software interrupts are not implemented.
+    `mie.VSSIE`, `mip.VSSIP`, and `mideleg.VSSI` are read-only zero.
+long_name: Virtual supervisor-level software interrupts are implemented
+schema:
+  type: boolean
+definedBy:
+  extension:
+    allOf:
+      - name: Zicsr
+      - name: H

data/.data/spec/std/isa/param/VSTI_INTR_IMPL.yaml

@@ -0,0 +1,33 @@
+# Copyright (C) Qualcomm Technologies, Inc. and/or its subsidiaries.
+# SPDX-License-Identifier: BSD-3-Clause-Clear
+
+# yaml-language-server: $schema=../../../schemas/param_schema.json
+
+$schema: param_schema.json#
+kind: parameter
+name: VSTI_INTR_IMPL
+description: |
+  Whether or not virtual supervisor-level timer interrupts are implemented.
+  If Sstc is implemented, then VSTI_INTR_IMPL must be true.
+
+  Possible values:
+
+  true::
+    Virtual supervisor-level timer interrupts are implemented.
+    `mie.VSTIE` and `mdeleg.VSTI` are writable.
+
+  false::
+    Virtual supervisor-level timer interrupts are not implemented.
+    `mie.VSTIE`, `mip.VSTIP`, and and `mdeleg.VSTI` are read-only zero.
+long_name: Virtual supervisor-level timer interrupts are implemented.
+schema:
+  type: boolean
+requirements:
+  idl(): |
+    implemented?(ExtensionName::Sstc) -> VSTI_INTR_IMPL;
+  reason: "When the Sstc extension is implemented, VSTIP reflects the timer interrupt signal resulting from `vstimecmp`."
+definedBy:
+  extension:
+    allOf:
+      - name: Zicsr
+      - name: H

data/.data/spec/std/isa/param/WFI_FINITE.yaml

@@ -0,0 +1,20 @@
+# Copyright (c) 2026 Neel Kumar
+# SPDX-License-Identifier: BSD-3-Clause-Clear
+
+# yaml-language-server: $schema=../../../schemas/param_schema.json
+
+$schema: param_schema.json#
+kind: parameter
+name: WFI_FINITE
+long_name: |
+  Whether WFI resumes execution after a finite amount of time
+definedBy:
+  extension:
+    name: Sm
+description: |
+  Options:
+
+    * true: WFI resumes execution after waiting for a finite amount of time
+    * false: WFI may continue waiting until another event causes execution to resume
+schema:
+  type: boolean

data/.data/spec/std/isa/param/WFI_U_MODE.yaml

@@ -0,0 +1,20 @@
+# Copyright (c) 2026 Neel Kumar
+# SPDX-License-Identifier: BSD-3-Clause-Clear
+
+# yaml-language-server: $schema=../../../schemas/param_schema.json
+
+$schema: param_schema.json#
+kind: parameter
+name: WFI_U_MODE
+long_name: |
+  Whether WFI is supported in U mode
+definedBy:
+  extension:
+    name: Sm
+description: |
+  Options:
+
+    * true: WFI can be executed in U mode
+    * false: Executing WFI in U mode raises an illegal instruction exception
+schema:
+  type: boolean

data/lib/udb/Z3_VERSION

@@ -1 +1 @@
-z3-5.0.0
+z3-5.1.0

data/lib/udb/log.rb

@@ -132,6 +132,8 @@ module Udb
 
   sig { params(fmt: String, options: T.untyped).returns(T.any(TTY::ProgressBar, DummyProgressBar)) }
   def self.create_progressbar(fmt, **options)
+    fmt = progressbar_format_for_terminal(fmt, **options)
+
     if @top_level_progressbar.nil?
 
       target_level = options.key?(:level) ? LogLevel.deserialize(options[:level].to_s) : LogLevel::Info
@@ -144,4 +146,18 @@ module Udb
       @top_level_progressbar.register(fmt, **options)
     end
   end
+
+  sig { params(fmt: String, options: T.untyped).returns(String) }
+  def self.progressbar_format_for_terminal(fmt, **options)
+    return fmt unless fmt.match?(/:bar/i)
+    return fmt unless options[:total].nil?
+
+    inset = options.fetch(:inset, 0).to_i
+    without_bar = fmt.gsub(/:bar/i, "")
+    available_space = TTY::ProgressBar.max_columns - TTY::ProgressBar.display_columns(without_bar) - inset
+    return fmt if available_space >= 1
+
+    fmt.gsub(/\s*\[:bar\]\s*/i, " ").gsub(/\s*:bar\s*/i, " ").squeeze(" ").strip
+  end
+  private_class_method :progressbar_format_for_terminal
 end

data/lib/udb/obj/csr.rb

@@ -20,6 +20,17 @@ module Udb
     BITS6_CONST_TYPE = Idl::Type.new(:bits, width: 6, qualifiers: [:const]).freeze
     BITS128_TYPE = Idl::Type.new(:bits, width: 128).freeze
     ENCODING_SIZE_VAR = Idl::Var.new("__instruction_encoding_size", BITS6_TYPE, 32).freeze
+    # Privilege mode => IDL expression naming the field that selects the effective
+    # XLEN in that mode. Debug mode executes at MXLEN, so it shares M-mode's field.
+    MODE_TO_XLEN_FIELD = {
+      "M" => "CSR[misa].MXL",
+      "D" => "CSR[misa].MXL",
+      "S" => "CSR[mstatus].SXL",
+      "U" => "CSR[mstatus].UXL",
+      "VS" => "CSR[hstatus].VSXL",
+      "VU" => "CSR[vsstatus].UXL"
+    }.freeze
+    XLEN_TO_ENCODING = { 32 => 0, 64 => 1 }.freeze
     # Add all methods in this module to this type of database object.
     include HasFields
 
@@ -193,14 +204,7 @@ module Udb
         # dynamic if either we don't know VSXLEN or VSXLEN is explicitly mutable
         !cfg_arch.param_values.key?("VSXLEN") || cfg_arch.param_values["VSXLEN"].size > 1
       when "XLEN"
-        # must always have M-mode
-        # SXLEN condition applies if S-mode is possible
-        # VSXLEN condition applies if VS-mode is possible
-        (cfg_arch.mxlen.nil?) || \
-        (cfg_arch.possible_extensions.map(&:name).include?("S") && \
-          (cfg_arch.param_values["SXLEN"].nil? || cfg_arch.param_values["SXLEN"].size > 1)) || \
-        (cfg_arch.possible_extensions.map(&:name).include?("H") && \
-          (cfg_arch.param_values["VSXLEN"].nil? || cfg_arch.param_values["VSXLEN"].size > 1))
+        modes_with_dynamic_xlen.any?
       else
         raise "Unexpected length"
       end
@@ -299,7 +303,7 @@ module Udb
           64
         end
       when "XLEN"
-        if cfg_arch.possible_extensions.map(&:name).include?("M")
+        if cfg_arch.possible_extensions.map(&:name).include?("Sm")
           cfg_arch.mxlen || 64
         elsif cfg_arch.possible_extensions.map(&:name).include?("S")
           if cfg_arch.param_values.key?("SXLEN")
@@ -341,61 +345,50 @@ module Udb
       end
     end
 
-    # @return [String] IDL condition of when the effective xlen is 32
-    def length_cond32
+    # @return [Array<String>] Modes with access to this CSR whose effective XLEN can
+    #                          vary in this configuration
+    def modes_with_dynamic_xlen
+      modes_with_access.select { |mode| cfg_arch.multi_xlen_in_mode?(mode) }
+    end
+
+    # @param xlen [Integer] 32 or 64
+    # @return [String] IDL condition of when the effective xlen is +xlen+
+    def length_cond(xlen)
+      encoding = XLEN_TO_ENCODING.fetch(xlen)
       case @data["length"]
       when "MXLEN"
-        "CSR[misa].MXL == 0"
+        "#{MODE_TO_XLEN_FIELD['M']} == #{encoding}"
       when "SXLEN"
-        "CSR[mstatus].SXL == 0"
+        "#{MODE_TO_XLEN_FIELD['S']} == #{encoding}"
       when "VSXLEN"
-        "CSR[hstatus].VSXL == 0"
+        "#{MODE_TO_XLEN_FIELD['VS']} == #{encoding}"
       when "XLEN"
-        "(priv_mode() == PrivilegeMode::M && CSR[misa].MXL == 0) || (priv_mode() == PrivilegeMode::S && CSR[mstatus].SXL == 0) || (priv_mode() == PrivilegeMode::VS && CSR[hstatus].VSXL == 0)"
+        modes = modes_with_dynamic_xlen
+        raise "No mode with access to #{name} has a dynamic XLEN" if modes.empty?
+
+        modes.map { |mode|
+          "(priv_mode() == PrivilegeMode::#{mode} && #{MODE_TO_XLEN_FIELD.fetch(mode)} == #{encoding})"
+        }.join(" || ")
       else
         raise "Unexpected length #{@data['length']} for #{name}"
       end
     end
 
+    # @return [String] IDL condition of when the effective xlen is 32
+    def length_cond32 = length_cond(32)
+
     # @return [String] IDL condition of when the effective xlen is 64
-    def length_cond64
-      case @data["length"]
-      when "MXLEN"
-        "CSR[misa].MXL == 1"
-      when "SXLEN"
-        "CSR[mstatus].SXL == 1"
-      when "VSXLEN"
-        "CSR[hstatus].VSXL == 1"
-      when "XLEN"
-        "(priv_mode() == PrivilegeMode::M && CSR[misa].MXL == 1) || (priv_mode() == PrivilegeMode::S && CSR[mstatus].SXL == 1) || (priv_mode() == PrivilegeMode::VS && CSR[hstatus].VSXL == 1)"
-      else
-        raise "Unexpected length"
-      end
-    end
+    def length_cond64 = length_cond(64)
 
     # @param effective_xlen [Integer or nil] 32 or 64 for fixed xlen, nil for dynamic
     # @return [String] Pretty-printed length string
     def length_pretty(effective_xlen = nil)
       raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
       if dynamic_length?
-        cond =
-          case @data["length"]
-          when "MXLEN"
-            "CSR[misa].MXL == %%"
-          when "SXLEN"
-            "CSR[mstatus].SXL == %%"
-          when "VSXLEN"
-            "CSR[hstatus].VSXL == %%"
-          when "XLEN"
-            "(priv_mode() == PrivilegeMode::M && CSR[misa].MXL == %%) || (priv_mode() == PrivilegeMode::S && CSR[mstatus].SXL == %%) || (priv_mode() == PrivilegeMode::VS && CSR[hstatus].VSXL == %%)"
-          else
-            raise "Unexpected length '#{@data['length']}'"
-          end
-
         if effective_xlen.nil?
           [
-            "* #{length(32)} when #{cond.sub('%%', '0')}",
-            "* #{length(64)} when #{cond.sub('%%', '1')}"
+            "* #{length(32)} when #{length_cond(32)}",
+            "* #{length(64)} when #{length_cond(64)}"
           ].join("\n")
         else
           "#{length(effective_xlen)}-bit"

data/lib/udb/obj/database_obj.rb

@@ -115,7 +115,7 @@ module Udb
     sig { override.params(other: T.untyped).returns(T.nilable(Integer)) }
     def <=>(other)
       return nil unless other.is_a?(DatabaseObject)
-      return nil unless @Kind == other.kind
+      return nil unless kind == other.kind
 
       @name <=> other.name
     end

data/lib/udb/obj/exception_code.rb

@@ -82,9 +82,9 @@ module Udb
 
     sig { override.params(other: BasicObject).returns(T.nilable(Integer)) }
     def <=>(other)
-      return nil unless T.cast(other, Object).is_a?(ExceptionCode)
+      return nil unless T.cast(other, Object).is_a?(InterruptCode)
 
-      num <=> T.cast(other, ExceptionCode).num
+      num <=> T.cast(other, InterruptCode).num
     end
 
     sig { override.params(other: BasicObject).returns(T::Boolean) }
@@ -93,6 +93,6 @@ module Udb
     end
 
     sig { override.returns(Integer) }
-    def hash = [ExceptionCode, num].hash
+    def hash = [InterruptCode, num].hash
   end
 end

data/lib/udb/version.rb

@@ -5,5 +5,5 @@
 # frozen_string_literal: true
 
 module Udb
-  def self.version = "0.1.16"
+  def self.version = "0.1.17"
 end

metadata

@@ -1,14 +1,14 @@
 --- !ruby/object:Gem::Specification
 name: udb
 version: !ruby/object:Gem::Version
-  version: 0.1.16
+  version: 0.1.17
 platform: ruby
 authors:
 - Derek Hower
 - James Ball
 bindir: bin
 cert_chain: []
-date: 2026-08-15 00:00:00.000000000 Z
+date: 2026-09-28 00:00:00.000000000 Z
 dependencies:
 - !ruby/object:Gem::Dependency
   name: activesupport
@@ -72,14 +72,14 @@ dependencies:
     requirements:
     - - '='
       - !ruby/object:Gem::Version
-        version: 0.1.7
+        version: 0.1.8
   type: :runtime
   prerelease: false
   version_requirements: !ruby/object:Gem::Requirement
     requirements:
     - - '='
       - !ruby/object:Gem::Version
-        version: 0.1.7
+        version: 0.1.8
 - !ruby/object:Gem::Dependency
   name: json_schemer
   requirement: !ruby/object:Gem::Requirement
@@ -254,14 +254,14 @@ dependencies:
     requirements:
     - - '='
       - !ruby/object:Gem::Version
-        version: 0.1.3
+        version: 0.1.4
   type: :runtime
   prerelease: false
   version_requirements: !ruby/object:Gem::Requirement
     requirements:
     - - '='
       - !ruby/object:Gem::Version
-        version: 0.1.3
+        version: 0.1.4
 - !ruby/object:Gem::Dependency
   name: z3
   requirement: !ruby/object:Gem::Requirement
@@ -774,13 +774,22 @@ files:
 - ".data/spec/std/isa/csr/H/henvcfg.yaml"
 - ".data/spec/std/isa/csr/H/henvcfgh.yaml"
 - ".data/spec/std/isa/csr/H/hgatp.yaml"
+- ".data/spec/std/isa/csr/H/hgeie.yaml"
+- ".data/spec/std/isa/csr/H/hgeip.yaml"
+- ".data/spec/std/isa/csr/H/hideleg.yaml"
+- ".data/spec/std/isa/csr/H/hie.yaml"
+- ".data/spec/std/isa/csr/H/hip.yaml"
 - ".data/spec/std/isa/csr/H/htimedelta.yaml"
 - ".data/spec/std/isa/csr/H/htimedeltah.yaml"
 - ".data/spec/std/isa/csr/H/htinst.yaml"
 - ".data/spec/std/isa/csr/H/htval.yaml"
+- ".data/spec/std/isa/csr/H/hvip.yaml"
 - ".data/spec/std/isa/csr/H/mtinst.yaml"
 - ".data/spec/std/isa/csr/H/mtval2.yaml"
 - ".data/spec/std/isa/csr/H/vsatp.yaml"
+- ".data/spec/std/isa/csr/H/vsie.yaml"
+- ".data/spec/std/isa/csr/H/vsip.yaml"
+- ".data/spec/std/isa/csr/H/vsscratch.yaml"
 - ".data/spec/std/isa/csr/I/mcounteren.layout"
 - ".data/spec/std/isa/csr/I/mcounteren.yaml"
 - ".data/spec/std/isa/csr/I/pmpaddr0.yaml"
@@ -894,6 +903,8 @@ files:
 - ".data/spec/std/isa/csr/Smcsrind/vsiselect.yaml"
 - ".data/spec/std/isa/csr/Smctr/mctrctl.yaml"
 - ".data/spec/std/isa/csr/Smctr/sctrctl.yaml"
+- ".data/spec/std/isa/csr/Smctr/sctrdepth.yaml"
+- ".data/spec/std/isa/csr/Smctr/sctrstatus.yaml"
 - ".data/spec/std/isa/csr/Smctr/vsctrctl.yaml"
 - ".data/spec/std/isa/csr/Smrnmi/mncause.yaml"
 - ".data/spec/std/isa/csr/Smrnmi/mnepc.yaml"
@@ -902,6 +913,10 @@ files:
 - ".data/spec/std/isa/csr/Sscofpmf/scountovf.layout"
 - ".data/spec/std/isa/csr/Sscofpmf/scountovf.yaml"
 - ".data/spec/std/isa/csr/Ssqosid/srmcfg.yaml"
+- ".data/spec/std/isa/csr/Sstc/stimecmp.yaml"
+- ".data/spec/std/isa/csr/Sstc/stimecmph.yaml"
+- ".data/spec/std/isa/csr/Sstc/vstimecmp.yaml"
+- ".data/spec/std/isa/csr/Sstc/vstimecmph.yaml"
 - ".data/spec/std/isa/csr/V/vcsr.yaml"
 - ".data/spec/std/isa/csr/V/vl.yaml"
 - ".data/spec/std/isa/csr/V/vlenb.yaml"
@@ -1165,11 +1180,13 @@ files:
 - ".data/spec/std/isa/csr/sstatus.yaml"
 - ".data/spec/std/isa/csr/stval.yaml"
 - ".data/spec/std/isa/csr/stvec.yaml"
+- ".data/spec/std/isa/csr/tcontrol.yaml"
 - ".data/spec/std/isa/csr/tdata1.yaml"
 - ".data/spec/std/isa/csr/tdata2.yaml"
 - ".data/spec/std/isa/csr/tdata3.yaml"
 - ".data/spec/std/isa/csr/time.yaml"
 - ".data/spec/std/isa/csr/timeh.yaml"
+- ".data/spec/std/isa/csr/tinfo.yaml"
 - ".data/spec/std/isa/csr/tselect.yaml"
 - ".data/spec/std/isa/csr/vscause.yaml"
 - ".data/spec/std/isa/csr/vsepc.yaml"
@@ -1343,10 +1360,13 @@ files:
 - ".data/spec/std/isa/ext/Zve64d.yaml"
 - ".data/spec/std/isa/ext/Zve64f.yaml"
 - ".data/spec/std/isa/ext/Zve64x.yaml"
+- ".data/spec/std/isa/ext/Zvfbfa.yaml"
 - ".data/spec/std/isa/ext/Zvfbfmin.yaml"
 - ".data/spec/std/isa/ext/Zvfbfwma.yaml"
 - ".data/spec/std/isa/ext/Zvfh.yaml"
 - ".data/spec/std/isa/ext/Zvfhmin.yaml"
+- ".data/spec/std/isa/ext/Zvfofp4min.yaml"
+- ".data/spec/std/isa/ext/Zvfofp8min.yaml"
 - ".data/spec/std/isa/ext/Zvkb.yaml"
 - ".data/spec/std/isa/ext/Zvkg.yaml"
 - ".data/spec/std/isa/ext/Zvkn.yaml"
@@ -1368,8 +1388,6 @@ files:
 - ".data/spec/std/isa/ext/Zvl512b.yaml"
 - ".data/spec/std/isa/ext/Zvl64b.yaml"
 - ".data/spec/std/isa/inst/B/andn.yaml"
-- ".data/spec/std/isa/inst/B/clmul.yaml"
-- ".data/spec/std/isa/inst/B/clmulh.yaml"
 - ".data/spec/std/isa/inst/B/orn.yaml"
 - ".data/spec/std/isa/inst/B/rev8.yaml"
 - ".data/spec/std/isa/inst/B/rol.yaml"
@@ -2471,6 +2489,8 @@ files:
 - ".data/spec/std/isa/inst/Zbkb/packw.yaml"
 - ".data/spec/std/isa/inst/Zbkb/unzip.yaml"
 - ".data/spec/std/isa/inst/Zbkb/zip.yaml"
+- ".data/spec/std/isa/inst/Zbkc/clmul.yaml"
+- ".data/spec/std/isa/inst/Zbkc/clmulh.yaml"
 - ".data/spec/std/isa/inst/Zbkx/xperm4.yaml"
 - ".data/spec/std/isa/inst/Zbkx/xperm8.yaml"
 - ".data/spec/std/isa/inst/Zbs/bclr.yaml"
@@ -2732,6 +2752,10 @@ files:
 - ".data/spec/std/isa/inst/Zvfbfmin/vfwcvtbf16.f.f.v.yaml"
 - ".data/spec/std/isa/inst/Zvfbfwma/vfwmaccbf16.vf.yaml"
 - ".data/spec/std/isa/inst/Zvfbfwma/vfwmaccbf16.vv.yaml"
+- ".data/spec/std/isa/inst/Zvfofp4min/vfext.vf2.yaml"
+- ".data/spec/std/isa/inst/Zvfofp8min/vfncvt.f.f.q.yaml"
+- ".data/spec/std/isa/inst/Zvfofp8min/vfncvt.sat.f.f.q.yaml"
+- ".data/spec/std/isa/inst/Zvfofp8min/vfncvtbf16.sat.f.f.w.yaml"
 - ".data/spec/std/isa/inst/Zvkb/vandn.vv.yaml"
 - ".data/spec/std/isa/inst/Zvkb/vandn.vx.yaml"
 - ".data/spec/std/isa/inst/Zvkb/vbrev8.v.yaml"
@@ -2812,6 +2836,36 @@ files:
 - ".data/spec/std/isa/param/GSTAGE_MODE_BARE.yaml"
 - ".data/spec/std/isa/param/HCONTEXT_AVAILABLE.yaml"
 - ".data/spec/std/isa/param/HCOUNTENABLE_EN.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER10_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER11_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER12_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER13_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER14_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER15_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER16_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER17_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER18_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER19_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER20_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER21_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER22_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER23_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER24_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER25_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER26_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER27_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER28_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER29_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER30_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER31_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER3_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER4_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER5_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER6_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER7_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER8_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTER9_WIDTH.yaml"
+- ".data/spec/std/isa/param/HPM_COUNTERN_WIDTH.layout"
 - ".data/spec/std/isa/param/HPM_COUNTER_EN.yaml"
 - ".data/spec/std/isa/param/HPM_EVENTS.yaml"
 - ".data/spec/std/isa/param/HSTATEEN_AIA_TYPE.yaml"
@@ -2855,6 +2909,7 @@ files:
 - ".data/spec/std/isa/param/MCTRCTL_STE_IMPLEMENTED.yaml"
 - ".data/spec/std/isa/param/MCTRCTL_TKBRINH_IMPLEMENTED.yaml"
 - ".data/spec/std/isa/param/MCTRCTL_TRETINH_IMPLEMENTED.yaml"
+- ".data/spec/std/isa/param/MEI_INTR_IMPL.yaml"
 - ".data/spec/std/isa/param/MIMPID_IMPLEMENTED.yaml"
 - ".data/spec/std/isa/param/MISALIGNED_AMO.yaml"
 - ".data/spec/std/isa/param/MISALIGNED_LDST.yaml"
@@ -2862,6 +2917,7 @@ files:
 - ".data/spec/std/isa/param/MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE.yaml"
 - ".data/spec/std/isa/param/MISALIGNED_SPLIT_STRATEGY.yaml"
 - ".data/spec/std/isa/param/MISA_CSR_IMPLEMENTED.yaml"
+- ".data/spec/std/isa/param/MSI_INTR_IMPL.yaml"
 - ".data/spec/std/isa/param/MSTATEEN_AIA_TYPE.yaml"
 - ".data/spec/std/isa/param/MSTATEEN_CONTEXT_TYPE.yaml"
 - ".data/spec/std/isa/param/MSTATEEN_CSRIND_TYPE.yaml"
@@ -2870,6 +2926,7 @@ files:
 - ".data/spec/std/isa/param/MSTATEEN_JVT_TYPE.yaml"
 - ".data/spec/std/isa/param/MSTATUS_FS_LEGAL_VALUES.yaml"
 - ".data/spec/std/isa/param/MSTATUS_VS_LEGAL_VALUES.yaml"
+- ".data/spec/std/isa/param/MTI_INTR_IMPL.yaml"
 - ".data/spec/std/isa/param/MTVAL_WIDTH.yaml"
 - ".data/spec/std/isa/param/MTVEC_ACCESS.yaml"
 - ".data/spec/std/isa/param/MTVEC_BASE_ALIGNMENT_DIRECT.yaml"
@@ -2889,12 +2946,12 @@ files:
 - ".data/spec/std/isa/param/MUTABLE_MISA_V.yaml"
 - ".data/spec/std/isa/param/MXLEN.yaml"
 - ".data/spec/std/isa/param/M_MODE_ENDIANNESS.yaml"
+- ".data/spec/std/isa/param/NON_STANDARD_EXTENSION_IMPLEMENTED.yaml"
 - ".data/spec/std/isa/param/NUM_EXTERNAL_GUEST_INTERRUPTS.yaml"
 - ".data/spec/std/isa/param/NUM_PMP_ENTRIES.yaml"
 - ".data/spec/std/isa/param/NUM_USABLE_PMP_ENTRIES.yaml"
 - ".data/spec/std/isa/param/PHYS_ADDR_WIDTH.yaml"
 - ".data/spec/std/isa/param/PMA_GRANULARITY.yaml"
-- ".data/spec/std/isa/param/PMLEN.yaml"
 - ".data/spec/std/isa/param/PMP_GRANULARITY.yaml"
 - ".data/spec/std/isa/param/PMP_NA4_SUPPORTED.yaml"
 - ".data/spec/std/isa/param/PMP_NAPOT_SUPPORTED.yaml"
@@ -2951,11 +3008,18 @@ files:
 - ".data/spec/std/isa/param/RVV_VL_WHEN_AVL_LT_DOUBLE_VLMAX.yaml"
 - ".data/spec/std/isa/param/SATP_MODE_BARE.yaml"
 - ".data/spec/std/isa/param/SCOUNTENABLE_EN.yaml"
+- ".data/spec/std/isa/param/SCTRDEPTH_DEPTH_LEGAL_VALUES.yaml"
+- ".data/spec/std/isa/param/SEI_INTR_IMPL.yaml"
 - ".data/spec/std/isa/param/SEW_MIN.yaml"
+- ".data/spec/std/isa/param/SSI_INTR_IMPL.yaml"
 - ".data/spec/std/isa/param/SSTATEEN_JVT_TYPE.yaml"
+- ".data/spec/std/isa/param/STI_INTR_IMPL.yaml"
 - ".data/spec/std/isa/param/STVAL_WIDTH.yaml"
 - ".data/spec/std/isa/param/STVEC_BASE_ALIGNMENT_VECTORED.yaml"
 - ".data/spec/std/isa/param/STVEC_MODES.yaml"
+- ".data/spec/std/isa/param/SUPPORTED_PMLEN_SMMPM.yaml"
+- ".data/spec/std/isa/param/SUPPORTED_PMLEN_SMNPM.yaml"
+- ".data/spec/std/isa/param/SUPPORTED_PMLEN_SSNPM.yaml"
 - ".data/spec/std/isa/param/SUPPORT_FRACTIONAL_LMUL_BEYOND_REQUIRED.yaml"
 - ".data/spec/std/isa/param/SV32X4_TRANSLATION.yaml"
 - ".data/spec/std/isa/param/SV32_VSMODE_TRANSLATION.yaml"
@@ -3014,13 +3078,18 @@ files:
 - ".data/spec/std/isa/param/VILL_SET_ON_RESERVED_VTYPE.yaml"
 - ".data/spec/std/isa/param/VLEN.yaml"
 - ".data/spec/std/isa/param/VMID_WIDTH.yaml"
+- ".data/spec/std/isa/param/VSEI_INTR_IMPL.yaml"
+- ".data/spec/std/isa/param/VSSI_INTR_IMPL.yaml"
 - ".data/spec/std/isa/param/VSSTAGE_MODE_BARE.yaml"
 - ".data/spec/std/isa/param/VSSTATUS_VS_EXISTS.yaml"
+- ".data/spec/std/isa/param/VSTI_INTR_IMPL.yaml"
 - ".data/spec/std/isa/param/VSTVEC_MODES.yaml"
 - ".data/spec/std/isa/param/VSXLEN.yaml"
 - ".data/spec/std/isa/param/VS_MODE_ENDIANNESS.yaml"
 - ".data/spec/std/isa/param/VUXLEN.yaml"
 - ".data/spec/std/isa/param/VU_MODE_ENDIANNESS.yaml"
+- ".data/spec/std/isa/param/WFI_FINITE.yaml"
+- ".data/spec/std/isa/param/WFI_U_MODE.yaml"
 - ".data/spec/std/isa/param/ZAWRS_NTO_IS_NOP.yaml"
 - ".data/spec/std/isa/profile/RVA20S64.yaml"
 - ".data/spec/std/isa/profile/RVA20U64.yaml"
@@ -3101,7 +3170,7 @@ licenses:
 - BSD-3-Clause-Clear
 metadata:
   homepage_uri: https://github.com/riscv/riscv-unified-db
-  mailing_list_uri: https://lists.riscv.org/g/tech-unifieddb
+  mailing_list_uri: https://lists.riscv.org/g/sig-unifieddb
   bug_tracker_uri: https://github.com/riscv/riscv-unified-db/issues
 rdoc_options: []
 require_paths: