RubyGems - udb - Versions diffs - 0.1.16 → 0.1.17 - Mend

udb 0.1.16 → 0.1.17

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.

Files changed (604) hide show

data/.data/spec/std/isa/inst/Zaamo/amomax.d.rl.yaml CHANGED Viewed

@@ -39,10 +39,6 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
   X[xd] = amo(64, virtual_address, X[xs2], AmoOperation::Max, 1'b0, 1'b1, $encoding);

data/.data/spec/std/isa/inst/Zaamo/amomax.d.yaml CHANGED Viewed

@@ -39,9 +39,5 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
   X[xd] = amo(64, virtual_address, X[xs2], AmoOperation::Max, 1'b0, 1'b0, $encoding);

data/.data/spec/std/isa/inst/Zaamo/amomax.w.aq.yaml CHANGED Viewed

@@ -37,11 +37,7 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Max, 1'b1, 1'b0, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Max, 1'b1, 1'b0, $encoding), 32);

data/.data/spec/std/isa/inst/Zaamo/amomax.w.aqrl.yaml CHANGED Viewed

@@ -37,13 +37,9 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Max, 1'b1, 1'b1, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Max, 1'b1, 1'b1, $encoding), 32);
   memory_model_release();

data/.data/spec/std/isa/inst/Zaamo/amomax.w.rl.yaml CHANGED Viewed

@@ -37,11 +37,7 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Max, 1'b0, 1'b1, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Max, 1'b0, 1'b1, $encoding), 32);
   memory_model_release();

data/.data/spec/std/isa/inst/Zaamo/amomax.w.yaml CHANGED Viewed

@@ -37,9 +37,5 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Max, 1'b0, 1'b0, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Max, 1'b0, 1'b0, $encoding), 32);

data/.data/spec/std/isa/inst/Zaamo/amomaxu.SIZE.AQRL.layout CHANGED Viewed

@@ -69,16 +69,12 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
 <% if aq -%>
   memory_model_acquire();
 <% end -%>
   XReg virtual_address = X[xs1];
-  X[xd] = amo(<%= current_size[:operation_bits] %>, virtual_address, X[xs2]<%= %w[b h w].include?(size) ? "[#{current_size[:bits]-1}:0]" : "" %>, AmoOperation::Maxu, <%= aq ? "1'b1" : "1'b0" %>, <%= rl ? "1'b1" : "1'b0" %>, $encoding);
+  X[xd] = <%= %w[b h w].include?(size) ? "sext(" : "" %>amo(<%= current_size[:operation_bits] %>, virtual_address, X[xs2]<%= %w[b h w].include?(size) ? "[#{current_size[:bits]-1}:0]" : "" %>, AmoOperation::Maxu, <%= aq ? "1'b1" : "1'b0" %>, <%= rl ? "1'b1" : "1'b0" %>, $encoding)<%= %w[b h w].include?(size) ? ", #{current_size[:bits]})" : "" %>;
 <% if rl -%>
   memory_model_release();

data/.data/spec/std/isa/inst/Zaamo/amomaxu.d.aq.yaml CHANGED Viewed

@@ -39,10 +39,6 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];

data/.data/spec/std/isa/inst/Zaamo/amomaxu.d.aqrl.yaml CHANGED Viewed

@@ -39,10 +39,6 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];

data/.data/spec/std/isa/inst/Zaamo/amomaxu.d.rl.yaml CHANGED Viewed

@@ -39,10 +39,6 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
   X[xd] = amo(64, virtual_address, X[xs2], AmoOperation::Maxu, 1'b0, 1'b1, $encoding);

data/.data/spec/std/isa/inst/Zaamo/amomaxu.d.yaml CHANGED Viewed

@@ -39,9 +39,5 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
   X[xd] = amo(64, virtual_address, X[xs2], AmoOperation::Maxu, 1'b0, 1'b0, $encoding);

data/.data/spec/std/isa/inst/Zaamo/amomaxu.w.aq.yaml CHANGED Viewed

@@ -37,11 +37,7 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Maxu, 1'b1, 1'b0, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Maxu, 1'b1, 1'b0, $encoding), 32);

data/.data/spec/std/isa/inst/Zaamo/amomaxu.w.aqrl.yaml CHANGED Viewed

@@ -37,13 +37,9 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Maxu, 1'b1, 1'b1, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Maxu, 1'b1, 1'b1, $encoding), 32);
   memory_model_release();

data/.data/spec/std/isa/inst/Zaamo/amomaxu.w.rl.yaml CHANGED Viewed

@@ -37,11 +37,7 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Maxu, 1'b0, 1'b1, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Maxu, 1'b0, 1'b1, $encoding), 32);
   memory_model_release();

data/.data/spec/std/isa/inst/Zaamo/amomaxu.w.yaml CHANGED Viewed

@@ -37,9 +37,5 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Maxu, 1'b0, 1'b0, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Maxu, 1'b0, 1'b0, $encoding), 32);

data/.data/spec/std/isa/inst/Zaamo/amomin.SIZE.AQRL.layout CHANGED Viewed

@@ -69,16 +69,12 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
 <% if aq -%>
   memory_model_acquire();
 <% end -%>
   XReg virtual_address = X[xs1];
-  X[xd] = amo(<%= current_size[:operation_bits] %>, virtual_address, X[xs2]<%= %w[b h w].include?(size) ? "[#{current_size[:bits]-1}:0]" : "" %>, AmoOperation::Min, <%= aq ? "1'b1" : "1'b0" %>, <%= rl ? "1'b1" : "1'b0" %>, $encoding);
+  X[xd] = <%= %w[b h w].include?(size) ? "sext(" : "" %>amo(<%= current_size[:operation_bits] %>, virtual_address, X[xs2]<%= %w[b h w].include?(size) ? "[#{current_size[:bits]-1}:0]" : "" %>, AmoOperation::Min, <%= aq ? "1'b1" : "1'b0" %>, <%= rl ? "1'b1" : "1'b0" %>, $encoding)<%= %w[b h w].include?(size) ? ", #{current_size[:bits]})" : "" %>;
 <% if rl -%>
   memory_model_release();

data/.data/spec/std/isa/inst/Zaamo/amomin.d.aq.yaml CHANGED Viewed

@@ -39,10 +39,6 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];

data/.data/spec/std/isa/inst/Zaamo/amomin.d.aqrl.yaml CHANGED Viewed

@@ -39,10 +39,6 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];

data/.data/spec/std/isa/inst/Zaamo/amomin.d.rl.yaml CHANGED Viewed

@@ -39,10 +39,6 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
   X[xd] = amo(64, virtual_address, X[xs2], AmoOperation::Min, 1'b0, 1'b1, $encoding);

data/.data/spec/std/isa/inst/Zaamo/amomin.d.yaml CHANGED Viewed

@@ -39,9 +39,5 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
   X[xd] = amo(64, virtual_address, X[xs2], AmoOperation::Min, 1'b0, 1'b0, $encoding);

data/.data/spec/std/isa/inst/Zaamo/amomin.w.aq.yaml CHANGED Viewed

@@ -37,11 +37,7 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Min, 1'b1, 1'b0, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Min, 1'b1, 1'b0, $encoding), 32);

data/.data/spec/std/isa/inst/Zaamo/amomin.w.aqrl.yaml CHANGED Viewed

@@ -37,13 +37,9 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Min, 1'b1, 1'b1, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Min, 1'b1, 1'b1, $encoding), 32);
   memory_model_release();

data/.data/spec/std/isa/inst/Zaamo/amomin.w.rl.yaml CHANGED Viewed

@@ -37,11 +37,7 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Min, 1'b0, 1'b1, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Min, 1'b0, 1'b1, $encoding), 32);
   memory_model_release();

data/.data/spec/std/isa/inst/Zaamo/amomin.w.yaml CHANGED Viewed

@@ -37,9 +37,5 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Min, 1'b0, 1'b0, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Min, 1'b0, 1'b0, $encoding), 32);

data/.data/spec/std/isa/inst/Zaamo/amominu.SIZE.AQRL.layout CHANGED Viewed

@@ -69,16 +69,12 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
 <% if aq -%>
   memory_model_acquire();
 <% end -%>
   XReg virtual_address = X[xs1];
-  X[xd] = amo(<%= current_size[:operation_bits] %>, virtual_address, X[xs2]<%= %w[b h w].include?(size) ? "[#{current_size[:bits]-1}:0]" : "" %>, AmoOperation::Minu, <%= aq ? "1'b1" : "1'b0" %>, <%= rl ? "1'b1" : "1'b0" %>, $encoding);
+  X[xd] = <%= %w[b h w].include?(size) ? "sext(" : "" %>amo(<%= current_size[:operation_bits] %>, virtual_address, X[xs2]<%= %w[b h w].include?(size) ? "[#{current_size[:bits]-1}:0]" : "" %>, AmoOperation::Minu, <%= aq ? "1'b1" : "1'b0" %>, <%= rl ? "1'b1" : "1'b0" %>, $encoding)<%= %w[b h w].include?(size) ? ", #{current_size[:bits]})" : "" %>;
 <% if rl -%>
   memory_model_release();

data/.data/spec/std/isa/inst/Zaamo/amominu.d.aq.yaml CHANGED Viewed

@@ -39,10 +39,6 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];

data/.data/spec/std/isa/inst/Zaamo/amominu.d.aqrl.yaml CHANGED Viewed

@@ -39,10 +39,6 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];

data/.data/spec/std/isa/inst/Zaamo/amominu.d.rl.yaml CHANGED Viewed

@@ -39,10 +39,6 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
   X[xd] = amo(64, virtual_address, X[xs2], AmoOperation::Minu, 1'b0, 1'b1, $encoding);

data/.data/spec/std/isa/inst/Zaamo/amominu.d.yaml CHANGED Viewed

@@ -39,9 +39,5 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
   X[xd] = amo(64, virtual_address, X[xs2], AmoOperation::Minu, 1'b0, 1'b0, $encoding);

data/.data/spec/std/isa/inst/Zaamo/amominu.w.aq.yaml CHANGED Viewed

@@ -37,11 +37,7 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Minu, 1'b1, 1'b0, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Minu, 1'b1, 1'b0, $encoding), 32);

data/.data/spec/std/isa/inst/Zaamo/amominu.w.aqrl.yaml CHANGED Viewed

@@ -37,13 +37,9 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Minu, 1'b1, 1'b1, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Minu, 1'b1, 1'b1, $encoding), 32);
   memory_model_release();

data/.data/spec/std/isa/inst/Zaamo/amominu.w.rl.yaml CHANGED Viewed

@@ -37,11 +37,7 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Minu, 1'b0, 1'b1, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Minu, 1'b0, 1'b1, $encoding), 32);
   memory_model_release();

data/.data/spec/std/isa/inst/Zaamo/amominu.w.yaml CHANGED Viewed

@@ -37,9 +37,5 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Minu, 1'b0, 1'b0, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Minu, 1'b0, 1'b0, $encoding), 32);

data/.data/spec/std/isa/inst/Zaamo/amoor.SIZE.AQRL.layout CHANGED Viewed

@@ -69,16 +69,12 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
 <% if aq -%>
   memory_model_acquire();
 <% end -%>
   XReg virtual_address = X[xs1];
-  X[xd] = amo(<%= current_size[:operation_bits] %>, virtual_address, X[xs2]<%= %w[b h w].include?(size) ? "[#{current_size[:bits]-1}:0]" : "" %>, AmoOperation::Or, <%= aq ? "1'b1" : "1'b0" %>, <%= rl ? "1'b1" : "1'b0" %>, $encoding);
+  X[xd] = <%= %w[b h w].include?(size) ? "sext(" : "" %>amo(<%= current_size[:operation_bits] %>, virtual_address, X[xs2]<%= %w[b h w].include?(size) ? "[#{current_size[:bits]-1}:0]" : "" %>, AmoOperation::Or, <%= aq ? "1'b1" : "1'b0" %>, <%= rl ? "1'b1" : "1'b0" %>, $encoding)<%= %w[b h w].include?(size) ? ", #{current_size[:bits]})" : "" %>;
 <% if rl -%>
   memory_model_release();

data/.data/spec/std/isa/inst/Zaamo/amoor.d.aq.yaml CHANGED Viewed

@@ -39,10 +39,6 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];

data/.data/spec/std/isa/inst/Zaamo/amoor.d.aqrl.yaml CHANGED Viewed

@@ -39,10 +39,6 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];

data/.data/spec/std/isa/inst/Zaamo/amoor.d.rl.yaml CHANGED Viewed

@@ -39,10 +39,6 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
   X[xd] = amo(64, virtual_address, X[xs2], AmoOperation::Or, 1'b0, 1'b1, $encoding);

data/.data/spec/std/isa/inst/Zaamo/amoor.d.yaml CHANGED Viewed

@@ -39,9 +39,5 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
   X[xd] = amo(64, virtual_address, X[xs2], AmoOperation::Or, 1'b0, 1'b0, $encoding);

data/.data/spec/std/isa/inst/Zaamo/amoor.w.aq.yaml CHANGED Viewed

@@ -37,11 +37,7 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Or, 1'b1, 1'b0, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Or, 1'b1, 1'b0, $encoding), 32);

data/.data/spec/std/isa/inst/Zaamo/amoor.w.aqrl.yaml CHANGED Viewed

@@ -37,13 +37,9 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Or, 1'b1, 1'b1, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Or, 1'b1, 1'b1, $encoding), 32);
   memory_model_release();

data/.data/spec/std/isa/inst/Zaamo/amoor.w.rl.yaml CHANGED Viewed

@@ -37,11 +37,7 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Or, 1'b0, 1'b1, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Or, 1'b0, 1'b1, $encoding), 32);
   memory_model_release();

data/.data/spec/std/isa/inst/Zaamo/amoor.w.yaml CHANGED Viewed

@@ -37,9 +37,5 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
-  X[xd] = amo(32, virtual_address, X[xs2][31:0], AmoOperation::Or, 1'b0, 1'b0, $encoding);
+  X[xd] = sext(amo(32, virtual_address, X[xs2][31:0], AmoOperation::Or, 1'b0, 1'b0, $encoding), 32);

data/.data/spec/std/isa/inst/Zaamo/amoswap.SIZE.AQRL.layout CHANGED Viewed

@@ -68,16 +68,12 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
 <% if aq -%>
   memory_model_acquire();
 <% end -%>
   XReg virtual_address = X[xs1];
-  X[xd] = amo(<%= current_size[:operation_bits] %>, virtual_address, X[xs2]<%= %w[b h w].include?(size) ? "[#{current_size[:bits]-1}:0]" : "" %>, AmoOperation::Swap, <%= aq ? "1'b1" : "1'b0" %>, <%= rl ? "1'b1" : "1'b0" %>, $encoding);
+  X[xd] = <%= %w[b h w].include?(size) ? "sext(" : "" %>amo(<%= current_size[:operation_bits] %>, virtual_address, X[xs2]<%= %w[b h w].include?(size) ? "[#{current_size[:bits]-1}:0]" : "" %>, AmoOperation::Swap, <%= aq ? "1'b1" : "1'b0" %>, <%= rl ? "1'b1" : "1'b0" %>, $encoding)<%= %w[b h w].include?(size) ? ", #{current_size[:bits]})" : "" %>;
 <% if rl -%>
   memory_model_release();

data/.data/spec/std/isa/inst/Zaamo/amoswap.d.aq.yaml CHANGED Viewed

@@ -38,10 +38,6 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];

data/.data/spec/std/isa/inst/Zaamo/amoswap.d.aqrl.yaml CHANGED Viewed

@@ -38,10 +38,6 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   memory_model_acquire();
   XReg virtual_address = X[xs1];

data/.data/spec/std/isa/inst/Zaamo/amoswap.d.rl.yaml CHANGED Viewed

@@ -38,10 +38,6 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
   X[xd] = amo(64, virtual_address, X[xs2], AmoOperation::Swap, 1'b0, 1'b1, $encoding);

data/.data/spec/std/isa/inst/Zaamo/amoswap.d.yaml CHANGED Viewed

@@ -38,9 +38,5 @@ access:
   vs: always
   vu: always
 operation(): |
-  if (implemented?(ExtensionName::A) && MISA_CSR_IMPLEMENTED && CSR[misa].A == 1'b0) {
-    reserved_instruction($encoding);
-  }
   XReg virtual_address = X[xs1];
   X[xd] = amo(64, virtual_address, X[xs2], AmoOperation::Swap, 1'b0, 1'b0, $encoding);