ruby-vpi 16.0.1 → 17.0.0

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (247) hide show
  1. data/LICENSE +19 -19
  2. data/README +1 -1
  3. data/Rakefile +35 -32
  4. data/bin/convert.rb +28 -0
  5. data/bin/generate/design.rb +16 -0
  6. data/bin/generate/proto.rb +13 -0
  7. data/bin/generate/runner.rake +33 -0
  8. data/bin/generate/spec.rb +45 -0
  9. data/bin/generate.rb +177 -0
  10. data/bin/ruby-vpi +56 -0
  11. data/doc/Rakefile +20 -4
  12. data/doc/common.css +92 -33
  13. data/doc/common.inc +13 -0
  14. data/doc/common.tpl +42 -28
  15. data/doc/history.doc +11 -11
  16. data/doc/history.html +769 -248
  17. data/doc/history.inc +909 -0
  18. data/doc/history.rb +9 -0
  19. data/doc/history.yaml +69 -0
  20. data/doc/intro.inc +170 -178
  21. data/doc/lib/doc_format.rb +57 -144
  22. data/doc/lib/doc_proxy.rb +504 -88
  23. data/doc/lib/erb_content.rb +8 -8
  24. data/doc/lib/erb_proxy.rb +17 -17
  25. data/doc/manual.doc +626 -777
  26. data/doc/manual.html +1541 -1031
  27. data/doc/memo.doc +38 -36
  28. data/doc/memo.html +64 -28
  29. data/doc/readme.doc +4 -31
  30. data/doc/readme.html +221 -163
  31. data/doc/rss.erb +1 -1
  32. data/doc/rss.xml +73 -1761
  33. data/ext/Rakefile +6 -5
  34. data/ext/main.c +17 -15
  35. data/ext/relay.c +4 -7
  36. data/ext/relay.h +2 -2
  37. data/ext/swig_vpi.h +2 -2
  38. data/ext/swig_vpi.i +1 -2
  39. data/ext/swig_wrap.cin +12 -16
  40. data/ext/vlog.c +5 -5
  41. data/ext/vlog.h +2 -2
  42. data/lib/ruby-vpi/erb.rb +3 -3
  43. data/lib/ruby-vpi/float.rb +2 -2
  44. data/lib/ruby-vpi/rcov.rb +5 -7
  45. data/lib/ruby-vpi/runner.rb +43 -41
  46. data/lib/ruby-vpi/runner_boot_loader.rb +117 -0
  47. data/lib/ruby-vpi/runner_proxy.rb +6 -8
  48. data/lib/ruby-vpi/util.rb +10 -0
  49. data/lib/ruby-vpi/verilog_parser.rb +28 -56
  50. data/lib/ruby-vpi/vpi.rb +168 -123
  51. data/lib/ruby-vpi.rb +22 -143
  52. data/ref/c/annotated.html +1 -1
  53. data/ref/c/common_8h.html +1 -1
  54. data/ref/c/files.html +1 -1
  55. data/ref/c/functions.html +1 -1
  56. data/ref/c/functions_vars.html +1 -1
  57. data/ref/c/globals.html +1 -1
  58. data/ref/c/globals_0x63.html +1 -1
  59. data/ref/c/globals_0x65.html +1 -1
  60. data/ref/c/globals_0x66.html +1 -1
  61. data/ref/c/globals_0x6d.html +1 -1
  62. data/ref/c/globals_0x70.html +1 -1
  63. data/ref/c/globals_0x72.html +1 -1
  64. data/ref/c/globals_0x73.html +1 -1
  65. data/ref/c/globals_0x74.html +1 -1
  66. data/ref/c/globals_0x76.html +1 -1
  67. data/ref/c/globals_0x78.html +1 -1
  68. data/ref/c/globals_defs.html +1 -1
  69. data/ref/c/globals_defs_0x65.html +1 -1
  70. data/ref/c/globals_defs_0x70.html +1 -1
  71. data/ref/c/globals_defs_0x76.html +1 -1
  72. data/ref/c/globals_defs_0x78.html +1 -1
  73. data/ref/c/globals_enum.html +1 -1
  74. data/ref/c/globals_eval.html +1 -1
  75. data/ref/c/globals_func.html +1 -1
  76. data/ref/c/globals_type.html +1 -1
  77. data/ref/c/globals_vars.html +1 -1
  78. data/ref/c/index.html +1 -1
  79. data/ref/c/main_8c.html +1 -1
  80. data/ref/c/main_8h.html +1 -1
  81. data/ref/c/relay_8c.html +1 -1
  82. data/ref/c/relay_8h.html +1 -1
  83. data/ref/c/structt__cb__data.html +1 -1
  84. data/ref/c/structt__vpi__delay.html +1 -1
  85. data/ref/c/structt__vpi__error__info.html +1 -1
  86. data/ref/c/structt__vpi__strengthval.html +1 -1
  87. data/ref/c/structt__vpi__systf__data.html +1 -1
  88. data/ref/c/structt__vpi__time.html +1 -1
  89. data/ref/c/structt__vpi__value.html +1 -1
  90. data/ref/c/structt__vpi__vecval.html +1 -1
  91. data/ref/c/structt__vpi__vlog__info.html +1 -1
  92. data/ref/c/verilog_8h.html +1 -1
  93. data/ref/c/vlog_8c.html +1 -1
  94. data/ref/c/vlog_8h.html +1 -1
  95. data/ref/c/vpi__user_8h.html +1 -1
  96. data/ref/ruby/classes/ERB.html +5 -5
  97. data/ref/ruby/classes/ERB.src/{M000024.html → M000026.html} +0 -0
  98. data/ref/ruby/classes/FileUtils.html +11 -11
  99. data/ref/ruby/classes/FileUtils.src/{M000025.html → M000027.html} +0 -0
  100. data/ref/ruby/classes/FileUtils.src/{M000026.html → M000028.html} +0 -0
  101. data/ref/ruby/classes/Float.html +6 -6
  102. data/ref/ruby/classes/Float.src/{M000020.html → M000021.html} +0 -0
  103. data/ref/ruby/classes/Integer.html +65 -65
  104. data/ref/ruby/classes/Integer.src/M000009.html +12 -5
  105. data/ref/ruby/classes/Integer.src/M000010.html +5 -5
  106. data/ref/ruby/classes/Integer.src/M000011.html +5 -5
  107. data/ref/ruby/classes/Integer.src/M000012.html +5 -5
  108. data/ref/ruby/classes/Integer.src/M000013.html +5 -5
  109. data/ref/ruby/classes/Integer.src/M000014.html +18 -0
  110. data/ref/ruby/classes/Integer.src/M000017.html +12 -18
  111. data/ref/ruby/classes/Integer.src/M000018.html +18 -12
  112. data/ref/ruby/classes/Integer.src/M000019.html +12 -17
  113. data/ref/ruby/classes/Integer.src/M000020.html +30 -0
  114. data/ref/ruby/classes/RDoc.html +5 -5
  115. data/ref/ruby/classes/RDoc.src/{M000053.html → M000058.html} +0 -0
  116. data/ref/ruby/classes/{RubyVpi/Config.html → RubyVPI.html} +20 -6
  117. data/ref/ruby/classes/String.html +34 -15
  118. data/ref/ruby/classes/String.src/M000022.html +5 -28
  119. data/ref/ruby/classes/String.src/M000023.html +5 -5
  120. data/ref/ruby/classes/String.src/{M000021.html → M000024.html} +0 -0
  121. data/ref/ruby/classes/String.src/M000025.html +41 -0
  122. data/ref/ruby/classes/VerilogParser/Module/Port.html +16 -36
  123. data/ref/ruby/classes/VerilogParser/Module/Port.src/M000006.html +10 -5
  124. data/ref/ruby/classes/VerilogParser/Module/Port.src/{M000004.html → M000007.html} +4 -4
  125. data/ref/ruby/classes/VerilogParser/Module/Port.src/{M000005.html → M000008.html} +4 -4
  126. data/ref/ruby/classes/VerilogParser/Module.html +28 -9
  127. data/ref/ruby/classes/VerilogParser/Module.src/M000005.html +29 -0
  128. data/ref/ruby/classes/VerilogParser.html +5 -39
  129. data/ref/ruby/classes/VerilogParser.src/M000004.html +26 -0
  130. data/ref/ruby/classes/Vpi/Handle.html +179 -77
  131. data/ref/ruby/classes/Vpi/Handle.src/M000035.html +18 -0
  132. data/ref/ruby/classes/Vpi/Handle.src/M000036.html +5 -5
  133. data/ref/ruby/classes/Vpi/Handle.src/M000037.html +5 -5
  134. data/ref/ruby/classes/Vpi/Handle.src/M000038.html +5 -5
  135. data/ref/ruby/classes/Vpi/Handle.src/M000039.html +5 -5
  136. data/ref/ruby/classes/Vpi/Handle.src/M000040.html +5 -8
  137. data/ref/ruby/classes/Vpi/Handle.src/M000041.html +5 -8
  138. data/ref/ruby/classes/Vpi/Handle.src/M000042.html +5 -9
  139. data/ref/ruby/classes/Vpi/Handle.src/M000043.html +8 -31
  140. data/ref/ruby/classes/Vpi/Handle.src/M000044.html +8 -74
  141. data/ref/ruby/classes/Vpi/Handle.src/M000045.html +9 -17
  142. data/ref/ruby/classes/Vpi/Handle.src/M000046.html +31 -11
  143. data/ref/ruby/classes/Vpi/Handle.src/M000047.html +86 -0
  144. data/ref/ruby/classes/Vpi/Handle.src/M000048.html +17 -18
  145. data/ref/ruby/classes/Vpi/Handle.src/M000050.html +18 -0
  146. data/ref/ruby/classes/Vpi/Handle.src/M000051.html +24 -0
  147. data/ref/ruby/classes/Vpi/Handle.src/M000053.html +31 -0
  148. data/ref/ruby/classes/Vpi/Handle.src/M000054.html +89 -0
  149. data/ref/ruby/classes/Vpi/S_vpi_time.html +16 -16
  150. data/ref/ruby/classes/Vpi/S_vpi_time.src/{M000050.html → M000055.html} +4 -4
  151. data/ref/ruby/classes/Vpi/S_vpi_time.src/{M000051.html → M000056.html} +5 -5
  152. data/ref/ruby/classes/Vpi/S_vpi_value.html +15 -15
  153. data/ref/ruby/classes/Vpi/S_vpi_value.src/{M000035.html → M000032.html} +5 -5
  154. data/ref/ruby/classes/Vpi/S_vpi_value.src/M000033.html +5 -5
  155. data/ref/ruby/classes/Vpi/S_vpi_value.src/M000034.html +5 -5
  156. data/ref/ruby/classes/Vpi.html +6 -42
  157. data/ref/ruby/classes/Vpi.src/M000029.html +15 -5
  158. data/ref/ruby/classes/Vpi.src/M000030.html +24 -24
  159. data/ref/ruby/classes/Vpi.src/M000031.html +6 -8
  160. data/ref/ruby/created.rid +1 -1
  161. data/ref/ruby/files/bin/{header_to_ruby_rb.html → convert_rb.html} +5 -5
  162. data/ref/ruby/files/bin/{generate_test_rb.html → generate_rb.html} +8 -21
  163. data/ref/ruby/files/lib/ruby-vpi/erb_rb.html +1 -1
  164. data/ref/ruby/files/lib/ruby-vpi/float_rb.html +1 -1
  165. data/ref/ruby/files/lib/ruby-vpi/integer_rb.html +1 -1
  166. data/ref/ruby/files/lib/ruby-vpi/rake_rb.html +1 -1
  167. data/ref/ruby/files/lib/ruby-vpi/rcov_rb.html +1 -1
  168. data/ref/ruby/files/lib/ruby-vpi/rdoc_rb.html +1 -1
  169. data/ref/ruby/files/lib/ruby-vpi/runner_boot_loader_rb.html +197 -0
  170. data/ref/ruby/files/lib/ruby-vpi/runner_boot_loader_rb.src/M000001.html +17 -0
  171. data/ref/ruby/files/lib/ruby-vpi/runner_boot_loader_rb.src/M000002.html +18 -0
  172. data/ref/ruby/files/lib/ruby-vpi/runner_proxy_rb.html +1 -1
  173. data/ref/ruby/files/lib/ruby-vpi/runner_rb.html +6 -19
  174. data/ref/ruby/files/lib/ruby-vpi/util_rb.html +101 -0
  175. data/ref/ruby/files/lib/ruby-vpi/verilog_parser_rb.html +8 -1
  176. data/ref/ruby/files/lib/ruby-vpi/vpi_rb.html +1 -1
  177. data/ref/ruby/files/lib/ruby-vpi_rb.html +2 -14
  178. data/ref/ruby/fr_class_index.html +1 -3
  179. data/ref/ruby/fr_file_index.html +4 -2
  180. data/ref/ruby/fr_method_index.html +56 -51
  181. data/ref/ruby/index.html +1 -1
  182. data/samp/counter/RSpec/Rakefile +1 -0
  183. data/samp/counter/RSpec/counter_design.rb +15 -0
  184. data/samp/counter/RSpec/counter_proto.rb +10 -0
  185. data/samp/counter/RSpec/counter_runner.rake +44 -0
  186. data/samp/counter/RSpec/counter_spec.rb +39 -0
  187. data/samp/counter/Rakefile +1 -1
  188. data/samp/counter/counter.v +7 -7
  189. data/samp/counter/xUnit/Rakefile +1 -0
  190. data/samp/counter/xUnit/counter_bench.rb +95 -0
  191. data/samp/counter/{counter_xunit_bench.v → xUnit/counter_bench.v} +0 -0
  192. data/samp/counter/xUnit/counter_design.rb +15 -0
  193. data/samp/counter/xUnit/counter_proto.rb +10 -0
  194. data/samp/counter/xUnit/counter_runner.rake +44 -0
  195. data/samp/counter/{counter_xunit_spec.rb → xUnit/counter_spec.rb} +9 -9
  196. data/samp/pipelined_alu/Rakefile +1 -1
  197. data/samp/pipelined_alu/TestHw5UnitModel.rb +4 -5
  198. data/samp/pipelined_alu/hw5_unit.v +55 -85
  199. data/samp/pipelined_alu/hw5_unit_design.rb +51 -0
  200. data/samp/pipelined_alu/hw5_unit_proto.rb +4 -0
  201. data/samp/pipelined_alu/hw5_unit_runner.rake +43 -0
  202. data/samp/pipelined_alu/hw5_unit_spec.rb +64 -0
  203. data/samp/register_file/LICENSE +20 -0
  204. data/samp/register_file/README +4 -0
  205. data/samp/register_file/Rakefile +1 -0
  206. data/samp/register_file/register_file.v +18 -0
  207. data/samp/register_file/register_file_design.rb +11 -0
  208. data/samp/register_file/register_file_proto.rb +11 -0
  209. data/samp/register_file/register_file_runner.rake +43 -0
  210. data/samp/register_file/register_file_spec.rb +58 -0
  211. metadata +78 -66
  212. data/bin/generate_test.rb +0 -200
  213. data/bin/generate_test_tpl/bench.rb +0 -89
  214. data/bin/generate_test_tpl/bench.v +0 -26
  215. data/bin/generate_test_tpl/design.rb +0 -11
  216. data/bin/generate_test_tpl/proto.rb +0 -16
  217. data/bin/generate_test_tpl/runner.rake +0 -42
  218. data/bin/generate_test_tpl/spec.rb +0 -37
  219. data/bin/header_to_ruby.rb +0 -27
  220. data/ref/ruby/classes/Integer.src/M000008.html +0 -25
  221. data/ref/ruby/classes/Integer.src/M000016.html +0 -25
  222. data/ref/ruby/classes/RubyVpi.html +0 -199
  223. data/ref/ruby/classes/RubyVpi.src/M000027.html +0 -121
  224. data/ref/ruby/classes/VerilogParser/Module/Parameter.html +0 -160
  225. data/ref/ruby/classes/VerilogParser/Module/Parameter.src/M000007.html +0 -19
  226. data/ref/ruby/classes/VerilogParser/Module/Port.src/M000003.html +0 -21
  227. data/ref/ruby/classes/VerilogParser/Module.src/M000002.html +0 -34
  228. data/ref/ruby/classes/VerilogParser.src/M000001.html +0 -34
  229. data/ref/ruby/classes/Vpi/Handle.src/M000049.html +0 -69
  230. data/ref/ruby/classes/Vpi.src/M000028.html +0 -28
  231. data/ref/ruby/classes/Vpi.src/M000032.html +0 -22
  232. data/samp/counter/counter_rspec_bench.rb +0 -86
  233. data/samp/counter/counter_rspec_bench.v +0 -9
  234. data/samp/counter/counter_rspec_design.rb +0 -8
  235. data/samp/counter/counter_rspec_proto.rb +0 -13
  236. data/samp/counter/counter_rspec_runner.rake +0 -52
  237. data/samp/counter/counter_rspec_spec.rb +0 -39
  238. data/samp/counter/counter_xunit_bench.rb +0 -86
  239. data/samp/counter/counter_xunit_design.rb +0 -8
  240. data/samp/counter/counter_xunit_proto.rb +0 -13
  241. data/samp/counter/counter_xunit_runner.rake +0 -52
  242. data/samp/pipelined_alu/hw5_unit_test_bench.rb +0 -86
  243. data/samp/pipelined_alu/hw5_unit_test_bench.v +0 -14
  244. data/samp/pipelined_alu/hw5_unit_test_design.rb +0 -61
  245. data/samp/pipelined_alu/hw5_unit_test_proto.rb +0 -7
  246. data/samp/pipelined_alu/hw5_unit_test_runner.rake +0 -52
  247. data/samp/pipelined_alu/hw5_unit_test_spec.rb +0 -68
data/ref/ruby/files/lib/ruby-vpi/util_rb.html ADDED
@@ -0,0 +1,101 @@
1
+ <?xml version="1.0" encoding="utf-8"?>
2
+ <!DOCTYPE html
3
+ PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN"
4
+ "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
5
+
6
+ <html xmlns="http://www.w3.org/1999/xhtml" xml:lang="en" lang="en">
7
+ <head>
8
+ <title>File: util.rb</title>
9
+ <meta http-equiv="Content-Type" content="text/html; charset=utf-8" />
10
+ <meta http-equiv="Content-Script-Type" content="text/javascript" />
11
+ <link rel="stylesheet" href="../../.././rdoc-style.css" type="text/css" media="screen" />
12
+ <script type="text/javascript">
13
+ // <![CDATA[
14
+
15
+ function popupCode( url ) {
16
+ window.open(url, "Code", "resizable=yes,scrollbars=yes,toolbar=no,status=no,height=150,width=400")
17
+ }
18
+
19
+ function toggleCode( id ) {
20
+ if ( document.getElementById )
21
+ elem = document.getElementById( id );
22
+ else if ( document.all )
23
+ elem = eval( "document.all." + id );
24
+ else
25
+ return false;
26
+
27
+ elemStyle = elem.style;
28
+
29
+ if ( elemStyle.display != "block" ) {
30
+ elemStyle.display = "block"
31
+ } else {
32
+ elemStyle.display = "none"
33
+ }
34
+
35
+ return true;
36
+ }
37
+
38
+ // Make codeblocks hidden by default
39
+ document.writeln( "<style type=\"text/css\">div.method-source-code { display: none }</style>" )
40
+
41
+ // ]]>
42
+ </script>
43
+
44
+ </head>
45
+ <body>
46
+
47
+
48
+
49
+ <div id="fileHeader">
50
+ <h1>util.rb</h1>
51
+ <table class="header-table">
52
+ <tr class="top-aligned-row">
53
+ <td><strong>Path:</strong></td>
54
+ <td>lib/ruby-vpi/util.rb
55
+ </td>
56
+ </tr>
57
+ <tr class="top-aligned-row">
58
+ <td><strong>Last Update:</strong></td>
59
+ <td>Sun Jul 22 17:47:11 -0700 2007</td>
60
+ </tr>
61
+ </table>
62
+ </div>
63
+ <!-- banner header -->
64
+
65
+ <div id="bodyContent">
66
+
67
+
68
+
69
+ <div id="contextContent">
70
+
71
+
72
+
73
+ </div>
74
+
75
+
76
+ </div>
77
+
78
+
79
+ <!-- if includes -->
80
+
81
+ <div id="section">
82
+
83
+
84
+
85
+
86
+
87
+
88
+
89
+
90
+ <!-- if method_list -->
91
+
92
+
93
+ </div>
94
+
95
+
96
+ <div id="validator-badges">
97
+ <p><small><a href="http://validator.w3.org/check/referer">[Validate]</a></small></p>
98
+ </div>
99
+
100
+ </body>
101
+ </html>
data/ref/ruby/files/lib/ruby-vpi/verilog_parser_rb.html CHANGED
@@ -56,7 +56,7 @@
56
56
  </tr>
57
57
  <tr class="top-aligned-row">
58
58
  <td><strong>Last Update:</strong></td>
59
- <td>Sat May 26 23:19:45 -0700 2007</td>
59
+ <td>Sun Jul 22 17:47:11 -0700 2007</td>
60
60
  </tr>
61
61
  </table>
62
62
  </div>
@@ -75,6 +75,13 @@ A library for parsing Verilog source code.
75
75
 
76
76
  </div>
77
77
 
78
+ <div id="requires-list">
79
+ <h3 class="section-bar">Required files</h3>
80
+
81
+ <div class="name-list">
82
+ ruby-vpi/util&nbsp;&nbsp;
83
+ </div>
84
+ </div>
78
85
 
79
86
  </div>
80
87
 
data/ref/ruby/files/lib/ruby-vpi/vpi_rb.html CHANGED
@@ -56,7 +56,7 @@
56
56
  </tr>
57
57
  <tr class="top-aligned-row">
58
58
  <td><strong>Last Update:</strong></td>
59
- <td>Sat May 26 23:19:45 -0700 2007</td>
59
+ <td>Sun Jul 22 17:47:11 -0700 2007</td>
60
60
  </tr>
61
61
  </table>
62
62
  </div>
data/ref/ruby/files/lib/ruby-vpi_rb.html CHANGED
@@ -56,7 +56,7 @@
56
56
  </tr>
57
57
  <tr class="top-aligned-row">
58
58
  <td><strong>Last Update:</strong></td>
59
- <td>Sat May 26 23:19:45 -0700 2007</td>
59
+ <td>Sun Jul 22 17:47:11 -0700 2007</td>
60
60
  </tr>
61
61
  </table>
62
62
  </div>
@@ -70,23 +70,11 @@
70
70
 
71
71
  <div id="description">
72
72
  <p>
73
- General Ruby-VPI project information and testbench bootstrapping.
73
+ General project information.
74
74
  </p>
75
75
 
76
76
  </div>
77
77
 
78
- <div id="requires-list">
79
- <h3 class="section-bar">Required files</h3>
80
-
81
- <div class="name-list">
82
- ruby-vpi/vpi&nbsp;&nbsp;
83
- ruby-vpi/rcov&nbsp;&nbsp;
84
- test/unit&nbsp;&nbsp;
85
- spec&nbsp;&nbsp;
86
- test/spec&nbsp;&nbsp;
87
- ruby-debug&nbsp;&nbsp;
88
- </div>
89
- </div>
90
78
 
91
79
  </div>
92
80
 
data/ref/ruby/fr_class_index.html CHANGED
@@ -25,12 +25,10 @@
25
25
  <a href="classes/Float.html">Float</a><br />
26
26
  <a href="classes/Integer.html">Integer</a><br />
27
27
  <a href="classes/RDoc.html">RDoc</a><br />
28
- <a href="classes/RubyVpi.html">RubyVpi</a><br />
29
- <a href="classes/RubyVpi/Config.html">RubyVpi::Config</a><br />
28
+ <a href="classes/RubyVPI.html">RubyVPI</a><br />
30
29
  <a href="classes/String.html">String</a><br />
31
30
  <a href="classes/VerilogParser.html">VerilogParser</a><br />
32
31
  <a href="classes/VerilogParser/Module.html">VerilogParser::Module</a><br />
33
- <a href="classes/VerilogParser/Module/Parameter.html">VerilogParser::Module::Parameter</a><br />
34
32
  <a href="classes/VerilogParser/Module/Port.html">VerilogParser::Module::Port</a><br />
35
33
  <a href="classes/Vpi.html">Vpi</a><br />
36
34
  <a href="classes/Vpi/Handle.html">Vpi::Handle</a><br />
data/ref/ruby/fr_file_index.html CHANGED
@@ -20,8 +20,8 @@
20
20
  <div id="index">
21
21
  <h1 class="section-bar">Files</h1>
22
22
  <div id="index-entries">
23
- <a href="files/bin/generate_test_rb.html">bin/generate_test.rb</a><br />
24
- <a href="files/bin/header_to_ruby_rb.html">bin/header_to_ruby.rb</a><br />
23
+ <a href="files/bin/convert_rb.html">bin/convert.rb</a><br />
24
+ <a href="files/bin/generate_rb.html">bin/generate.rb</a><br />
25
25
  <a href="files/lib/ruby-vpi_rb.html">lib/ruby-vpi.rb</a><br />
26
26
  <a href="files/lib/ruby-vpi/erb_rb.html">lib/ruby-vpi/erb.rb</a><br />
27
27
  <a href="files/lib/ruby-vpi/float_rb.html">lib/ruby-vpi/float.rb</a><br />
@@ -30,7 +30,9 @@
30
30
  <a href="files/lib/ruby-vpi/rcov_rb.html">lib/ruby-vpi/rcov.rb</a><br />
31
31
  <a href="files/lib/ruby-vpi/rdoc_rb.html">lib/ruby-vpi/rdoc.rb</a><br />
32
32
  <a href="files/lib/ruby-vpi/runner_rb.html">lib/ruby-vpi/runner.rb</a><br />
33
+ <a href="files/lib/ruby-vpi/runner_boot_loader_rb.html">lib/ruby-vpi/runner_boot_loader.rb</a><br />
33
34
  <a href="files/lib/ruby-vpi/runner_proxy_rb.html">lib/ruby-vpi/runner_proxy.rb</a><br />
35
+ <a href="files/lib/ruby-vpi/util_rb.html">lib/ruby-vpi/util.rb</a><br />
34
36
  <a href="files/lib/ruby-vpi/verilog_parser_rb.html">lib/ruby-vpi/verilog_parser.rb</a><br />
35
37
  <a href="files/lib/ruby-vpi/vpi_rb.html">lib/ruby-vpi/vpi.rb</a><br />
36
38
  </div>
data/ref/ruby/fr_method_index.html CHANGED
@@ -20,59 +20,64 @@
20
20
  <div id="index">
21
21
  <h1 class="section-bar">Methods</h1>
22
22
  <div id="index-entries">
23
- <a href="classes/Vpi/Handle.html#M000045">[] (Vpi::Handle)</a><br />
23
+ <a href="classes/Vpi/Handle.html#M000050"><=> (Vpi::Handle)</a><br />
24
+ <a href="classes/Vpi/Handle.html#M000048">[] (Vpi::Handle)</a><br />
24
25
  <a href="classes/Vpi.html#M000030">advance_time (Vpi)</a><br />
25
- <a href="classes/Vpi/Handle.html#M000048">cbValueChange (Vpi::Handle)</a><br />
26
- <a href="classes/FileUtils.html#M000026">collect_args (FileUtils)</a><br />
27
- <a href="classes/Integer.html#M000018">extend_sign (Integer)</a><br />
28
- <a href="classes/Vpi/Handle.html#M000043">get_value (Vpi::Handle)</a><br />
29
- <a href="classes/Vpi/Handle.html#M000042">get_value_wrapper (Vpi::Handle)</a><br />
30
- <a href="classes/RubyVpi.html#M000027">init_bench (RubyVpi)</a><br />
31
- <a href="classes/VerilogParser/Module/Port.html#M000004">input? (VerilogParser::Module::Port)</a><br />
32
- <a href="classes/Vpi/Handle.html#M000046">inspect (Vpi::Handle)</a><br />
33
- <a href="classes/Vpi/S_vpi_time.html#M000050">integer (Vpi::S_vpi_time)</a><br />
34
- <a href="classes/Vpi/S_vpi_time.html#M000051">integer= (Vpi::S_vpi_time)</a><br />
35
- <a href="classes/Integer.html#M000009">length (Integer)</a><br />
36
- <a href="classes/Integer.html#M000010">limit (Integer)</a><br />
37
- <a href="classes/Integer.html#M000008">log2 (Integer)</a><br />
38
- <a href="classes/Float.html#M000020">mantissa (Float)</a><br />
39
- <a href="classes/Integer.html#M000012">mask (Integer)</a><br />
40
- <a href="classes/Integer.html#M000014">max (Integer)</a><br />
41
- <a href="classes/Vpi/Handle.html#M000049">method_missing (Vpi::Handle)</a><br />
42
- <a href="classes/Vpi/Handle.html#M000041">negedge? (Vpi::Handle)</a><br />
43
- <a href="classes/VerilogParser.html#M000001">new (VerilogParser)</a><br />
44
- <a href="classes/VerilogParser/Module/Parameter.html#M000007">new (VerilogParser::Module::Parameter)</a><br />
45
- <a href="classes/Vpi.html#M000032">new (Vpi)</a><br />
46
- <a href="classes/ERB.html#M000024">new (ERB)</a><br />
47
- <a href="classes/VerilogParser/Module/Port.html#M000003">new (VerilogParser::Module::Port)</a><br />
48
- <a href="classes/VerilogParser/Module.html#M000002">new (VerilogParser::Module)</a><br />
49
- <a href="classes/VerilogParser/Module/Port.html#M000005">output? (VerilogParser::Module::Port)</a><br />
50
- <a href="classes/Integer.html#M000016">pack (Integer)</a><br />
51
- <a href="classes/Vpi/Handle.html#M000040">posedge? (Vpi::Handle)</a><br />
52
- <a href="classes/Vpi/Handle.html#M000044">put_value (Vpi::Handle)</a><br />
53
- <a href="classes/VerilogParser/Module/Port.html#M000006">reg? (VerilogParser::Module::Port)</a><br />
54
- <a href="classes/FileUtils.html#M000025">sh (FileUtils)</a><br />
55
- <a href="classes/Vpi.html#M000029">simulate (Vpi)</a><br />
26
+ <a href="classes/Vpi/Handle.html#M000053">cbValueChange (Vpi::Handle)</a><br />
27
+ <a href="classes/FileUtils.html#M000028">collect_args (FileUtils)</a><br />
28
+ <a href="files/lib/ruby-vpi/runner_boot_loader_rb.html#M000003">const_missing (lib/ruby-vpi/runner_boot_loader.rb)</a><br />
29
+ <a href="files/lib/ruby-vpi/runner_boot_loader_rb.html#M000001">debugger (lib/ruby-vpi/runner_boot_loader.rb)</a><br />
30
+ <a href="classes/Integer.html#M000019">extend_sign (Integer)</a><br />
31
+ <a href="classes/Vpi/Handle.html#M000046">get_value (Vpi::Handle)</a><br />
32
+ <a href="classes/Vpi/Handle.html#M000045">get_value_wrapper (Vpi::Handle)</a><br />
33
+ <a href="classes/Vpi/Handle.html#M000040">high! (Vpi::Handle)</a><br />
34
+ <a href="classes/Vpi/Handle.html#M000039">high? (Vpi::Handle)</a><br />
35
+ <a href="classes/VerilogParser/Module/Port.html#M000007">input? (VerilogParser::Module::Port)</a><br />
36
+ <a href="classes/Vpi/Handle.html#M000051">inspect (Vpi::Handle)</a><br />
37
+ <a href="classes/Vpi/S_vpi_time.html#M000055">integer (Vpi::S_vpi_time)</a><br />
38
+ <a href="classes/Vpi/S_vpi_time.html#M000056">integer= (Vpi::S_vpi_time)</a><br />
39
+ <a href="classes/Integer.html#M000010">length (Integer)</a><br />
40
+ <a href="classes/Integer.html#M000011">limit (Integer)</a><br />
41
+ <a href="classes/Integer.html#M000009">log2 (Integer)</a><br />
42
+ <a href="classes/Vpi/Handle.html#M000042">low! (Vpi::Handle)</a><br />
43
+ <a href="classes/Vpi/Handle.html#M000041">low? (Vpi::Handle)</a><br />
44
+ <a href="classes/Float.html#M000021">mantissa (Float)</a><br />
45
+ <a href="classes/Integer.html#M000013">mask (Integer)</a><br />
46
+ <a href="classes/Integer.html#M000015">max (Integer)</a><br />
47
+ <a href="files/lib/ruby-vpi/runner_boot_loader_rb.html#M000002">method_missing (lib/ruby-vpi/runner_boot_loader.rb)</a><br />
48
+ <a href="classes/Vpi/Handle.html#M000054">method_missing (Vpi::Handle)</a><br />
49
+ <a href="classes/Vpi/Handle.html#M000044">negedge? (Vpi::Handle)</a><br />
50
+ <a href="classes/VerilogParser/Module.html#M000005">new (VerilogParser::Module)</a><br />
51
+ <a href="classes/VerilogParser/Module/Port.html#M000006">new (VerilogParser::Module::Port)</a><br />
52
+ <a href="classes/ERB.html#M000026">new (ERB)</a><br />
53
+ <a href="classes/VerilogParser.html#M000004">new (VerilogParser)</a><br />
54
+ <a href="classes/VerilogParser/Module/Port.html#M000008">output? (VerilogParser::Module::Port)</a><br />
55
+ <a href="classes/Integer.html#M000017">pack (Integer)</a><br />
56
+ <a href="classes/Vpi/Handle.html#M000043">posedge? (Vpi::Handle)</a><br />
57
+ <a href="classes/Vpi/Handle.html#M000047">put_value (Vpi::Handle)</a><br />
58
+ <a href="classes/String.html#M000023">rstrip_from (String)</a><br />
59
+ <a href="classes/FileUtils.html#M000027">sh (FileUtils)</a><br />
56
60
  <a href="classes/Vpi.html#M000031">simulation_time (Vpi)</a><br />
57
- <a href="classes/Integer.html#M000019">split (Integer)</a><br />
58
- <a href="classes/Vpi/S_vpi_value.html#M000034">to_f (Vpi::S_vpi_value)</a><br />
59
- <a href="classes/String.html#M000021">to_f (String)</a><br />
60
- <a href="classes/Vpi/S_vpi_time.html#M000052">to_i (Vpi::S_vpi_time)</a><br />
61
- <a href="classes/Vpi/S_vpi_value.html#M000033">to_i (Vpi::S_vpi_value)</a><br />
62
- <a href="classes/Integer.html#M000011">to_limit (Integer)</a><br />
63
- <a href="classes/Integer.html#M000013">to_mask (Integer)</a><br />
64
- <a href="classes/Integer.html#M000015">to_max (Integer)</a><br />
65
- <a href="classes/String.html#M000023">to_ruby_const_name (String)</a><br />
66
- <a href="classes/Vpi/Handle.html#M000047">to_s (Vpi::Handle)</a><br />
67
- <a href="classes/Vpi/S_vpi_value.html#M000035">to_s (Vpi::S_vpi_value)</a><br />
68
- <a href="classes/Integer.html#M000017">unpack (Integer)</a><br />
69
- <a href="classes/RDoc.html#M000053">usage_from_file (RDoc)</a><br />
70
- <a href="classes/String.html#M000022">verilog_to_ruby (String)</a><br />
71
- <a href="classes/Vpi.html#M000028">vpi_register_cb (Vpi)</a><br />
72
- <a href="classes/Vpi/Handle.html#M000037">x! (Vpi::Handle)</a><br />
73
- <a href="classes/Vpi/Handle.html#M000036">x? (Vpi::Handle)</a><br />
74
- <a href="classes/Vpi/Handle.html#M000039">z! (Vpi::Handle)</a><br />
75
- <a href="classes/Vpi/Handle.html#M000038">z? (Vpi::Handle)</a><br />
61
+ <a href="classes/Integer.html#M000020">split (Integer)</a><br />
62
+ <a href="classes/Vpi/Handle.html#M000049">to_a (Vpi::Handle)</a><br />
63
+ <a href="classes/String.html#M000024">to_f (String)</a><br />
64
+ <a href="classes/Vpi/S_vpi_value.html#M000033">to_f (Vpi::S_vpi_value)</a><br />
65
+ <a href="classes/Vpi/S_vpi_value.html#M000032">to_i (Vpi::S_vpi_value)</a><br />
66
+ <a href="classes/Vpi/S_vpi_time.html#M000057">to_i (Vpi::S_vpi_time)</a><br />
67
+ <a href="classes/Integer.html#M000012">to_limit (Integer)</a><br />
68
+ <a href="classes/Integer.html#M000014">to_mask (Integer)</a><br />
69
+ <a href="classes/Integer.html#M000016">to_max (Integer)</a><br />
70
+ <a href="classes/String.html#M000022">to_ruby_const_name (String)</a><br />
71
+ <a href="classes/Vpi/S_vpi_value.html#M000034">to_s (Vpi::S_vpi_value)</a><br />
72
+ <a href="classes/Vpi/Handle.html#M000052">to_s (Vpi::Handle)</a><br />
73
+ <a href="classes/Integer.html#M000018">unpack (Integer)</a><br />
74
+ <a href="classes/RDoc.html#M000058">usage_from_file (RDoc)</a><br />
75
+ <a href="classes/String.html#M000025">verilog_to_ruby (String)</a><br />
76
+ <a href="classes/Vpi.html#M000029">vpi_register_cb (Vpi)</a><br />
77
+ <a href="classes/Vpi/Handle.html#M000036">x! (Vpi::Handle)</a><br />
78
+ <a href="classes/Vpi/Handle.html#M000035">x? (Vpi::Handle)</a><br />
79
+ <a href="classes/Vpi/Handle.html#M000038">z! (Vpi::Handle)</a><br />
80
+ <a href="classes/Vpi/Handle.html#M000037">z? (Vpi::Handle)</a><br />
76
81
  </div>
77
82
  </div>
78
83
  </body>
data/ref/ruby/index.html CHANGED
@@ -19,6 +19,6 @@
19
19
  <frame src="fr_class_index.html" name="Classes" />
20
20
  <frame src="fr_method_index.html" name="Methods" />
21
21
  </frameset>
22
- <frame src="files/bin/generate_test_rb.html" name="docwin" />
22
+ <frame src="files/bin/convert_rb.html" name="docwin" />
23
23
  </frameset>
24
24
  </html>
data/samp/counter/RSpec/Rakefile ADDED
@@ -0,0 +1 @@
1
+ require 'ruby-vpi/runner_proxy'
data/samp/counter/RSpec/counter_design.rb ADDED
@@ -0,0 +1,15 @@
1
+
2
+ # Simulates the design under test for one clock cycle.
3
+ def cycle!
4
+ clock.high!
5
+ advance_time
6
+ clock.low!
7
+ advance_time
8
+ end
9
+
10
+ # Brings the design under test into a blank state.
11
+ def reset!
12
+ reset.high!
13
+ cycle!
14
+ reset.low!
15
+ end
data/samp/counter/RSpec/counter_proto.rb ADDED
@@ -0,0 +1,10 @@
1
+ # Ruby prototype of the design under test's Verilog implementation.
2
+ def feign!
3
+ if clock.posedge?
4
+ if reset.high?
5
+ count.intVal = 0
6
+ else
7
+ count.intVal += 1
8
+ end
9
+ end
10
+ end
data/samp/counter/RSpec/counter_runner.rake ADDED
@@ -0,0 +1,44 @@
1
+ # Array of paths and shell globs (see the Dir.glob method's documentation for
2
+ # details) to source files and directories that contain source files. These
3
+ # source files will be loaded by the simulator before the simulation begins.
4
+ SIMULATOR_SOURCES = FileList[
5
+ 'counter.v',
6
+ '..'
7
+ ]
8
+
9
+ # Command-line arguments for the simulator. These arguments can be
10
+ # specified as a string or an array of strings, as demonstrated below:
11
+ #
12
+ # :cver => "this is a single string argument",
13
+ # :cver => ["these", "are", "separate", "arguments"],
14
+ # :cver => %w[these are also separate arguments],
15
+ #
16
+ SIMULATOR_ARGUMENTS = {
17
+ # GPL Cver
18
+ :cver => "",
19
+
20
+ # Icarus Verilog
21
+ :ivl => "",
22
+
23
+ # Synopsys VCS
24
+ :vcs => "",
25
+
26
+ # Mentor Modelsim
27
+ :vsim => "",
28
+
29
+ # Cadence NC-Sim
30
+ :ncsim => "",
31
+
32
+ }
33
+
34
+ # This task is invoked before the simulator runs. It
35
+ # can be used to make preprations, such as converting
36
+ # Verilog header files into Ruby, for the simulation.
37
+ task :setup do
38
+ # To learn how to write Rake tasks, please see:
39
+ # http://docs.rubyrake.org/read/chapter/4#page16
40
+ end
41
+
42
+ # This command loads the Ruby-VPI runner template,
43
+ # which runs the simulator using the above parameters.
44
+ require 'ruby-vpi/runner'
data/samp/counter/RSpec/counter_spec.rb ADDED
@@ -0,0 +1,39 @@
1
+ require 'spec'
2
+
3
+ # lowest upper bound of counter's value
4
+ LIMIT = 2 ** Counter::Size
5
+
6
+ # maximum allowed value for a counter
7
+ MAX = LIMIT - 1
8
+
9
+ describe "A resetted counter's value" do
10
+ setup do
11
+ Counter.reset!
12
+ end
13
+
14
+ it "should be zero" do
15
+ Counter.count.intVal.should == 0
16
+ end
17
+
18
+ it "should increment upon each rising clock edge" do
19
+ LIMIT.times do |i|
20
+ Counter.count.intVal.should == i
21
+ Counter.cycle! # increment the counter
22
+ end
23
+ end
24
+ end
25
+
26
+ describe "A counter with the maximum value" do
27
+ setup do
28
+ Counter.reset!
29
+
30
+ # increment the counter to maximum value
31
+ MAX.times { Counter.cycle! }
32
+ Counter.count.intVal.should == MAX
33
+ end
34
+
35
+ it "should overflow upon increment" do
36
+ Counter.cycle! # increment the counter
37
+ Counter.count.intVal.should == 0
38
+ end
39
+ end
data/samp/counter/Rakefile CHANGED
@@ -1 +1 @@
1
- require 'ruby-vpi/runner_proxy'
1
+ require 'ruby-vpi/runner_proxy'
data/samp/counter/counter.v CHANGED
@@ -1,15 +1,15 @@
1
1
  /**
2
2
  A simple up-counter with synchronous reset.
3
3
 
4
- @param Size Number of bits used to represent the counter's value.
5
- @param clock Increments the counter's value upon each positive edge.
6
- @param reset Zeroes the counter's value when asserted.
7
- @param count The counter's value.
4
+ @param Size Number of bits used to represent the counter's value.
5
+ @param clock Increments the counter's value upon each positive edge.
6
+ @param reset Zeroes the counter's value when asserted.
7
+ @param count The counter's value.
8
8
  */
9
9
  module counter #(parameter Size = 5) (
10
- input clock,
11
- input reset,
12
- output reg [Size - 1 : 0] count
10
+ input clock,
11
+ input reset,
12
+ output reg [Size-1 : 0] count
13
13
  );
14
14
  always @(posedge clock) begin
15
15
  if (reset)
data/samp/counter/xUnit/Rakefile ADDED
@@ -0,0 +1 @@
1
+ require 'ruby-vpi/runner_proxy'
data/samp/counter/xUnit/counter_bench.rb ADDED
@@ -0,0 +1,95 @@
1
+ # This file is the Ruby side of the bench.
2
+
3
+ require 'rubygems'
4
+ require 'ruby-vpi'
5
+
6
+ RubyVpi.init_bench(:Counter, :xUnit) do
7
+ # This block of code is executed whenever the "simulate" method
8
+ # is invoked by the specification. The purpose of this block
9
+ # of code is to simulate the design under test by (typically)
10
+ # toggling the clock signal, as demonstrated below.
11
+
12
+ clock = Counter.clock
13
+ numSteps = 1
14
+
15
+ ##############################################################################
16
+ # We are currently at the position indicated by the exclamation marks (!):
17
+ #
18
+ # !
19
+ # !
20
+ # ! ____________________ _________________
21
+ # ! / \ /
22
+ # ! / \ /
23
+ # _________!_/ \__________________/
24
+ # !
25
+ # !
26
+ #
27
+ ##############################################################################
28
+
29
+ clock.intVal = 1
30
+
31
+ ##############################################################################
32
+ # After setting the clock signal to high, we are here:
33
+ #
34
+ # !
35
+ # !
36
+ # _!__________________ _________________
37
+ # / ! \ /
38
+ # / ! \ /
39
+ # ___________/ ! \__________________/
40
+ # !
41
+ # !
42
+ #
43
+ ##############################################################################
44
+
45
+ advance_time(numSteps)
46
+
47
+ ##############################################################################
48
+ # After advancing the time, we are here:
49
+ #
50
+ # !
51
+ # !
52
+ # __________________!_ _________________
53
+ # / ! \ /
54
+ # / ! \ /
55
+ # ___________/ ! \__________________/
56
+ # !
57
+ # !
58
+ #
59
+ ##############################################################################
60
+
61
+ clock.intVal = 0
62
+
63
+ ##############################################################################
64
+ # After setting the clock signal to low, we are here:
65
+ #
66
+ # !
67
+ # !
68
+ # ____________________ ! _________________
69
+ # / \ ! /
70
+ # / \ ! /
71
+ # ___________/ \_!________________/
72
+ # !
73
+ # !
74
+ #
75
+ ##############################################################################
76
+
77
+ advance_time(numSteps)
78
+
79
+ ##############################################################################
80
+ # After advancing the time, we are here:
81
+ #
82
+ # !
83
+ # !
84
+ # ____________________ ! _________________
85
+ # / \ ! /
86
+ # / \ ! /
87
+ # ___________/ \________________!_/
88
+ # !
89
+ # !
90
+ #
91
+ ##############################################################################
92
+
93
+ # This process repeats when the "simulate" method is invoked again.
94
+
95
+ end
data/samp/counter/xUnit/counter_design.rb ADDED
@@ -0,0 +1,15 @@
1
+
2
+ # Simulates the design under test for one clock cycle.
3
+ def cycle!
4
+ clock.high!
5
+ advance_time
6
+ clock.low!
7
+ advance_time
8
+ end
9
+
10
+ # Brings the design under test into a blank state.
11
+ def reset!
12
+ reset.high!
13
+ cycle!
14
+ reset.low!
15
+ end
data/samp/counter/xUnit/counter_proto.rb ADDED
@@ -0,0 +1,10 @@
1
+ # Ruby prototype of the design under test's Verilog implementation.
2
+ def feign!
3
+ if clock.posedge?
4
+ if reset.high?
5
+ count.intVal = 0
6
+ else
7
+ count.intVal += 1
8
+ end
9
+ end
10
+ end