ruby-vpi 16.0.1 → 17.0.0

data/ext/Rakefile

@@ -35,16 +35,17 @@ end
 
 file 'swig_vpi.i' => 'swig_vpi.h'
 
-# avoid compilation problems due to va_list, which is used in the SWIG-generated
-# wrapper for VPI vprintf functions
+# avoid compilation errors due to va_list, which is used
+# in the SWIG-generated wrapper for VPI vprintf functions
 file 'swig_vpi.h' => 'vpi_user.h' do |t|
   src, dst = t.prerequisites[0], t.name
 
   File.open(dst, 'w') do |f|
-    f << File.read(src).gsub(/\bva_list\b/, 'int')
+    f << File.read(src).gsub(/\bva_list\b/, 'void*')
   end
 end
 
-# NOTE: since SWIG is not a requirement for users, we should not clobber these
-# generated files
+# NOTE: since SWIG is not a requirement for users,
+#       we should not clobber these generated files
+#
 #CLOBBER.include 'swig_wrap.cin', 'swig_vpi.h'

data/ext/main.c

@@ -23,22 +23,24 @@ void main_init() {
     rb_define_module_function(mVpi, "relay_verilog", main_relay_verilog, 0);
     rb_define_module_function(mVpi, "relay_ruby_reason", main_relay_ruby_reason, 0);
 
-  // initialize the Ruby bench
-    char* benchFile = getenv("RUBYVPI_BOOTSTRAP");
-
-    if (benchFile != NULL) {
-      ruby_script(benchFile);
-      rb_load_file(benchFile);
-    }
-    else {
-      common_printf("error: environment variable RUBY_VPI__RUBY_BENCH_FILE is uninitialized.");
-      exit(EXIT_FAILURE);
-    }
-
-  // run the test bench
-    ruby_run();
+    // some compilers have trouble with pointers to the va_list
+    // type.  See ext/Rakefile and the user manual for details
+    rb_define_alias(mVpi, "vpi_vprintf", "vpi_printf");
+    rb_define_alias(mVpi, "vpi_mcd_vprintf", "vpi_mcd_printf");
+
 
-  ruby_finalize();
+  char* bootLoader = getenv("RUBYVPI_BOOT_LOADER");
+  char* bootTarget = getenv("RUBYVPI_BOOT_TARGET");
+
+  if (bootLoader != NULL && bootTarget != NULL) {
+    ruby_script(bootTarget);
+    rb_load_file(bootLoader);
+    ruby_run();
+  }
+  else {
+    common_printf("error: the RUBYVPI_BOOT_LOADER and RUBYVPI_BOOT_TARGET environment variables are not initialized.");
+    exit(EXIT_FAILURE);
+  }
 }
 
 VALUE main_relay_verilog(VALUE arSelf) {

data/ext/relay.c

@@ -13,7 +13,7 @@ pthread_t relay__rubyThread;
 pthread_mutex_t relay__rubyLock;
 pthread_mutex_t relay__verilogLock;
 
-// Body of the ruby thread.
+// body of the ruby thread
 void* relay_ruby_thread(void* dummy) {
   main_init();
   return NULL;
@@ -25,12 +25,9 @@ void relay_init() {
   pthread_mutex_init(&relay__verilogLock, NULL);
   pthread_mutex_lock(&relay__verilogLock);
 
-  // start the ruby thread
-    pthread_create(&relay__rubyThread, NULL, relay_ruby_thread, NULL);
-
-    // XXX: freezee verilog because RubyVpi.init_bench will call relay_verilog
-    // (which assumes that verilog is frozen)
-    pthread_mutex_lock(&relay__verilogLock);
+  // begin by putting the ruby thread in control
+  pthread_create(&relay__rubyThread, NULL, relay_ruby_thread, NULL);
+  pthread_mutex_lock(&relay__verilogLock);
 }
 
 void relay_ruby() {

data/ext/relay.h

@@ -13,8 +13,8 @@
   #include "common.h"
 
   /**
-    Initialize the relay mechanism, which enables Verilog to transfer control to
-    Ruby and vice versa, and start Ruby.
+    Initialize the relay mechanism, which enables Verilog to
+    transfer control to Ruby and vice versa, and start Ruby.
   */
   void relay_init();
 

data/ext/swig_vpi.h

@@ -880,10 +880,10 @@ XXTERN void      *vpi_get_userdata    PROTO_PARAMS((vpiHandle obj));
 XXTERN PLI_INT32  vpi_put_userdata    PROTO_PARAMS((vpiHandle obj,
                                                     void *userdata));
 XXTERN PLI_INT32  vpi_vprintf         PROTO_PARAMS((PLI_BYTE8 *format,
-                                                    int ap));
+                                                    void* ap));
 XXTERN PLI_INT32  vpi_mcd_vprintf     PROTO_PARAMS((PLI_UINT32 mcd,
                                                     PLI_BYTE8 *format,
-                                                    int ap));
+                                                    void* ap));
 XXTERN PLI_INT32  vpi_flush           PROTO_PARAMS((void));
 XXTERN PLI_INT32  vpi_mcd_flush       PROTO_PARAMS((PLI_UINT32 mcd));
 XXTERN PLI_INT32  vpi_control         PROTO_PARAMS((PLI_INT32 operation,

data/ext/swig_vpi.i

@@ -1,13 +1,12 @@
 %module vpi
 
-
 /* Parse the header file to generate wrappers */
 %{
 #include "swig_vpi.h"
 %}
 %include "swig_vpi.h"
 
-/* allows us to set S_cb_data.cb_rtn = Vpi::Vlog_relay_ruby from Ruby */
+/* allows us to set S_cb_data.cb_rtn = Vpi::Vlog_relay_ruby in Ruby */
 %{
 #include "vlog.h"
 %}

data/ext/swig_wrap.cin

@@ -5910,13 +5910,12 @@ fail:
 SWIGINTERN VALUE
 _wrap_vpi_vprintf(int argc, VALUE *argv, VALUE self) {
   PLI_BYTE8 *arg1 = (PLI_BYTE8 *) 0 ;
-  int arg2 ;
+  void *arg2 = (void *) 0 ;
   PLI_INT32 result;
   int res1 ;
   char *buf1 = 0 ;
   int alloc1 = 0 ;
-  int val2 ;
-  int ecode2 = 0 ;
+  int res2 ;
   VALUE vresult = Qnil;
   
   if ((argc < 2) || (argc > 2)) {
@@ -5927,11 +5926,10 @@ _wrap_vpi_vprintf(int argc, VALUE *argv, VALUE self) {
     SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "vpi_vprintf" "', argument " "1"" of type '" "PLI_BYTE8 *""'");
   }
   arg1 = (PLI_BYTE8 *)(buf1);
-  ecode2 = SWIG_AsVal_int(argv[1], &val2);
-  if (!SWIG_IsOK(ecode2)) {
-    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "vpi_vprintf" "', argument " "2"" of type '" "int""'");
-  } 
-  arg2 = (int)(val2);
+  res2 = SWIG_ConvertPtr(argv[1],SWIG_as_voidptrptr(&arg2), 0, 0);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "vpi_vprintf" "', argument " "2"" of type '" "void *""'"); 
+  }
   result = (PLI_INT32)vpi_vprintf(arg1,arg2);
   vresult = SWIG_From_int((int)(result));
   if (alloc1 == SWIG_NEWOBJ) free((char*)buf1);
@@ -5946,15 +5944,14 @@ SWIGINTERN VALUE
 _wrap_vpi_mcd_vprintf(int argc, VALUE *argv, VALUE self) {
   PLI_UINT32 arg1 ;
   PLI_BYTE8 *arg2 = (PLI_BYTE8 *) 0 ;
-  int arg3 ;
+  void *arg3 = (void *) 0 ;
   PLI_INT32 result;
   unsigned int val1 ;
   int ecode1 = 0 ;
   int res2 ;
   char *buf2 = 0 ;
   int alloc2 = 0 ;
-  int val3 ;
-  int ecode3 = 0 ;
+  int res3 ;
   VALUE vresult = Qnil;
   
   if ((argc < 3) || (argc > 3)) {
@@ -5970,11 +5967,10 @@ _wrap_vpi_mcd_vprintf(int argc, VALUE *argv, VALUE self) {
     SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "vpi_mcd_vprintf" "', argument " "2"" of type '" "PLI_BYTE8 *""'");
   }
   arg2 = (PLI_BYTE8 *)(buf2);
-  ecode3 = SWIG_AsVal_int(argv[2], &val3);
-  if (!SWIG_IsOK(ecode3)) {
-    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "vpi_mcd_vprintf" "', argument " "3"" of type '" "int""'");
-  } 
-  arg3 = (int)(val3);
+  res3 = SWIG_ConvertPtr(argv[2],SWIG_as_voidptrptr(&arg3), 0, 0);
+  if (!SWIG_IsOK(res3)) {
+    SWIG_exception_fail(SWIG_ArgError(res3), "in method '" "vpi_mcd_vprintf" "', argument " "3"" of type '" "void *""'"); 
+  }
   result = (PLI_INT32)vpi_mcd_vprintf(arg1,arg2,arg3);
   vresult = SWIG_From_int((int)(result));
   if (alloc2 == SWIG_NEWOBJ) free((char*)buf2);

data/ext/vlog.c

@@ -33,11 +33,11 @@ s_cb_data* vlog_relay_ruby_reason() {
 void vlog_startup() {
   s_cb_data call;
 
-  call.reason = cbStartOfSimulation;
-  call.cb_rtn = vlog_relay_init;
-  call.obj = NULL;
-  call.time = NULL;
-  call.value = NULL;
+  call.reason    = cbStartOfSimulation;
+  call.cb_rtn    = vlog_relay_init;
+  call.obj       = NULL;
+  call.time      = NULL;
+  call.value     = NULL;
   call.user_data = NULL;
 
   vpi_free_object(vpi_register_cb(&call));

data/ext/vlog.h

@@ -18,8 +18,8 @@
   verilog_cb_funcSig(vlog_relay_ruby);
 
   /**
-    Returns the data corresponding to the callback that caused the relay from
-    Verilog to Ruby.
+    Returns the data corresponding to the callback
+    that caused the relay from Verilog to Ruby.
   */
   s_cb_data* vlog_relay_ruby_reason();
 

data/lib/ruby-vpi/erb.rb

@@ -5,9 +5,9 @@
 
 require 'erb'
 
-# A version of ERB whose embedding tags behave like those of PHP. That is, only
-# <%= ... %> tags produce output, whereas <% ... %> tags do *not* produce any
-# output.
+# A version of ERB whose embedding tags behave like those
+# of PHP. That is, only <%= ... %> tags produce output,
+# whereas <% ... %> tags do *not* produce any output.
 class ERB
   alias original_initialize initialize
 

data/lib/ruby-vpi/float.rb

@@ -4,8 +4,8 @@
 # See the file named LICENSE for details.
 
 class String
-  # Converts this string into a floating point number using the given radix.
-  # The default radix is 10.
+  # Converts this string into a floating point number
+  # using the given radix. The default radix is 10.
   def to_f aRadix = 10
     whole, frac = split('.', 2)
     whole = whole.to_i(aRadix).to_f

data/lib/ruby-vpi/rcov.rb

@@ -23,7 +23,7 @@ require 'rcov'
 require 'rcov/report'
 
 
-module RubyVpi
+module RubyVPI
   COVERAGE_ANALYSIS = Rcov::CodeCoverageAnalyzer.new
   COVERAGE_ANALYSIS.install_hook
 
@@ -37,11 +37,9 @@ module RubyVpi
     end
   end
 
-  # Invokes the given block, which yields COVERAGE_ANALYSIS, after code coverage
-  # analysis has completed.
-  def RubyVpi.with_coverage_analysis &aBlock # :nodoc:
-    if aBlock
-      COVERAGE_ANALYSIS_HANDLERS << aBlock
-    end
+  # Invokes the given block, which yields COVERAGE_ANALYSIS,
+  # after code coverage analysis has completed.
+  def RubyVPI.with_coverage_analysis &aBlock # :nodoc:
+    COVERAGE_ANALYSIS_HANDLERS << aBlock if aBlock
   end
 end

data/lib/ruby-vpi/runner.rb

@@ -1,34 +1,44 @@
-# A template to simplify building and running examples. This file is meant to be
-# embedded in another Rakefile, which bears the responsibility of defining the
-# following variables.
+# A template to simplify building and running examples.  This
+# file is meant to be embedded in another Rakefile, which bears
+# the responsibility of defining the following variables.
 #
 # = Required variables
 #
-# SIMULATOR_SOURCES::   Array of paths to source files needed by the simulator.
+# SIMULATOR_SOURCES::   Array of paths to (1) source files or (2)
+#                       directories that contain source files
+#                       which must be loaded by the simulator.
 #
-# SIMULATOR_TARGET::    Name of the Verilog module to be simulated.
+# SIMULATOR_ARGUMENTS:: A hash table containing keys for each simulator task
+#                       (same as Rakefile task names) and values containing
+#                       command-line arguments for each simulator.
 #
-# SIMULATOR_ARGUMENTS:: A hash containing keys for each simulator task (same as
-#                       Rakefile task names) and values containing command-line
-#                       arguments for each simulator.
 #--
 # Copyright 2006-2007 Suraj N. Kurapati
 # See the file named LICENSE for details.
 
+require 'ruby-vpi/util'
+
 # check for required variables
-  raise ArgumentError, "All required variables must be defined." unless
-    defined?(SIMULATOR_SOURCES) &&
-    defined?(SIMULATOR_TARGET) &&
-    defined?(SIMULATOR_ARGUMENTS)
+  vars = %w[SIMULATOR_SOURCES SIMULATOR_ARGUMENTS]
+
+  unless vars.all? {|v| eval "defined? #{v}"}
+    raise ArgumentError, "#{vars.join(' and ')} must be defined."
+  end
 
-  SIMULATOR_INCLUDES = [] unless defined? SIMULATOR_INCLUDES
+# auto-detect and set default parameters
+  runnerPath = caller.reject {|s| s =~ /:in \`/}.first.rstrip_from(':')
+  @target    = File.basename(runnerPath).rstrip_from('_')
 
   task :setup
 
 # resolve paths to sources by searching include directories
-  SIMULATOR_SOURCES.map! do |src|
+  @sources = SIMULATOR_SOURCES.to_a.uniq
+  @incdirs = @sources.select {|s| File.directory? s}
+  @sources -= @incdirs
+
+  @sources.map! do |src|
     unless File.exist? src
-      SIMULATOR_INCLUDES.each do |dir|
+      @incdirs.each do |dir|
         path = File.join(dir, src)
 
         if File.exist? path
@@ -42,17 +52,16 @@
   end
 
 # prepare hook for rb_load_file() in main.c
-  ENV['RUBYVPI_BOOTSTRAP'] = SIMULATOR_TARGET + '.rb'
+  ENV['RUBYVPI_BOOT_LOADER'] = File.join(File.dirname(__FILE__), 'runner_boot_loader.rb')
+  ENV['RUBYVPI_BOOT_TARGET'] = @target
 
 
 require 'rake/clean'
 require 'ruby-vpi'
 require 'ruby-vpi/rake'
 
-include RubyVpi::Config
-
 OBJECT_PATH = File.join(File.dirname(__FILE__), '..', '..', 'obj')
-BOOTSTAP_FUNC = 'vlog_startup_routines_bootstrap'
+LOADER_FUNC = 'vlog_startup_routines_bootstrap'
 
 
 # Returns the path to the Ruby-VPI object file for the given simulator.
@@ -60,23 +69,16 @@ def object_file_path aSimId # :nodoc:
   path = File.join(OBJECT_PATH, aSimId.to_s)
 
   unless File.exist? path
-    raise "Object file #{path.inspect} is missing. Rebuild #{PROJECT_NAME}."
+    raise "Object file #{path.inspect} is missing. Rebuild Ruby-VPI."
   end
 
   path
 end
 
 # Returns an array of include-directory options.
-def expand_include_dir_options aSimId, aIncludes = SIMULATOR_INCLUDES # :nodoc:
-  prefix = case aSimId
-    when :ivl
-      '-I'
-
-    else
-      '+incdir+'
-  end
-
-  aIncludes.map {|i| prefix + i}
+def expand_include_dir_options aSimId # :nodoc:
+  prefix = aSimId == :ivl ? '-I' : '+incdir+'
+  @incdirs.map {|i| prefix + i}
 end
 
 
@@ -87,46 +89,46 @@ task :default do
 end
 
 
-desc "Simulate with #{SIMULATORS[:cver].name}."
+desc "Simulate with #{RubyVPI::SIMULATORS[:cver].name}."
 task :cver => :setup do
-  sh 'cver', SIMULATOR_ARGUMENTS[:cver], "+loadvpi=#{object_file_path(:cver)}:#{BOOTSTAP_FUNC}", expand_include_dir_options(:cver), SIMULATOR_SOURCES
+  sh 'cver', SIMULATOR_ARGUMENTS[:cver], "+loadvpi=#{object_file_path(:cver)}:#{LOADER_FUNC}", expand_include_dir_options(:cver), @sources
 end
 
 CLOBBER.include 'verilog.log'
 
 
-desc "Simulate with #{SIMULATORS[:ivl].name}."
+desc "Simulate with #{RubyVPI::SIMULATORS[:ivl].name}."
 task :ivl => :setup do
   cp object_file_path(:ivl), 'ruby-vpi.vpi'
-  sh 'iverilog', SIMULATOR_ARGUMENTS[:ivl], '-mruby-vpi', expand_include_dir_options(:ivl), SIMULATOR_SOURCES
+  sh 'iverilog', SIMULATOR_ARGUMENTS[:ivl], '-mruby-vpi', expand_include_dir_options(:ivl), @sources
   sh 'vvp -M. a.out'
 end
 
 CLEAN.include 'ruby-vpi.vpi', 'a.out'
 
 
-desc "Simulate with #{SIMULATORS[:vcs].name}."
+desc "Simulate with #{RubyVPI::SIMULATORS[:vcs].name}."
 task :vcs => :setup do
-  sh %w(vcs -R +v2k +vpi), SIMULATOR_ARGUMENTS[:vcs], '-load', "#{object_file_path(:vcs)}:#{BOOTSTAP_FUNC}", expand_include_dir_options(:vcs), SIMULATOR_SOURCES
+  sh %w(vcs -R +v2k +vpi), SIMULATOR_ARGUMENTS[:vcs], '-load', "#{object_file_path(:vcs)}:#{LOADER_FUNC}", expand_include_dir_options(:vcs), @sources
 end
 
 CLEAN.include 'csrc', 'simv*'
 
 
-desc "Simulate with #{SIMULATORS[:vsim].name}."
+desc "Simulate with #{RubyVPI::SIMULATORS[:vsim].name}."
 task :vsim => :setup do
   sh 'vlib work'
-  sh 'vlog', expand_include_dir_options(:vsim), SIMULATOR_SOURCES
-  sh 'vsim', SIMULATOR_ARGUMENTS[:vsim], '-c', SIMULATOR_TARGET, '-pli', object_file_path(:vsim), '-do', 'run -all'
+  sh 'vlog', expand_include_dir_options(:vsim), @sources
+  sh 'vsim', SIMULATOR_ARGUMENTS[:vsim], '-c', @target, '-pli', object_file_path(:vsim), '-do', 'run -all'
 end
 
 CLEAN.include 'work'
 CLOBBER.include 'transcript'
 
 
-desc "Simulate with #{SIMULATORS[:ncsim].name}."
+desc "Simulate with #{RubyVPI::SIMULATORS[:ncsim].name}."
 task :ncsim => :setup do
-  sh 'ncverilog', SIMULATOR_ARGUMENTS[:ncsim], "+loadvpi=#{object_file_path(:ncsim)}:#{BOOTSTAP_FUNC}", '+access+rwc', expand_include_dir_options(:ncsim), SIMULATOR_SOURCES
+  sh 'ncverilog', SIMULATOR_ARGUMENTS[:ncsim], "+loadvpi=#{object_file_path(:ncsim)}:#{LOADER_FUNC}", '+access+rwc', expand_include_dir_options(:ncsim), @sources
 end
 
 CLEAN.include 'INCA_libs'

data/lib/ruby-vpi/runner_boot_loader.rb

@@ -0,0 +1,117 @@
+# Initializes the test bench by setting up code
+# coverage, the interactive debugger, and so on:
+#
+# 1. loads the design.rb file
+# 2. loads the proto.rb file if prototyping is enabled
+# 3. loads the spec.rb file
+
+require 'rubygems'
+require 'ruby-vpi'
+require 'ruby-vpi/util'
+
+designName   = ENV['RUBYVPI_BOOT_TARGET']
+
+useDebugger  = ENV['DEBUGGER'].to_i  == 1
+useCoverage  = ENV['COVERAGE'].to_i  == 1
+usePrototype = ENV['PROTOTYPE'].to_i == 1
+
+# set up code coverage analysis
+
+  require 'ruby-vpi/vpi' # XXX: this is loaded *before* RCov to
+                         # prevent coverage statistics about it
+
+  if useCoverage
+    require 'ruby-vpi/rcov'
+
+    RubyVPI.with_coverage_analysis do |a|
+      a.dump_coverage_info [
+        Rcov::TextReport.new,
+        Rcov::HTMLCoverage.new(:destdir => "#{designName}_coverage")
+      ]
+    end
+
+    RubyVPI.say 'coverage analysis is enabled'
+  end
+
+# set up the interactive debugger
+  if useDebugger
+    require 'ruby-debug'
+
+    Debugger.start
+    Debugger.post_mortem
+
+    RubyVPI.say 'debugger is enabled'
+  end
+
+  # suppress undefined method errors when debugger is not enabled
+    unless Kernel.respond_to? :debugger
+      Kernel.class_eval do
+        # Starts an interactive debugging session.
+        def debugger
+        end
+      end
+    end
+
+# set up the VPI utility layer
+  Object.class_eval do
+    include Vpi
+  end
+
+# load the design under test
+  unless designHandle = vpi_handle_by_name(designName, nil)
+    raise "cannot access the design under test: #{designName.inspect}"
+  end
+
+  # create a module to wrap the DUT, so that inner classes and modules
+  # and constants defined in the design.rb and proto.rb files are
+  # accessible in spec.rb through the namespace resolution operator (::)
+  design = Module.new do
+    @@design = designHandle
+
+    # delegate all instance methods to the DUT
+    instance_eval do
+      def method_missing(*a, &b)
+        @@design.__send__(*a, &b)
+      end
+
+      alias const_missing method_missing
+
+      # so that #inspect executes on the DUT instead of this wrapper
+      undef to_s
+      undef inspect
+    end
+
+    # make module parameters available as constants
+    @@design[VpiParameter, VpiLocalParam].each do |var|
+      const_set(var.name.to_ruby_const_name, var.intVal)
+    end
+
+    # methods in design.rb & proto.rb must execute on the DUT
+    @@design.extend(self)
+  end
+
+  Kernel.const_set(designName.to_ruby_const_name, design)
+
+  f = "#{designName}_design.rb"
+  design.module_eval(File.read(f), f) if File.exist? f
+
+# load the design's prototype
+  if usePrototype
+    f = "#{designName}_proto.rb"
+    design.module_eval(File.read(f), f) if File.exist? f
+
+    Vpi.module_eval do
+      define_method :advance_time do |*args|
+        design.feign!
+      end
+
+      def vpi_register_cb #:nodoc:
+        warn "vpi_register_cb: callbacks are ignored when prototype is enabled"
+      end
+    end
+
+    RubyVPI.say 'prototype is enabled'
+  end
+
+# load the design's specification
+  require "#{designName}_spec.rb"

data/lib/ruby-vpi/runner_proxy.rb

@@ -1,5 +1,5 @@
-# A template to simplify running multiple tests for an examples. This file is
-# meant to be embedded in another Rakefile.
+# A template to simplify running multiple tests for an examples.
+# This file is meant to be embedded in another Rakefile.
 #--
 # Copyright 2006-2007 Suraj N. Kurapati
 # See the file named LICENSE for details.
@@ -13,13 +13,11 @@
 
 # invoke each test runner with the command-line args
   at_exit do
-    unless ARGV.empty?
-      FileList['**/*.rake'].each do |path|
-        parent, runner = File.dirname(path), File.basename(path)
+    FileList['**/*.rake'].each do |path|
+      parent, runner = File.dirname(path), File.basename(path)
 
-        cd parent do
-          sh 'rake', '-f', runner, *ARGV
-        end
+      cd parent do
+        sh 'rake', '-f', runner, *ARGV
       end
     end
   end

data/lib/ruby-vpi/util.rb

@@ -0,0 +1,10 @@
+class String
+  # Converts this string into a valid Ruby constant name.
+  def to_ruby_const_name
+    self[0, 1].upcase << self[1..-1]
+  end
+
+  def rstrip_from a
+    sub(/#{a}[^#{a}]*$/, '')
+  end
+end