rggen 0.5.1 → 0.6.0

data/lib/rggen/core_components.rb

@@ -8,10 +8,13 @@ require_relative 'core_components/code_utility'
 require_relative 'core_components/verilog_utility/identifier'
 require_relative 'core_components/verilog_utility/declaration'
 require_relative 'core_components/verilog_utility/structure_definition'
+require_relative 'core_components/verilog_utility/local_scope'
 require_relative 'core_components/verilog_utility/module_definition'
 require_relative 'core_components/verilog_utility/package_definition'
 require_relative 'core_components/verilog_utility/class_definition'
 require_relative 'core_components/verilog_utility/subroutine_definition'
+require_relative 'core_components/verilog_utility/interface_instantiation'
+require_relative 'core_components/verilog_utility/interface_port_declaration'
 require_relative 'core_components/verilog_utility/source_file'
 require_relative 'core_components/verilog_utility'
 

data/lib/rggen/core_components/ral/item.rb

@@ -49,12 +49,8 @@ module RgGen
       end
 
       def add_declaration(type, domain, attributes)
-        create_declaration(type, attributes).tap do |d|
-          declarations  = {
-            variable: @variable_declarations,
-            parameter: @parameter_declarations
-          }.fetch(type)
-          declarations[domain] << d
+        instance_variable_get("@#{type}_declarations").tap do |list|
+          list[domain] << __send__("#{type}_declaration", attributes)
         end
       end
     end

data/lib/rggen/core_components/rtl/component.rb

@@ -8,20 +8,20 @@ module RgGen
         end
       end
 
-      def signal_declarations
-        [*@items, *@children].flat_map(&:signal_declarations)
+      def signal_declarations(domain)
+        [*@items, *@children].flat_map { |o| o.signal_declarations(domain) }
       end
 
-      def port_declarations
-        [*@items, *@children].flat_map(&:port_declarations)
+      def port_declarations(domain)
+        [*@items, *@children].flat_map { |o| o.port_declarations(domain) }
       end
 
-      def parameter_declarations
-        [*@items, *@children].flat_map(&:parameter_declarations)
+      def parameter_declarations(domain)
+        [*@items, *@children].flat_map { |o| o.parameter_declarations(domain) }
       end
 
-      def localparam_declarations
-        [*@items, *@children].flat_map(&:localparam_declarations)
+      def localparam_declarations(domain)
+        [*@items, *@children].flat_map { |o| o.localparam_declarations(domain) }
       end
     end
   end

data/lib/rggen/core_components/rtl/item.rb

@@ -7,28 +7,27 @@ module RgGen
       def initialize(owner)
         super(owner)
         @identifiers              = []
-        @signal_declarations      = []
-        @port_declarations        = []
-        @parameter_declarations   = []
-        @localparam_declarations  = []
+        @signal_declarations      = Hash.new { |h, d| h[d]  = [] }
+        @port_declarations        = Hash.new { |h, d| h[d]  = [] }
+        @parameter_declarations   = Hash.new { |h, d| h[d]  = [] }
+        @localparam_declarations  = Hash.new { |h, d| h[d]  = [] }
       end
 
       attr_reader :identifiers
-      attr_reader :signal_declarations
-      attr_reader :port_declarations
-      attr_reader :parameter_declarations
-      attr_reader :localparam_declarations
 
-      private
+      def_delegator :@signal_declarations    , :[], :signal_declarations
+      def_delegator :@port_declarations      , :[], :port_declarations
+      def_delegator :@parameter_declarations , :[], :parameter_declarations
+      def_delegator :@localparam_declarations, :[], :localparam_declarations
 
       class << self
         private
 
         def define_declaration_method(method_name)
-          define_method(method_name) do |handle_name, attributes = {}|
+          define_method(method_name) do |domain, handle_name, attributes = {}|
             attributes[:name] ||= handle_name
             add_identifier(handle_name, attributes[:name])
-            add_declaration(method_name, attributes)
+            add_declaration(method_name, domain, attributes)
           end
           private method_name
         end
@@ -37,47 +36,51 @@ module RgGen
       define_declaration_method :wire
       define_declaration_method :reg
       define_declaration_method :logic
+      define_declaration_method :interface
       define_declaration_method :input
       define_declaration_method :output
+      define_declaration_method :interface_port
       define_declaration_method :parameter
       define_declaration_method :localparam
 
-      def group(group_name, &body)
-        create_group(group_name)
-        instance_exec(&body)
-        @group  = nil
+      private
+
+      def add_declaration(type, domain, attributes)
+        case type
+        when :wire, :reg, :logic
+          @signal_declarations[domain] << variable_declaration(type, attributes)
+        when :interface
+          @signal_declarations[domain] << interface_instantiation(attributes)
+        when :input, :output
+          @port_declarations[domain] << port_declaration(type, attributes)
+        when :interface_port
+          @port_declarations[domain] << interface_port_declaration(attributes)
+        when :parameter
+          @parameter_declarations[domain] << parameter_declaration(type, attributes)
+        when :localparam
+          @localparam_declarations[domain] << parameter_declaration(type, attributes)
+        end
       end
 
-      def add_declaration(type, attributes)
-        attribute_key, declaration_type, declarations =
-          case type
-          when :wire, :reg, :logic
-            [:data_type, :variable, signal_declarations]
-          when :input, :output
-            [:direction, :port, port_declarations]
-          when :parameter
-            [:parameter_type, :parameter, parameter_declarations]
-          when :localparam
-            [:parameter_type, :parameter, localparam_declarations]
-          end
-        attributes[attribute_key] = type
-        declarations << create_declaration(declaration_type, attributes)
+      def variable_declaration(data_type, attributes)
+        super(attributes.merge(data_type: data_type))
+      end
+
+      def port_declaration(direction, attributes)
+        super(attributes.merge(direction: direction))
+      end
+
+      def parameter_declaration(parameter_type, attributes)
+        super(attributes.merge(parameter_type: parameter_type))
       end
 
       def add_identifier(handle_name, name)
         identifier  = create_identifier(name)
-        (@group || self).instance_exec do
+        instance_exec do
           instance_variable_set(handle_name.variablize, identifier)
           attr_singleton_reader(handle_name)
         end
-        identifiers << handle_name if @group.nil?
-      end
-
-      def create_group(group_name)
-        instance_variable_set(group_name.variablize, Object.new)
-        attr_singleton_reader(group_name)
-        identifiers << group_name
-        @group      = __send__(group_name)
+        identifiers << handle_name
       end
     end
   end

data/lib/rggen/core_components/verilog_utility.rb

@@ -12,8 +12,24 @@ module RgGen
       Identifier.new(name)
     end
 
-    def create_declaration(declaration_type, attributes)
-      Declaration.new(declaration_type, attributes)
+    def variable_declaration(attributes)
+      Declaration.new(:variable, attributes)
+    end
+
+    def interface_instantiation(attributes)
+      InterfaceInstantiation.new(attributes)
+    end
+
+    def port_declaration(attributes)
+      Declaration.new(:port, attributes)
+    end
+
+    def interface_port_declaration(attributes)
+      InterfacePortDeclaration.new(attributes)
+    end
+
+    def parameter_declaration(attributes)
+      Declaration.new(:parameter, attributes)
     end
 
     def module_definition(name, &body)
@@ -32,9 +48,12 @@ module RgGen
       SubroutineDefinition.new(:function, name, &body).to_code
     end
 
+    def local_scope(block_name, &body)
+      LocalScope.new(block_name, &body).to_code
+    end
+
     def argument(name, attributes)
-      attributes[:name] = name
-      create_declaration(:port, attributes)
+      port_declaration(attributes.merge(name: name))
     end
 
     def assign(lhs, rhs)

data/lib/rggen/core_components/verilog_utility/declaration.rb

@@ -36,6 +36,7 @@ module RgGen
 
       def width
         return unless vector?
+        return "[#{@attributes[:width]}-1:0]" unless numerical_width?
         "[#{(@attributes[:width] || 1) - 1}:0]"
       end
 
@@ -44,12 +45,12 @@ module RgGen
       end
 
       def dimensions
-        return if @attributes[:dimensions].nil?
+        return unless @attributes[:dimensions]
         @attributes[:dimensions].map { |dimension| "[#{dimension}]" }.join
       end
 
       def default_value_assignment
-        return if @attributes[:default].nil?
+        return unless @attributes[:default]
         "= #{@attributes[:default]}"
       end
 
@@ -58,8 +59,17 @@ module RgGen
       end
 
       def vector?
-        return true if @attributes[:vector]
-        @attributes[:width] && (parameter? || (@attributes[:width] > 1))
+        return true  if @attributes[:vector]
+        return false unless @attributes[:width]
+        return true  unless numerical_width?
+        return true  if parameter?
+        @attributes[:width] > 1
+      end
+
+      def numerical_width?
+        return true unless @attributes[:width]
+        return true if Integer === @attributes[:width]
+        false
       end
     end
   end

data/lib/rggen/core_components/verilog_utility/identifier.rb

@@ -1,6 +1,8 @@
 module RgGen
   module VerilogUtility
     class Identifier
+      include InputBase::RegxpPatterns
+
       def initialize(name)
         @name = name
       end
@@ -22,6 +24,23 @@ module RgGen
           Identifier.new("#{@name}[#{indexes_or_msb}:#{lsb}]")
         end
       end
+
+      TYPE_CONVERSIONS  = [
+        :to_a, :to_ary, :to_hash, :to_int, :to_io, :to_proc, :to_regexp, :to_str
+      ].freeze
+
+      def method_missing(name, *args)
+        return super if args.size > 0
+        return super if TYPE_CONVERSIONS.include?(name)
+        return super unless name =~ variable_name
+        Identifier.new("#{@name}.#{name}")
+      end
+
+      def respond_to_missing?(symbol, include_private)
+        return super if TYPE_CONVERSIONS.include?(symbol)
+        return super unless symbol =~ variable_name
+        true
+      end
     end
   end
 end

data/lib/rggen/core_components/verilog_utility/interface_instantiation.rb

@@ -0,0 +1,33 @@
+module RgGen
+  module VerilogUtility
+    class InterfaceInstantiation
+      def initialize(attributes)
+        @attributes = attributes
+      end
+
+      def to_s
+        "#{interface_type} #{identifier}()"
+      end
+
+      private
+
+      def interface_type
+        return @attributes[:type] unless @attributes[:parameters]
+        "#{@attributes[:type]} #{parameters}"
+      end
+
+      def parameters
+        "#(#{@attributes[:parameters].join(', ')})"
+      end
+
+      def identifier
+        "#{@attributes[:name]}#{dimensions}"
+      end
+
+      def dimensions
+        return unless @attributes[:dimensions]
+        @attributes[:dimensions].map { |d| "[#{d}]" }.join
+      end
+    end
+  end
+end

data/lib/rggen/core_components/verilog_utility/interface_port_declaration.rb

@@ -0,0 +1,29 @@
+module RgGen
+  module VerilogUtility
+    class InterfacePortDeclaration
+      def initialize(attributes)
+        @attributes = attributes
+      end
+
+      def to_s
+        "#{interface_type} #{identifier}"
+      end
+
+      private
+
+      def interface_type
+        return @attributes[:type] unless @attributes[:modport]
+        "#{@attributes[:type]}.#{@attributes[:modport]}"
+      end
+
+      def identifier
+        "#{@attributes[:name]}#{dimensions}"
+      end
+
+      def dimensions
+        return unless @attributes[:dimensions]
+        @attributes[:dimensions].map { |d| "[#{d}]" }.join
+      end
+    end
+  end
+end

data/lib/rggen/core_components/verilog_utility/local_scope.rb

@@ -0,0 +1,64 @@
+module RgGen
+  module VerilogUtility
+    class LocalScope < StructureDefinition
+      attr_setter :signals
+      attr_setter :loops
+
+      def to_code
+        bodies.unshift(signal_declarations) if signals?
+        code_block do |c|
+          header_code(c)
+          body_code(c)
+          footer_code(c)
+        end
+      end
+
+      private
+
+      def header_code(code)
+        code << :'generate if (1) begin : ' << @name << nl
+        loops? && generate_for_header(code)
+      end
+
+      def footer_code(code)
+        loops? && generate_for_footer(code)
+        code << :'end endgenerate' << nl
+      end
+
+      def loops?
+        !(@loops.nil? || @loops.empty?)
+      end
+
+      def generate_for_header(code)
+        loops.each do |genvar, size|
+          code.indent += 2
+          code << "genvar #{genvar}" << semicolon << nl
+          code << generate_for(genvar, size) << nl
+        end
+      end
+
+      def generate_for(genvar, size)
+        "for (#{genvar} = 0;#{genvar} < #{size};++#{genvar}) begin : g"
+      end
+
+      def generate_for_footer(code)
+        loops.size.times do
+          code << :end << nl
+          code.indent -= 2
+        end
+      end
+
+      def signals?
+        !(@signals.nil? || @signals.empty?)
+      end
+
+      def signal_declarations
+        lambda do |code|
+          signals.each do |signal|
+            code << signal << semicolon << nl
+          end
+        end
+      end
+    end
+  end
+end

data/lib/rggen/core_extensions/facets.rb

@@ -1,6 +1,6 @@
 require 'facets/enumerable/exclude'
 require 'facets/enumerable/find_yield'
-require 'facets/enumerable/sum'
+require 'facets/enumerable/sum' unless Enumerable.public_method_defined?(:sum)
 require 'facets/file/ext'
 require 'facets/hash/symbolize_keys'
 require 'facets/integer/multiple'

data/lib/rggen/core_extensions/forwardable.rb

@@ -24,7 +24,7 @@ module SingleForwardable
     end
   end
 
-  if ['2.2.5', '2.3.1'].include?(RUBY_VERSION)
+  if ['2.2.5', '2.2.6', '2.3.1'].include?(RUBY_VERSION)
     # https://bugs.ruby-lang.org/issues/12478
     def def_single_delegator(accessor, method, ali = method)
       accessor = accessor.to_s