badline 0.17.0 → 0.19.0

data/lib/badline/snapshot/vice/pet.rb

@@ -1,6 +1,8 @@
 # frozen_string_literal: true
 
+require "badline/snapshot/vice/cbm2_acia"
 require "badline/snapshot/vice/pet_cpu"
+require "badline/snapshot/vice/pet_dongle"
 require "badline/snapshot/vice/pet_mem"
 require "badline/snapshot/vice/pet_pias"
 require "badline/snapshot/vice/pet_via"
@@ -22,8 +24,8 @@ module Badline
         # The models badline builds by the board PETMEM names (PETMem): the
         # discrete board is a 2001's where xpet's settings say so, and a
         # 3032 otherwise.
-        MODELS = { PETMem::CRTC40 => "4032", PETMem::CRTC80 => "8032", PETMem::CBM8096 => "8096",
-                   PETMem::CBM8296 => "8296" }.freeze
+        MODELS = { PETMem::CRTC40 => "4032", PETMem::CRTC80 => "8032", PETMem::SUPERPET => "superpet",
+                   PETMem::CBM8096 => "8096", PETMem::CBM8296 => "8296" }.freeze
         # The modules xpet resets the machine without, for the parts badline
         # doesn't model in VICE's terms, each as xpet leaves them with
         # nothing attached: no file system drive open, both cassette ports
@@ -50,7 +52,8 @@ module Badline
            PIAs.export("PIA1", machine.pia1, reader(readers, "BL-PIA1")),
            PIAs.export("PIA2", machine.pia2, reader(readers, "BL-PIA2")), VIA.export(reader(readers, "BL-VIA")),
            *Drive2031.export(machine, readers), *Drive8050.export(machine, readers)] +
-            PERIPHERALS.map { |name, major, minor, bytes| FieldWriter.new.bytes(bytes).section(name, major, minor) }
+            PERIPHERALS.map { |name, major, minor, bytes| FieldWriter.new.bytes(bytes).section(name, major, minor) } +
+            (machine.superpet? ? [CBM2::ACIA.export(reader(readers, "BL-ACIA"), machine.cycles)] : [])
         end
 
         def reader(readers, name) = readers[name] || Keyed::Reader.missing(name)
@@ -61,7 +64,9 @@ module Badline
         # xpet doesn't save the keyboard, the ROMs or an 8296's jumpers, so
         # a discrete board is a 3032 with the graphics keyboard unless it is
         # a 2001, each model has its own ROMs, and an 8296 none of its
-        # jumpers, as xpet's own has.
+        # jumpers, as xpet's own has. Nor does it save the SuperPET's
+        # switches: its CPU switch is at the CPU that has the bus, and its
+        # RAM switch at R/W, which is the only position xpet has.
         def setup(container)
           memory = memory(container)
           ram_kb = PETMem.ram_kb(memory)
@@ -75,8 +80,11 @@ module Badline
           crtc = nil unless crtc.nil? || CRTC.reads?(crtc)
           refresh_hz = refresh_hz(crtc, profile)
           profile = Badline::PET::Model.upgraded(profile, nil, editor(crtc, profile, refresh_hz))
+          superpet = profile.superpet?
+          cpu_switch = PETMem.m6809?(memory) ? "6809" : "6502"
           PETSetup.new(model: name, ram_kb:, refresh_hz:, basic: profile.basic, editor: profile.editor(refresh_hz),
-                       kernal: profile.kernal, characters: profile.characters, jumpers: "")
+                       kernal: profile.kernal, characters: profile.characters, jumpers: "",
+                       cpu_switch: superpet ? cpu_switch : "", ram_switch: superpet ? "rw" : "")
         end
 
         def memory(container)
@@ -94,8 +102,7 @@ module Badline
           name = MODELS[board]
           return name unless name.nil?
 
-          what = board == PETMem::SUPERPET ? "a SuperPET" : "board #{board}"
-          raise FormatError, "#{memory}: #{what}, which badline doesn't build"
+          raise FormatError, "#{memory}: board #{board}, which badline doesn't build"
         end
 
         # The editor's frame rate, from the cycles the CRTC's registers set

data/lib/badline/snapshot/vice/pet_cpu.rb

@@ -25,7 +25,11 @@ module Badline
 
           def reads?(section) = section.major == MAJOR && section.minor == MINOR
 
-          def export(machine) = write(machine, [machine.pia1.irq?, machine.pia2.irq?, machine.via.irq?].count(true))
+          def export(machine)
+            sources = [machine.pia1.irq?, machine.pia2.irq?, machine.via.irq?]
+            sources << machine.acia_irq? if machine.superpet?
+            write(machine, sources.count(true))
+          end
 
           # The module for `machine`, whose CPU's IRQ line `irqs` sources
           # pull.
@@ -52,16 +56,46 @@ module Badline
         end
 
         # The SuperPET's 6809, CPU6809 1.1, which xpet saves on every model
-        # and won't load a snapshot without: the clock and the registers as
-        # an xpet with no SuperPET board leaves them. badline doesn't read
-        # it.
+        # and won't load a snapshot without: the clock, X, Y, U, S and PC,
+        # DP, CC, A and B, then five bytes. xpet 3.10's layout was inferred
+        # from its snapshots of a 6809 running a loop that loads each
+        # register with a value of its own; the five bytes are 0 in every
+        # snapshot xpet wrote.
+        #
+        # Written: the clock and the registers, the SuperPET's 6809's
+        # between instructions while it has the bus, and otherwise the
+        # registers of a 6809 that hasn't run, as xpet leaves them. Read:
+        # the registers, with the 6809 on an instruction boundary, as
+        # xpet's snapshot is taken on one.
         module CPU6809
           NAME = "CPU6809"
+          MAJOR = 1
+          MINOR = 1
+          # The CC an xpet without a SuperPET board saves.
+          IDLE_CC = 0x04
 
           module_function
 
+          def reads?(section) = section.major == MAJOR && section.minor == MINOR
+
           def export(machine)
-            FieldWriter.new.qword(machine.cycles).zeros(11).byte(0x04).zeros(7).section(NAME, 1, 1)
+            fields = FieldWriter.new.qword(machine.cycles)
+            unless machine.superpet? && machine.m6809_running?
+              return fields.zeros(11).byte(IDLE_CC).zeros(7).section(NAME, MAJOR, MINOR)
+            end
+
+            cpu = machine.m6809
+            [cpu.x, cpu.y, cpu.u, cpu.s, cpu.pc].each { |register| fields.word(register) }
+            fields.byte(cpu.dp).byte(cpu.cc).byte(cpu.a).byte(cpu.b).zeros(5).section(NAME, MAJOR, MINOR)
+          end
+
+          # The registers by their BL-M6809 keys, in a keyed module's writer,
+          # with the 6809's cycle count the machine's `cycles`.
+          def import(section, out, cycles)
+            fields = FieldReader.new(section).skip(8)
+            %w[x y u s pc].each { |name| out.int(name, fields.word) }
+            %w[dp cc a b].each { |name| out.int(name, fields.byte) }
+            out.int("cycles", cycles).bool("nmi.armed", true)
           end
         end
       end

data/lib/badline/snapshot/vice/pet_crtc.rb

@@ -6,7 +6,7 @@ module Badline
       module PET
         # CRTC 1.2, which xpet saves on every model, the discrete boards'
         # video too, as a 6545 with the registers fixed: the board's screen
-        # settings, the registers, the one selected, the beam's character,
+        # settings, the character set VIA CA2 picks, the registers, the one selected, the beam's character,
         # row and line in the row, whether the frame is in its vertical
         # adjust, the row's start in screen RAM, the lines of vertical sync
         # left, whether the rows show, the picture's size, the lines in the
@@ -36,6 +36,13 @@ module Badline
           SETTINGS = [0xff, 0x03, 0x00, 0x20, 0x00, 0x20, 0x00, 0x10, 0xff, 0x1f].freeze
           # The 8296's, whose screen RAM spans 4K.
           SETTINGS_8296 = [0xff, 0x0f, 0x00, 0x20, 0x00, 0x20, 0xff, 0x0f, 0xff, 0x1f].freeze
+          # The SuperPET's, whose character ROM spans 4K, inferred from
+          # xpet 3.10's SuperPET snapshots.
+          SETTINGS_SUPERPET = [0xff, 0x03, 0x00, 0x20, 0x00, 0x20, 0x00, 0x10, 0xff, 0x3f].freeze
+          # The word after the settings while VIA CA2 is high, picking the
+          # character ROM's second set, as xpet 3.10 writes it and paints
+          # the picture from on every PET board.
+          SECOND_SET = 0x1000
           # The 2001's and 3000 series' video as xpet's CRTC runs it: 64
           # cycles a line, 32 rows of 8 lines and 4 more, the first 25 rows
           # shown.
@@ -85,7 +92,7 @@ module Badline
                      crtc_beam(run_on(fresh_crtc(machine), crtc_input, -CRTC_LEAD % frame_cycles(registers)),
                                registers)
                    end
-            fields = FieldWriter.new.bytes(model.cbm8296? ? SETTINGS_8296 : SETTINGS).word(attributes(model))
+            fields = FieldWriter.new.bytes(settings(model)).word(machine.via.ca2_output ? SECOND_SET : 0)
             fields.byte(0).byte(columns(model))
             fields.byte(model.basic1? ? 1 : 0).bytes(registers).byte(discrete ? 0 : crtc_input.int("selected", 0))
             beam_fields(fields, beam, registers, model)
@@ -93,6 +100,12 @@ module Badline
             fields.section(NAME, MAJOR, MINOR)
           end
 
+          def settings(model)
+            return SETTINGS_8296 if model.cbm8296?
+
+            model.superpet? ? SETTINGS_SUPERPET : SETTINGS
+          end
+
           def crtc_registers(input)
             registers = input.bytes("registers", "".b).bytes
             Array.new(REGISTERS) { |index| registers[index] || 0 }

data/lib/badline/snapshot/vice/pet_dongle.rb

@@ -0,0 +1,72 @@
+# frozen_string_literal: true
+
+module Badline
+  module Snapshot
+    module Vice
+      module PET
+        # The SuperPET's 6702 in PETMEM's settings at the end, from their
+        # fifth byte: the byte the 6702 reads, the last write that shifted
+        # it, 1 while the last write left D0 clear, then a little-endian word
+        # for each data line's shift register. Bit k of a word, below the
+        # register's last stage, is stage k XORed with stage k + 1, and its
+        # last stage's bit is that stage XORed with the stage the next shift
+        # brings in if the latch then holds the last write that shifted.
+        # Every PET's settings hold a 6702 as the RES line leaves it.
+        #
+        # Mapped from xpet 3.10's snapshots after each of 56 writes to $EFE0
+        # from its monitor, against PET::SuperPET::Dongle after the same
+        # writes.
+        #
+        # Written and read: the registers, and whether D0 was clear in the
+        # last write. A write the 6702 hasn't shifted on yet is written as
+        # shifted. Read, the latch is $00 or $FF by D0, and no shift waits.
+        module Dongle
+          # Offsets in PETMEM's settings.
+          AT = 4
+          LENGTH = 19
+          OUTPUT = 0
+          ARMED = 2
+          WORDS = 3
+          # The last write that shifted, as xpet has it after RES.
+          RESET_LAST = 0x01
+
+          module_function
+
+          # The settings' bytes for a 6702 with `registers`, after a write
+          # of `latch`.
+          def export(registers, latch)
+            incoming = RESET_LAST ^ Badline::PET::SuperPET::Dongle::FEEDBACK ^ 0xff
+            output = 0
+            words = []
+            8.times do |bit|
+              register = registers[bit]
+              output |= (register & 1) << bit
+              top = Badline::PET::SuperPET::Dongle::LENGTHS[bit] - 1
+              last = ((register >> top) ^ register ^ (incoming >> bit)) & 1
+              word = ((register ^ (register >> 1)) & ((1 << top) - 1)) | (last << top)
+              words << (word & 0xff) << (word >> 8)
+            end
+            [output ^ Badline::PET::SuperPET::Dongle::INVERTED, RESET_LAST, latch.nobits?(0x01) ? 1 : 0, *words]
+          end
+
+          # The 6702's BL-SUPERPET keys from the settings' `bytes`, in a keyed
+          # module's writer.
+          def import(bytes, out)
+            stages = bytes[OUTPUT] ^ Badline::PET::SuperPET::Dongle::INVERTED
+            registers = Array.new(8) do |bit|
+              word = bytes[WORDS + (bit * 2)] | (bytes[WORDS + (bit * 2) + 1] << 8)
+              stage = (stages >> bit) & 1
+              register = stage
+              (Badline::PET::SuperPET::Dongle::LENGTHS[bit] - 1).times do |index|
+                stage ^= (word >> index) & 1
+                register |= stage << (index + 1)
+              end
+              register
+            end
+            out.ints("dongle.registers", registers).int("dongle.latch", bytes[ARMED].zero? ? 0xff : 0x00)
+          end
+        end
+      end
+    end
+  end
+end

data/lib/badline/snapshot/vice/pet_drive8050.rb

@@ -4,70 +4,96 @@ module Badline
   module Snapshot
     module Vice
       module PET
-        # A true 8050 or 8250 on device 8, as xpet 3.10, xcbm2 and xcbm5x0 save it with true
-        # drive emulation: DRIVE8 2.0 with both drives, DRIVE9 to DRIVE11
-        # with none, DRIVECPU0 1.3, the interface processor and its RAM,
-        # RIOT1D0 and RIOT2D0 0.0, its two 6532s, and FDC0 0.0. xpet runs
-        # the floppy controller at a high level, so its 6504, VIA and 6530
-        # aren't in the snapshot: FDC0 holds the controller's state, its
-        # last track in byte 6.
+        # A true unit with an interface processor on device 8, as xpet 3.10,
+        # xcbm2 and xcbm5x0 save it with true drive emulation: an 8050, an
+        # 8250, an SFD-1001, a 4040, a 3040, a 2040, or a D9060 or D9090,
+        # which xpet's type 9000 stands for. Each is DRIVE8 2.0 with the
+        # unit's drives, DRIVE9 to DRIVE11 with none, DRIVECPU0 1.3, the
+        # interface processor and its RAM, RIOT1D0 and RIOT2D0 0.0, its two
+        # 6532s, and FDC0 0.0. xpet runs the floppy controller and the hard
+        # disk's SASI host at a high level, so their processors, VIAs and
+        # 6530s aren't in the snapshot: FDC0 holds the controller's state,
+        # its last track in byte 6.
         #
-        # DRIVE8 holds a block of 139 bytes for each drive, then 6 for the
-        # unit: each block has its head's half track, twice the track, at
-        # $10 and the drive's type as a word at $28 (8050 or 8250).
-        # DRIVECPU0 is laid out as the 2031's (Drive2031), its RAM the IP's
-        # page 0, the 6532s' 128 bytes each, then the 4K of common RAM.
-        # A RIOT module holds port A's output and direction registers, port
-        # B's, the edge control (bit 0 the PA7 interrupt, bit 1 a rising
-        # edge), the flags (bit 7 the timer's interrupt, which xpet raises
-        # IRQ for, bit 6 PA7's), the timer's
+        # DRIVE8 holds a block of 139 bytes for each of the unit's drives,
+        # then 6 for the unit: each block has its head's half track, twice
+        # the track, at $10 and the unit's type as a word at $28 (TYPES).
+        # The 1001 and the hard disks have one block, and a hard disk's head
+        # rests at HARD_DISK_TRACK. DRIVECPU0 is laid out as the 2031's
+        # (Drive2031), its RAM the IP's page 0, the 6532s' 128 bytes each,
+        # then the 4K of common RAM. A RIOT module holds port A's output and
+        # direction registers, port B's, the edge control (bit 0 the PA7
+        # interrupt, bit 1 a rising edge), the flags (bit 7 the timer's
+        # interrupt, which xpet raises IRQ for, bit 6 PA7's), the timer's
         # counter, its divider as a word, two bytes xpet leaves 0, and
         # whether the timer interrupts.
         #
-        # Written, once the controller is in its idle loop between
-        # instructions (PET#settle_for_vice!): the IP's registers and RAM,
-        # the 6532s, the heads' tracks, and FDC0 as xpet leaves an idle
-        # controller with the track badline's controller last stepped to.
-        # A unit whose controller is still busy is left out of xpet's
-        # modules. Read: the IP's registers and RAM and the 6532s, with the
-        # controller as a unit switched on has it in its idle loop, its
-        # heads on track 1, from where its next job steps them. A job under
-        # way in xpet's controller starts again from there. The disks in
-        # the drives stay.
+        # Written, once the controller, or the SASI host, is in its idle
+        # loop between instructions (PET#settle_for_vice!): the IP's
+        # registers and RAM, the 6532s, the heads' tracks, and FDC0 as xpet
+        # leaves an idle controller with the track badline's controller last
+        # stepped to. A unit whose controller is still busy is left out of
+        # xpet's modules. Read: the IP's registers and RAM and the 6532s,
+        # with the controller as a unit switched on has it in its idle loop,
+        # its heads on track 1, from where its next job steps them. A job
+        # under way in xpet's controller starts again from there. The disks
+        # in the drives stay, and a hard disk's image with them, which also
+        # says whether the unit is a D9060 or a D9090.
         module Drive8050
           UNIT = "DRIVE8"
           CPU = Drive2031::CPU
           RIOTS = %w[RIOT1D0 RIOT2D0].freeze
           FDC = "FDC0"
           NAMES = [UNIT, CPU, *RIOTS, FDC].freeze
-          TYPES = { 0x1f72 => "8050", 0x203a => "8250" }.freeze
-          # Where each drive's block starts in DRIVE8, and its fields.
-          DRIVES = [0x00, 0x8b].freeze
+          # xpet's drive types by DRIVE8's type word, for the units written
+          # and read here.
+          TYPES = { 0x1f72 => "8050", 0x203a => "8250", 0x03e9 => "1001", 0x0fc8 => "4040", 0x0be0 => "3040",
+                    0x07f8 => "2040", 0x2328 => "9060" }.freeze
+          # The type word each model is written with.
+          WORDS = TYPES.invert.merge("9090" => 0x2328).freeze
+          # The units that are hard disks, and the DOS 2.1 and DOS 1 units
+          # on the 4040's board.
+          HARD_DISKS = %w[9060 9090].freeze
+          DOS2_BOARD = %w[4040 3040 2040].freeze
+          # The drives each unit has, a block of DRIVE8 each.
+          DRIVE_COUNTS = { "8050" => 2, "8250" => 2, "1001" => 1, "4040" => 2, "3040" => 2, "2040" => 2, "9060" => 1,
+                           "9090" => 1 }.freeze
+          # A drive's block in DRIVE8, and its fields.
+          BLOCK = 0x8b
           HALF_TRACK = 0x10
           TYPE = 0x28
-          SIZE = 284
+          # The half track xpet keeps a hard disk's head on.
+          HARD_DISK_TRACK = 0x98
+          # The unit's bytes after the drives' blocks.
+          TAIL = 6
           # DRIVE8 as xpet saves an idle 8050, by the bytes that aren't 0,
-          # but for the type.
-          IDLE = { 0x00 => 0x01, 0x01 => 0x02, 0x02 => 0x01, 0x0e => 0x01, 0x0f => 0x01, 0x10 => 0x4c, 0x1a => 0x01,
-                   0x20 => 0x55, 0x30 => 0x06, 0x6f => 0xcd, 0x70 => 0xab, 0x71 => 0x34, 0x72 => 0x12, 0x99 => 0x01,
-                   0x9a => 0x01, 0x9b => 0x24, 0xa5 => 0x01, 0xab => 0x55, 0x11a => 0x01 }.freeze
+          # but for the type and the drive count at COUNT: the first drive's
+          # block, and from BLOCK on the second's with a byte past it.
+          IDLE = { 0x00 => 0x01, 0x02 => 0x01, 0x0e => 0x01, 0x0f => 0x01, 0x10 => 0x4c, 0x1a => 0x01, 0x20 => 0x55,
+                   0x30 => 0x06, 0x6f => 0xcd, 0x70 => 0xab, 0x71 => 0x34, 0x72 => 0x12 }.freeze
+          IDLE_SECOND = { 0x0e => 0x01, 0x0f => 0x01, 0x10 => 0x24, 0x1a => 0x01, 0x20 => 0x55, 0x8f => 0x01 }.freeze
+          COUNT = 0x01
           ZERO_PAGE = 0x80
           COMMON = 0x1000
           # FDC0 as xpet leaves an idle controller, and where the track goes.
           FDC_IDLE = [0x04, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00].freeze
           FDC_TRACK = 6
           # Where badline's controller keeps drive 0's track, in the 6530's
-          # RAM.
+          # RAM: the 8050's, and the 4040's in the low six bits.
           TRACK_AT = 0x21
+          DOS2_TRACK_AT = 0x03
+          DOS2_TRACK = 0x3f
           DIVIDERS = [1, 8, 64, 1024].freeze
           IRQ_EDGE = 0x01
           RISING = 0x02
           TIMER_FLAG = 0x80
           PA7_FLAG = 0x40
+          # The hard disk's controller, which holds the image's path.
+          SASI = "BL-D8-SASI"
 
           module_function
 
-          # Whether the snapshot has a true 8050 or 8250.
+          # Whether the snapshot has a true unit of these.
           def present?(container) = !container[FDC].nil? && !container[CPU].nil?
 
           def reads?(section)
@@ -78,48 +104,93 @@ module Badline
             end
           end
 
-          # The model DRIVE8 names, or nil.
+          # The model DRIVE8 names, or nil. Type 9000 reads as the D9060.
           def model(container)
             unit = container[UNIT]
-            return nil if unit.nil? || unit.data.bytesize < SIZE
+            return nil if unit.nil? || unit.data.bytesize < BLOCK
 
-            TYPES[FieldReader.new(unit).skip(TYPE).word]
+            model = TYPES[FieldReader.new(unit).skip(TYPE).word]
+            model if model && unit.data.bytesize >= size(model)
           end
 
-          # xpet's modules for the 8050 or 8250 whose BL-D8 modules `readers`
-          # holds, and none without one, or with its controller away from
-          # its idle loop.
+          # Whether xpet saves the two models as one type.
+          def same_type?(model, other) = WORDS.key?(model) && WORDS[model] == WORDS[other]
+
+          def hard_disk?(model) = HARD_DISKS.include?(model)
+
+          # The hard disk whose image the kept modules `disks` hold: a
+          # D9090 for one with six heads, and otherwise a D9060.
+          def hard_disk_model(disks)
+            own = disks.find { |section| section.name == SASI }
+            own && Keyed::Reader.parse(own).int("disk_heads", 4) == 6 ? "9090" : "9060"
+          end
+
+          # DRIVE8's size for the model.
+          def size(model) = (BLOCK * DRIVE_COUNTS.fetch(model)) + TAIL
+
+          # xpet's modules for the unit whose BL-D8 modules `readers` holds,
+          # and none without one, or with its controller away from its idle
+          # loop.
           def export(machine, readers)
             drive = readers["BL-D8"]
             model = drive&.text("model", "")
-            return [] unless TYPES.value?(model) && idle?(readers)
+            return [] unless WORDS.key?(model) && idle?(model, readers)
 
-            [unit(model, readers.fetch("BL-D8-MECH")), *Drive2031::UNITS.drop(1).map { |name| none(name) },
+            [unit(model, readers), *Drive2031::UNITS.drop(1).map { |name| none(name) },
              Drive2031.cpu_section(machine, readers.fetch("BL-D8-IPCPU"), ram(readers)),
              riot(RIOTS[0], readers.fetch("BL-D8-RIOT1")), riot(RIOTS[1], readers.fetch("BL-D8-RIOT2")),
-             fdc(readers.fetch("BL-D8-RRIOT"))]
+             fdc(model, readers)]
           end
 
           # Whether both processors are between instructions, the
           # controller at the start of its idle loop.
-          def idle?(readers)
-            fdc = readers.fetch("BL-D8-FDCCPU")
-            !position?(fdc) && !position?(readers.fetch("BL-D8-IPCPU")) &&
-              fdc.int("pc", 0) == Drives::Model8050::Idle::FDC_LOOP
+          def idle?(model, readers)
+            controller = readers.fetch(hard_disk?(model) ? "BL-D8-SASICPU" : "BL-D8-FDCCPU")
+            !position?(controller) && !position?(readers.fetch("BL-D8-IPCPU")) &&
+              controller.int("pc", 0) == controller_loop(model)
+          end
+
+          # Where the model's controller, or its SASI host, waits for jobs.
+          def controller_loop(model)
+            case model
+            when "9060", "9090" then Drives::Model9060::Idle::SASI_LOOP
+            when "2040" then Drives::Model2040::FDC_LOOP
+            when "4040", "3040" then Drives::Model4040::FDC_LOOP
+            else Drives::Model8050::Idle::FDC_LOOP
+            end
           end
 
           def position?(cpu) = !cpu.text("pos.seq", "").empty?
 
-          def unit(model, mechanism)
-            bytes = Array.new(SIZE) { |offset| IDLE.fetch(offset, 0) }
-            cylinders = mechanism.ints("cylinders", [0, 0])
-            DRIVES.each_with_index do |at, drive|
-              bytes[at + HALF_TRACK] = ((cylinders[drive] || 0) + 1) * 2
-              bytes[at + TYPE, 2] = [TYPES.key(model)].pack("v").bytes
+          def unit(model, readers)
+            count = DRIVE_COUNTS.fetch(model)
+            bytes = Array.new(size(model), 0)
+            IDLE.each { |offset, value| bytes[offset] = value }
+            IDLE_SECOND.each { |offset, value| bytes[BLOCK + offset] = value } if count > 1
+            bytes[COUNT] = count
+            tracks = half_tracks(model, readers)
+            count.times do |drive|
+              at = BLOCK * drive
+              bytes[at + HALF_TRACK] = tracks[drive]
+              bytes[at + TYPE, 2] = [WORDS.fetch(model)].pack("v").bytes
             end
             FieldWriter.new.bytes(bytes).section(UNIT, Drive2031::DRIVE_MAJOR, Drive2031::DRIVE_MINOR)
           end
 
+          # Each drive's head as xpet's half track: the 8050's cylinder on
+          # from 1, the 4040's half track on from track 1, and a hard
+          # disk's where xpet keeps it.
+          def half_tracks(model, readers)
+            return [HARD_DISK_TRACK] if hard_disk?(model)
+
+            mechanism = readers.fetch("BL-D8-MECH")
+            if DOS2_BOARD.include?(model)
+              mechanism.ints("half_tracks", [0, 0]).map { |half_track| half_track + 2 }
+            else
+              mechanism.ints("cylinders", [0, 0]).map { |cylinder| (cylinder + 1) * 2 }
+            end
+          end
+
           def none(name) = Drive2031.unit(Drive2031::NONE, name)
 
           # The IP's RAM as xpet lays it out: page 0 from both 6532s, then
@@ -143,16 +214,25 @@ module Badline
             fields.zeros(2).flag(input.bool("timer.irq_enabled", false)).section(name, 0, 0)
           end
 
-          def fdc(rriot)
+          # FDC0 with the controller's track, and a hard disk's with none.
+          def fdc(model, readers)
             bytes = FDC_IDLE.dup
-            bytes[FDC_TRACK] = rriot.bytes("ram", "".b).getbyte(TRACK_AT).to_i
+            unless hard_disk?(model)
+              ram = readers.fetch("BL-D8-RRIOT").bytes("ram", "".b)
+              bytes[FDC_TRACK] = if DOS2_BOARD.include?(model)
+                                   ram.getbyte(DOS2_TRACK_AT).to_i & DOS2_TRACK
+                                 else
+                                   ram.getbyte(TRACK_AT).to_i
+                                 end
+            end
             FieldWriter.new.bytes(bytes).section(FDC, 0, 0)
           end
 
           # The unit's keyed modules, named for device 8, from the
           # snapshot's: the IP's side from xpet's, the controller's side
           # from `reference`, a unit's in its idle loop, and `disks`, the
-          # drives' disk modules badline keeps.
+          # drives' disk modules badline keeps, or a hard disk's controller
+          # with its image.
           def import(container, reference, disks)
             cpu = container[CPU]
             page = FieldReader.new(cpu).skip(Drive2031::RAM_AT).string(ZERO_PAGE * 2)
@@ -162,16 +242,48 @@ module Badline
                         riot_section("BL-D8-RIOT1", container[RIOTS[0]], page.byteslice(0, ZERO_PAGE)),
                         riot_section("BL-D8-RIOT2", container[RIOTS[1]], page.byteslice(ZERO_PAGE, ZERO_PAGE)),
                         Keyed.section("BL-D8-IPCPU") { |out| Drive2031.registers(cpu, out) }]
-            sections + reference.select { |section| CONTROLLER.include?(section.name) } + disks
+            sections + controller_side(reference, disks)
           end
 
-          # The controller's side, which comes from a unit in its idle loop.
+          # The controller's side, which comes from a unit in its idle loop:
+          # a floppy unit's, and a hard disk's SASI host.
           CONTROLLER = %w[BL-D8-FDCCPU BL-D8-VIA BL-D8-RRIOT BL-D8-MECH].freeze
+          HOST = %w[BL-D8-SASICPU BL-D8-SASIRAM BL-D8-VIA].freeze
+
+          def controller_side(reference, disks)
+            base = reference.find { |section| section.name == SASI }
+            return reference.select { |section| CONTROLLER.include?(section.name) } + disks if base.nil?
+
+            reference.select { |section| HOST.include?(section.name) } + [controller(base, disks)]
+          end
+
+          # The hard disk's controller as `base` has it, with the image
+          # badline's kept in `disks`.
+          def controller(base, disks)
+            kept = disks.find { |section| section.name == SASI }
+            return base if kept.nil?
 
+            target = Drives::Model9060::SASITarget.new
+            target.load_fields(Keyed::Reader.parse(base))
+            own = Keyed::Reader.parse(kept)
+            path = own.text("path", "")
+            if File.file?(path)
+              target.disk = Storage::D90Image.new(path, read_only: own.bool("read_only", false),
+                                                        heads: own.int("disk_heads", 4))
+            end
+            Keyed.section(SASI) { |out| target.save_fields(out) }
+          end
+
+          # The unit's own fields: its model and clock, with the controller's
+          # last byte from `reference`, or a hard disk's SASI lines.
           def unit_fields(container, reference, out)
             own = Keyed::Reader.parse(reference.find { |section| section.name == "BL-D8" })
-            out.text("model", own.text("model", "8050")).int("phase", 0)
-            out.int("cycles", FieldReader.new(container[CPU]).qword).int("fdc_data", own.int("fdc_data", 0))
+            model = own.text("model", "8050")
+            out.text("model", model).int("phase", 0).int("cycles", FieldReader.new(container[CPU]).qword)
+            return out.int("fdc_data", own.int("fdc_data", 0)) unless hard_disk?(model)
+
+            out.int("sasi_data", own.int("sasi_data", 0)).bool("sasi.ack_high", own.bool("sasi.ack_high", true))
+            out.bool("sasi.reset_high", own.bool("sasi.reset_high", false))
           end
 
           def riot_section(name, section, ram)
@@ -199,15 +311,23 @@ module Badline
           end
 
           def booted(model)
-            unit = model == "8250" ? Drives::Model8250.new : Drives::Model8050.new
-            Drives::Model8050::BOOT_CYCLES.times { unit.host_cycle! }
-            unit.cycle! until idle_loop?(unit)
+            unit = new_unit(model)
+            unit.boot_cycles.times { unit.host_cycle! }
+            unit.cycle! until unit.settled_for_vice?
             unit.save_modules([], "BL-D8")
           end
 
-          def idle_loop?(unit)
-            cpu = unit.fdc_cpu
-            unit.ip_cpu.boundary? && cpu.boundary? && cpu.program_counter == Drives::Model8050::Idle::FDC_LOOP
+          def new_unit(model)
+            case model
+            when "8250" then Drives::Model8250.new
+            when "1001" then Drives::Model1001.new
+            when "4040" then Drives::Model4040.new
+            when "3040" then Drives::Model3040.new
+            when "2040" then Drives::Model2040.new
+            when "9060" then Drives::Model9060.new
+            when "9090" then Drives::Model9090.new
+            else Drives::Model8050.new
+            end
           end
         end
       end