smallworld-re 1.0.0__py3-none-any.whl

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (166) hide show
  1. smallworld/__init__.py +35 -0
  2. smallworld/analyses/__init__.py +14 -0
  3. smallworld/analyses/analysis.py +88 -0
  4. smallworld/analyses/code_coverage.py +31 -0
  5. smallworld/analyses/colorizer.py +682 -0
  6. smallworld/analyses/colorizer_summary.py +100 -0
  7. smallworld/analyses/field_detection/__init__.py +14 -0
  8. smallworld/analyses/field_detection/field_analysis.py +536 -0
  9. smallworld/analyses/field_detection/guards.py +26 -0
  10. smallworld/analyses/field_detection/hints.py +133 -0
  11. smallworld/analyses/field_detection/malloc.py +211 -0
  12. smallworld/analyses/forced_exec/__init__.py +3 -0
  13. smallworld/analyses/forced_exec/forced_exec.py +87 -0
  14. smallworld/analyses/underlays/__init__.py +4 -0
  15. smallworld/analyses/underlays/basic.py +13 -0
  16. smallworld/analyses/underlays/underlay.py +31 -0
  17. smallworld/analyses/unstable/__init__.py +4 -0
  18. smallworld/analyses/unstable/angr/__init__.py +0 -0
  19. smallworld/analyses/unstable/angr/base.py +12 -0
  20. smallworld/analyses/unstable/angr/divergence.py +274 -0
  21. smallworld/analyses/unstable/angr/model.py +383 -0
  22. smallworld/analyses/unstable/angr/nwbt.py +63 -0
  23. smallworld/analyses/unstable/angr/typedefs.py +170 -0
  24. smallworld/analyses/unstable/angr/utils.py +25 -0
  25. smallworld/analyses/unstable/angr/visitor.py +315 -0
  26. smallworld/analyses/unstable/angr_nwbt.py +106 -0
  27. smallworld/analyses/unstable/code_coverage.py +54 -0
  28. smallworld/analyses/unstable/code_reachable.py +44 -0
  29. smallworld/analyses/unstable/control_flow_tracer.py +71 -0
  30. smallworld/analyses/unstable/pointer_finder.py +90 -0
  31. smallworld/arch/__init__.py +0 -0
  32. smallworld/arch/aarch64_arch.py +286 -0
  33. smallworld/arch/amd64_arch.py +86 -0
  34. smallworld/arch/i386_arch.py +44 -0
  35. smallworld/emulators/__init__.py +14 -0
  36. smallworld/emulators/angr/__init__.py +7 -0
  37. smallworld/emulators/angr/angr.py +1652 -0
  38. smallworld/emulators/angr/default.py +15 -0
  39. smallworld/emulators/angr/exceptions.py +7 -0
  40. smallworld/emulators/angr/exploration/__init__.py +9 -0
  41. smallworld/emulators/angr/exploration/bounds.py +27 -0
  42. smallworld/emulators/angr/exploration/default.py +17 -0
  43. smallworld/emulators/angr/exploration/terminate.py +22 -0
  44. smallworld/emulators/angr/factory.py +55 -0
  45. smallworld/emulators/angr/machdefs/__init__.py +35 -0
  46. smallworld/emulators/angr/machdefs/aarch64.py +292 -0
  47. smallworld/emulators/angr/machdefs/amd64.py +192 -0
  48. smallworld/emulators/angr/machdefs/arm.py +387 -0
  49. smallworld/emulators/angr/machdefs/i386.py +221 -0
  50. smallworld/emulators/angr/machdefs/machdef.py +138 -0
  51. smallworld/emulators/angr/machdefs/mips.py +184 -0
  52. smallworld/emulators/angr/machdefs/mips64.py +189 -0
  53. smallworld/emulators/angr/machdefs/ppc.py +101 -0
  54. smallworld/emulators/angr/machdefs/riscv.py +261 -0
  55. smallworld/emulators/angr/machdefs/xtensa.py +255 -0
  56. smallworld/emulators/angr/memory/__init__.py +7 -0
  57. smallworld/emulators/angr/memory/default.py +10 -0
  58. smallworld/emulators/angr/memory/fixups.py +43 -0
  59. smallworld/emulators/angr/memory/memtrack.py +105 -0
  60. smallworld/emulators/angr/scratch.py +43 -0
  61. smallworld/emulators/angr/simos.py +53 -0
  62. smallworld/emulators/angr/utils.py +70 -0
  63. smallworld/emulators/emulator.py +1013 -0
  64. smallworld/emulators/hookable.py +252 -0
  65. smallworld/emulators/panda/__init__.py +5 -0
  66. smallworld/emulators/panda/machdefs/__init__.py +28 -0
  67. smallworld/emulators/panda/machdefs/aarch64.py +93 -0
  68. smallworld/emulators/panda/machdefs/amd64.py +71 -0
  69. smallworld/emulators/panda/machdefs/arm.py +89 -0
  70. smallworld/emulators/panda/machdefs/i386.py +36 -0
  71. smallworld/emulators/panda/machdefs/machdef.py +86 -0
  72. smallworld/emulators/panda/machdefs/mips.py +94 -0
  73. smallworld/emulators/panda/machdefs/mips64.py +91 -0
  74. smallworld/emulators/panda/machdefs/ppc.py +79 -0
  75. smallworld/emulators/panda/panda.py +575 -0
  76. smallworld/emulators/unicorn/__init__.py +13 -0
  77. smallworld/emulators/unicorn/machdefs/__init__.py +28 -0
  78. smallworld/emulators/unicorn/machdefs/aarch64.py +310 -0
  79. smallworld/emulators/unicorn/machdefs/amd64.py +326 -0
  80. smallworld/emulators/unicorn/machdefs/arm.py +321 -0
  81. smallworld/emulators/unicorn/machdefs/i386.py +137 -0
  82. smallworld/emulators/unicorn/machdefs/machdef.py +117 -0
  83. smallworld/emulators/unicorn/machdefs/mips.py +202 -0
  84. smallworld/emulators/unicorn/unicorn.py +684 -0
  85. smallworld/exceptions/__init__.py +5 -0
  86. smallworld/exceptions/exceptions.py +85 -0
  87. smallworld/exceptions/unstable/__init__.py +1 -0
  88. smallworld/exceptions/unstable/exceptions.py +25 -0
  89. smallworld/extern/__init__.py +4 -0
  90. smallworld/extern/ctypes.py +94 -0
  91. smallworld/extern/unstable/__init__.py +1 -0
  92. smallworld/extern/unstable/ghidra.py +129 -0
  93. smallworld/helpers.py +107 -0
  94. smallworld/hinting/__init__.py +8 -0
  95. smallworld/hinting/hinting.py +214 -0
  96. smallworld/hinting/hints.py +427 -0
  97. smallworld/hinting/unstable/__init__.py +2 -0
  98. smallworld/hinting/utils.py +19 -0
  99. smallworld/instructions/__init__.py +18 -0
  100. smallworld/instructions/aarch64.py +20 -0
  101. smallworld/instructions/arm.py +18 -0
  102. smallworld/instructions/bsid.py +67 -0
  103. smallworld/instructions/instructions.py +258 -0
  104. smallworld/instructions/mips.py +21 -0
  105. smallworld/instructions/x86.py +100 -0
  106. smallworld/logging.py +90 -0
  107. smallworld/platforms.py +95 -0
  108. smallworld/py.typed +0 -0
  109. smallworld/state/__init__.py +6 -0
  110. smallworld/state/cpus/__init__.py +32 -0
  111. smallworld/state/cpus/aarch64.py +563 -0
  112. smallworld/state/cpus/amd64.py +676 -0
  113. smallworld/state/cpus/arm.py +630 -0
  114. smallworld/state/cpus/cpu.py +71 -0
  115. smallworld/state/cpus/i386.py +239 -0
  116. smallworld/state/cpus/mips.py +374 -0
  117. smallworld/state/cpus/mips64.py +372 -0
  118. smallworld/state/cpus/powerpc.py +229 -0
  119. smallworld/state/cpus/riscv.py +357 -0
  120. smallworld/state/cpus/xtensa.py +80 -0
  121. smallworld/state/memory/__init__.py +7 -0
  122. smallworld/state/memory/code.py +70 -0
  123. smallworld/state/memory/elf/__init__.py +3 -0
  124. smallworld/state/memory/elf/elf.py +564 -0
  125. smallworld/state/memory/elf/rela/__init__.py +32 -0
  126. smallworld/state/memory/elf/rela/aarch64.py +27 -0
  127. smallworld/state/memory/elf/rela/amd64.py +32 -0
  128. smallworld/state/memory/elf/rela/arm.py +51 -0
  129. smallworld/state/memory/elf/rela/i386.py +32 -0
  130. smallworld/state/memory/elf/rela/mips.py +45 -0
  131. smallworld/state/memory/elf/rela/ppc.py +45 -0
  132. smallworld/state/memory/elf/rela/rela.py +63 -0
  133. smallworld/state/memory/elf/rela/riscv64.py +27 -0
  134. smallworld/state/memory/elf/rela/xtensa.py +15 -0
  135. smallworld/state/memory/elf/structs.py +55 -0
  136. smallworld/state/memory/heap.py +85 -0
  137. smallworld/state/memory/memory.py +181 -0
  138. smallworld/state/memory/stack/__init__.py +31 -0
  139. smallworld/state/memory/stack/aarch64.py +22 -0
  140. smallworld/state/memory/stack/amd64.py +42 -0
  141. smallworld/state/memory/stack/arm.py +66 -0
  142. smallworld/state/memory/stack/i386.py +22 -0
  143. smallworld/state/memory/stack/mips.py +34 -0
  144. smallworld/state/memory/stack/mips64.py +34 -0
  145. smallworld/state/memory/stack/ppc.py +34 -0
  146. smallworld/state/memory/stack/riscv.py +22 -0
  147. smallworld/state/memory/stack/stack.py +127 -0
  148. smallworld/state/memory/stack/xtensa.py +34 -0
  149. smallworld/state/models/__init__.py +6 -0
  150. smallworld/state/models/mmio.py +186 -0
  151. smallworld/state/models/model.py +163 -0
  152. smallworld/state/models/posix.py +455 -0
  153. smallworld/state/models/x86/__init__.py +2 -0
  154. smallworld/state/models/x86/microsoftcdecl.py +35 -0
  155. smallworld/state/models/x86/systemv.py +240 -0
  156. smallworld/state/state.py +962 -0
  157. smallworld/state/unstable/__init__.py +0 -0
  158. smallworld/state/unstable/elf.py +393 -0
  159. smallworld/state/x86_registers.py +30 -0
  160. smallworld/utils.py +935 -0
  161. smallworld_re-1.0.0.dist-info/LICENSE.txt +21 -0
  162. smallworld_re-1.0.0.dist-info/METADATA +189 -0
  163. smallworld_re-1.0.0.dist-info/RECORD +166 -0
  164. smallworld_re-1.0.0.dist-info/WHEEL +5 -0
  165. smallworld_re-1.0.0.dist-info/entry_points.txt +2 -0
  166. smallworld_re-1.0.0.dist-info/top_level.txt +1 -0
@@ -0,0 +1,54 @@
1
+ import copy
2
+ import logging
3
+ import typing
4
+
5
+ from ... import emulators, exceptions, hinting, state
6
+ from .. import analysis
7
+
8
+ logger = logging.getLogger(__name__)
9
+ hinter = hinting.get_hinter(__name__)
10
+
11
+
12
+ class CodeCoverage(analysis.Analysis):
13
+ """A simple analysis that logs jumps, calls, and returns.
14
+
15
+ Arguments:
16
+ num_instructions: The number of instructions to execute.
17
+ """
18
+
19
+ def __init__(self, *args, num_instructions: int = 10, **kwargs):
20
+ super().__init__(*args, **kwargs)
21
+ self.num_instructions = num_instructions
22
+
23
+ name = "code-coverage"
24
+ description = ""
25
+ version = "0.0.1"
26
+
27
+ def run(self, state: state.Machine) -> None:
28
+ machine = copy.deepcopy(state)
29
+ cpu = machine.get_cpu()
30
+ emulator = emulators.UnicornEmulator(cpu.platform)
31
+ machine.apply(emulator)
32
+ coverage: typing.Dict[int, int] = {}
33
+ for i in range(self.num_instructions):
34
+ pc = emulator.read_register_content("pc")
35
+ if pc in coverage:
36
+ coverage[pc] += 1
37
+ else:
38
+ coverage[pc] = 1
39
+
40
+ try:
41
+ emulator.step()
42
+ except exceptions.EmulationStop:
43
+ break
44
+ except exceptions.EmulationError as e:
45
+ exhint = hinting.EmulationException(
46
+ message="Emulation single step raised an exception",
47
+ pc=pc,
48
+ instruction_num=i,
49
+ exception=str(e),
50
+ )
51
+ hinter.info(exhint)
52
+ break
53
+ hint = hinting.CoverageHint(message="Coverage for execution", coverage=coverage)
54
+ hinter.info(hint)
@@ -0,0 +1,44 @@
1
+ import copy
2
+ import logging
3
+
4
+ from ... import emulators, exceptions, hinting, state
5
+ from .. import analysis
6
+
7
+ logger = logging.getLogger(__name__)
8
+ hinter = hinting.get_hinter(__name__)
9
+
10
+
11
+ class CodeReachable(analysis.Analysis):
12
+ """A simple analysis that logs what code is reachable by symbolic execution."""
13
+
14
+ def __init__(self, max_steps=500, **kwargs):
15
+ self.steps_left = max_steps
16
+ super().__init__(**kwargs)
17
+
18
+ name = "code-reachable"
19
+ description = ""
20
+ version = "0.0.1"
21
+
22
+ def run(self, state: state.Machine) -> None:
23
+ machine = copy.deepcopy(state)
24
+ cpu = machine.get_cpu()
25
+ emulator = emulators.AngrEmulator(cpu.platform)
26
+ machine.apply(emulator)
27
+
28
+ try:
29
+ while self.steps_left is None or self.steps_left > 0:
30
+ emulator.step()
31
+ if emulator.mgr:
32
+ for s in emulator.mgr.active:
33
+ pc = s._ip.concrete_value
34
+ hint = hinting.ReachableCodeHint(
35
+ message=f"Address {hex(pc)} is reachable via symbolic execution",
36
+ address=pc,
37
+ )
38
+ hinter.info(hint)
39
+ if self.steps_left is not None:
40
+ self.steps_left -= 1
41
+ except exceptions.EmulationStop:
42
+ return
43
+ except emulators.angr.PathTerminationSignal:
44
+ return
@@ -0,0 +1,71 @@
1
+ import copy
2
+ import logging
3
+
4
+ from ... import emulators, exceptions, hinting, instructions, state
5
+ from .. import analysis
6
+
7
+ logger = logging.getLogger(__name__)
8
+ hinter = hinting.get_hinter(__name__)
9
+
10
+
11
+ class ControlFlowTracer(analysis.Analysis):
12
+ """A simple analysis that logs jumps, calls, and returns.
13
+
14
+ Arguments:
15
+ num_instructions: The number of instructions to execute.
16
+ """
17
+
18
+ def __init__(self, *args, num_instructions: int = 10, **kwargs):
19
+ super().__init__(*args, **kwargs)
20
+ self.num_instructions = num_instructions
21
+
22
+ name = "control-flow-tracer"
23
+ description = ""
24
+ version = "0.0.1"
25
+
26
+ def run(self, state: state.Machine) -> None:
27
+ machine = copy.deepcopy(state)
28
+ cpu = machine.get_cpu()
29
+ emulator = emulators.UnicornEmulator(cpu.platform)
30
+ machine.apply(emulator)
31
+
32
+ from_instruction = None
33
+
34
+ for i in range(self.num_instructions):
35
+ instruction = emulator.current_instruction()
36
+ if from_instruction:
37
+ hint = hinting.ControlFlowHint(
38
+ message="Control Flow Change",
39
+ from_instruction=instructions.Instruction.from_capstone(
40
+ from_instruction
41
+ ),
42
+ to_instruction=instructions.Instruction.from_capstone(instruction),
43
+ )
44
+ hinter.info(hint)
45
+ from_instruction = None
46
+ if self.is_cfi(instruction):
47
+ from_instruction = instruction
48
+ try:
49
+ emulator.step()
50
+ except exceptions.EmulationStop:
51
+ break
52
+ except exceptions.EmulationError as e:
53
+ exhint = hinting.EmulationException(
54
+ message="Emulation single step raised an exception",
55
+ pc=instruction.address,
56
+ instruction_num=i,
57
+ exception=str(e),
58
+ )
59
+ hinter.info(exhint)
60
+ break
61
+
62
+ def is_cfi(self, instruction):
63
+ for g in instruction.groups:
64
+ group_name = instruction.group_name(g)
65
+ if group_name == "jump":
66
+ return True
67
+ elif group_name == "call":
68
+ return True
69
+ elif group_name == "ret":
70
+ return True
71
+ return False
@@ -0,0 +1,90 @@
1
+ import copy
2
+ import logging
3
+
4
+ from unicorn import unicorn_const
5
+
6
+ from ... import emulators, exceptions, hinting, instructions, state
7
+ from .. import analysis
8
+
9
+ logger = logging.getLogger(__name__)
10
+ hinter = hinting.get_hinter(__name__)
11
+
12
+
13
+ class PointerFinder(analysis.Analysis):
14
+ """A simple analysis that logs when a register is used as a pointer.
15
+
16
+ Arguments:
17
+ num_instructions: The number of instructions to execute.
18
+ """
19
+
20
+ def __init__(self, *args, num_instructions: int = 10, **kwargs):
21
+ super().__init__(*args, **kwargs)
22
+ self.num_instructions = num_instructions
23
+
24
+ name = "pointer-finder"
25
+ description = ""
26
+ version = "0.0.1"
27
+
28
+ def find_the_pointer(self, cs_instruction, write):
29
+ i = instructions.Instruction.from_capstone(cs_instruction)
30
+ p = None
31
+ if write:
32
+ for w in i.writes:
33
+ if type(w) is instructions.BSIDMemoryReferenceOperand:
34
+ p = w
35
+ break
36
+ else:
37
+ for r in i.reads:
38
+ if type(r) is instructions.BSIDMemoryReferenceOperand:
39
+ p = r
40
+ break
41
+
42
+ assert p, "we can't find the pointer"
43
+ hint = hinting.PointerHint(message="Pointer Found", instruction=i, pointer=r)
44
+ hinter.info(hint)
45
+
46
+ def run(self, state: state.Machine) -> None:
47
+ machine = copy.deepcopy(state)
48
+ cpu = machine.get_cpu()
49
+ emulator = emulators.UnicornEmulator(cpu.platform)
50
+ machine.apply(emulator)
51
+
52
+ def hook_valid_access(uc, access, address, size, value, user_data):
53
+ instruction = emulator.current_instruction()
54
+ if access == unicorn_const.UC_MEM_WRITE:
55
+ self.find_the_pointer(instruction, True)
56
+ else:
57
+ self.find_the_pointer(instruction, False)
58
+
59
+ def hook_invalid_access(uc, access, address, size, value, user_data):
60
+ instruction = emulator.current_instruction()
61
+ if access == unicorn_const.UC_MEM_WRITE_UNMAPPED:
62
+ self.find_the_pointer(instruction, True)
63
+ else:
64
+ self.find_the_pointer(instruction, False)
65
+ return False
66
+
67
+ emulator.engine.hook_add(
68
+ unicorn_const.UC_HOOK_MEM_WRITE | unicorn_const.UC_HOOK_MEM_READ,
69
+ hook_valid_access,
70
+ )
71
+ emulator.engine.hook_add(
72
+ unicorn_const.UC_HOOK_MEM_READ_UNMAPPED
73
+ | unicorn_const.UC_HOOK_MEM_WRITE_UNMAPPED,
74
+ hook_invalid_access,
75
+ )
76
+
77
+ for i in range(self.num_instructions):
78
+ try:
79
+ emulator.step()
80
+ except exceptions.EmulationStop:
81
+ break
82
+ except exceptions.EmulationError as e:
83
+ exhint = hinting.EmulationException(
84
+ message="Emulation single step raised an exception",
85
+ pc=emulator.current_instruction().address,
86
+ instruction_num=i,
87
+ exception=str(e),
88
+ )
89
+ hinter.info(exhint)
90
+ break
File without changes
@@ -0,0 +1,286 @@
1
+ info = {
2
+ # *** General purpose registers ***
3
+ "x0": ("x0", (0, 8)),
4
+ "w0": ("x0", (0, 4)),
5
+ "x1": ("x1", (0, 8)),
6
+ "w1": ("x1", (0, 4)),
7
+ "x2": ("x2", (0, 8)),
8
+ "w2": ("x2", (0, 4)),
9
+ "x3": ("x3", (0, 8)),
10
+ "w3": ("x3", (0, 4)),
11
+ "x4": ("x4", (0, 8)),
12
+ "w4": ("x4", (0, 4)),
13
+ "x5": ("x5", (0, 8)),
14
+ "w5": ("x5", (0, 4)),
15
+ "x6": ("x6", (0, 8)),
16
+ "w6": ("x6", (0, 4)),
17
+ "x7": ("x7", (0, 8)),
18
+ "w7": ("x7", (0, 4)),
19
+ "x8": ("x8", (0, 8)),
20
+ "w8": ("x8", (0, 4)),
21
+ "x9": ("x9", (0, 8)),
22
+ "w9": ("x9", (0, 4)),
23
+ "x10": ("x10", (0, 8)),
24
+ "w10": ("x10", (0, 4)),
25
+ "x11": ("x11", (0, 8)),
26
+ "w11": ("x11", (0, 4)),
27
+ "x12": ("x12", (0, 8)),
28
+ "w12": ("x12", (0, 4)),
29
+ "x13": ("x13", (0, 8)),
30
+ "w13": ("x13", (0, 4)),
31
+ "x14": ("x14", (0, 8)),
32
+ "w14": ("x14", (0, 4)),
33
+ "x15": ("x15", (0, 8)),
34
+ "w15": ("x15", (0, 4)),
35
+ "x16": ("x16", (0, 8)),
36
+ "w16": ("x16", (0, 4)),
37
+ "x17": ("x17", (0, 8)),
38
+ "w17": ("x17", (0, 4)),
39
+ "x18": ("x18", (0, 8)),
40
+ "w18": ("x18", (0, 4)),
41
+ "x19": ("x19", (0, 8)),
42
+ "w19": ("x19", (0, 4)),
43
+ "x20": ("x20", (0, 8)),
44
+ "w20": ("x20", (0, 4)),
45
+ "x21": ("x21", (0, 8)),
46
+ "w21": ("x21", (0, 4)),
47
+ "x22": ("x22", (0, 8)),
48
+ "w22": ("x22", (0, 4)),
49
+ "x23": ("x23", (0, 8)),
50
+ "w23": ("x23", (0, 4)),
51
+ "x24": ("x24", (0, 8)),
52
+ "w24": ("x24", (0, 4)),
53
+ "x25": ("x25", (0, 8)),
54
+ "w25": ("x25", (0, 4)),
55
+ "x26": ("x26", (0, 8)),
56
+ "w26": ("x26", (0, 4)),
57
+ "x27": ("x27", (0, 8)),
58
+ "w27": ("x27", (0, 4)),
59
+ "x28": ("x28", (0, 8)),
60
+ "w28": ("x28", (0, 4)),
61
+ "x29": ("x29", (0, 8)),
62
+ "w29": ("x29", (0, 4)),
63
+ "x30": ("x30", (0, 8)),
64
+ "w30": ("x30", (0, 4)),
65
+ # Program Counter
66
+ "pc": ("pc", (0, 8)),
67
+ # Stack Pointer
68
+ "sp": ("sp", (0, 8)),
69
+ "wsp": ("sp", (0, 4)),
70
+ # Frame Pointer
71
+ "fp": ("x29", (0, 8)),
72
+ # Link Register
73
+ "lr": ("x30", (0, 8)),
74
+ # Zero Register
75
+ "xzr": ("xzr", (0, 8)),
76
+ "wzr": ("xzr", (0, 4)),
77
+ # *** System Control Registers ***
78
+ # NOTE: "_elX" indicates that only exception level X or greater can access this register.
79
+ # NOTE: This list is far from complete; it only covers what Unicorn supports
80
+ # Condition Code Register
81
+ "fpcr": ("fpcr", (0, 8)),
82
+ # Floating Point Status Register
83
+ "fpsr": ("fpsr", (0, 8)),
84
+ # Banked stack pointers for exception handlers
85
+ "sp_el0": ("sp_el0", (0, 8)),
86
+ "sp_el1": ("sp_el1", (0, 8)),
87
+ "sp_el2": ("sp_el2", (0, 8)),
88
+ "sp_el3": ("sp_el3", (0, 8)),
89
+ # Banked link regiusters for exception handlers
90
+ # NOTE: Unicorn thinks there's an elr_el0; according to docs, it doesn't exist
91
+ "elr_el1": ("elr_el1", (0, 8)),
92
+ "elr_el2": ("elr_el2", (0, 8)),
93
+ "elr_el3": ("elr_el3", (0, 8)),
94
+ # Banked exception syndrome registers for exception handlers
95
+ # NOTE: Unicorn thinks there's a far_el0; according to docs, it doesn't exist
96
+ "far_el1": ("far_el1", (0, 8)),
97
+ "far_el2": ("far_el2", (0, 8)),
98
+ "far_el3": ("far_el3", (0, 8)),
99
+ # Banked vector base address registers for exception handlers
100
+ # NOTE: vbar_el0 doesn't exist in angr.
101
+ # Since vbar_el0 and el1 are aliases for each other, vbar_el1 must be the "real" register.
102
+ "vbar_el1": ("vbar_el1", (0, 8)),
103
+ "vbar_el0": ("vbar_el0", (0, 8)),
104
+ "vbar_el2": ("vbar_el2", (0, 8)),
105
+ "vbar_el3": ("vbar_el3", (0, 8)),
106
+ # Coprocessor access control register
107
+ "cpacr_el1": ("cpacr_el1", (0, 8)),
108
+ # Memory Attribute Indirection Register
109
+ "mair_el1": ("mair_el1", (0, 8)),
110
+ # Physical Address Register
111
+ "par_el1": ("par_el1", (0, 8)),
112
+ # Translation Table Zero Base Register
113
+ "ttbr0_el1": ("ttbr0_el1", (0, 8)),
114
+ # Translation Table One Base Register
115
+ "ttbr1_el1": ("ttbr1_el1", (0, 8)),
116
+ # Thread ID Register
117
+ # NOTE: According to docs, there should be an el2 and el3 copy, too.
118
+ "tpidr_el0": ("tpidr_el0", (0, 8)),
119
+ "tpidr_el1": ("tpidr_el1", (0, 8)),
120
+ # Userspace-visible Thread ID register
121
+ "tpidrro_el0": ("tpidrro_el0", (0, 8)),
122
+ # *** Floating Point Registers ***
123
+ # Scalar Floating Point Registers
124
+ "q0": ("q0", (0, 16)),
125
+ "d0": ("q0", (0, 8)),
126
+ "s0": ("q0", (0, 4)),
127
+ "h0": ("q0", (0, 2)),
128
+ "b0": ("q0", (0, 1)),
129
+ "q1": ("q1", (0, 16)),
130
+ "d1": ("q1", (0, 8)),
131
+ "s1": ("q1", (0, 4)),
132
+ "h1": ("q1", (0, 2)),
133
+ "b1": ("q1", (0, 1)),
134
+ "q2": ("q2", (0, 16)),
135
+ "d2": ("q2", (0, 8)),
136
+ "s2": ("q2", (0, 4)),
137
+ "h2": ("q2", (0, 2)),
138
+ "b2": ("q2", (0, 1)),
139
+ "q3": ("q3", (0, 16)),
140
+ "d3": ("q3", (0, 8)),
141
+ "s3": ("q3", (0, 4)),
142
+ "h3": ("q3", (0, 2)),
143
+ "b3": ("q3", (0, 1)),
144
+ "q4": ("q4", (0, 16)),
145
+ "d4": ("q4", (0, 8)),
146
+ "s4": ("q4", (0, 4)),
147
+ "h4": ("q4", (0, 2)),
148
+ "b4": ("q4", (0, 1)),
149
+ "q5": ("q5", (0, 16)),
150
+ "d5": ("q5", (0, 8)),
151
+ "s5": ("q5", (0, 4)),
152
+ "h5": ("q5", (0, 2)),
153
+ "b5": ("q5", (0, 1)),
154
+ "q6": ("q6", (0, 16)),
155
+ "d6": ("q6", (0, 8)),
156
+ "s6": ("q6", (0, 4)),
157
+ "h6": ("q6", (0, 2)),
158
+ "b6": ("q6", (0, 1)),
159
+ "q7": ("q7", (0, 16)),
160
+ "d7": ("q7", (0, 8)),
161
+ "s7": ("q7", (0, 4)),
162
+ "h7": ("q7", (0, 2)),
163
+ "b7": ("q7", (0, 1)),
164
+ "q8": ("q8", (0, 16)),
165
+ "d8": ("q8", (0, 8)),
166
+ "s8": ("q8", (0, 4)),
167
+ "h8": ("q8", (0, 2)),
168
+ "b8": ("q8", (0, 1)),
169
+ "q9": ("q9", (0, 16)),
170
+ "d9": ("q9", (0, 8)),
171
+ "s9": ("q9", (0, 4)),
172
+ "h9": ("q9", (0, 2)),
173
+ "b9": ("q9", (0, 1)),
174
+ "q10": ("q10", (0, 16)),
175
+ "d10": ("q10", (0, 8)),
176
+ "s10": ("q10", (0, 4)),
177
+ "h10": ("q10", (0, 2)),
178
+ "b10": ("q10", (0, 1)),
179
+ "q11": ("q11", (0, 16)),
180
+ "d11": ("q11", (0, 8)),
181
+ "s11": ("q11", (0, 4)),
182
+ "h11": ("q11", (0, 2)),
183
+ "b11": ("q11", (0, 1)),
184
+ "q12": ("q12", (0, 16)),
185
+ "d12": ("q12", (0, 8)),
186
+ "s12": ("q12", (0, 4)),
187
+ "h12": ("q12", (0, 2)),
188
+ "b12": ("q12", (0, 1)),
189
+ "q13": ("q13", (0, 16)),
190
+ "d13": ("q13", (0, 8)),
191
+ "s13": ("q13", (0, 4)),
192
+ "h13": ("q13", (0, 2)),
193
+ "b13": ("q13", (0, 1)),
194
+ "q14": ("q14", (0, 16)),
195
+ "d14": ("q14", (0, 8)),
196
+ "s14": ("q14", (0, 4)),
197
+ "h14": ("q14", (0, 2)),
198
+ "b14": ("q14", (0, 1)),
199
+ "q15": ("q15", (0, 16)),
200
+ "d15": ("q15", (0, 8)),
201
+ "s15": ("q15", (0, 4)),
202
+ "h15": ("q15", (0, 2)),
203
+ "b15": ("q15", (0, 1)),
204
+ "q16": ("q16", (0, 16)),
205
+ "d16": ("q16", (0, 8)),
206
+ "s16": ("q16", (0, 4)),
207
+ "h16": ("q16", (0, 2)),
208
+ "b16": ("q16", (0, 1)),
209
+ "q17": ("q17", (0, 16)),
210
+ "d17": ("q17", (0, 8)),
211
+ "s17": ("q17", (0, 4)),
212
+ "h17": ("q17", (0, 2)),
213
+ "b17": ("q17", (0, 1)),
214
+ "q18": ("q18", (0, 16)),
215
+ "d18": ("q18", (0, 8)),
216
+ "s18": ("q18", (0, 4)),
217
+ "h18": ("q18", (0, 2)),
218
+ "b18": ("q18", (0, 1)),
219
+ "q19": ("q19", (0, 16)),
220
+ "d19": ("q19", (0, 8)),
221
+ "s19": ("q19", (0, 4)),
222
+ "h19": ("q19", (0, 2)),
223
+ "b19": ("q19", (0, 1)),
224
+ "q20": ("q20", (0, 16)),
225
+ "d20": ("q20", (0, 8)),
226
+ "s20": ("q20", (0, 4)),
227
+ "h20": ("q20", (0, 2)),
228
+ "b20": ("q20", (0, 1)),
229
+ "q21": ("q21", (0, 16)),
230
+ "d21": ("q21", (0, 8)),
231
+ "s21": ("q21", (0, 4)),
232
+ "h21": ("q21", (0, 2)),
233
+ "b21": ("q21", (0, 1)),
234
+ "q22": ("q22", (0, 16)),
235
+ "d22": ("q22", (0, 8)),
236
+ "s22": ("q22", (0, 4)),
237
+ "h22": ("q22", (0, 2)),
238
+ "b22": ("q22", (0, 1)),
239
+ "q23": ("q23", (0, 16)),
240
+ "d23": ("q23", (0, 8)),
241
+ "s23": ("q23", (0, 4)),
242
+ "h23": ("q23", (0, 2)),
243
+ "b23": ("q23", (0, 1)),
244
+ "q24": ("q24", (0, 16)),
245
+ "d24": ("q24", (0, 8)),
246
+ "s24": ("q24", (0, 4)),
247
+ "h24": ("q24", (0, 2)),
248
+ "b24": ("q24", (0, 1)),
249
+ "q25": ("q25", (0, 16)),
250
+ "d25": ("q25", (0, 8)),
251
+ "s25": ("q25", (0, 4)),
252
+ "h25": ("q25", (0, 2)),
253
+ "b25": ("q25", (0, 1)),
254
+ "q26": ("q26", (0, 16)),
255
+ "d26": ("q26", (0, 8)),
256
+ "s26": ("q26", (0, 4)),
257
+ "h26": ("q26", (0, 2)),
258
+ "b26": ("q26", (0, 1)),
259
+ "q27": ("q27", (0, 16)),
260
+ "d27": ("q27", (0, 8)),
261
+ "s27": ("q27", (0, 4)),
262
+ "h27": ("q27", (0, 2)),
263
+ "b27": ("q27", (0, 1)),
264
+ "q28": ("q28", (0, 16)),
265
+ "d28": ("q28", (0, 8)),
266
+ "s28": ("q28", (0, 4)),
267
+ "h28": ("q28", (0, 2)),
268
+ "b28": ("q28", (0, 1)),
269
+ "q29": ("q29", (0, 16)),
270
+ "d29": ("q29", (0, 8)),
271
+ "s29": ("q29", (0, 4)),
272
+ "h29": ("q29", (0, 2)),
273
+ "b29": ("q29", (0, 1)),
274
+ "q30": ("q30", (0, 16)),
275
+ "d30": ("q30", (0, 8)),
276
+ "s30": ("q30", (0, 4)),
277
+ "h30": ("q30", (0, 2)),
278
+ "b30": ("q30", (0, 1)),
279
+ "q31": ("q31", (0, 16)),
280
+ "d31": ("q31", (0, 8)),
281
+ "s31": ("q31", (0, 4)),
282
+ "h31": ("q31", (0, 2)),
283
+ "b31": ("q31", (0, 1)),
284
+ # Vector registers
285
+ # TODO: Figure out how to model these
286
+ }
@@ -0,0 +1,86 @@
1
+ info = {
2
+ "rax": ("rax", (0, 8)),
3
+ "eax": ("rax", (0, 4)),
4
+ "ax": ("rax", (0, 2)),
5
+ "al": ("rax", (0, 1)),
6
+ "ah": ("rax", (1, 2)),
7
+ "rbx": ("rbx", (0, 8)),
8
+ "ebx": ("rbx", (0, 4)),
9
+ "bx": ("rbx", (0, 2)),
10
+ "bl": ("rbx", (0, 1)),
11
+ "bh": ("rbx", (1, 2)),
12
+ "rcx": ("rcx", (0, 8)),
13
+ "ecx": ("rcx", (0, 4)),
14
+ "cx": ("rcx", (0, 2)),
15
+ "cl": ("rcx", (0, 1)),
16
+ "ch": ("rcx", (1, 2)),
17
+ "rdx": ("rdx", (0, 8)),
18
+ "edx": ("rdx", (0, 4)),
19
+ "dx": ("rdx", (0, 2)),
20
+ "dl": ("rdx", (0, 1)),
21
+ "dh": ("rdx", (1, 2)),
22
+ "r8": ("r8", (0, 8)),
23
+ "r8d": ("r8", (0, 4)),
24
+ "r8w": ("r8", (0, 2)),
25
+ "r8b": ("r8", (0, 1)),
26
+ "r9": ("r9", (0, 8)),
27
+ "r9d": ("r9", (0, 4)),
28
+ "r9w": ("r9", (0, 2)),
29
+ "r9b": ("r9", (0, 1)),
30
+ "r10": ("r10", (0, 8)),
31
+ "r10d": ("r10", (0, 4)),
32
+ "r10w": ("r10", (0, 2)),
33
+ "r10b": ("r10", (0, 1)),
34
+ "r11": ("r11", (0, 8)),
35
+ "r11d": ("r11", (0, 4)),
36
+ "r11w": ("r11", (0, 2)),
37
+ "r11b": ("r11", (0, 1)),
38
+ "r12": ("r12", (0, 8)),
39
+ "r12d": ("r12", (0, 4)),
40
+ "r12w": ("r12", (0, 2)),
41
+ "r12b": ("r12", (0, 1)),
42
+ "r13": ("r13", (0, 8)),
43
+ "r13d": ("r13", (0, 4)),
44
+ "r13w": ("r13", (0, 2)),
45
+ "r13b": ("r13", (0, 1)),
46
+ "r14": ("r14", (0, 8)),
47
+ "r14d": ("r14", (0, 4)),
48
+ "r14w": ("r14", (0, 2)),
49
+ "r14b": ("r14", (0, 1)),
50
+ "r15": ("r15", (0, 8)),
51
+ "r15d": ("r15", (0, 4)),
52
+ "r15w": ("r15", (0, 2)),
53
+ "r15b": ("r15", (0, 1)),
54
+ "rsi": ("rsi", (0, 8)),
55
+ "esi": ("rsi", (0, 4)),
56
+ "si": ("rsi", (0, 2)),
57
+ "sil": ("rsi", (0, 1)),
58
+ "rdi": ("rdi", (0, 8)),
59
+ "edi": ("rdi", (0, 4)),
60
+ "di": ("rdi", (0, 2)),
61
+ "dil": ("rdi", (0, 1)),
62
+ "rbp": ("rbp", (0, 8)),
63
+ "ebp": ("rbp", (0, 4)),
64
+ "bp": ("rbp", (0, 2)),
65
+ "bpl": ("rbp", (0, 1)),
66
+ "rsp": ("rsp", (0, 8)),
67
+ "esp": ("rsp", (0, 4)),
68
+ "sp": ("rsp", (0, 2)),
69
+ "spl": ("rsp", (0, 1)),
70
+ "rip": ("rip", (0, 8)),
71
+ "eip": ("rip", (0, 4)),
72
+ "ip": ("rip", (0, 2)),
73
+ "cs": ("cs", (0, 2)),
74
+ "ds": ("ds", (0, 2)),
75
+ "es": ("es", (0, 2)),
76
+ "fs": ("fs", (0, 2)),
77
+ "gs": ("fs", (0, 2)),
78
+ "rflags": ("rflags", (0, 8)),
79
+ "eflags": ("rflags", (0, 4)),
80
+ "flags": ("rflags", (0, 2)),
81
+ "cr0": ("cr0", (0, 8)),
82
+ "cr1": ("cr1", (0, 8)),
83
+ "cr2": ("cr2", (0, 8)),
84
+ "cr3": ("cr3", (0, 8)),
85
+ "cr4": ("cr4", (0, 8)),
86
+ }
@@ -0,0 +1,44 @@
1
+ info = {
2
+ "eax": ("eax", (0, 4)),
3
+ "ax": ("eax", (0, 2)),
4
+ "al": ("eax", (0, 1)),
5
+ "ah": ("eax", (1, 2)),
6
+ "ebx": ("ebx", (0, 4)),
7
+ "bx": ("ebx", (0, 2)),
8
+ "bl": ("ebx", (0, 1)),
9
+ "bh": ("ebx", (1, 2)),
10
+ "ecx": ("ecx", (0, 4)),
11
+ "cx": ("ecx", (0, 2)),
12
+ "cl": ("ecx", (0, 1)),
13
+ "ch": ("ecx", (1, 2)),
14
+ "edx": ("edx", (0, 4)),
15
+ "dx": ("edx", (0, 2)),
16
+ "dl": ("edx", (0, 1)),
17
+ "dh": ("edx", (1, 2)),
18
+ "esi": ("esi", (0, 4)),
19
+ "si": ("esi", (0, 2)),
20
+ "sil": ("edi", (0, 1)),
21
+ "edi": ("edi", (0, 4)),
22
+ "di": ("edi", (0, 2)),
23
+ "dil": ("edi", (0, 1)),
24
+ "ebp": ("ebp", (0, 4)),
25
+ "bp": ("ebp", (0, 2)),
26
+ "bpl": ("ebp", (0, 1)),
27
+ "esp": ("esp", (0, 4)),
28
+ "sp": ("esp", (0, 2)),
29
+ "spl": ("esp", (0, 1)),
30
+ "eip": ("eip", (0, 4)),
31
+ "ip": ("eip", (0, 2)),
32
+ "cs": ("cs", (0, 2)),
33
+ "ds": ("ds", (0, 2)),
34
+ "es": ("es", (0, 2)),
35
+ "fs": ("fs", (0, 2)),
36
+ "gs": ("fs", (0, 2)),
37
+ "eflags": ("eflags", (0, 4)),
38
+ "flags": ("eflags", (0, 2)),
39
+ "cr0": ("cr0", (0, 4)),
40
+ "cr1": ("cr1", (0, 4)),
41
+ "cr2": ("cr2", (0, 4)),
42
+ "cr3": ("cr3", (0, 4)),
43
+ "cr4": ("cr4", (0, 4)),
44
+ }