smallworld-re 1.0.0__py3-none-any.whl

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Files changed (166) hide show
  1. smallworld/__init__.py +35 -0
  2. smallworld/analyses/__init__.py +14 -0
  3. smallworld/analyses/analysis.py +88 -0
  4. smallworld/analyses/code_coverage.py +31 -0
  5. smallworld/analyses/colorizer.py +682 -0
  6. smallworld/analyses/colorizer_summary.py +100 -0
  7. smallworld/analyses/field_detection/__init__.py +14 -0
  8. smallworld/analyses/field_detection/field_analysis.py +536 -0
  9. smallworld/analyses/field_detection/guards.py +26 -0
  10. smallworld/analyses/field_detection/hints.py +133 -0
  11. smallworld/analyses/field_detection/malloc.py +211 -0
  12. smallworld/analyses/forced_exec/__init__.py +3 -0
  13. smallworld/analyses/forced_exec/forced_exec.py +87 -0
  14. smallworld/analyses/underlays/__init__.py +4 -0
  15. smallworld/analyses/underlays/basic.py +13 -0
  16. smallworld/analyses/underlays/underlay.py +31 -0
  17. smallworld/analyses/unstable/__init__.py +4 -0
  18. smallworld/analyses/unstable/angr/__init__.py +0 -0
  19. smallworld/analyses/unstable/angr/base.py +12 -0
  20. smallworld/analyses/unstable/angr/divergence.py +274 -0
  21. smallworld/analyses/unstable/angr/model.py +383 -0
  22. smallworld/analyses/unstable/angr/nwbt.py +63 -0
  23. smallworld/analyses/unstable/angr/typedefs.py +170 -0
  24. smallworld/analyses/unstable/angr/utils.py +25 -0
  25. smallworld/analyses/unstable/angr/visitor.py +315 -0
  26. smallworld/analyses/unstable/angr_nwbt.py +106 -0
  27. smallworld/analyses/unstable/code_coverage.py +54 -0
  28. smallworld/analyses/unstable/code_reachable.py +44 -0
  29. smallworld/analyses/unstable/control_flow_tracer.py +71 -0
  30. smallworld/analyses/unstable/pointer_finder.py +90 -0
  31. smallworld/arch/__init__.py +0 -0
  32. smallworld/arch/aarch64_arch.py +286 -0
  33. smallworld/arch/amd64_arch.py +86 -0
  34. smallworld/arch/i386_arch.py +44 -0
  35. smallworld/emulators/__init__.py +14 -0
  36. smallworld/emulators/angr/__init__.py +7 -0
  37. smallworld/emulators/angr/angr.py +1652 -0
  38. smallworld/emulators/angr/default.py +15 -0
  39. smallworld/emulators/angr/exceptions.py +7 -0
  40. smallworld/emulators/angr/exploration/__init__.py +9 -0
  41. smallworld/emulators/angr/exploration/bounds.py +27 -0
  42. smallworld/emulators/angr/exploration/default.py +17 -0
  43. smallworld/emulators/angr/exploration/terminate.py +22 -0
  44. smallworld/emulators/angr/factory.py +55 -0
  45. smallworld/emulators/angr/machdefs/__init__.py +35 -0
  46. smallworld/emulators/angr/machdefs/aarch64.py +292 -0
  47. smallworld/emulators/angr/machdefs/amd64.py +192 -0
  48. smallworld/emulators/angr/machdefs/arm.py +387 -0
  49. smallworld/emulators/angr/machdefs/i386.py +221 -0
  50. smallworld/emulators/angr/machdefs/machdef.py +138 -0
  51. smallworld/emulators/angr/machdefs/mips.py +184 -0
  52. smallworld/emulators/angr/machdefs/mips64.py +189 -0
  53. smallworld/emulators/angr/machdefs/ppc.py +101 -0
  54. smallworld/emulators/angr/machdefs/riscv.py +261 -0
  55. smallworld/emulators/angr/machdefs/xtensa.py +255 -0
  56. smallworld/emulators/angr/memory/__init__.py +7 -0
  57. smallworld/emulators/angr/memory/default.py +10 -0
  58. smallworld/emulators/angr/memory/fixups.py +43 -0
  59. smallworld/emulators/angr/memory/memtrack.py +105 -0
  60. smallworld/emulators/angr/scratch.py +43 -0
  61. smallworld/emulators/angr/simos.py +53 -0
  62. smallworld/emulators/angr/utils.py +70 -0
  63. smallworld/emulators/emulator.py +1013 -0
  64. smallworld/emulators/hookable.py +252 -0
  65. smallworld/emulators/panda/__init__.py +5 -0
  66. smallworld/emulators/panda/machdefs/__init__.py +28 -0
  67. smallworld/emulators/panda/machdefs/aarch64.py +93 -0
  68. smallworld/emulators/panda/machdefs/amd64.py +71 -0
  69. smallworld/emulators/panda/machdefs/arm.py +89 -0
  70. smallworld/emulators/panda/machdefs/i386.py +36 -0
  71. smallworld/emulators/panda/machdefs/machdef.py +86 -0
  72. smallworld/emulators/panda/machdefs/mips.py +94 -0
  73. smallworld/emulators/panda/machdefs/mips64.py +91 -0
  74. smallworld/emulators/panda/machdefs/ppc.py +79 -0
  75. smallworld/emulators/panda/panda.py +575 -0
  76. smallworld/emulators/unicorn/__init__.py +13 -0
  77. smallworld/emulators/unicorn/machdefs/__init__.py +28 -0
  78. smallworld/emulators/unicorn/machdefs/aarch64.py +310 -0
  79. smallworld/emulators/unicorn/machdefs/amd64.py +326 -0
  80. smallworld/emulators/unicorn/machdefs/arm.py +321 -0
  81. smallworld/emulators/unicorn/machdefs/i386.py +137 -0
  82. smallworld/emulators/unicorn/machdefs/machdef.py +117 -0
  83. smallworld/emulators/unicorn/machdefs/mips.py +202 -0
  84. smallworld/emulators/unicorn/unicorn.py +684 -0
  85. smallworld/exceptions/__init__.py +5 -0
  86. smallworld/exceptions/exceptions.py +85 -0
  87. smallworld/exceptions/unstable/__init__.py +1 -0
  88. smallworld/exceptions/unstable/exceptions.py +25 -0
  89. smallworld/extern/__init__.py +4 -0
  90. smallworld/extern/ctypes.py +94 -0
  91. smallworld/extern/unstable/__init__.py +1 -0
  92. smallworld/extern/unstable/ghidra.py +129 -0
  93. smallworld/helpers.py +107 -0
  94. smallworld/hinting/__init__.py +8 -0
  95. smallworld/hinting/hinting.py +214 -0
  96. smallworld/hinting/hints.py +427 -0
  97. smallworld/hinting/unstable/__init__.py +2 -0
  98. smallworld/hinting/utils.py +19 -0
  99. smallworld/instructions/__init__.py +18 -0
  100. smallworld/instructions/aarch64.py +20 -0
  101. smallworld/instructions/arm.py +18 -0
  102. smallworld/instructions/bsid.py +67 -0
  103. smallworld/instructions/instructions.py +258 -0
  104. smallworld/instructions/mips.py +21 -0
  105. smallworld/instructions/x86.py +100 -0
  106. smallworld/logging.py +90 -0
  107. smallworld/platforms.py +95 -0
  108. smallworld/py.typed +0 -0
  109. smallworld/state/__init__.py +6 -0
  110. smallworld/state/cpus/__init__.py +32 -0
  111. smallworld/state/cpus/aarch64.py +563 -0
  112. smallworld/state/cpus/amd64.py +676 -0
  113. smallworld/state/cpus/arm.py +630 -0
  114. smallworld/state/cpus/cpu.py +71 -0
  115. smallworld/state/cpus/i386.py +239 -0
  116. smallworld/state/cpus/mips.py +374 -0
  117. smallworld/state/cpus/mips64.py +372 -0
  118. smallworld/state/cpus/powerpc.py +229 -0
  119. smallworld/state/cpus/riscv.py +357 -0
  120. smallworld/state/cpus/xtensa.py +80 -0
  121. smallworld/state/memory/__init__.py +7 -0
  122. smallworld/state/memory/code.py +70 -0
  123. smallworld/state/memory/elf/__init__.py +3 -0
  124. smallworld/state/memory/elf/elf.py +564 -0
  125. smallworld/state/memory/elf/rela/__init__.py +32 -0
  126. smallworld/state/memory/elf/rela/aarch64.py +27 -0
  127. smallworld/state/memory/elf/rela/amd64.py +32 -0
  128. smallworld/state/memory/elf/rela/arm.py +51 -0
  129. smallworld/state/memory/elf/rela/i386.py +32 -0
  130. smallworld/state/memory/elf/rela/mips.py +45 -0
  131. smallworld/state/memory/elf/rela/ppc.py +45 -0
  132. smallworld/state/memory/elf/rela/rela.py +63 -0
  133. smallworld/state/memory/elf/rela/riscv64.py +27 -0
  134. smallworld/state/memory/elf/rela/xtensa.py +15 -0
  135. smallworld/state/memory/elf/structs.py +55 -0
  136. smallworld/state/memory/heap.py +85 -0
  137. smallworld/state/memory/memory.py +181 -0
  138. smallworld/state/memory/stack/__init__.py +31 -0
  139. smallworld/state/memory/stack/aarch64.py +22 -0
  140. smallworld/state/memory/stack/amd64.py +42 -0
  141. smallworld/state/memory/stack/arm.py +66 -0
  142. smallworld/state/memory/stack/i386.py +22 -0
  143. smallworld/state/memory/stack/mips.py +34 -0
  144. smallworld/state/memory/stack/mips64.py +34 -0
  145. smallworld/state/memory/stack/ppc.py +34 -0
  146. smallworld/state/memory/stack/riscv.py +22 -0
  147. smallworld/state/memory/stack/stack.py +127 -0
  148. smallworld/state/memory/stack/xtensa.py +34 -0
  149. smallworld/state/models/__init__.py +6 -0
  150. smallworld/state/models/mmio.py +186 -0
  151. smallworld/state/models/model.py +163 -0
  152. smallworld/state/models/posix.py +455 -0
  153. smallworld/state/models/x86/__init__.py +2 -0
  154. smallworld/state/models/x86/microsoftcdecl.py +35 -0
  155. smallworld/state/models/x86/systemv.py +240 -0
  156. smallworld/state/state.py +962 -0
  157. smallworld/state/unstable/__init__.py +0 -0
  158. smallworld/state/unstable/elf.py +393 -0
  159. smallworld/state/x86_registers.py +30 -0
  160. smallworld/utils.py +935 -0
  161. smallworld_re-1.0.0.dist-info/LICENSE.txt +21 -0
  162. smallworld_re-1.0.0.dist-info/METADATA +189 -0
  163. smallworld_re-1.0.0.dist-info/RECORD +166 -0
  164. smallworld_re-1.0.0.dist-info/WHEEL +5 -0
  165. smallworld_re-1.0.0.dist-info/entry_points.txt +2 -0
  166. smallworld_re-1.0.0.dist-info/top_level.txt +1 -0
@@ -0,0 +1,202 @@
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+ import capstone
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+ import unicorn
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+
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+ from ....platforms import Architecture, Byteorder
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+ from .machdef import UnicornMachineDef
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+
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+
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+ class MIPSMachineDef(UnicornMachineDef):
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+ """Unicorn machine definition for mips32"""
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+
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+ arch = Architecture.MIPS32
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+
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+ uc_arch = unicorn.UC_ARCH_MIPS
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+ uc_mode = unicorn.UC_MODE_MIPS32
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+
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+ cs_arch = capstone.CS_ARCH_MIPS
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+ cs_mode = capstone.CS_MODE_MIPS32
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+
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+ pc_reg = "pc"
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+
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+ def __init__(self):
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+ self._registers = {
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+ # *** General-Purpose Registers ***
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+ # Assembler Temporary Register
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+ "at": (unicorn.mips_const.UC_MIPS_REG_AT, "at", 0, 4),
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+ "1": (unicorn.mips_const.UC_MIPS_REG_1, "at", 0, 4),
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+ # Return Value Registers
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+ "v0": (unicorn.mips_const.UC_MIPS_REG_V0, "v0", 0, 4),
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+ "2": (unicorn.mips_const.UC_MIPS_REG_2, "v0", 0, 4),
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+ "v1": (unicorn.mips_const.UC_MIPS_REG_V1, "v1", 0, 4),
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+ "3": (unicorn.mips_const.UC_MIPS_REG_3, "v1", 0, 4),
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+ # Argument Registers
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+ "a0": (unicorn.mips_const.UC_MIPS_REG_A0, "a0", 0, 4),
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+ "4": (unicorn.mips_const.UC_MIPS_REG_4, "a0", 0, 4),
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+ "a1": (unicorn.mips_const.UC_MIPS_REG_A1, "a1", 0, 4),
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+ "5": (unicorn.mips_const.UC_MIPS_REG_5, "a1", 0, 4),
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+ "a2": (unicorn.mips_const.UC_MIPS_REG_A2, "a2", 0, 4),
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+ "6": (unicorn.mips_const.UC_MIPS_REG_6, "a2", 0, 4),
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+ "a3": (unicorn.mips_const.UC_MIPS_REG_A3, "a3", 0, 4),
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+ "7": (unicorn.mips_const.UC_MIPS_REG_7, "a3", 0, 4),
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+ # Temporary Registers
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+ "t0": (unicorn.mips_const.UC_MIPS_REG_T0, "t0", 0, 4),
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+ "8": (unicorn.mips_const.UC_MIPS_REG_8, "t0", 0, 4),
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+ "t1": (unicorn.mips_const.UC_MIPS_REG_T1, "t1", 0, 4),
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+ "9": (unicorn.mips_const.UC_MIPS_REG_9, "t1", 0, 4),
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+ "t2": (unicorn.mips_const.UC_MIPS_REG_T2, "t2", 0, 4),
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+ "10": (unicorn.mips_const.UC_MIPS_REG_10, "t2", 0, 4),
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+ "t3": (unicorn.mips_const.UC_MIPS_REG_T3, "t3", 0, 4),
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+ "11": (unicorn.mips_const.UC_MIPS_REG_11, "t3", 0, 4),
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+ "t4": (unicorn.mips_const.UC_MIPS_REG_T4, "t4", 0, 4),
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+ "12": (unicorn.mips_const.UC_MIPS_REG_12, "t4", 0, 4),
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+ "t5": (unicorn.mips_const.UC_MIPS_REG_T5, "t5", 0, 4),
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+ "13": (unicorn.mips_const.UC_MIPS_REG_13, "t5", 0, 4),
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+ "t6": (unicorn.mips_const.UC_MIPS_REG_T6, "t6", 0, 4),
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+ "14": (unicorn.mips_const.UC_MIPS_REG_14, "t6", 0, 4),
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+ "t7": (unicorn.mips_const.UC_MIPS_REG_T7, "t7", 0, 4),
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+ "15": (unicorn.mips_const.UC_MIPS_REG_15, "t7", 0, 4),
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+ "t8": (unicorn.mips_const.UC_MIPS_REG_T8, "t8", 0, 4),
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+ "24": (unicorn.mips_const.UC_MIPS_REG_24, "t8", 0, 4),
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+ "t9": (unicorn.mips_const.UC_MIPS_REG_T9, "t9", 0, 4),
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+ "25": (unicorn.mips_const.UC_MIPS_REG_25, "t9", 0, 4),
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+ # Saved Registers
63
+ "s0": (unicorn.mips_const.UC_MIPS_REG_S0, "s0", 0, 4),
64
+ "16": (unicorn.mips_const.UC_MIPS_REG_16, "s0", 0, 4),
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+ "s1": (unicorn.mips_const.UC_MIPS_REG_S1, "s1", 0, 4),
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+ "17": (unicorn.mips_const.UC_MIPS_REG_17, "s1", 0, 4),
67
+ "s2": (unicorn.mips_const.UC_MIPS_REG_S2, "s2", 0, 4),
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+ "18": (unicorn.mips_const.UC_MIPS_REG_18, "s2", 0, 4),
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+ "s3": (unicorn.mips_const.UC_MIPS_REG_S3, "s3", 0, 4),
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+ "19": (unicorn.mips_const.UC_MIPS_REG_19, "s3", 0, 4),
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+ "s4": (unicorn.mips_const.UC_MIPS_REG_S4, "s4", 0, 4),
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+ "20": (unicorn.mips_const.UC_MIPS_REG_20, "s4", 0, 4),
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+ "s5": (unicorn.mips_const.UC_MIPS_REG_S5, "s5", 0, 4),
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+ "21": (unicorn.mips_const.UC_MIPS_REG_21, "s5", 0, 4),
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+ "s6": (unicorn.mips_const.UC_MIPS_REG_S6, "s6", 0, 4),
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+ "22": (unicorn.mips_const.UC_MIPS_REG_22, "s6", 0, 4),
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+ "s7": (unicorn.mips_const.UC_MIPS_REG_S7, "s7", 0, 4),
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+ "23": (unicorn.mips_const.UC_MIPS_REG_23, "s7", 0, 4),
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+ # NOTE: Register 30 used to be FP, is now also s8
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+ "s8": (unicorn.mips_const.UC_MIPS_REG_S8, "s8", 0, 4),
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+ "fp": (unicorn.mips_const.UC_MIPS_REG_FP, "s8", 0, 4),
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+ "30": (unicorn.mips_const.UC_MIPS_REG_30, "s8", 0, 4),
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+ # Kernel-reserved registers
84
+ "k0": (unicorn.mips_const.UC_MIPS_REG_K0, "k0", 0, 4),
85
+ "26": (unicorn.mips_const.UC_MIPS_REG_26, "k0", 0, 4),
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+ "k1": (unicorn.mips_const.UC_MIPS_REG_K1, "k1", 0, 4),
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+ "27": (unicorn.mips_const.UC_MIPS_REG_27, "k1", 0, 4),
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+ # *** Pointer Registers ***
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+ # Zero Register
90
+ "zero": (unicorn.mips_const.UC_MIPS_REG_ZERO, "zero", 0, 4),
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+ "0": (unicorn.mips_const.UC_MIPS_REG_0, "zero", 0, 4),
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+ # Global Pointer Register
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+ "gp": (unicorn.mips_const.UC_MIPS_REG_GP, "gp", 0, 4),
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+ "28": (unicorn.mips_const.UC_MIPS_REG_28, "gp", 0, 4),
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+ # Stack Pointer Register
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+ "sp": (unicorn.mips_const.UC_MIPS_REG_SP, "sp", 0, 4),
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+ "29": (unicorn.mips_const.UC_MIPS_REG_29, "sp", 0, 4),
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+ # Return Address Register
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+ "ra": (unicorn.mips_const.UC_MIPS_REG_RA, "ra", 0, 4),
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+ "31": (unicorn.mips_const.UC_MIPS_REG_31, "ra", 0, 4),
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+ # Program Counter
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+ "pc": (unicorn.mips_const.UC_MIPS_REG_PC, "pc", 0, 4),
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+ # *** Floating-point Registers ***
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+ "f0": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f0", 0, 4),
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+ "f1": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f1", 0, 4),
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+ "f2": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f2", 0, 4),
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+ "f3": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f3", 0, 4),
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+ "f4": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f4", 0, 4),
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+ "f5": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f5", 0, 4),
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+ "f6": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f6", 0, 4),
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+ "f7": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f7", 0, 4),
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+ "f8": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f8", 0, 4),
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+ "f9": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f9", 0, 4),
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+ "f10": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f10", 0, 4),
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+ "f11": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f11", 0, 4),
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+ "f12": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f12", 0, 4),
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+ "f13": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f13", 0, 4),
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+ "f14": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f14", 0, 4),
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+ "f15": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f15", 0, 4),
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+ "f16": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f16", 0, 4),
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+ "f17": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f17", 0, 4),
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+ "f18": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f18", 0, 4),
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+ "f19": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f19", 0, 4),
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+ "f20": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f20", 0, 4),
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+ "f21": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f21", 0, 4),
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+ "f22": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f22", 0, 4),
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+ "f23": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f23", 0, 4),
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+ "f24": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f24", 0, 4),
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+ "f25": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f25", 0, 4),
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+ "f26": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f26", 0, 4),
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+ "f27": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f27", 0, 4),
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+ "f28": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f28", 0, 4),
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+ "f29": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f29", 0, 4),
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+ "f30": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f30", 0, 4),
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+ "f31": (unicorn.mips_const.UC_MIPS_REG_INVALID, "f31", 0, 4),
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+ # *** Floating Point Control Registers ***
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+ # NOTE: These are taken from Sleigh, and the MIPS docs.
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+ # Unicorn doesn't use these names, and has a different number of registers.
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+ "fir": (unicorn.mips_const.UC_MIPS_REG_INVALID, "fir", 0, 4),
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+ "fcsr": (unicorn.mips_const.UC_MIPS_REG_INVALID, "fcsr", 0, 4),
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+ "fexr": (unicorn.mips_const.UC_MIPS_REG_INVALID, "fexr", 0, 4),
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+ "fenr": (unicorn.mips_const.UC_MIPS_REG_INVALID, "fenr", 0, 4),
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+ "fccr": (unicorn.mips_const.UC_MIPS_REG_INVALID, "fccr", 0, 4),
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+ }
145
+
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+
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+ class MIPSELMachineDef(MIPSMachineDef):
148
+ """Unicorn machine definition for mips32 little-endian"""
149
+
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+ byteorder = Byteorder.LITTLE
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+
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+ def __init__(self):
153
+ super().__init__()
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+ self._registers.update(
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+ {
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+ # *** Accumulator Registers ***
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+ # TODO: Unicorn broke support for these in 2.0.2
158
+ "ac0": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac0", 0, 8),
159
+ "lo0": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac0", 0, 4),
160
+ "hi0": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac0", 4, 4),
161
+ "ac1": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac1", 0, 8),
162
+ "lo1": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac1", 0, 4),
163
+ "hi1": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac1", 4, 4),
164
+ "ac2": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac2", 0, 8),
165
+ "lo2": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac2", 0, 4),
166
+ "hi2": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac2", 4, 4),
167
+ "ac3": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac3", 0, 8),
168
+ "lo3": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac3", 0, 4),
169
+ "hi3": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac3", 4, 4),
170
+ }
171
+ )
172
+
173
+
174
+ class MIPSBEMachineDef(MIPSMachineDef):
175
+ """Unicorn machine definition for mips32 big-endian"""
176
+
177
+ byteorder = Byteorder.BIG
178
+
179
+ uc_mode = unicorn.UC_MODE_MIPS32 | unicorn.UC_MODE_BIG_ENDIAN
180
+
181
+ cs_mode = capstone.CS_MODE_MIPS32 | capstone.CS_MODE_BIG_ENDIAN
182
+
183
+ def __init__(self):
184
+ super().__init__()
185
+ self._registers.update(
186
+ {
187
+ # *** Accumulator Registers ***
188
+ # TODO: Unicorn broke support for these in 2.0.2
189
+ "ac0": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac0", 0, 8),
190
+ "hi0": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac0", 0, 4),
191
+ "lo0": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac0", 4, 4),
192
+ "ac1": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac1", 0, 8),
193
+ "hi1": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac1", 0, 4),
194
+ "lo1": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac1", 4, 4),
195
+ "ac2": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac2", 0, 8),
196
+ "hi2": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac2", 0, 4),
197
+ "lo2": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac2", 4, 4),
198
+ "ac3": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac3", 0, 8),
199
+ "hi3": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac3", 0, 4),
200
+ "lo3": (unicorn.mips_const.UC_MIPS_REG_INVALID, "ac3", 4, 4),
201
+ }
202
+ )