smallworld-re 1.0.0__py3-none-any.whl

smallworld/emulators/hookable.py

@@ -0,0 +1,252 @@
+import typing
+
+from .emulator import (
+    Emulator,
+    FunctionHookable,
+    InstructionHookable,
+    InterruptHookable,
+    MemoryReadHookable,
+    MemoryWriteHookable,
+)
+
+
+def range_intersect(r1, r2):
+    return range(max(r1.start, r2.start), min(r1.stop, r2.stop)) or None
+
+
+def range_to_hex_str(r):
+    return f"[{r.start:x}..{r.stop:x}]"
+
+
+class QInstructionHookable(InstructionHookable):
+    """Implementation of instruction hook data structure mgmt to be used by qemu-based emulators."""
+
+    def __init__(self: typing.Any) -> None:
+        super().__init__()
+        self.instruction_hooks: typing.Dict[int, typing.Callable[[Emulator], None]] = {}
+        self.all_instructions_hook: typing.Optional[
+            typing.Callable[[Emulator], None]
+        ] = None
+
+    def hook_instructions(self, function: typing.Callable[[Emulator], None]) -> None:
+        self.all_instructions_hook = function
+
+    def unhook_instructions(self):
+        self.all_instructions_hook = None
+
+    def hook_instruction(
+        self, address: int, function: typing.Callable[[Emulator], None]
+    ) -> None:
+        if address in self.instruction_hooks:
+            raise ValueError(
+                f"can't hook instruction at {address:x} since already hooked"
+            )
+        self.instruction_hooks[address] = function
+
+    def unhook_instruction(self, address: int) -> None:
+        if address not in self.instruction_hooks:
+            raise ValueError(
+                f"can't unhook instruction at {address:x} since its not already hooked"
+            )
+        self.instruction_hooks.pop(address, None)
+
+    def is_instruction_hooked(
+        self, address: int
+    ) -> typing.Optional[typing.Callable[[Emulator], None]]:
+        if address in self.instruction_hooks:
+            return self.instruction_hooks[address]
+        else:
+            return None
+
+
+class QFunctionHookable(FunctionHookable):
+    """Implementation of function hook data structure mgmt to be used by qemu-based emulators."""
+
+    def __init__(self: typing.Any) -> None:
+        super().__init__()
+        self.function_hooks: typing.Dict[int, typing.Callable[[Emulator], None]] = {}
+
+    def hook_function(
+        self, address: int, function: typing.Callable[[Emulator], None]
+    ) -> None:
+        if address in self.function_hooks:
+            raise ValueError(f"can't hook function at {address:x} since already hooked")
+        self.function_hooks[address] = function
+
+    def unhook_function(self, address: int) -> None:
+        if address not in self.function_hooks:
+            raise ValueError(
+                f"can't unhook function at {address:x} since its not already hooked"
+            )
+        self.function_hooks.pop(address, None)
+
+    def is_function_hooked(
+        self, address: int
+    ) -> typing.Optional[typing.Callable[[Emulator], None]]:
+        if address in self.function_hooks:
+            return self.function_hooks[address]
+        else:
+            return None
+
+
+class QMemoryReadHookable(MemoryReadHookable):
+    """Implementation of memory read hook data structure mgmt to be used by qemu-based emulators."""
+
+    def __init__(self: typing.Any) -> None:
+        super().__init__()
+        self.memory_read_hooks: typing.Dict[
+            range, typing.Callable[[Emulator, int, int, bytes], typing.Optional[bytes]]
+        ] = {}
+        self.all_reads_hook: typing.Optional[
+            typing.Callable[[Emulator, int, int, bytes], typing.Optional[bytes]]
+        ] = None
+
+    def hook_memory_reads(
+        self,
+        function: typing.Callable[[Emulator, int, int, bytes], typing.Optional[bytes]],
+    ) -> None:
+        self.all_reads_hook = function
+
+    def unhook_memory_reads(self):
+        self.all_reads_hook = None
+
+    def hook_memory_read(
+        self,
+        start: int,
+        end: int,
+        function: typing.Callable[[Emulator, int, int, bytes], typing.Optional[bytes]],
+    ) -> None:
+        new_range = range(start, end)
+        for r in self.memory_read_hooks:
+            if range_intersect(r, new_range):
+                raise ValueError(
+                    f"can't hook memory read range {range_to_hex_str(new_range)} since that overlaps already hooked range {range_to_hex_str(r)}"
+                )
+        self.memory_read_hooks[new_range] = function
+
+    def unhook_memory_read(self, start: int, end: int) -> None:
+        unh_r = range(start, end)
+        for r in self.memory_read_hooks:
+            if unh_r == r:
+                self.memory_read_hooks.pop(r, None)
+                return
+        raise ValueError(
+            f"can't unhook memory read range {range_to_hex_str(unh_r)} since its not already hooked"
+        )
+
+    # def unhook_memory_read(address: int) -> None:
+    #    if address not in self.memory_read_hooks:
+    #        raise ValueError(
+    #            f"can't unhook memory read range {range_to_hex_str(address)} since its not already hooked"
+    #        )
+    #    self.memory_read_hooks.pop(address, None)
+
+    def is_memory_read_hooked(
+        self, address: int
+    ) -> typing.Optional[
+        typing.Callable[[Emulator, int, int, bytes], typing.Optional[bytes]]
+    ]:
+        for rng in self.memory_read_hooks:
+            if address in rng:
+                return self.memory_read_hooks[rng]
+        return None
+
+
+class QMemoryWriteHookable(MemoryWriteHookable):
+    """Implementation of memory write hook data structure mgmt to be used by qemu-based emulators."""
+
+    def __init__(self: typing.Any) -> None:
+        super().__init__()
+        self.memory_write_hooks: typing.Dict[
+            range, typing.Callable[[Emulator, int, int, bytes], None]
+        ] = {}
+        self.all_writes_hook: typing.Optional[
+            typing.Callable[[Emulator, int, int, bytes], None]
+        ] = None
+
+    def hook_memory_writes(
+        self, function: typing.Callable[[Emulator, int, int, bytes], None]
+    ) -> None:
+        self.all_writes_hook = function
+
+    def unhook_memory_writes(self):
+        self.all_writes_hook = None
+
+    def hook_memory_write(
+        self,
+        start: int,
+        end: int,
+        function: typing.Callable[[Emulator, int, int, bytes], None],
+    ) -> None:
+        new_range = range(start, end)
+        for r in self.memory_write_hooks:
+            if range_intersect(r, new_range):
+                raise ValueError(
+                    f"can't hook memory write range {range_to_hex_str(new_range)} since that overlaps already hooked range {range_to_hex_str(r)}"
+                )
+        self.memory_write_hooks[new_range] = function
+
+    def unhook_memory_write(self, start: int, end: int) -> None:
+        unh_r = range(start, end)
+        for r in self.memory_write_hooks:
+            if unh_r == r:
+                self.memory_write_hooks.pop(r, None)
+                return
+        raise ValueError(
+            f"can't unhook memory write range {range_to_hex_str(unh_r)} since its not already hooked"
+        )
+
+    # def unhook_memory_write(self, address: int) -> None:
+    #    if address not in self.memory_write_hooks:
+    #        raise ValueError(
+    #            f"can't unhook memory write range {range_to_hex_str(address)} since its not already hooked"
+    #        )
+    #    self.memory_write_hooks.pop(address, None)
+    def is_memory_write_hooked(
+        self, address: int
+    ) -> typing.Optional[typing.Callable[[Emulator, int, int, bytes], None]]:
+        for rng in self.memory_write_hooks:
+            if address in rng:
+                return self.memory_write_hooks[rng]
+        return None
+
+
+class QInterruptHookable(InterruptHookable):
+    """Implementation of interrupt hook data structure mgmt to be used by qemu-based emulators."""
+
+    def __init__(self: typing.Any) -> None:
+        super().__init__()
+        self.all_interrupts_hook: typing.Optional[
+            typing.Callable[[Emulator, int], None]
+        ] = None
+        self.interrupt_hooks: typing.Dict[int, typing.Callable[[Emulator], None]] = {}
+
+    def hook_interrupts(self, function: typing.Callable[[Emulator, int], None]) -> None:
+        self.all_interrupts_hook = function
+
+    def unhook_interrupts(self):
+        self.all_interrupts_hook = None
+
+    def hook_interrupt(
+        self, intno: int, function: typing.Callable[[Emulator], None]
+    ) -> None:
+        if intno in self.interrupt_hooks:
+            raise ValueError(
+                f"can't hook interrupt number {intno} since its already hooked"
+            )
+        self.interrupt_hooks[intno] = function
+
+    def unhook_interrupt(self, intno: int) -> None:
+        if intno not in self.interrupt_hooks:
+            raise ValueError(
+                f"asked to unhook interrupt {intno} which was not previously hooked"
+            )
+        self.interrupt_hooks.pop(intno, None)
+
+    def is_interrupt_hooked(
+        self, intno: int
+    ) -> typing.Optional[typing.Callable[[Emulator], None]]:
+        if intno in self.interrupt_hooks:
+            return self.interrupt_hooks[intno]
+        else:
+            return None

smallworld/emulators/panda/__init__.py

@@ -0,0 +1,5 @@
+from .panda import PandaEmulator
+
+__all__ = [
+    "PandaEmulator",
+]

smallworld/emulators/panda/machdefs/__init__.py

@@ -0,0 +1,28 @@
+from .aarch64 import AArch64MachineDef
+from .amd64 import AMD64MachineDef
+from .arm import (  # ARMv6MMachineDef,; ARMv6MThumbMachineDef,
+    ARMv5TMachineDef,
+    ARMv7MMachineDef,
+)
+from .i386 import i386MachineDef
+from .machdef import PandaMachineDef
+from .mips import MIPSBEMachineDef, MIPSELMachineDef
+from .mips64 import MIPS64BEMachineDef  # , MIPS64ELMachineDef
+from .ppc import PowerPC32MachineDef  # , PowerPC64MachineDef
+
+__all__ = [
+    "AArch64MachineDef",
+    "AMD64MachineDef",
+    "PandaMachineDef",
+    "ARMv5TMachineDef",
+    #    "ARMv6MMachineDef",
+    #    "ARMv6MThumbMachineDef",
+    "ARMv7MMachineDef",
+    "i386MachineDef",
+    "MIPSBEMachineDef",
+    "MIPSELMachineDef",
+    "MIPS64BEMachineDef",
+    # "MIPS64ELMachineDef",
+    "PowerPC32MachineDef",
+    # "PowerPC64MachineDef",
+]

smallworld/emulators/panda/machdefs/aarch64.py

@@ -0,0 +1,93 @@
+import capstone
+
+from ....platforms import Architecture, Byteorder
+from .machdef import PandaMachineDef
+
+
+class AArch64MachineDef(PandaMachineDef):
+    arch = Architecture.AARCH64
+    byteorder = Byteorder.LITTLE
+
+    cs_arch = capstone.CS_ARCH_ARM64
+    cs_mode = capstone.CS_MODE_ARM | capstone.CS_MODE_LITTLE_ENDIAN
+
+    panda_arch = "aarch64"
+
+    # I'm going to define all the ones we are making possible as of now
+    # I need to submit a PR to change to X86 32 bit and to includ eflags
+    def __init__(self):
+        self._registers = {
+            "x0": "x0",
+            "w0": "x0",
+            "x1": "x1",
+            "w1": "x1",
+            "x2": "x2",
+            "w2": "x2",
+            "x3": "x3",
+            "w3": "x3",
+            "x4": "x4",
+            "w4": "x4",
+            "x5": "x5",
+            "w5": "x5",
+            "x6": "x6",
+            "w6": "x6",
+            "x7": "x7",
+            "w7": "x7",
+            "x8": "xr",
+            "w8": "xr",
+            "xr": "xr",
+            "x9": "x9",
+            "w9": "x9",
+            "x10": "x10",
+            "w10": "x10",
+            "x11": "x11",
+            "w11": "x11",
+            "x12": "x12",
+            "w12": "x12",
+            "x13": "x13",
+            "w13": "x13",
+            "x14": "x14",
+            "w14": "x14",
+            "x15": "x15",
+            "w15": "x15",
+            "x16": "ip0",
+            "w16": "ip0",
+            "ip0": "ip0",
+            "x17": "ip1",
+            "w17": "ip1",
+            "ip1": "ip1",
+            "x18": "pr",
+            "w18": "pr",
+            "pr": "pr",
+            "x19": "x19",
+            "w19": "x19",
+            "x20": "x20",
+            "w20": "x20",
+            "x21": "x21",
+            "w21": "x21",
+            "x22": "x22",
+            "w22": "x22",
+            "x23": "x23",
+            "w23": "x23",
+            "x24": "x24",
+            "w24": "x24",
+            "x25": "x25",
+            "w25": "x25",
+            "x26": "x26",
+            "w26": "x26",
+            "x27": "x27",
+            "w27": "x27",
+            "x28": "x28",
+            "w28": "x28",
+            "x29": "fp",
+            "w29": "fp",
+            "fp": "fp",
+            "x30": "lr",
+            "w30": "lr",
+            "lr": "lr",
+            "pc": "pc",
+            "sp": "sp",
+            "wsp": "sp",
+        }
+
+        self._registers = {i: j for i, j in self._registers.items()}

smallworld/emulators/panda/machdefs/amd64.py

@@ -0,0 +1,71 @@
+import capstone
+
+from ....platforms import Architecture, Byteorder
+from .machdef import PandaMachineDef
+
+
+class AMD64MachineDef(PandaMachineDef):
+    arch = Architecture.X86_64
+    byteorder = Byteorder.LITTLE
+
+    panda_arch = "x86_64"
+
+    cs_arch = capstone.CS_ARCH_X86
+    cs_mode = capstone.CS_MODE_64
+
+    # I'm going to define all the ones we are making possible as of now
+    # I need to submit a PR to change to X86 32 bit and to includ eflags
+    _registers_64 = {
+        "rax",
+        "rbx",
+        "rcx",
+        "rdx",
+        "rsi",
+        "rdi",
+        "rsp",
+        "rbp",
+        "rip",
+        "r8",
+        "r9",
+        "r10",
+        "r11",
+        "r12",
+        "r13",
+        "r14",
+        "r15",
+    }
+    _registers_general = {"eax", "ebx", "ecx", "edx", "esi", "edi", "esp", "ebp", "eip"}
+    _registers_short = {"ax", "bx", "cx", "dx", "si", "di", "sp", "bp"}
+    _registers_byte = {"al", "bl", "cl", "dl", "ah", "bh", "ch", "dh"}
+    _registers_seg = {"es", "cs", "ss", "ds", "fs", "gs"}
+    _registers_control = {"cr0", "cr1", "cr2", "cr3", "cr4"}
+    _registers_mmr = {"gdtr": "gdt", "idtr": "idt", "tr": "tr", "ldtr": "ldt"}
+    _registers_xmm = {
+        "xmm0",
+        "xmm1",
+        "xmm2",
+        "xmm3",
+        "xmm4",
+        "xmm5",
+        "xmm6",
+        "xmm7",
+        "xmm8",
+        "xmm9",
+        "xmm10",
+        "xmm11",
+        "xmm12",
+        "xmm13",
+        "xmm14",
+        "xmm15",
+    }
+    _register_pc = {"pc": "rip"}
+
+    _registers = {}
+    _registers = _registers | {i: i for i in _registers_64}
+    _registers = _registers | {i: i for i in _registers_general}
+    _registers = _registers | {i: i for i in _registers_byte}
+    _registers = _registers | {i: i for i in _registers_seg}
+    _registers = _registers | {i: i for i in _registers_control}
+    _registers = _registers | {i: j for i, j in _registers_mmr.items()}
+    _registers = _registers | {i: i for i in _registers_xmm}
+    _registers = _registers | {i: j for i, j in _register_pc.items()}

smallworld/emulators/panda/machdefs/arm.py

@@ -0,0 +1,89 @@
+import capstone
+
+from ....platforms import Architecture, Byteorder
+from .machdef import PandaMachineDef
+
+
+class ARMMachineDef(PandaMachineDef):
+    cs_arch = capstone.CS_ARCH_ARM
+    cs_mode = capstone.CS_MODE_ARM | capstone.CS_MODE_LITTLE_ENDIAN
+
+    panda_arch = "arm"
+
+    # I'm going to define all the ones we are making possible as of now
+    # I need to submit a PR to change to X86 32 bit and to includ eflags
+    def __init__(self):
+        self._registers = {
+            "r0",
+            "r1",
+            "r2",
+            "r3",
+            "r4",
+            "r5",
+            "r6",
+            "r7",
+            "r8",
+            "r9",
+            "r10",
+            "r11",
+            "r12",
+            "sp",
+            "lr",
+            "ip",
+        }
+
+        self._registers = {i: i for i in self._registers}
+        self._registers = self._registers | {"pc": "ip"}
+
+
+class ARMMachineMixinM:
+    """Mixin for ARM M-series machine models"""
+
+    def __init__(self):
+        super().__init__()
+        self._registers_m = {
+            # NOTE: None of the expected privileged registers exist
+            # "psr",
+            # "primask",
+            # "basepri",
+            # "faultmask",
+            # "control",
+            # "msp",
+            # "psp",
+        }
+        self._registers = self._registers | {i: i for i in self._registers_m}
+
+
+class ARMMachineMixinA:
+    """Mixin for ARM A-series machine models"""
+
+    def __init__(self):
+        super().__init__()
+        # TODO: QEMU doesn't quite support what I expect.
+        # I expected to see cpsr and spsr.
+        # I either got the CPU model wrong, or something else is weird.
+        self._registers_a = {
+            "psr",
+        }
+        self._registers = self._registers | {i: i for i in self._registers_a}
+
+
+class ARMv5TMachineDef(ARMMachineDef):
+    arch = Architecture.ARM_V5T
+    byteorder = Byteorder.LITTLE
+    cpu = "pxa255"
+
+
+# TODO: Something's very weird with Panda's Arm 7 models.
+# cortex-a9 should be an A-series, but it looks more like an M-series.
+# cortex-m4 looks like an M-series, but aborts; I suspect we're missing configuration.
+class ARMv7AMachineDef(ARMMachineMixinA, ARMMachineDef):
+    arch = Architecture.ARM_V7A
+    byteorder = Byteorder.LITTLE
+    cpu = "cortex-a9"
+
+
+class ARMv7MMachineDef(ARMMachineMixinM, ARMMachineDef):
+    arch = Architecture.ARM_V7M
+    byteorder = Byteorder.LITTLE
+    cpu = "cortex-m4"

smallworld/emulators/panda/machdefs/i386.py

@@ -0,0 +1,36 @@
+import capstone
+
+from ....platforms import Architecture, Byteorder
+from .machdef import PandaMachineDef
+
+
+class i386MachineDef(PandaMachineDef):
+    arch = Architecture.X86_32
+    byteorder = Byteorder.LITTLE
+
+    panda_arch = "i386"
+
+    cs_arch = capstone.CS_ARCH_X86
+    cs_mode = capstone.CS_MODE_32
+
+    # I'm going to define all the ones we are making possible as of now
+    # I need to submit a PR to change to X86 32 bit and to includ eflags
+    _registers_general = {"eax", "ebx", "ecx", "edx", "esi", "edi", "esp", "ebp", "eip"}
+    _registers_short = {"ax", "bx", "cx", "dx", "si", "di", "sp", "bp"}
+    _registers_byte = {"al", "bl", "cl", "dl", "ah", "bh", "ch", "dh"}
+    _registers_seg = {"es", "cs", "ss", "ds", "fs", "gs"}
+    _registers_control = {"cr0", "cr1", "cr2", "cr3", "cr4"}
+    _registers_mmr = {"gdtr": "gdt", "idtr": "idt", "tr": "tr", "ldtr": "ldt"}
+    _register_pc = {"pc": "eip"}
+
+    _registers = {}
+    _registers = _registers | {i: i for i in _registers_general}
+    _registers = _registers | {i: i for i in _registers_byte}
+    _registers = _registers | {i: i for i in _registers_seg}
+    _registers = _registers | {i: i for i in _registers_control}
+    _registers = _registers | {i: j for i, j in _registers_mmr.items()}
+    _registers = _registers | {i: j for i, j in _register_pc.items()}
+    # _registers = (
+    #    _registers_general | _registers_byte | _registers_seg | _registers_control
+    # )
+    # _registers = {**_registers_general, **_register_short, **_registers_seg, **_registers_control}

smallworld/emulators/panda/machdefs/machdef.py

@@ -0,0 +1,86 @@
+import abc
+import typing
+
+from .... import platforms, utils
+
+
+class PandaMachineDef(metaclass=abc.ABCMeta):
+    """Container class for Unicorn architecture-specific definitions"""
+
+    @property
+    @abc.abstractmethod
+    def arch(self) -> platforms.Architecture:
+        """The architecture ID"""
+        raise NotImplementedError("This is an abstract method.")
+
+    @property
+    @abc.abstractmethod
+    def byteorder(self) -> platforms.Byteorder:
+        """The byte order"""
+        raise NotImplementedError("This is an abstract method.")
+
+    @property
+    @abc.abstractmethod
+    def panda_arch(self) -> str:
+        """The panda architecture to use"""
+        raise NotImplementedError("This is an abstract method.")
+
+    @property
+    @abc.abstractmethod
+    def cs_arch(self) -> int:
+        """The capstone architecture to use"""
+        raise NotImplementedError("This is an abstract method.")
+
+    @property
+    @abc.abstractmethod
+    def cs_mode(self) -> int:
+        """The capstone mode to use"""
+        raise NotImplementedError("This is an abstract method.")
+
+    _registers: typing.Dict[str, str] = {}
+
+    def panda_reg(self, name: str) -> str:
+        if name in self._registers:
+            return self._registers[name]
+        else:
+            raise ValueError(
+                f"Unknown register for {self.arch}:{self.byteorder}: {name}"
+            )
+
+    def check_panda_reg(self, name: str) -> bool:
+        """Convert a register name to panda cpu field, index, mask
+
+        This must cover all names defined in the CPU state model
+        for this arch/mode/byteorder, or return 0,
+        which always indicates an invalid register
+        """
+        if name in self._registers:
+            return True
+        else:
+            return False
+
+    @classmethod
+    def for_platform(cls, platform: platforms.Platform):
+        """Find the appropriate MachineDef for your architecture
+
+        Arguments:
+            arch: The architecture ID you want
+            mode: The mode ID you want
+            byteorder: The byteorderness you want
+
+        Returns:
+            An instance of the appropriate MachineDef
+
+        Raises:
+            ValueError: If no MachineDef subclass matches your request
+        """
+        try:
+            return utils.find_subclass(
+                cls,
+                lambda x: x.arch == platform.architecture
+                and x.byteorder == platform.byteorder,
+            )
+        except:
+            raise ValueError(
+                f"No machine model for {platform.architecture}:{platform.byteorder}"
+            )