udb 0.1.17 → 0.1.18
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- checksums.yaml +4 -4
- data/.data/cfgs/example_rv64_with_overlay.yaml +140 -5
- data/.data/cfgs/profile/RVA23S64.yaml +1 -1
- data/.data/cfgs/profile/RVA23p1S64.yaml +217 -0
- data/.data/cfgs/profile/RVB23S64.yaml +1 -1
- data/.data/cfgs/profile/RVB23p1S64.yaml +179 -0
- data/.data/cfgs/rv32-riscv-tests.yaml +134 -0
- data/.data/cfgs/rv32-vector.yaml +134 -0
- data/.data/cfgs/rv64-riscv-tests.yaml +134 -0
- data/.data/cfgs/rv64-vector.yaml +134 -0
- data/.data/spec/schemas/schema_defs.json +4 -1
- data/.data/spec/std/isa/csr/I/mcounteren.layout +7 -0
- data/.data/spec/std/isa/csr/I/mcounteren.yaml +7 -0
- data/.data/spec/std/isa/csr/Smcdeleg/scountinhibit.layout +111 -0
- data/.data/spec/std/isa/csr/Smcdeleg/scountinhibit.yaml +840 -0
- data/.data/spec/std/isa/csr/Smcntrpmf/mcyclecfg.yaml +2 -0
- data/.data/spec/std/isa/csr/Smcntrpmf/mcyclecfgh.yaml +2 -0
- data/.data/spec/std/isa/csr/Smcntrpmf/minstretcfg.yaml +2 -0
- data/.data/spec/std/isa/csr/Smcntrpmf/minstretcfgh.yaml +2 -0
- data/.data/spec/std/isa/csr/Sscofpmf/scountovf.layout +7 -0
- data/.data/spec/std/isa/csr/Sscofpmf/scountovf.yaml +7 -0
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter10.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter10h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter11.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter11h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter12.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter12h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter13.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter13h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter14.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter14h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter15.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter15h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter16.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter16h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter17.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter17h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter18.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter18h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter19.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter19h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter20.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter20h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter21.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter21h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter22.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter22h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter23.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter23h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter24.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter24h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter25.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter25h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter26.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter26h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter27.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter27h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter28.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter28h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter29.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter29h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter3.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter30.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter30h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter31.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter31h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter3h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter4.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter4h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter5.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter5h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter6.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter6h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter7.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter7h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter8.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter8h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter9.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter9h.yaml +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounterN.layout +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounterNh.layout +2 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent10.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent10h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent11.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent11h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent12.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent12h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent13.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent13h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent14.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent14h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent15.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent15h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent16.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent16h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent17.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent17h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent18.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent18h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent19.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent19h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent20.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent20h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent21.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent21h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent22.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent22h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent23.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent23h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent24.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent24h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent25.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent25h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent26.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent26h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent27.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent27h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent28.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent28h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent29.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent29h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent3.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent30.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent30h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent31.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent31h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent3h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent4.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent4h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent5.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent5h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent6.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent6h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent7.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent7h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent8.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent8h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent9.yaml +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmevent9h.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmeventN.layout +4 -7
- data/.data/spec/std/isa/csr/Zihpm/mhpmeventNh.layout +4 -4
- data/.data/spec/std/isa/csr/Zkr/seed.yaml +75 -0
- data/.data/spec/std/isa/csr/hcontext.yaml +4 -4
- data/.data/spec/std/isa/csr/mcontext.yaml +4 -4
- data/.data/spec/std/isa/csr/mcycle.yaml +2 -0
- data/.data/spec/std/isa/csr/mcycleh.yaml +2 -0
- data/.data/spec/std/isa/csr/medeleg.yaml +72 -36
- data/.data/spec/std/isa/csr/menvcfg.yaml +12 -1
- data/.data/spec/std/isa/csr/menvcfgh.yaml +12 -0
- data/.data/spec/std/isa/csr/mideleg.yaml +13 -36
- data/.data/spec/std/isa/csr/mie.yaml +3 -6
- data/.data/spec/std/isa/csr/minstret.yaml +2 -0
- data/.data/spec/std/isa/csr/minstreth.yaml +2 -0
- data/.data/spec/std/isa/csr/mip.yaml +3 -6
- data/.data/spec/std/isa/csr/misa.yaml +3 -23
- data/.data/spec/std/isa/csr/mseccfg.yaml +27 -1
- data/.data/spec/std/isa/csr/mstatus.yaml +8 -2
- data/.data/spec/std/isa/csr/scontext.yaml +8 -4
- data/.data/spec/std/isa/csr/tcontrol.yaml +6 -2
- data/.data/spec/std/isa/csr/tdata2.yaml +6 -2
- data/.data/spec/std/isa/csr/tdata3.yaml +6 -2
- data/.data/spec/std/isa/ext/Sdext.yaml +58 -2
- data/.data/spec/std/isa/ext/Sm.yaml +2 -2
- data/.data/spec/std/isa/ext/Smcdeleg.yaml +7 -0
- data/.data/spec/std/isa/ext/Smmpm.yaml +8 -0
- data/.data/spec/std/isa/ext/Smnpm.yaml +19 -0
- data/.data/spec/std/isa/ext/Smpmpdeleg.yaml +33 -0
- data/.data/spec/std/isa/ext/Ssccfg.yaml +7 -0
- data/.data/spec/std/isa/ext/Ssnpm.yaml +8 -0
- data/.data/spec/std/isa/ext/Sspmp.yaml +44 -0
- data/.data/spec/std/isa/ext/Sspmpen.yaml +30 -0
- data/.data/spec/std/isa/ext/Zvabd.yaml +5 -1
- data/.data/spec/std/isa/ext/Zvfbdota32f.yaml +23 -0
- data/.data/spec/std/isa/ext/Zvzip.yaml +24 -0
- data/.data/spec/std/isa/inst/C/c.bnez.yaml +2 -2
- data/.data/spec/std/isa/inst/H/hlv.b.yaml +1 -1
- data/.data/spec/std/isa/inst/H/hlv.bu.yaml +1 -1
- data/.data/spec/std/isa/inst/H/hlv.d.yaml +1 -1
- data/.data/spec/std/isa/inst/H/hlv.h.yaml +1 -1
- data/.data/spec/std/isa/inst/H/hlv.hu.yaml +1 -1
- data/.data/spec/std/isa/inst/H/hlv.w.yaml +1 -1
- data/.data/spec/std/isa/inst/H/hlv.wu.yaml +1 -1
- data/.data/spec/std/isa/inst/H/hlvx.hu.yaml +1 -1
- data/.data/spec/std/isa/inst/H/hlvx.wu.yaml +1 -1
- data/.data/spec/std/isa/inst/H/hsv.b.yaml +1 -1
- data/.data/spec/std/isa/inst/H/hsv.d.yaml +1 -1
- data/.data/spec/std/isa/inst/H/hsv.h.yaml +1 -1
- data/.data/spec/std/isa/inst/H/hsv.w.yaml +1 -1
- data/.data/spec/std/isa/inst/I/ld.yaml +9 -8
- data/.data/spec/std/isa/inst/I/sd.yaml +9 -8
- data/.data/spec/std/isa/inst/Q/fcvt.q.d.yaml +1 -1
- data/.data/spec/std/isa/inst/Q/flq.yaml +1 -1
- data/.data/spec/std/isa/inst/Sdext/dret.yaml +72 -6
- data/.data/spec/std/isa/inst/V/vfncvt.f.f.w.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vfncvt.f.x.w.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vfncvt.f.xu.w.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vfncvt.rod.f.f.w.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vfncvt.rtz.x.f.w.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vfncvt.rtz.xu.f.w.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vfncvt.x.f.w.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vfncvt.xu.f.w.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vnclip.wi.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vnclip.wv.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vnclip.wx.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vnclipu.wi.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vnclipu.wv.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vnclipu.wx.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vnsra.wi.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vnsra.wv.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vnsra.wx.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vnsrl.wi.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vnsrl.wv.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vnsrl.wx.yaml +2 -2
- data/.data/spec/std/isa/inst/Zfh/fcvt.h.s.yaml +28 -20
- data/.data/spec/std/isa/inst/Zfh/fcvt.s.h.yaml +35 -20
- data/.data/spec/std/isa/inst/Zvabd/vabd.vv.yaml +3 -3
- data/.data/spec/std/isa/inst/Zvabd/vabd.vx.yaml +69 -0
- data/.data/spec/std/isa/inst/Zvabd/vabdu.vv.yaml +3 -3
- data/.data/spec/std/isa/inst/Zvabd/{vabs.v.yaml → vabdu.vx.yaml} +17 -11
- data/.data/spec/std/isa/inst/Zvabd/vwabda.vv.yaml +1 -1
- data/.data/spec/std/isa/inst/Zvabd/vwabda.vx.yaml +73 -0
- data/.data/spec/std/isa/inst/Zvabd/vwabdau.vv.yaml +1 -1
- data/.data/spec/std/isa/inst/Zvabd/vwabdau.vx.yaml +74 -0
- data/.data/spec/std/isa/inst/Zvfbdota32f/vfbdota.vv.yaml +68 -0
- data/.data/spec/std/isa/inst/Zvzip/vpaire.vv.yaml +36 -0
- data/.data/spec/std/isa/inst/Zvzip/vpairo.vv.yaml +37 -0
- data/.data/spec/std/isa/inst/Zvzip/vunzipe.v.yaml +33 -0
- data/.data/spec/std/isa/inst/Zvzip/vunzipo.v.yaml +33 -0
- data/.data/spec/std/isa/inst/Zvzip/vzip.vv.yaml +37 -0
- data/.data/spec/std/isa/isa/builtin_functions.idl +51 -0
- data/.data/spec/std/isa/isa/globals.isa +117 -5
- data/.data/spec/std/isa/param/HCONTEXT_IMPLEMENTED.yaml +29 -0
- data/.data/spec/std/isa/param/{MCONTEXT_AVAILABLE.yaml → MCONTEXT_IMPLEMENTED.yaml} +3 -3
- data/.data/spec/std/isa/param/MEDELEG_DELEGATABLE.yaml +121 -0
- data/.data/spec/std/isa/param/MEI_INTR_IMPL.yaml +1 -1
- data/.data/spec/std/isa/param/MIDELEG_DELEGATABLE.yaml +177 -0
- data/.data/spec/std/isa/param/MSI_INTR_IMPL.yaml +1 -1
- data/.data/spec/std/isa/param/MTI_INTR_IMPL.yaml +1 -1
- data/.data/spec/std/isa/param/SCONTEXT_IMPLEMENTED.yaml +18 -0
- data/.data/spec/std/isa/param/SDTRIG_BREAKPOINT_REENTRANCY.yaml +45 -0
- data/.data/spec/std/isa/param/SDTRIG_ETRIGGER_SUPPORTED_EXCEPTIONS.yaml +37 -0
- data/.data/spec/std/isa/param/SDTRIG_ETRIGGER_SUPPORTED_TRIGGERS.yaml +25 -0
- data/.data/spec/std/isa/param/SDTRIG_ICOUNT_COUNT_HARDWIRED_1.yaml +23 -0
- data/.data/spec/std/isa/param/SDTRIG_ICOUNT_SELF_WRITE_SETS_PENDING.yaml +23 -0
- data/.data/spec/std/isa/param/SDTRIG_ICOUNT_SUPPORTED_TRIGGERS.yaml +25 -0
- data/.data/spec/std/isa/param/SDTRIG_ITRIGGER_SUPPORTED_INTERRUPTS.yaml +37 -0
- data/.data/spec/std/isa/param/SDTRIG_ITRIGGER_SUPPORTED_TRIGGERS.yaml +25 -0
- data/.data/spec/std/isa/param/SDTRIG_MAX_CHAIN_LENGTH.yaml +33 -0
- data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_EXECUTE_WRITABLE.yaml +22 -0
- data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_LOAD_WRITABLE.yaml +22 -0
- data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_MASKMAX6.yaml +26 -0
- data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_MATCH_LEGAL_VALUES.yaml +41 -0
- data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_SELECT_WRITABLE.yaml +22 -0
- data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_SIZE_LEGAL_VALUES.yaml +38 -0
- data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_STORE_WRITABLE.yaml +22 -0
- data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_SUPPORTED_TRIGGERS.yaml +25 -0
- data/.data/spec/std/isa/param/SDTRIG_M_WRITABLE.yaml +17 -0
- data/.data/spec/std/isa/param/SDTRIG_NUM_TRIGGERS.yaml +22 -0
- data/.data/spec/std/isa/param/SDTRIG_S_WRITABLE.yaml +19 -0
- data/.data/spec/std/isa/param/SDTRIG_TEXTRA_MHSELECT_MCONTEXT_MATCH.yaml +24 -0
- data/.data/spec/std/isa/param/SDTRIG_TEXTRA_MHSELECT_VMID_MATCH.yaml +23 -0
- data/.data/spec/std/isa/param/SDTRIG_TEXTRA_MHVALUE_LEN.yaml +26 -0
- data/.data/spec/std/isa/param/SDTRIG_TEXTRA_SSELECT_ASID_MATCH.yaml +23 -0
- data/.data/spec/std/isa/param/SDTRIG_TEXTRA_SSELECT_SCONTEXT_MATCH.yaml +26 -0
- data/.data/spec/std/isa/param/SDTRIG_TEXTRA_SVALUE_LEN.yaml +26 -0
- data/.data/spec/std/isa/param/SDTRIG_U_WRITABLE.yaml +19 -0
- data/.data/spec/std/isa/param/SDTRIG_VS_WRITABLE.yaml +19 -0
- data/.data/spec/std/isa/param/SDTRIG_VU_WRITABLE.yaml +19 -0
- data/.data/spec/std/isa/param/SEI_INTR_IMPL.yaml +1 -1
- data/.data/spec/std/isa/param/SSEED_READ_ONLY_ZERO.yaml +28 -0
- data/.data/spec/std/isa/param/SSI_INTR_IMPL.yaml +1 -1
- data/.data/spec/std/isa/param/STI_INTR_IMPL.yaml +1 -1
- data/.data/spec/std/isa/param/TCONTROL_IMPLEMENTED.yaml +16 -0
- data/.data/spec/std/isa/param/TDATA2_IMPLEMENTED.yaml +26 -0
- data/.data/spec/std/isa/param/TDATA3_IMPLEMENTED.yaml +29 -0
- data/.data/spec/std/isa/param/USEED_READ_ONLY_ZERO.yaml +28 -0
- data/.data/spec/std/isa/profile/RVA23p1S64.yaml +37 -0
- data/.data/spec/std/isa/profile/RVB23p1S64.yaml +39 -0
- data/.data/spec/std/isa/profile_family/RVA.yaml +3 -1
- data/.data/spec/std/isa/profile_family/RVB.yaml +3 -1
- data/.data/spec/std/isa/profile_release/RVA23p1.yaml +30 -0
- data/.data/spec/std/isa/profile_release/RVB23p1.yaml +30 -0
- data/lib/udb/version.rb +1 -1
- metadata +65 -8
- data/.data/spec/std/isa/param/HCONTEXT_AVAILABLE.yaml +0 -19
- data/.data/spec/std/isa/param/VSEI_INTR_IMPL.yaml +0 -28
- data/.data/spec/std/isa/param/VSSI_INTR_IMPL.yaml +0 -28
- data/.data/spec/std/isa/param/VSTI_INTR_IMPL.yaml +0 -33
|
@@ -29,6 +29,9 @@ description: |
|
|
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29
29
|
In S/HS-mode, `scountovf` bit X is readable when `mcounteren` bit X is set, and otherwise reads as zero.
|
|
30
30
|
Similarly, in VS-mode, it is readable when both `mcounteren` and `hcounteren` bit X are set.
|
|
31
31
|
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|
32
|
+
If the Smcdeleg extension is implemented and `menvcfg.CDE` is set, attempts to read `scountovf`
|
|
33
|
+
from VS-mode or VU-mode raise a `Virtual Instruction` exception.
|
|
34
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+
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|
32
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|
fields:
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36
|
<%- (3..31).each do |of_num| -%>
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OF<%= of_num %>:
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@@ -47,6 +50,10 @@ fields:
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50
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<%- end -%>
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48
51
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49
52
|
sw_read(): |
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53
|
+
if (virtual_mode?() && implemented?(ExtensionName::Smcdeleg) && CSR[menvcfg].CDE == 1) {
|
|
54
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+
# Smcdeleg/Ssccfg: when menvcfg.CDE=1, reads from VS-mode or VU-mode raise a virtual-instruction exception
|
|
55
|
+
raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
|
|
56
|
+
}
|
|
50
57
|
Bits<32> mask;
|
|
51
58
|
if (mode() == PrivilegeMode::VS) {
|
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52
59
|
# In VS-mode, scountovf.OFX access is determined by mcounteren/hcounteren
|
|
@@ -32,6 +32,9 @@ description: |
|
|
|
32
32
|
In S/HS-mode, `scountovf` bit X is readable when `mcounteren` bit X is set, and otherwise reads as zero.
|
|
33
33
|
Similarly, in VS-mode, it is readable when both `mcounteren` and `hcounteren` bit X are set.
|
|
34
34
|
|
|
35
|
+
If the Smcdeleg extension is implemented and `menvcfg.CDE` is set, attempts to read `scountovf`
|
|
36
|
+
from VS-mode or VU-mode raise a `Virtual Instruction` exception.
|
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37
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+
|
|
35
38
|
fields:
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36
39
|
OF3:
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|
37
40
|
alias: mhpmevent3.OF
|
|
@@ -412,6 +415,10 @@ fields:
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412
415
|
return HPM_COUNTER_EN[31] ? UNDEFINED_LEGAL : 0;
|
|
413
416
|
|
|
414
417
|
sw_read(): |
|
|
418
|
+
if (virtual_mode?() && implemented?(ExtensionName::Smcdeleg) && CSR[menvcfg].CDE == 1) {
|
|
419
|
+
# Smcdeleg/Ssccfg: when menvcfg.CDE=1, reads from VS-mode or VU-mode raise a virtual-instruction exception
|
|
420
|
+
raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
|
|
421
|
+
}
|
|
415
422
|
Bits<32> mask;
|
|
416
423
|
if (mode() == PrivilegeMode::VS) {
|
|
417
424
|
# In VS-mode, scountovf.OFX access is determined by mcounteren/hcounteren
|
|
@@ -11,17 +11,14 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter10
|
|
12
12
|
long_name: Machine Hardware Performance Counter 10
|
|
13
13
|
address: 0xB0A
|
|
14
|
+
indirect_address: 0x4A
|
|
15
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+
indirect_slot: 1
|
|
14
16
|
writable: true
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|
15
17
|
priv_mode: M
|
|
16
18
|
length: 64
|
|
17
19
|
definedBy:
|
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18
|
-
|
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19
|
-
|
|
20
|
-
name: Sm
|
|
21
|
-
- param:
|
|
22
|
-
name: HPM_COUNTER_EN
|
|
23
|
-
index: 10
|
|
24
|
-
equal: true
|
|
20
|
+
extension:
|
|
21
|
+
name: Sm
|
|
25
22
|
description: |
|
|
26
23
|
Programmable hardware performance counter.
|
|
27
24
|
|
|
@@ -11,6 +11,8 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter10h
|
|
12
12
|
long_name: Machine Hardware Performance Counter 10, Upper half
|
|
13
13
|
address: 0xB8A
|
|
14
|
+
indirect_address: 0x4A
|
|
15
|
+
indirect_slot: 4
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 32
|
|
@@ -67,10 +69,6 @@ definedBy:
|
|
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67
69
|
- extension:
|
|
68
70
|
name: Sm
|
|
69
71
|
- xlen: 32
|
|
70
|
-
- param:
|
|
71
|
-
name: HPM_COUNTER_EN
|
|
72
|
-
index: 10
|
|
73
|
-
equal: true
|
|
74
72
|
fields:
|
|
75
73
|
COUNT:
|
|
76
74
|
location: 31-0
|
|
@@ -11,17 +11,14 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter11
|
|
12
12
|
long_name: Machine Hardware Performance Counter 11
|
|
13
13
|
address: 0xB0B
|
|
14
|
+
indirect_address: 0x4B
|
|
15
|
+
indirect_slot: 1
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 64
|
|
17
19
|
definedBy:
|
|
18
|
-
|
|
19
|
-
|
|
20
|
-
name: Sm
|
|
21
|
-
- param:
|
|
22
|
-
name: HPM_COUNTER_EN
|
|
23
|
-
index: 11
|
|
24
|
-
equal: true
|
|
20
|
+
extension:
|
|
21
|
+
name: Sm
|
|
25
22
|
description: |
|
|
26
23
|
Programmable hardware performance counter.
|
|
27
24
|
|
|
@@ -11,6 +11,8 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter11h
|
|
12
12
|
long_name: Machine Hardware Performance Counter 11, Upper half
|
|
13
13
|
address: 0xB8B
|
|
14
|
+
indirect_address: 0x4B
|
|
15
|
+
indirect_slot: 4
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 32
|
|
@@ -67,10 +69,6 @@ definedBy:
|
|
|
67
69
|
- extension:
|
|
68
70
|
name: Sm
|
|
69
71
|
- xlen: 32
|
|
70
|
-
- param:
|
|
71
|
-
name: HPM_COUNTER_EN
|
|
72
|
-
index: 11
|
|
73
|
-
equal: true
|
|
74
72
|
fields:
|
|
75
73
|
COUNT:
|
|
76
74
|
location: 31-0
|
|
@@ -11,17 +11,14 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter12
|
|
12
12
|
long_name: Machine Hardware Performance Counter 12
|
|
13
13
|
address: 0xB0C
|
|
14
|
+
indirect_address: 0x4C
|
|
15
|
+
indirect_slot: 1
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 64
|
|
17
19
|
definedBy:
|
|
18
|
-
|
|
19
|
-
|
|
20
|
-
name: Sm
|
|
21
|
-
- param:
|
|
22
|
-
name: HPM_COUNTER_EN
|
|
23
|
-
index: 12
|
|
24
|
-
equal: true
|
|
20
|
+
extension:
|
|
21
|
+
name: Sm
|
|
25
22
|
description: |
|
|
26
23
|
Programmable hardware performance counter.
|
|
27
24
|
|
|
@@ -11,6 +11,8 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter12h
|
|
12
12
|
long_name: Machine Hardware Performance Counter 12, Upper half
|
|
13
13
|
address: 0xB8C
|
|
14
|
+
indirect_address: 0x4C
|
|
15
|
+
indirect_slot: 4
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 32
|
|
@@ -67,10 +69,6 @@ definedBy:
|
|
|
67
69
|
- extension:
|
|
68
70
|
name: Sm
|
|
69
71
|
- xlen: 32
|
|
70
|
-
- param:
|
|
71
|
-
name: HPM_COUNTER_EN
|
|
72
|
-
index: 12
|
|
73
|
-
equal: true
|
|
74
72
|
fields:
|
|
75
73
|
COUNT:
|
|
76
74
|
location: 31-0
|
|
@@ -11,17 +11,14 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter13
|
|
12
12
|
long_name: Machine Hardware Performance Counter 13
|
|
13
13
|
address: 0xB0D
|
|
14
|
+
indirect_address: 0x4D
|
|
15
|
+
indirect_slot: 1
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 64
|
|
17
19
|
definedBy:
|
|
18
|
-
|
|
19
|
-
|
|
20
|
-
name: Sm
|
|
21
|
-
- param:
|
|
22
|
-
name: HPM_COUNTER_EN
|
|
23
|
-
index: 13
|
|
24
|
-
equal: true
|
|
20
|
+
extension:
|
|
21
|
+
name: Sm
|
|
25
22
|
description: |
|
|
26
23
|
Programmable hardware performance counter.
|
|
27
24
|
|
|
@@ -11,6 +11,8 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter13h
|
|
12
12
|
long_name: Machine Hardware Performance Counter 13, Upper half
|
|
13
13
|
address: 0xB8D
|
|
14
|
+
indirect_address: 0x4D
|
|
15
|
+
indirect_slot: 4
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 32
|
|
@@ -67,10 +69,6 @@ definedBy:
|
|
|
67
69
|
- extension:
|
|
68
70
|
name: Sm
|
|
69
71
|
- xlen: 32
|
|
70
|
-
- param:
|
|
71
|
-
name: HPM_COUNTER_EN
|
|
72
|
-
index: 13
|
|
73
|
-
equal: true
|
|
74
72
|
fields:
|
|
75
73
|
COUNT:
|
|
76
74
|
location: 31-0
|
|
@@ -11,17 +11,14 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter14
|
|
12
12
|
long_name: Machine Hardware Performance Counter 14
|
|
13
13
|
address: 0xB0E
|
|
14
|
+
indirect_address: 0x4E
|
|
15
|
+
indirect_slot: 1
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 64
|
|
17
19
|
definedBy:
|
|
18
|
-
|
|
19
|
-
|
|
20
|
-
name: Sm
|
|
21
|
-
- param:
|
|
22
|
-
name: HPM_COUNTER_EN
|
|
23
|
-
index: 14
|
|
24
|
-
equal: true
|
|
20
|
+
extension:
|
|
21
|
+
name: Sm
|
|
25
22
|
description: |
|
|
26
23
|
Programmable hardware performance counter.
|
|
27
24
|
|
|
@@ -11,6 +11,8 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter14h
|
|
12
12
|
long_name: Machine Hardware Performance Counter 14, Upper half
|
|
13
13
|
address: 0xB8E
|
|
14
|
+
indirect_address: 0x4E
|
|
15
|
+
indirect_slot: 4
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 32
|
|
@@ -67,10 +69,6 @@ definedBy:
|
|
|
67
69
|
- extension:
|
|
68
70
|
name: Sm
|
|
69
71
|
- xlen: 32
|
|
70
|
-
- param:
|
|
71
|
-
name: HPM_COUNTER_EN
|
|
72
|
-
index: 14
|
|
73
|
-
equal: true
|
|
74
72
|
fields:
|
|
75
73
|
COUNT:
|
|
76
74
|
location: 31-0
|
|
@@ -11,17 +11,14 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter15
|
|
12
12
|
long_name: Machine Hardware Performance Counter 15
|
|
13
13
|
address: 0xB0F
|
|
14
|
+
indirect_address: 0x4F
|
|
15
|
+
indirect_slot: 1
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 64
|
|
17
19
|
definedBy:
|
|
18
|
-
|
|
19
|
-
|
|
20
|
-
name: Sm
|
|
21
|
-
- param:
|
|
22
|
-
name: HPM_COUNTER_EN
|
|
23
|
-
index: 15
|
|
24
|
-
equal: true
|
|
20
|
+
extension:
|
|
21
|
+
name: Sm
|
|
25
22
|
description: |
|
|
26
23
|
Programmable hardware performance counter.
|
|
27
24
|
|
|
@@ -11,6 +11,8 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter15h
|
|
12
12
|
long_name: Machine Hardware Performance Counter 15, Upper half
|
|
13
13
|
address: 0xB8F
|
|
14
|
+
indirect_address: 0x4F
|
|
15
|
+
indirect_slot: 4
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 32
|
|
@@ -67,10 +69,6 @@ definedBy:
|
|
|
67
69
|
- extension:
|
|
68
70
|
name: Sm
|
|
69
71
|
- xlen: 32
|
|
70
|
-
- param:
|
|
71
|
-
name: HPM_COUNTER_EN
|
|
72
|
-
index: 15
|
|
73
|
-
equal: true
|
|
74
72
|
fields:
|
|
75
73
|
COUNT:
|
|
76
74
|
location: 31-0
|
|
@@ -11,17 +11,14 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter16
|
|
12
12
|
long_name: Machine Hardware Performance Counter 16
|
|
13
13
|
address: 0xB10
|
|
14
|
+
indirect_address: 0x50
|
|
15
|
+
indirect_slot: 1
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 64
|
|
17
19
|
definedBy:
|
|
18
|
-
|
|
19
|
-
|
|
20
|
-
name: Sm
|
|
21
|
-
- param:
|
|
22
|
-
name: HPM_COUNTER_EN
|
|
23
|
-
index: 16
|
|
24
|
-
equal: true
|
|
20
|
+
extension:
|
|
21
|
+
name: Sm
|
|
25
22
|
description: |
|
|
26
23
|
Programmable hardware performance counter.
|
|
27
24
|
|
|
@@ -11,6 +11,8 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter16h
|
|
12
12
|
long_name: Machine Hardware Performance Counter 16, Upper half
|
|
13
13
|
address: 0xB90
|
|
14
|
+
indirect_address: 0x50
|
|
15
|
+
indirect_slot: 4
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 32
|
|
@@ -67,10 +69,6 @@ definedBy:
|
|
|
67
69
|
- extension:
|
|
68
70
|
name: Sm
|
|
69
71
|
- xlen: 32
|
|
70
|
-
- param:
|
|
71
|
-
name: HPM_COUNTER_EN
|
|
72
|
-
index: 16
|
|
73
|
-
equal: true
|
|
74
72
|
fields:
|
|
75
73
|
COUNT:
|
|
76
74
|
location: 31-0
|
|
@@ -11,17 +11,14 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter17
|
|
12
12
|
long_name: Machine Hardware Performance Counter 17
|
|
13
13
|
address: 0xB11
|
|
14
|
+
indirect_address: 0x51
|
|
15
|
+
indirect_slot: 1
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 64
|
|
17
19
|
definedBy:
|
|
18
|
-
|
|
19
|
-
|
|
20
|
-
name: Sm
|
|
21
|
-
- param:
|
|
22
|
-
name: HPM_COUNTER_EN
|
|
23
|
-
index: 17
|
|
24
|
-
equal: true
|
|
20
|
+
extension:
|
|
21
|
+
name: Sm
|
|
25
22
|
description: |
|
|
26
23
|
Programmable hardware performance counter.
|
|
27
24
|
|
|
@@ -11,6 +11,8 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter17h
|
|
12
12
|
long_name: Machine Hardware Performance Counter 17, Upper half
|
|
13
13
|
address: 0xB91
|
|
14
|
+
indirect_address: 0x51
|
|
15
|
+
indirect_slot: 4
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 32
|
|
@@ -67,10 +69,6 @@ definedBy:
|
|
|
67
69
|
- extension:
|
|
68
70
|
name: Sm
|
|
69
71
|
- xlen: 32
|
|
70
|
-
- param:
|
|
71
|
-
name: HPM_COUNTER_EN
|
|
72
|
-
index: 17
|
|
73
|
-
equal: true
|
|
74
72
|
fields:
|
|
75
73
|
COUNT:
|
|
76
74
|
location: 31-0
|
|
@@ -11,17 +11,14 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter18
|
|
12
12
|
long_name: Machine Hardware Performance Counter 18
|
|
13
13
|
address: 0xB12
|
|
14
|
+
indirect_address: 0x52
|
|
15
|
+
indirect_slot: 1
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 64
|
|
17
19
|
definedBy:
|
|
18
|
-
|
|
19
|
-
|
|
20
|
-
name: Sm
|
|
21
|
-
- param:
|
|
22
|
-
name: HPM_COUNTER_EN
|
|
23
|
-
index: 18
|
|
24
|
-
equal: true
|
|
20
|
+
extension:
|
|
21
|
+
name: Sm
|
|
25
22
|
description: |
|
|
26
23
|
Programmable hardware performance counter.
|
|
27
24
|
|
|
@@ -11,6 +11,8 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter18h
|
|
12
12
|
long_name: Machine Hardware Performance Counter 18, Upper half
|
|
13
13
|
address: 0xB92
|
|
14
|
+
indirect_address: 0x52
|
|
15
|
+
indirect_slot: 4
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 32
|
|
@@ -67,10 +69,6 @@ definedBy:
|
|
|
67
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|
- extension:
|
|
68
70
|
name: Sm
|
|
69
71
|
- xlen: 32
|
|
70
|
-
- param:
|
|
71
|
-
name: HPM_COUNTER_EN
|
|
72
|
-
index: 18
|
|
73
|
-
equal: true
|
|
74
72
|
fields:
|
|
75
73
|
COUNT:
|
|
76
74
|
location: 31-0
|
|
@@ -11,17 +11,14 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter19
|
|
12
12
|
long_name: Machine Hardware Performance Counter 19
|
|
13
13
|
address: 0xB13
|
|
14
|
+
indirect_address: 0x53
|
|
15
|
+
indirect_slot: 1
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 64
|
|
17
19
|
definedBy:
|
|
18
|
-
|
|
19
|
-
|
|
20
|
-
name: Sm
|
|
21
|
-
- param:
|
|
22
|
-
name: HPM_COUNTER_EN
|
|
23
|
-
index: 19
|
|
24
|
-
equal: true
|
|
20
|
+
extension:
|
|
21
|
+
name: Sm
|
|
25
22
|
description: |
|
|
26
23
|
Programmable hardware performance counter.
|
|
27
24
|
|
|
@@ -11,6 +11,8 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter19h
|
|
12
12
|
long_name: Machine Hardware Performance Counter 19, Upper half
|
|
13
13
|
address: 0xB93
|
|
14
|
+
indirect_address: 0x53
|
|
15
|
+
indirect_slot: 4
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 32
|
|
@@ -67,10 +69,6 @@ definedBy:
|
|
|
67
69
|
- extension:
|
|
68
70
|
name: Sm
|
|
69
71
|
- xlen: 32
|
|
70
|
-
- param:
|
|
71
|
-
name: HPM_COUNTER_EN
|
|
72
|
-
index: 19
|
|
73
|
-
equal: true
|
|
74
72
|
fields:
|
|
75
73
|
COUNT:
|
|
76
74
|
location: 31-0
|
|
@@ -11,17 +11,14 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter20
|
|
12
12
|
long_name: Machine Hardware Performance Counter 20
|
|
13
13
|
address: 0xB14
|
|
14
|
+
indirect_address: 0x54
|
|
15
|
+
indirect_slot: 1
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 64
|
|
17
19
|
definedBy:
|
|
18
|
-
|
|
19
|
-
|
|
20
|
-
name: Sm
|
|
21
|
-
- param:
|
|
22
|
-
name: HPM_COUNTER_EN
|
|
23
|
-
index: 20
|
|
24
|
-
equal: true
|
|
20
|
+
extension:
|
|
21
|
+
name: Sm
|
|
25
22
|
description: |
|
|
26
23
|
Programmable hardware performance counter.
|
|
27
24
|
|
|
@@ -11,6 +11,8 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter20h
|
|
12
12
|
long_name: Machine Hardware Performance Counter 20, Upper half
|
|
13
13
|
address: 0xB94
|
|
14
|
+
indirect_address: 0x54
|
|
15
|
+
indirect_slot: 4
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 32
|
|
@@ -67,10 +69,6 @@ definedBy:
|
|
|
67
69
|
- extension:
|
|
68
70
|
name: Sm
|
|
69
71
|
- xlen: 32
|
|
70
|
-
- param:
|
|
71
|
-
name: HPM_COUNTER_EN
|
|
72
|
-
index: 20
|
|
73
|
-
equal: true
|
|
74
72
|
fields:
|
|
75
73
|
COUNT:
|
|
76
74
|
location: 31-0
|
|
@@ -11,17 +11,14 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter21
|
|
12
12
|
long_name: Machine Hardware Performance Counter 21
|
|
13
13
|
address: 0xB15
|
|
14
|
+
indirect_address: 0x55
|
|
15
|
+
indirect_slot: 1
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 64
|
|
17
19
|
definedBy:
|
|
18
|
-
|
|
19
|
-
|
|
20
|
-
name: Sm
|
|
21
|
-
- param:
|
|
22
|
-
name: HPM_COUNTER_EN
|
|
23
|
-
index: 21
|
|
24
|
-
equal: true
|
|
20
|
+
extension:
|
|
21
|
+
name: Sm
|
|
25
22
|
description: |
|
|
26
23
|
Programmable hardware performance counter.
|
|
27
24
|
|
|
@@ -11,6 +11,8 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter21h
|
|
12
12
|
long_name: Machine Hardware Performance Counter 21, Upper half
|
|
13
13
|
address: 0xB95
|
|
14
|
+
indirect_address: 0x55
|
|
15
|
+
indirect_slot: 4
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 32
|
|
@@ -67,10 +69,6 @@ definedBy:
|
|
|
67
69
|
- extension:
|
|
68
70
|
name: Sm
|
|
69
71
|
- xlen: 32
|
|
70
|
-
- param:
|
|
71
|
-
name: HPM_COUNTER_EN
|
|
72
|
-
index: 21
|
|
73
|
-
equal: true
|
|
74
72
|
fields:
|
|
75
73
|
COUNT:
|
|
76
74
|
location: 31-0
|
|
@@ -11,17 +11,14 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter22
|
|
12
12
|
long_name: Machine Hardware Performance Counter 22
|
|
13
13
|
address: 0xB16
|
|
14
|
+
indirect_address: 0x56
|
|
15
|
+
indirect_slot: 1
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 64
|
|
17
19
|
definedBy:
|
|
18
|
-
|
|
19
|
-
|
|
20
|
-
name: Sm
|
|
21
|
-
- param:
|
|
22
|
-
name: HPM_COUNTER_EN
|
|
23
|
-
index: 22
|
|
24
|
-
equal: true
|
|
20
|
+
extension:
|
|
21
|
+
name: Sm
|
|
25
22
|
description: |
|
|
26
23
|
Programmable hardware performance counter.
|
|
27
24
|
|
|
@@ -11,6 +11,8 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter22h
|
|
12
12
|
long_name: Machine Hardware Performance Counter 22, Upper half
|
|
13
13
|
address: 0xB96
|
|
14
|
+
indirect_address: 0x56
|
|
15
|
+
indirect_slot: 4
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 32
|
|
@@ -67,10 +69,6 @@ definedBy:
|
|
|
67
69
|
- extension:
|
|
68
70
|
name: Sm
|
|
69
71
|
- xlen: 32
|
|
70
|
-
- param:
|
|
71
|
-
name: HPM_COUNTER_EN
|
|
72
|
-
index: 22
|
|
73
|
-
equal: true
|
|
74
72
|
fields:
|
|
75
73
|
COUNT:
|
|
76
74
|
location: 31-0
|
|
@@ -11,17 +11,14 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter23
|
|
12
12
|
long_name: Machine Hardware Performance Counter 23
|
|
13
13
|
address: 0xB17
|
|
14
|
+
indirect_address: 0x57
|
|
15
|
+
indirect_slot: 1
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 64
|
|
17
19
|
definedBy:
|
|
18
|
-
|
|
19
|
-
|
|
20
|
-
name: Sm
|
|
21
|
-
- param:
|
|
22
|
-
name: HPM_COUNTER_EN
|
|
23
|
-
index: 23
|
|
24
|
-
equal: true
|
|
20
|
+
extension:
|
|
21
|
+
name: Sm
|
|
25
22
|
description: |
|
|
26
23
|
Programmable hardware performance counter.
|
|
27
24
|
|
|
@@ -11,6 +11,8 @@ kind: csr
|
|
|
11
11
|
name: mhpmcounter23h
|
|
12
12
|
long_name: Machine Hardware Performance Counter 23, Upper half
|
|
13
13
|
address: 0xB97
|
|
14
|
+
indirect_address: 0x57
|
|
15
|
+
indirect_slot: 4
|
|
14
16
|
writable: true
|
|
15
17
|
priv_mode: M
|
|
16
18
|
length: 32
|
|
@@ -67,10 +69,6 @@ definedBy:
|
|
|
67
69
|
- extension:
|
|
68
70
|
name: Sm
|
|
69
71
|
- xlen: 32
|
|
70
|
-
- param:
|
|
71
|
-
name: HPM_COUNTER_EN
|
|
72
|
-
index: 23
|
|
73
|
-
equal: true
|
|
74
72
|
fields:
|
|
75
73
|
COUNT:
|
|
76
74
|
location: 31-0
|