udb 0.1.17 → 0.1.18

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (288) hide show
  1. checksums.yaml +4 -4
  2. data/.data/cfgs/example_rv64_with_overlay.yaml +140 -5
  3. data/.data/cfgs/profile/RVA23S64.yaml +1 -1
  4. data/.data/cfgs/profile/RVA23p1S64.yaml +217 -0
  5. data/.data/cfgs/profile/RVB23S64.yaml +1 -1
  6. data/.data/cfgs/profile/RVB23p1S64.yaml +179 -0
  7. data/.data/cfgs/rv32-riscv-tests.yaml +134 -0
  8. data/.data/cfgs/rv32-vector.yaml +134 -0
  9. data/.data/cfgs/rv64-riscv-tests.yaml +134 -0
  10. data/.data/cfgs/rv64-vector.yaml +134 -0
  11. data/.data/spec/schemas/schema_defs.json +4 -1
  12. data/.data/spec/std/isa/csr/I/mcounteren.layout +7 -0
  13. data/.data/spec/std/isa/csr/I/mcounteren.yaml +7 -0
  14. data/.data/spec/std/isa/csr/Smcdeleg/scountinhibit.layout +111 -0
  15. data/.data/spec/std/isa/csr/Smcdeleg/scountinhibit.yaml +840 -0
  16. data/.data/spec/std/isa/csr/Smcntrpmf/mcyclecfg.yaml +2 -0
  17. data/.data/spec/std/isa/csr/Smcntrpmf/mcyclecfgh.yaml +2 -0
  18. data/.data/spec/std/isa/csr/Smcntrpmf/minstretcfg.yaml +2 -0
  19. data/.data/spec/std/isa/csr/Smcntrpmf/minstretcfgh.yaml +2 -0
  20. data/.data/spec/std/isa/csr/Sscofpmf/scountovf.layout +7 -0
  21. data/.data/spec/std/isa/csr/Sscofpmf/scountovf.yaml +7 -0
  22. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter10.yaml +4 -7
  23. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter10h.yaml +2 -4
  24. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter11.yaml +4 -7
  25. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter11h.yaml +2 -4
  26. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter12.yaml +4 -7
  27. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter12h.yaml +2 -4
  28. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter13.yaml +4 -7
  29. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter13h.yaml +2 -4
  30. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter14.yaml +4 -7
  31. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter14h.yaml +2 -4
  32. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter15.yaml +4 -7
  33. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter15h.yaml +2 -4
  34. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter16.yaml +4 -7
  35. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter16h.yaml +2 -4
  36. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter17.yaml +4 -7
  37. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter17h.yaml +2 -4
  38. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter18.yaml +4 -7
  39. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter18h.yaml +2 -4
  40. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter19.yaml +4 -7
  41. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter19h.yaml +2 -4
  42. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter20.yaml +4 -7
  43. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter20h.yaml +2 -4
  44. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter21.yaml +4 -7
  45. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter21h.yaml +2 -4
  46. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter22.yaml +4 -7
  47. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter22h.yaml +2 -4
  48. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter23.yaml +4 -7
  49. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter23h.yaml +2 -4
  50. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter24.yaml +4 -7
  51. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter24h.yaml +2 -4
  52. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter25.yaml +4 -7
  53. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter25h.yaml +2 -4
  54. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter26.yaml +4 -7
  55. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter26h.yaml +2 -4
  56. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter27.yaml +4 -7
  57. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter27h.yaml +2 -4
  58. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter28.yaml +4 -7
  59. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter28h.yaml +2 -4
  60. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter29.yaml +4 -7
  61. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter29h.yaml +2 -4
  62. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter3.yaml +4 -7
  63. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter30.yaml +4 -7
  64. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter30h.yaml +2 -4
  65. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter31.yaml +4 -7
  66. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter31h.yaml +2 -4
  67. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter3h.yaml +2 -4
  68. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter4.yaml +4 -7
  69. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter4h.yaml +2 -4
  70. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter5.yaml +4 -7
  71. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter5h.yaml +2 -4
  72. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter6.yaml +4 -7
  73. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter6h.yaml +2 -4
  74. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter7.yaml +4 -7
  75. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter7h.yaml +2 -4
  76. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter8.yaml +4 -7
  77. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter8h.yaml +2 -4
  78. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter9.yaml +4 -7
  79. data/.data/spec/std/isa/csr/Zihpm/mhpmcounter9h.yaml +2 -4
  80. data/.data/spec/std/isa/csr/Zihpm/mhpmcounterN.layout +4 -7
  81. data/.data/spec/std/isa/csr/Zihpm/mhpmcounterNh.layout +2 -4
  82. data/.data/spec/std/isa/csr/Zihpm/mhpmevent10.yaml +4 -7
  83. data/.data/spec/std/isa/csr/Zihpm/mhpmevent10h.yaml +4 -4
  84. data/.data/spec/std/isa/csr/Zihpm/mhpmevent11.yaml +4 -7
  85. data/.data/spec/std/isa/csr/Zihpm/mhpmevent11h.yaml +4 -4
  86. data/.data/spec/std/isa/csr/Zihpm/mhpmevent12.yaml +4 -7
  87. data/.data/spec/std/isa/csr/Zihpm/mhpmevent12h.yaml +4 -4
  88. data/.data/spec/std/isa/csr/Zihpm/mhpmevent13.yaml +4 -7
  89. data/.data/spec/std/isa/csr/Zihpm/mhpmevent13h.yaml +4 -4
  90. data/.data/spec/std/isa/csr/Zihpm/mhpmevent14.yaml +4 -7
  91. data/.data/spec/std/isa/csr/Zihpm/mhpmevent14h.yaml +4 -4
  92. data/.data/spec/std/isa/csr/Zihpm/mhpmevent15.yaml +4 -7
  93. data/.data/spec/std/isa/csr/Zihpm/mhpmevent15h.yaml +4 -4
  94. data/.data/spec/std/isa/csr/Zihpm/mhpmevent16.yaml +4 -7
  95. data/.data/spec/std/isa/csr/Zihpm/mhpmevent16h.yaml +4 -4
  96. data/.data/spec/std/isa/csr/Zihpm/mhpmevent17.yaml +4 -7
  97. data/.data/spec/std/isa/csr/Zihpm/mhpmevent17h.yaml +4 -4
  98. data/.data/spec/std/isa/csr/Zihpm/mhpmevent18.yaml +4 -7
  99. data/.data/spec/std/isa/csr/Zihpm/mhpmevent18h.yaml +4 -4
  100. data/.data/spec/std/isa/csr/Zihpm/mhpmevent19.yaml +4 -7
  101. data/.data/spec/std/isa/csr/Zihpm/mhpmevent19h.yaml +4 -4
  102. data/.data/spec/std/isa/csr/Zihpm/mhpmevent20.yaml +4 -7
  103. data/.data/spec/std/isa/csr/Zihpm/mhpmevent20h.yaml +4 -4
  104. data/.data/spec/std/isa/csr/Zihpm/mhpmevent21.yaml +4 -7
  105. data/.data/spec/std/isa/csr/Zihpm/mhpmevent21h.yaml +4 -4
  106. data/.data/spec/std/isa/csr/Zihpm/mhpmevent22.yaml +4 -7
  107. data/.data/spec/std/isa/csr/Zihpm/mhpmevent22h.yaml +4 -4
  108. data/.data/spec/std/isa/csr/Zihpm/mhpmevent23.yaml +4 -7
  109. data/.data/spec/std/isa/csr/Zihpm/mhpmevent23h.yaml +4 -4
  110. data/.data/spec/std/isa/csr/Zihpm/mhpmevent24.yaml +4 -7
  111. data/.data/spec/std/isa/csr/Zihpm/mhpmevent24h.yaml +4 -4
  112. data/.data/spec/std/isa/csr/Zihpm/mhpmevent25.yaml +4 -7
  113. data/.data/spec/std/isa/csr/Zihpm/mhpmevent25h.yaml +4 -4
  114. data/.data/spec/std/isa/csr/Zihpm/mhpmevent26.yaml +4 -7
  115. data/.data/spec/std/isa/csr/Zihpm/mhpmevent26h.yaml +4 -4
  116. data/.data/spec/std/isa/csr/Zihpm/mhpmevent27.yaml +4 -7
  117. data/.data/spec/std/isa/csr/Zihpm/mhpmevent27h.yaml +4 -4
  118. data/.data/spec/std/isa/csr/Zihpm/mhpmevent28.yaml +4 -7
  119. data/.data/spec/std/isa/csr/Zihpm/mhpmevent28h.yaml +4 -4
  120. data/.data/spec/std/isa/csr/Zihpm/mhpmevent29.yaml +4 -7
  121. data/.data/spec/std/isa/csr/Zihpm/mhpmevent29h.yaml +4 -4
  122. data/.data/spec/std/isa/csr/Zihpm/mhpmevent3.yaml +4 -7
  123. data/.data/spec/std/isa/csr/Zihpm/mhpmevent30.yaml +4 -7
  124. data/.data/spec/std/isa/csr/Zihpm/mhpmevent30h.yaml +4 -4
  125. data/.data/spec/std/isa/csr/Zihpm/mhpmevent31.yaml +4 -7
  126. data/.data/spec/std/isa/csr/Zihpm/mhpmevent31h.yaml +4 -4
  127. data/.data/spec/std/isa/csr/Zihpm/mhpmevent3h.yaml +4 -4
  128. data/.data/spec/std/isa/csr/Zihpm/mhpmevent4.yaml +4 -7
  129. data/.data/spec/std/isa/csr/Zihpm/mhpmevent4h.yaml +4 -4
  130. data/.data/spec/std/isa/csr/Zihpm/mhpmevent5.yaml +4 -7
  131. data/.data/spec/std/isa/csr/Zihpm/mhpmevent5h.yaml +4 -4
  132. data/.data/spec/std/isa/csr/Zihpm/mhpmevent6.yaml +4 -7
  133. data/.data/spec/std/isa/csr/Zihpm/mhpmevent6h.yaml +4 -4
  134. data/.data/spec/std/isa/csr/Zihpm/mhpmevent7.yaml +4 -7
  135. data/.data/spec/std/isa/csr/Zihpm/mhpmevent7h.yaml +4 -4
  136. data/.data/spec/std/isa/csr/Zihpm/mhpmevent8.yaml +4 -7
  137. data/.data/spec/std/isa/csr/Zihpm/mhpmevent8h.yaml +4 -4
  138. data/.data/spec/std/isa/csr/Zihpm/mhpmevent9.yaml +4 -7
  139. data/.data/spec/std/isa/csr/Zihpm/mhpmevent9h.yaml +4 -4
  140. data/.data/spec/std/isa/csr/Zihpm/mhpmeventN.layout +4 -7
  141. data/.data/spec/std/isa/csr/Zihpm/mhpmeventNh.layout +4 -4
  142. data/.data/spec/std/isa/csr/Zkr/seed.yaml +75 -0
  143. data/.data/spec/std/isa/csr/hcontext.yaml +4 -4
  144. data/.data/spec/std/isa/csr/mcontext.yaml +4 -4
  145. data/.data/spec/std/isa/csr/mcycle.yaml +2 -0
  146. data/.data/spec/std/isa/csr/mcycleh.yaml +2 -0
  147. data/.data/spec/std/isa/csr/medeleg.yaml +72 -36
  148. data/.data/spec/std/isa/csr/menvcfg.yaml +12 -1
  149. data/.data/spec/std/isa/csr/menvcfgh.yaml +12 -0
  150. data/.data/spec/std/isa/csr/mideleg.yaml +13 -36
  151. data/.data/spec/std/isa/csr/mie.yaml +3 -6
  152. data/.data/spec/std/isa/csr/minstret.yaml +2 -0
  153. data/.data/spec/std/isa/csr/minstreth.yaml +2 -0
  154. data/.data/spec/std/isa/csr/mip.yaml +3 -6
  155. data/.data/spec/std/isa/csr/misa.yaml +3 -23
  156. data/.data/spec/std/isa/csr/mseccfg.yaml +27 -1
  157. data/.data/spec/std/isa/csr/mstatus.yaml +8 -2
  158. data/.data/spec/std/isa/csr/scontext.yaml +8 -4
  159. data/.data/spec/std/isa/csr/tcontrol.yaml +6 -2
  160. data/.data/spec/std/isa/csr/tdata2.yaml +6 -2
  161. data/.data/spec/std/isa/csr/tdata3.yaml +6 -2
  162. data/.data/spec/std/isa/ext/Sdext.yaml +58 -2
  163. data/.data/spec/std/isa/ext/Sm.yaml +2 -2
  164. data/.data/spec/std/isa/ext/Smcdeleg.yaml +7 -0
  165. data/.data/spec/std/isa/ext/Smmpm.yaml +8 -0
  166. data/.data/spec/std/isa/ext/Smnpm.yaml +19 -0
  167. data/.data/spec/std/isa/ext/Smpmpdeleg.yaml +33 -0
  168. data/.data/spec/std/isa/ext/Ssccfg.yaml +7 -0
  169. data/.data/spec/std/isa/ext/Ssnpm.yaml +8 -0
  170. data/.data/spec/std/isa/ext/Sspmp.yaml +44 -0
  171. data/.data/spec/std/isa/ext/Sspmpen.yaml +30 -0
  172. data/.data/spec/std/isa/ext/Zvabd.yaml +5 -1
  173. data/.data/spec/std/isa/ext/Zvfbdota32f.yaml +23 -0
  174. data/.data/spec/std/isa/ext/Zvzip.yaml +24 -0
  175. data/.data/spec/std/isa/inst/C/c.bnez.yaml +2 -2
  176. data/.data/spec/std/isa/inst/H/hlv.b.yaml +1 -1
  177. data/.data/spec/std/isa/inst/H/hlv.bu.yaml +1 -1
  178. data/.data/spec/std/isa/inst/H/hlv.d.yaml +1 -1
  179. data/.data/spec/std/isa/inst/H/hlv.h.yaml +1 -1
  180. data/.data/spec/std/isa/inst/H/hlv.hu.yaml +1 -1
  181. data/.data/spec/std/isa/inst/H/hlv.w.yaml +1 -1
  182. data/.data/spec/std/isa/inst/H/hlv.wu.yaml +1 -1
  183. data/.data/spec/std/isa/inst/H/hlvx.hu.yaml +1 -1
  184. data/.data/spec/std/isa/inst/H/hlvx.wu.yaml +1 -1
  185. data/.data/spec/std/isa/inst/H/hsv.b.yaml +1 -1
  186. data/.data/spec/std/isa/inst/H/hsv.d.yaml +1 -1
  187. data/.data/spec/std/isa/inst/H/hsv.h.yaml +1 -1
  188. data/.data/spec/std/isa/inst/H/hsv.w.yaml +1 -1
  189. data/.data/spec/std/isa/inst/I/ld.yaml +9 -8
  190. data/.data/spec/std/isa/inst/I/sd.yaml +9 -8
  191. data/.data/spec/std/isa/inst/Q/fcvt.q.d.yaml +1 -1
  192. data/.data/spec/std/isa/inst/Q/flq.yaml +1 -1
  193. data/.data/spec/std/isa/inst/Sdext/dret.yaml +72 -6
  194. data/.data/spec/std/isa/inst/V/vfncvt.f.f.w.yaml +2 -2
  195. data/.data/spec/std/isa/inst/V/vfncvt.f.x.w.yaml +2 -2
  196. data/.data/spec/std/isa/inst/V/vfncvt.f.xu.w.yaml +2 -2
  197. data/.data/spec/std/isa/inst/V/vfncvt.rod.f.f.w.yaml +2 -2
  198. data/.data/spec/std/isa/inst/V/vfncvt.rtz.x.f.w.yaml +2 -2
  199. data/.data/spec/std/isa/inst/V/vfncvt.rtz.xu.f.w.yaml +2 -2
  200. data/.data/spec/std/isa/inst/V/vfncvt.x.f.w.yaml +2 -2
  201. data/.data/spec/std/isa/inst/V/vfncvt.xu.f.w.yaml +2 -2
  202. data/.data/spec/std/isa/inst/V/vnclip.wi.yaml +2 -2
  203. data/.data/spec/std/isa/inst/V/vnclip.wv.yaml +2 -2
  204. data/.data/spec/std/isa/inst/V/vnclip.wx.yaml +2 -2
  205. data/.data/spec/std/isa/inst/V/vnclipu.wi.yaml +2 -2
  206. data/.data/spec/std/isa/inst/V/vnclipu.wv.yaml +2 -2
  207. data/.data/spec/std/isa/inst/V/vnclipu.wx.yaml +2 -2
  208. data/.data/spec/std/isa/inst/V/vnsra.wi.yaml +2 -2
  209. data/.data/spec/std/isa/inst/V/vnsra.wv.yaml +2 -2
  210. data/.data/spec/std/isa/inst/V/vnsra.wx.yaml +2 -2
  211. data/.data/spec/std/isa/inst/V/vnsrl.wi.yaml +2 -2
  212. data/.data/spec/std/isa/inst/V/vnsrl.wv.yaml +2 -2
  213. data/.data/spec/std/isa/inst/V/vnsrl.wx.yaml +2 -2
  214. data/.data/spec/std/isa/inst/Zfh/fcvt.h.s.yaml +28 -20
  215. data/.data/spec/std/isa/inst/Zfh/fcvt.s.h.yaml +35 -20
  216. data/.data/spec/std/isa/inst/Zvabd/vabd.vv.yaml +3 -3
  217. data/.data/spec/std/isa/inst/Zvabd/vabd.vx.yaml +69 -0
  218. data/.data/spec/std/isa/inst/Zvabd/vabdu.vv.yaml +3 -3
  219. data/.data/spec/std/isa/inst/Zvabd/{vabs.v.yaml → vabdu.vx.yaml} +17 -11
  220. data/.data/spec/std/isa/inst/Zvabd/vwabda.vv.yaml +1 -1
  221. data/.data/spec/std/isa/inst/Zvabd/vwabda.vx.yaml +73 -0
  222. data/.data/spec/std/isa/inst/Zvabd/vwabdau.vv.yaml +1 -1
  223. data/.data/spec/std/isa/inst/Zvabd/vwabdau.vx.yaml +74 -0
  224. data/.data/spec/std/isa/inst/Zvfbdota32f/vfbdota.vv.yaml +68 -0
  225. data/.data/spec/std/isa/inst/Zvzip/vpaire.vv.yaml +36 -0
  226. data/.data/spec/std/isa/inst/Zvzip/vpairo.vv.yaml +37 -0
  227. data/.data/spec/std/isa/inst/Zvzip/vunzipe.v.yaml +33 -0
  228. data/.data/spec/std/isa/inst/Zvzip/vunzipo.v.yaml +33 -0
  229. data/.data/spec/std/isa/inst/Zvzip/vzip.vv.yaml +37 -0
  230. data/.data/spec/std/isa/isa/builtin_functions.idl +51 -0
  231. data/.data/spec/std/isa/isa/globals.isa +117 -5
  232. data/.data/spec/std/isa/param/HCONTEXT_IMPLEMENTED.yaml +29 -0
  233. data/.data/spec/std/isa/param/{MCONTEXT_AVAILABLE.yaml → MCONTEXT_IMPLEMENTED.yaml} +3 -3
  234. data/.data/spec/std/isa/param/MEDELEG_DELEGATABLE.yaml +121 -0
  235. data/.data/spec/std/isa/param/MEI_INTR_IMPL.yaml +1 -1
  236. data/.data/spec/std/isa/param/MIDELEG_DELEGATABLE.yaml +177 -0
  237. data/.data/spec/std/isa/param/MSI_INTR_IMPL.yaml +1 -1
  238. data/.data/spec/std/isa/param/MTI_INTR_IMPL.yaml +1 -1
  239. data/.data/spec/std/isa/param/SCONTEXT_IMPLEMENTED.yaml +18 -0
  240. data/.data/spec/std/isa/param/SDTRIG_BREAKPOINT_REENTRANCY.yaml +45 -0
  241. data/.data/spec/std/isa/param/SDTRIG_ETRIGGER_SUPPORTED_EXCEPTIONS.yaml +37 -0
  242. data/.data/spec/std/isa/param/SDTRIG_ETRIGGER_SUPPORTED_TRIGGERS.yaml +25 -0
  243. data/.data/spec/std/isa/param/SDTRIG_ICOUNT_COUNT_HARDWIRED_1.yaml +23 -0
  244. data/.data/spec/std/isa/param/SDTRIG_ICOUNT_SELF_WRITE_SETS_PENDING.yaml +23 -0
  245. data/.data/spec/std/isa/param/SDTRIG_ICOUNT_SUPPORTED_TRIGGERS.yaml +25 -0
  246. data/.data/spec/std/isa/param/SDTRIG_ITRIGGER_SUPPORTED_INTERRUPTS.yaml +37 -0
  247. data/.data/spec/std/isa/param/SDTRIG_ITRIGGER_SUPPORTED_TRIGGERS.yaml +25 -0
  248. data/.data/spec/std/isa/param/SDTRIG_MAX_CHAIN_LENGTH.yaml +33 -0
  249. data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_EXECUTE_WRITABLE.yaml +22 -0
  250. data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_LOAD_WRITABLE.yaml +22 -0
  251. data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_MASKMAX6.yaml +26 -0
  252. data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_MATCH_LEGAL_VALUES.yaml +41 -0
  253. data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_SELECT_WRITABLE.yaml +22 -0
  254. data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_SIZE_LEGAL_VALUES.yaml +38 -0
  255. data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_STORE_WRITABLE.yaml +22 -0
  256. data/.data/spec/std/isa/param/SDTRIG_MCONTROL6_SUPPORTED_TRIGGERS.yaml +25 -0
  257. data/.data/spec/std/isa/param/SDTRIG_M_WRITABLE.yaml +17 -0
  258. data/.data/spec/std/isa/param/SDTRIG_NUM_TRIGGERS.yaml +22 -0
  259. data/.data/spec/std/isa/param/SDTRIG_S_WRITABLE.yaml +19 -0
  260. data/.data/spec/std/isa/param/SDTRIG_TEXTRA_MHSELECT_MCONTEXT_MATCH.yaml +24 -0
  261. data/.data/spec/std/isa/param/SDTRIG_TEXTRA_MHSELECT_VMID_MATCH.yaml +23 -0
  262. data/.data/spec/std/isa/param/SDTRIG_TEXTRA_MHVALUE_LEN.yaml +26 -0
  263. data/.data/spec/std/isa/param/SDTRIG_TEXTRA_SSELECT_ASID_MATCH.yaml +23 -0
  264. data/.data/spec/std/isa/param/SDTRIG_TEXTRA_SSELECT_SCONTEXT_MATCH.yaml +26 -0
  265. data/.data/spec/std/isa/param/SDTRIG_TEXTRA_SVALUE_LEN.yaml +26 -0
  266. data/.data/spec/std/isa/param/SDTRIG_U_WRITABLE.yaml +19 -0
  267. data/.data/spec/std/isa/param/SDTRIG_VS_WRITABLE.yaml +19 -0
  268. data/.data/spec/std/isa/param/SDTRIG_VU_WRITABLE.yaml +19 -0
  269. data/.data/spec/std/isa/param/SEI_INTR_IMPL.yaml +1 -1
  270. data/.data/spec/std/isa/param/SSEED_READ_ONLY_ZERO.yaml +28 -0
  271. data/.data/spec/std/isa/param/SSI_INTR_IMPL.yaml +1 -1
  272. data/.data/spec/std/isa/param/STI_INTR_IMPL.yaml +1 -1
  273. data/.data/spec/std/isa/param/TCONTROL_IMPLEMENTED.yaml +16 -0
  274. data/.data/spec/std/isa/param/TDATA2_IMPLEMENTED.yaml +26 -0
  275. data/.data/spec/std/isa/param/TDATA3_IMPLEMENTED.yaml +29 -0
  276. data/.data/spec/std/isa/param/USEED_READ_ONLY_ZERO.yaml +28 -0
  277. data/.data/spec/std/isa/profile/RVA23p1S64.yaml +37 -0
  278. data/.data/spec/std/isa/profile/RVB23p1S64.yaml +39 -0
  279. data/.data/spec/std/isa/profile_family/RVA.yaml +3 -1
  280. data/.data/spec/std/isa/profile_family/RVB.yaml +3 -1
  281. data/.data/spec/std/isa/profile_release/RVA23p1.yaml +30 -0
  282. data/.data/spec/std/isa/profile_release/RVB23p1.yaml +30 -0
  283. data/lib/udb/version.rb +1 -1
  284. metadata +65 -8
  285. data/.data/spec/std/isa/param/HCONTEXT_AVAILABLE.yaml +0 -19
  286. data/.data/spec/std/isa/param/VSEI_INTR_IMPL.yaml +0 -28
  287. data/.data/spec/std/isa/param/VSSI_INTR_IMPL.yaml +0 -28
  288. data/.data/spec/std/isa/param/VSTI_INTR_IMPL.yaml +0 -33
@@ -0,0 +1,840 @@
1
+ # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
2
+
3
+ # WARNING: This file is auto-generated from spec/std/isa/csr/Smcdeleg/scountinhibit.layout
4
+
5
+ # SPDX-License-Identifier: BSD-3-Clause-Clear
6
+
7
+ # yaml-language-server: $schema=../../../../schemas/csr_schema.json
8
+
9
+ $schema: csr_schema.json#
10
+ kind: csr
11
+ name: scountinhibit
12
+ long_name: Supervisor Counter Inhibit
13
+ address: 0x120
14
+ writable: true
15
+ priv_mode: S
16
+ length: 32
17
+ description: |
18
+ `scountinhibit` is a masked alias of `mcountinhibit`. For counters delegated to S-mode,
19
+ the associated `mcountinhibit` bits can be accessed via `scountinhibit`. For counters
20
+ not delegated to S-mode, the associated bits in `scountinhibit` are read-only zero.
21
+
22
+ A counter _i_ is delegated to S-mode when `mcounteren`[_i_]=1 and `menvcfg.CDE`=1.
23
+
24
+ When `menvcfg.CDE`=0, attempts to access `scountinhibit` raise an `Illegal Instruction`
25
+ exception. When Supervisor Counter Delegation is enabled, attempts to access
26
+ `scountinhibit` from VS-mode or VU-mode raise a `Virtual Instruction` exception.
27
+ definedBy:
28
+ allOf:
29
+ - extension:
30
+ name: Ssccfg
31
+ - param:
32
+ name: MCOUNTINHIBIT_IMPLEMENTED
33
+ equal: true
34
+ sw_read(): |
35
+ if (CSR[menvcfg].CDE == 1'b0) {
36
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
37
+ }
38
+ if (virtual_mode?()) {
39
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
40
+ }
41
+ return $bits(CSR[mcountinhibit]) & $bits(CSR[mcounteren]);
42
+ fields:
43
+ CY:
44
+ location: 0
45
+ alias: mcountinhibit.CY
46
+ description: |
47
+ Alias of `mcountinhibit.CY` when `mcycle` is delegated to S-mode (`mcounteren.CY`=1);
48
+ otherwise read-only zero.
49
+ type(): |
50
+ return COUNTINHIBIT_EN[0] ? CsrFieldType::RWR : CsrFieldType::RO;
51
+ reset_value(): |
52
+ return COUNTINHIBIT_EN[0] ? UNDEFINED_LEGAL : 0;
53
+ sw_write(csr_value): |
54
+ if (CSR[menvcfg].CDE == 1'b0) {
55
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
56
+ }
57
+ if (virtual_mode?()) {
58
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
59
+ }
60
+ if (CSR[mcounteren].CY == 1'b1) {
61
+ CSR[mcountinhibit].CY = csr_value.CY;
62
+ return csr_value.CY;
63
+ }
64
+ return 1'b0;
65
+ IR:
66
+ location: 2
67
+ alias: mcountinhibit.IR
68
+ description: |
69
+ Alias of `mcountinhibit.IR` when `minstret` is delegated to S-mode (`mcounteren.IR`=1);
70
+ otherwise read-only zero.
71
+ type(): |
72
+ return COUNTINHIBIT_EN[2] ? CsrFieldType::RWR : CsrFieldType::RO;
73
+ reset_value(): |
74
+ return COUNTINHIBIT_EN[2] ? UNDEFINED_LEGAL : 0;
75
+ sw_write(csr_value): |
76
+ if (CSR[menvcfg].CDE == 1'b0) {
77
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
78
+ }
79
+ if (virtual_mode?()) {
80
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
81
+ }
82
+ if (CSR[mcounteren].IR == 1'b1) {
83
+ CSR[mcountinhibit].IR = csr_value.IR;
84
+ return csr_value.IR;
85
+ }
86
+ return 1'b0;
87
+ HPM3:
88
+ location: 3
89
+ alias: mcountinhibit.HPM3
90
+ description: |
91
+ [when="COUNTINHIBIT_EN[3] == true"]
92
+ Alias of `mcountinhibit.HPM3` when `mhpmcounter3` is delegated to S-mode
93
+ (`mcounteren.HPM3`=1); otherwise read-only zero.
94
+
95
+ [when="COUNTINHIBIT_EN[3] == false"]
96
+ Since `mcountinhibit.HPM3` is not writable, this field is read-only zero.
97
+ type(): |
98
+ return COUNTINHIBIT_EN[3] ? CsrFieldType::RWR : CsrFieldType::RO;
99
+ reset_value(): |
100
+ return COUNTINHIBIT_EN[3] ? UNDEFINED_LEGAL : 0;
101
+ sw_write(csr_value): |
102
+ if (CSR[menvcfg].CDE == 1'b0) {
103
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
104
+ }
105
+ if (virtual_mode?()) {
106
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
107
+ }
108
+ if (CSR[mcounteren].HPM3 == 1'b1) {
109
+ CSR[mcountinhibit].HPM3 = csr_value.HPM3;
110
+ return csr_value.HPM3;
111
+ }
112
+ return 1'b0;
113
+ HPM4:
114
+ location: 4
115
+ alias: mcountinhibit.HPM4
116
+ description: |
117
+ [when="COUNTINHIBIT_EN[4] == true"]
118
+ Alias of `mcountinhibit.HPM4` when `mhpmcounter4` is delegated to S-mode
119
+ (`mcounteren.HPM4`=1); otherwise read-only zero.
120
+
121
+ [when="COUNTINHIBIT_EN[4] == false"]
122
+ Since `mcountinhibit.HPM4` is not writable, this field is read-only zero.
123
+ type(): |
124
+ return COUNTINHIBIT_EN[4] ? CsrFieldType::RWR : CsrFieldType::RO;
125
+ reset_value(): |
126
+ return COUNTINHIBIT_EN[4] ? UNDEFINED_LEGAL : 0;
127
+ sw_write(csr_value): |
128
+ if (CSR[menvcfg].CDE == 1'b0) {
129
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
130
+ }
131
+ if (virtual_mode?()) {
132
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
133
+ }
134
+ if (CSR[mcounteren].HPM4 == 1'b1) {
135
+ CSR[mcountinhibit].HPM4 = csr_value.HPM4;
136
+ return csr_value.HPM4;
137
+ }
138
+ return 1'b0;
139
+ HPM5:
140
+ location: 5
141
+ alias: mcountinhibit.HPM5
142
+ description: |
143
+ [when="COUNTINHIBIT_EN[5] == true"]
144
+ Alias of `mcountinhibit.HPM5` when `mhpmcounter5` is delegated to S-mode
145
+ (`mcounteren.HPM5`=1); otherwise read-only zero.
146
+
147
+ [when="COUNTINHIBIT_EN[5] == false"]
148
+ Since `mcountinhibit.HPM5` is not writable, this field is read-only zero.
149
+ type(): |
150
+ return COUNTINHIBIT_EN[5] ? CsrFieldType::RWR : CsrFieldType::RO;
151
+ reset_value(): |
152
+ return COUNTINHIBIT_EN[5] ? UNDEFINED_LEGAL : 0;
153
+ sw_write(csr_value): |
154
+ if (CSR[menvcfg].CDE == 1'b0) {
155
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
156
+ }
157
+ if (virtual_mode?()) {
158
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
159
+ }
160
+ if (CSR[mcounteren].HPM5 == 1'b1) {
161
+ CSR[mcountinhibit].HPM5 = csr_value.HPM5;
162
+ return csr_value.HPM5;
163
+ }
164
+ return 1'b0;
165
+ HPM6:
166
+ location: 6
167
+ alias: mcountinhibit.HPM6
168
+ description: |
169
+ [when="COUNTINHIBIT_EN[6] == true"]
170
+ Alias of `mcountinhibit.HPM6` when `mhpmcounter6` is delegated to S-mode
171
+ (`mcounteren.HPM6`=1); otherwise read-only zero.
172
+
173
+ [when="COUNTINHIBIT_EN[6] == false"]
174
+ Since `mcountinhibit.HPM6` is not writable, this field is read-only zero.
175
+ type(): |
176
+ return COUNTINHIBIT_EN[6] ? CsrFieldType::RWR : CsrFieldType::RO;
177
+ reset_value(): |
178
+ return COUNTINHIBIT_EN[6] ? UNDEFINED_LEGAL : 0;
179
+ sw_write(csr_value): |
180
+ if (CSR[menvcfg].CDE == 1'b0) {
181
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
182
+ }
183
+ if (virtual_mode?()) {
184
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
185
+ }
186
+ if (CSR[mcounteren].HPM6 == 1'b1) {
187
+ CSR[mcountinhibit].HPM6 = csr_value.HPM6;
188
+ return csr_value.HPM6;
189
+ }
190
+ return 1'b0;
191
+ HPM7:
192
+ location: 7
193
+ alias: mcountinhibit.HPM7
194
+ description: |
195
+ [when="COUNTINHIBIT_EN[7] == true"]
196
+ Alias of `mcountinhibit.HPM7` when `mhpmcounter7` is delegated to S-mode
197
+ (`mcounteren.HPM7`=1); otherwise read-only zero.
198
+
199
+ [when="COUNTINHIBIT_EN[7] == false"]
200
+ Since `mcountinhibit.HPM7` is not writable, this field is read-only zero.
201
+ type(): |
202
+ return COUNTINHIBIT_EN[7] ? CsrFieldType::RWR : CsrFieldType::RO;
203
+ reset_value(): |
204
+ return COUNTINHIBIT_EN[7] ? UNDEFINED_LEGAL : 0;
205
+ sw_write(csr_value): |
206
+ if (CSR[menvcfg].CDE == 1'b0) {
207
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
208
+ }
209
+ if (virtual_mode?()) {
210
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
211
+ }
212
+ if (CSR[mcounteren].HPM7 == 1'b1) {
213
+ CSR[mcountinhibit].HPM7 = csr_value.HPM7;
214
+ return csr_value.HPM7;
215
+ }
216
+ return 1'b0;
217
+ HPM8:
218
+ location: 8
219
+ alias: mcountinhibit.HPM8
220
+ description: |
221
+ [when="COUNTINHIBIT_EN[8] == true"]
222
+ Alias of `mcountinhibit.HPM8` when `mhpmcounter8` is delegated to S-mode
223
+ (`mcounteren.HPM8`=1); otherwise read-only zero.
224
+
225
+ [when="COUNTINHIBIT_EN[8] == false"]
226
+ Since `mcountinhibit.HPM8` is not writable, this field is read-only zero.
227
+ type(): |
228
+ return COUNTINHIBIT_EN[8] ? CsrFieldType::RWR : CsrFieldType::RO;
229
+ reset_value(): |
230
+ return COUNTINHIBIT_EN[8] ? UNDEFINED_LEGAL : 0;
231
+ sw_write(csr_value): |
232
+ if (CSR[menvcfg].CDE == 1'b0) {
233
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
234
+ }
235
+ if (virtual_mode?()) {
236
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
237
+ }
238
+ if (CSR[mcounteren].HPM8 == 1'b1) {
239
+ CSR[mcountinhibit].HPM8 = csr_value.HPM8;
240
+ return csr_value.HPM8;
241
+ }
242
+ return 1'b0;
243
+ HPM9:
244
+ location: 9
245
+ alias: mcountinhibit.HPM9
246
+ description: |
247
+ [when="COUNTINHIBIT_EN[9] == true"]
248
+ Alias of `mcountinhibit.HPM9` when `mhpmcounter9` is delegated to S-mode
249
+ (`mcounteren.HPM9`=1); otherwise read-only zero.
250
+
251
+ [when="COUNTINHIBIT_EN[9] == false"]
252
+ Since `mcountinhibit.HPM9` is not writable, this field is read-only zero.
253
+ type(): |
254
+ return COUNTINHIBIT_EN[9] ? CsrFieldType::RWR : CsrFieldType::RO;
255
+ reset_value(): |
256
+ return COUNTINHIBIT_EN[9] ? UNDEFINED_LEGAL : 0;
257
+ sw_write(csr_value): |
258
+ if (CSR[menvcfg].CDE == 1'b0) {
259
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
260
+ }
261
+ if (virtual_mode?()) {
262
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
263
+ }
264
+ if (CSR[mcounteren].HPM9 == 1'b1) {
265
+ CSR[mcountinhibit].HPM9 = csr_value.HPM9;
266
+ return csr_value.HPM9;
267
+ }
268
+ return 1'b0;
269
+ HPM10:
270
+ location: 10
271
+ alias: mcountinhibit.HPM10
272
+ description: |
273
+ [when="COUNTINHIBIT_EN[10] == true"]
274
+ Alias of `mcountinhibit.HPM10` when `mhpmcounter10` is delegated to S-mode
275
+ (`mcounteren.HPM10`=1); otherwise read-only zero.
276
+
277
+ [when="COUNTINHIBIT_EN[10] == false"]
278
+ Since `mcountinhibit.HPM10` is not writable, this field is read-only zero.
279
+ type(): |
280
+ return COUNTINHIBIT_EN[10] ? CsrFieldType::RWR : CsrFieldType::RO;
281
+ reset_value(): |
282
+ return COUNTINHIBIT_EN[10] ? UNDEFINED_LEGAL : 0;
283
+ sw_write(csr_value): |
284
+ if (CSR[menvcfg].CDE == 1'b0) {
285
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
286
+ }
287
+ if (virtual_mode?()) {
288
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
289
+ }
290
+ if (CSR[mcounteren].HPM10 == 1'b1) {
291
+ CSR[mcountinhibit].HPM10 = csr_value.HPM10;
292
+ return csr_value.HPM10;
293
+ }
294
+ return 1'b0;
295
+ HPM11:
296
+ location: 11
297
+ alias: mcountinhibit.HPM11
298
+ description: |
299
+ [when="COUNTINHIBIT_EN[11] == true"]
300
+ Alias of `mcountinhibit.HPM11` when `mhpmcounter11` is delegated to S-mode
301
+ (`mcounteren.HPM11`=1); otherwise read-only zero.
302
+
303
+ [when="COUNTINHIBIT_EN[11] == false"]
304
+ Since `mcountinhibit.HPM11` is not writable, this field is read-only zero.
305
+ type(): |
306
+ return COUNTINHIBIT_EN[11] ? CsrFieldType::RWR : CsrFieldType::RO;
307
+ reset_value(): |
308
+ return COUNTINHIBIT_EN[11] ? UNDEFINED_LEGAL : 0;
309
+ sw_write(csr_value): |
310
+ if (CSR[menvcfg].CDE == 1'b0) {
311
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
312
+ }
313
+ if (virtual_mode?()) {
314
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
315
+ }
316
+ if (CSR[mcounteren].HPM11 == 1'b1) {
317
+ CSR[mcountinhibit].HPM11 = csr_value.HPM11;
318
+ return csr_value.HPM11;
319
+ }
320
+ return 1'b0;
321
+ HPM12:
322
+ location: 12
323
+ alias: mcountinhibit.HPM12
324
+ description: |
325
+ [when="COUNTINHIBIT_EN[12] == true"]
326
+ Alias of `mcountinhibit.HPM12` when `mhpmcounter12` is delegated to S-mode
327
+ (`mcounteren.HPM12`=1); otherwise read-only zero.
328
+
329
+ [when="COUNTINHIBIT_EN[12] == false"]
330
+ Since `mcountinhibit.HPM12` is not writable, this field is read-only zero.
331
+ type(): |
332
+ return COUNTINHIBIT_EN[12] ? CsrFieldType::RWR : CsrFieldType::RO;
333
+ reset_value(): |
334
+ return COUNTINHIBIT_EN[12] ? UNDEFINED_LEGAL : 0;
335
+ sw_write(csr_value): |
336
+ if (CSR[menvcfg].CDE == 1'b0) {
337
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
338
+ }
339
+ if (virtual_mode?()) {
340
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
341
+ }
342
+ if (CSR[mcounteren].HPM12 == 1'b1) {
343
+ CSR[mcountinhibit].HPM12 = csr_value.HPM12;
344
+ return csr_value.HPM12;
345
+ }
346
+ return 1'b0;
347
+ HPM13:
348
+ location: 13
349
+ alias: mcountinhibit.HPM13
350
+ description: |
351
+ [when="COUNTINHIBIT_EN[13] == true"]
352
+ Alias of `mcountinhibit.HPM13` when `mhpmcounter13` is delegated to S-mode
353
+ (`mcounteren.HPM13`=1); otherwise read-only zero.
354
+
355
+ [when="COUNTINHIBIT_EN[13] == false"]
356
+ Since `mcountinhibit.HPM13` is not writable, this field is read-only zero.
357
+ type(): |
358
+ return COUNTINHIBIT_EN[13] ? CsrFieldType::RWR : CsrFieldType::RO;
359
+ reset_value(): |
360
+ return COUNTINHIBIT_EN[13] ? UNDEFINED_LEGAL : 0;
361
+ sw_write(csr_value): |
362
+ if (CSR[menvcfg].CDE == 1'b0) {
363
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
364
+ }
365
+ if (virtual_mode?()) {
366
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
367
+ }
368
+ if (CSR[mcounteren].HPM13 == 1'b1) {
369
+ CSR[mcountinhibit].HPM13 = csr_value.HPM13;
370
+ return csr_value.HPM13;
371
+ }
372
+ return 1'b0;
373
+ HPM14:
374
+ location: 14
375
+ alias: mcountinhibit.HPM14
376
+ description: |
377
+ [when="COUNTINHIBIT_EN[14] == true"]
378
+ Alias of `mcountinhibit.HPM14` when `mhpmcounter14` is delegated to S-mode
379
+ (`mcounteren.HPM14`=1); otherwise read-only zero.
380
+
381
+ [when="COUNTINHIBIT_EN[14] == false"]
382
+ Since `mcountinhibit.HPM14` is not writable, this field is read-only zero.
383
+ type(): |
384
+ return COUNTINHIBIT_EN[14] ? CsrFieldType::RWR : CsrFieldType::RO;
385
+ reset_value(): |
386
+ return COUNTINHIBIT_EN[14] ? UNDEFINED_LEGAL : 0;
387
+ sw_write(csr_value): |
388
+ if (CSR[menvcfg].CDE == 1'b0) {
389
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
390
+ }
391
+ if (virtual_mode?()) {
392
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
393
+ }
394
+ if (CSR[mcounteren].HPM14 == 1'b1) {
395
+ CSR[mcountinhibit].HPM14 = csr_value.HPM14;
396
+ return csr_value.HPM14;
397
+ }
398
+ return 1'b0;
399
+ HPM15:
400
+ location: 15
401
+ alias: mcountinhibit.HPM15
402
+ description: |
403
+ [when="COUNTINHIBIT_EN[15] == true"]
404
+ Alias of `mcountinhibit.HPM15` when `mhpmcounter15` is delegated to S-mode
405
+ (`mcounteren.HPM15`=1); otherwise read-only zero.
406
+
407
+ [when="COUNTINHIBIT_EN[15] == false"]
408
+ Since `mcountinhibit.HPM15` is not writable, this field is read-only zero.
409
+ type(): |
410
+ return COUNTINHIBIT_EN[15] ? CsrFieldType::RWR : CsrFieldType::RO;
411
+ reset_value(): |
412
+ return COUNTINHIBIT_EN[15] ? UNDEFINED_LEGAL : 0;
413
+ sw_write(csr_value): |
414
+ if (CSR[menvcfg].CDE == 1'b0) {
415
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
416
+ }
417
+ if (virtual_mode?()) {
418
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
419
+ }
420
+ if (CSR[mcounteren].HPM15 == 1'b1) {
421
+ CSR[mcountinhibit].HPM15 = csr_value.HPM15;
422
+ return csr_value.HPM15;
423
+ }
424
+ return 1'b0;
425
+ HPM16:
426
+ location: 16
427
+ alias: mcountinhibit.HPM16
428
+ description: |
429
+ [when="COUNTINHIBIT_EN[16] == true"]
430
+ Alias of `mcountinhibit.HPM16` when `mhpmcounter16` is delegated to S-mode
431
+ (`mcounteren.HPM16`=1); otherwise read-only zero.
432
+
433
+ [when="COUNTINHIBIT_EN[16] == false"]
434
+ Since `mcountinhibit.HPM16` is not writable, this field is read-only zero.
435
+ type(): |
436
+ return COUNTINHIBIT_EN[16] ? CsrFieldType::RWR : CsrFieldType::RO;
437
+ reset_value(): |
438
+ return COUNTINHIBIT_EN[16] ? UNDEFINED_LEGAL : 0;
439
+ sw_write(csr_value): |
440
+ if (CSR[menvcfg].CDE == 1'b0) {
441
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
442
+ }
443
+ if (virtual_mode?()) {
444
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
445
+ }
446
+ if (CSR[mcounteren].HPM16 == 1'b1) {
447
+ CSR[mcountinhibit].HPM16 = csr_value.HPM16;
448
+ return csr_value.HPM16;
449
+ }
450
+ return 1'b0;
451
+ HPM17:
452
+ location: 17
453
+ alias: mcountinhibit.HPM17
454
+ description: |
455
+ [when="COUNTINHIBIT_EN[17] == true"]
456
+ Alias of `mcountinhibit.HPM17` when `mhpmcounter17` is delegated to S-mode
457
+ (`mcounteren.HPM17`=1); otherwise read-only zero.
458
+
459
+ [when="COUNTINHIBIT_EN[17] == false"]
460
+ Since `mcountinhibit.HPM17` is not writable, this field is read-only zero.
461
+ type(): |
462
+ return COUNTINHIBIT_EN[17] ? CsrFieldType::RWR : CsrFieldType::RO;
463
+ reset_value(): |
464
+ return COUNTINHIBIT_EN[17] ? UNDEFINED_LEGAL : 0;
465
+ sw_write(csr_value): |
466
+ if (CSR[menvcfg].CDE == 1'b0) {
467
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
468
+ }
469
+ if (virtual_mode?()) {
470
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
471
+ }
472
+ if (CSR[mcounteren].HPM17 == 1'b1) {
473
+ CSR[mcountinhibit].HPM17 = csr_value.HPM17;
474
+ return csr_value.HPM17;
475
+ }
476
+ return 1'b0;
477
+ HPM18:
478
+ location: 18
479
+ alias: mcountinhibit.HPM18
480
+ description: |
481
+ [when="COUNTINHIBIT_EN[18] == true"]
482
+ Alias of `mcountinhibit.HPM18` when `mhpmcounter18` is delegated to S-mode
483
+ (`mcounteren.HPM18`=1); otherwise read-only zero.
484
+
485
+ [when="COUNTINHIBIT_EN[18] == false"]
486
+ Since `mcountinhibit.HPM18` is not writable, this field is read-only zero.
487
+ type(): |
488
+ return COUNTINHIBIT_EN[18] ? CsrFieldType::RWR : CsrFieldType::RO;
489
+ reset_value(): |
490
+ return COUNTINHIBIT_EN[18] ? UNDEFINED_LEGAL : 0;
491
+ sw_write(csr_value): |
492
+ if (CSR[menvcfg].CDE == 1'b0) {
493
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
494
+ }
495
+ if (virtual_mode?()) {
496
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
497
+ }
498
+ if (CSR[mcounteren].HPM18 == 1'b1) {
499
+ CSR[mcountinhibit].HPM18 = csr_value.HPM18;
500
+ return csr_value.HPM18;
501
+ }
502
+ return 1'b0;
503
+ HPM19:
504
+ location: 19
505
+ alias: mcountinhibit.HPM19
506
+ description: |
507
+ [when="COUNTINHIBIT_EN[19] == true"]
508
+ Alias of `mcountinhibit.HPM19` when `mhpmcounter19` is delegated to S-mode
509
+ (`mcounteren.HPM19`=1); otherwise read-only zero.
510
+
511
+ [when="COUNTINHIBIT_EN[19] == false"]
512
+ Since `mcountinhibit.HPM19` is not writable, this field is read-only zero.
513
+ type(): |
514
+ return COUNTINHIBIT_EN[19] ? CsrFieldType::RWR : CsrFieldType::RO;
515
+ reset_value(): |
516
+ return COUNTINHIBIT_EN[19] ? UNDEFINED_LEGAL : 0;
517
+ sw_write(csr_value): |
518
+ if (CSR[menvcfg].CDE == 1'b0) {
519
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
520
+ }
521
+ if (virtual_mode?()) {
522
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
523
+ }
524
+ if (CSR[mcounteren].HPM19 == 1'b1) {
525
+ CSR[mcountinhibit].HPM19 = csr_value.HPM19;
526
+ return csr_value.HPM19;
527
+ }
528
+ return 1'b0;
529
+ HPM20:
530
+ location: 20
531
+ alias: mcountinhibit.HPM20
532
+ description: |
533
+ [when="COUNTINHIBIT_EN[20] == true"]
534
+ Alias of `mcountinhibit.HPM20` when `mhpmcounter20` is delegated to S-mode
535
+ (`mcounteren.HPM20`=1); otherwise read-only zero.
536
+
537
+ [when="COUNTINHIBIT_EN[20] == false"]
538
+ Since `mcountinhibit.HPM20` is not writable, this field is read-only zero.
539
+ type(): |
540
+ return COUNTINHIBIT_EN[20] ? CsrFieldType::RWR : CsrFieldType::RO;
541
+ reset_value(): |
542
+ return COUNTINHIBIT_EN[20] ? UNDEFINED_LEGAL : 0;
543
+ sw_write(csr_value): |
544
+ if (CSR[menvcfg].CDE == 1'b0) {
545
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
546
+ }
547
+ if (virtual_mode?()) {
548
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
549
+ }
550
+ if (CSR[mcounteren].HPM20 == 1'b1) {
551
+ CSR[mcountinhibit].HPM20 = csr_value.HPM20;
552
+ return csr_value.HPM20;
553
+ }
554
+ return 1'b0;
555
+ HPM21:
556
+ location: 21
557
+ alias: mcountinhibit.HPM21
558
+ description: |
559
+ [when="COUNTINHIBIT_EN[21] == true"]
560
+ Alias of `mcountinhibit.HPM21` when `mhpmcounter21` is delegated to S-mode
561
+ (`mcounteren.HPM21`=1); otherwise read-only zero.
562
+
563
+ [when="COUNTINHIBIT_EN[21] == false"]
564
+ Since `mcountinhibit.HPM21` is not writable, this field is read-only zero.
565
+ type(): |
566
+ return COUNTINHIBIT_EN[21] ? CsrFieldType::RWR : CsrFieldType::RO;
567
+ reset_value(): |
568
+ return COUNTINHIBIT_EN[21] ? UNDEFINED_LEGAL : 0;
569
+ sw_write(csr_value): |
570
+ if (CSR[menvcfg].CDE == 1'b0) {
571
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
572
+ }
573
+ if (virtual_mode?()) {
574
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
575
+ }
576
+ if (CSR[mcounteren].HPM21 == 1'b1) {
577
+ CSR[mcountinhibit].HPM21 = csr_value.HPM21;
578
+ return csr_value.HPM21;
579
+ }
580
+ return 1'b0;
581
+ HPM22:
582
+ location: 22
583
+ alias: mcountinhibit.HPM22
584
+ description: |
585
+ [when="COUNTINHIBIT_EN[22] == true"]
586
+ Alias of `mcountinhibit.HPM22` when `mhpmcounter22` is delegated to S-mode
587
+ (`mcounteren.HPM22`=1); otherwise read-only zero.
588
+
589
+ [when="COUNTINHIBIT_EN[22] == false"]
590
+ Since `mcountinhibit.HPM22` is not writable, this field is read-only zero.
591
+ type(): |
592
+ return COUNTINHIBIT_EN[22] ? CsrFieldType::RWR : CsrFieldType::RO;
593
+ reset_value(): |
594
+ return COUNTINHIBIT_EN[22] ? UNDEFINED_LEGAL : 0;
595
+ sw_write(csr_value): |
596
+ if (CSR[menvcfg].CDE == 1'b0) {
597
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
598
+ }
599
+ if (virtual_mode?()) {
600
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
601
+ }
602
+ if (CSR[mcounteren].HPM22 == 1'b1) {
603
+ CSR[mcountinhibit].HPM22 = csr_value.HPM22;
604
+ return csr_value.HPM22;
605
+ }
606
+ return 1'b0;
607
+ HPM23:
608
+ location: 23
609
+ alias: mcountinhibit.HPM23
610
+ description: |
611
+ [when="COUNTINHIBIT_EN[23] == true"]
612
+ Alias of `mcountinhibit.HPM23` when `mhpmcounter23` is delegated to S-mode
613
+ (`mcounteren.HPM23`=1); otherwise read-only zero.
614
+
615
+ [when="COUNTINHIBIT_EN[23] == false"]
616
+ Since `mcountinhibit.HPM23` is not writable, this field is read-only zero.
617
+ type(): |
618
+ return COUNTINHIBIT_EN[23] ? CsrFieldType::RWR : CsrFieldType::RO;
619
+ reset_value(): |
620
+ return COUNTINHIBIT_EN[23] ? UNDEFINED_LEGAL : 0;
621
+ sw_write(csr_value): |
622
+ if (CSR[menvcfg].CDE == 1'b0) {
623
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
624
+ }
625
+ if (virtual_mode?()) {
626
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
627
+ }
628
+ if (CSR[mcounteren].HPM23 == 1'b1) {
629
+ CSR[mcountinhibit].HPM23 = csr_value.HPM23;
630
+ return csr_value.HPM23;
631
+ }
632
+ return 1'b0;
633
+ HPM24:
634
+ location: 24
635
+ alias: mcountinhibit.HPM24
636
+ description: |
637
+ [when="COUNTINHIBIT_EN[24] == true"]
638
+ Alias of `mcountinhibit.HPM24` when `mhpmcounter24` is delegated to S-mode
639
+ (`mcounteren.HPM24`=1); otherwise read-only zero.
640
+
641
+ [when="COUNTINHIBIT_EN[24] == false"]
642
+ Since `mcountinhibit.HPM24` is not writable, this field is read-only zero.
643
+ type(): |
644
+ return COUNTINHIBIT_EN[24] ? CsrFieldType::RWR : CsrFieldType::RO;
645
+ reset_value(): |
646
+ return COUNTINHIBIT_EN[24] ? UNDEFINED_LEGAL : 0;
647
+ sw_write(csr_value): |
648
+ if (CSR[menvcfg].CDE == 1'b0) {
649
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
650
+ }
651
+ if (virtual_mode?()) {
652
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
653
+ }
654
+ if (CSR[mcounteren].HPM24 == 1'b1) {
655
+ CSR[mcountinhibit].HPM24 = csr_value.HPM24;
656
+ return csr_value.HPM24;
657
+ }
658
+ return 1'b0;
659
+ HPM25:
660
+ location: 25
661
+ alias: mcountinhibit.HPM25
662
+ description: |
663
+ [when="COUNTINHIBIT_EN[25] == true"]
664
+ Alias of `mcountinhibit.HPM25` when `mhpmcounter25` is delegated to S-mode
665
+ (`mcounteren.HPM25`=1); otherwise read-only zero.
666
+
667
+ [when="COUNTINHIBIT_EN[25] == false"]
668
+ Since `mcountinhibit.HPM25` is not writable, this field is read-only zero.
669
+ type(): |
670
+ return COUNTINHIBIT_EN[25] ? CsrFieldType::RWR : CsrFieldType::RO;
671
+ reset_value(): |
672
+ return COUNTINHIBIT_EN[25] ? UNDEFINED_LEGAL : 0;
673
+ sw_write(csr_value): |
674
+ if (CSR[menvcfg].CDE == 1'b0) {
675
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
676
+ }
677
+ if (virtual_mode?()) {
678
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
679
+ }
680
+ if (CSR[mcounteren].HPM25 == 1'b1) {
681
+ CSR[mcountinhibit].HPM25 = csr_value.HPM25;
682
+ return csr_value.HPM25;
683
+ }
684
+ return 1'b0;
685
+ HPM26:
686
+ location: 26
687
+ alias: mcountinhibit.HPM26
688
+ description: |
689
+ [when="COUNTINHIBIT_EN[26] == true"]
690
+ Alias of `mcountinhibit.HPM26` when `mhpmcounter26` is delegated to S-mode
691
+ (`mcounteren.HPM26`=1); otherwise read-only zero.
692
+
693
+ [when="COUNTINHIBIT_EN[26] == false"]
694
+ Since `mcountinhibit.HPM26` is not writable, this field is read-only zero.
695
+ type(): |
696
+ return COUNTINHIBIT_EN[26] ? CsrFieldType::RWR : CsrFieldType::RO;
697
+ reset_value(): |
698
+ return COUNTINHIBIT_EN[26] ? UNDEFINED_LEGAL : 0;
699
+ sw_write(csr_value): |
700
+ if (CSR[menvcfg].CDE == 1'b0) {
701
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
702
+ }
703
+ if (virtual_mode?()) {
704
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
705
+ }
706
+ if (CSR[mcounteren].HPM26 == 1'b1) {
707
+ CSR[mcountinhibit].HPM26 = csr_value.HPM26;
708
+ return csr_value.HPM26;
709
+ }
710
+ return 1'b0;
711
+ HPM27:
712
+ location: 27
713
+ alias: mcountinhibit.HPM27
714
+ description: |
715
+ [when="COUNTINHIBIT_EN[27] == true"]
716
+ Alias of `mcountinhibit.HPM27` when `mhpmcounter27` is delegated to S-mode
717
+ (`mcounteren.HPM27`=1); otherwise read-only zero.
718
+
719
+ [when="COUNTINHIBIT_EN[27] == false"]
720
+ Since `mcountinhibit.HPM27` is not writable, this field is read-only zero.
721
+ type(): |
722
+ return COUNTINHIBIT_EN[27] ? CsrFieldType::RWR : CsrFieldType::RO;
723
+ reset_value(): |
724
+ return COUNTINHIBIT_EN[27] ? UNDEFINED_LEGAL : 0;
725
+ sw_write(csr_value): |
726
+ if (CSR[menvcfg].CDE == 1'b0) {
727
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
728
+ }
729
+ if (virtual_mode?()) {
730
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
731
+ }
732
+ if (CSR[mcounteren].HPM27 == 1'b1) {
733
+ CSR[mcountinhibit].HPM27 = csr_value.HPM27;
734
+ return csr_value.HPM27;
735
+ }
736
+ return 1'b0;
737
+ HPM28:
738
+ location: 28
739
+ alias: mcountinhibit.HPM28
740
+ description: |
741
+ [when="COUNTINHIBIT_EN[28] == true"]
742
+ Alias of `mcountinhibit.HPM28` when `mhpmcounter28` is delegated to S-mode
743
+ (`mcounteren.HPM28`=1); otherwise read-only zero.
744
+
745
+ [when="COUNTINHIBIT_EN[28] == false"]
746
+ Since `mcountinhibit.HPM28` is not writable, this field is read-only zero.
747
+ type(): |
748
+ return COUNTINHIBIT_EN[28] ? CsrFieldType::RWR : CsrFieldType::RO;
749
+ reset_value(): |
750
+ return COUNTINHIBIT_EN[28] ? UNDEFINED_LEGAL : 0;
751
+ sw_write(csr_value): |
752
+ if (CSR[menvcfg].CDE == 1'b0) {
753
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
754
+ }
755
+ if (virtual_mode?()) {
756
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
757
+ }
758
+ if (CSR[mcounteren].HPM28 == 1'b1) {
759
+ CSR[mcountinhibit].HPM28 = csr_value.HPM28;
760
+ return csr_value.HPM28;
761
+ }
762
+ return 1'b0;
763
+ HPM29:
764
+ location: 29
765
+ alias: mcountinhibit.HPM29
766
+ description: |
767
+ [when="COUNTINHIBIT_EN[29] == true"]
768
+ Alias of `mcountinhibit.HPM29` when `mhpmcounter29` is delegated to S-mode
769
+ (`mcounteren.HPM29`=1); otherwise read-only zero.
770
+
771
+ [when="COUNTINHIBIT_EN[29] == false"]
772
+ Since `mcountinhibit.HPM29` is not writable, this field is read-only zero.
773
+ type(): |
774
+ return COUNTINHIBIT_EN[29] ? CsrFieldType::RWR : CsrFieldType::RO;
775
+ reset_value(): |
776
+ return COUNTINHIBIT_EN[29] ? UNDEFINED_LEGAL : 0;
777
+ sw_write(csr_value): |
778
+ if (CSR[menvcfg].CDE == 1'b0) {
779
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
780
+ }
781
+ if (virtual_mode?()) {
782
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
783
+ }
784
+ if (CSR[mcounteren].HPM29 == 1'b1) {
785
+ CSR[mcountinhibit].HPM29 = csr_value.HPM29;
786
+ return csr_value.HPM29;
787
+ }
788
+ return 1'b0;
789
+ HPM30:
790
+ location: 30
791
+ alias: mcountinhibit.HPM30
792
+ description: |
793
+ [when="COUNTINHIBIT_EN[30] == true"]
794
+ Alias of `mcountinhibit.HPM30` when `mhpmcounter30` is delegated to S-mode
795
+ (`mcounteren.HPM30`=1); otherwise read-only zero.
796
+
797
+ [when="COUNTINHIBIT_EN[30] == false"]
798
+ Since `mcountinhibit.HPM30` is not writable, this field is read-only zero.
799
+ type(): |
800
+ return COUNTINHIBIT_EN[30] ? CsrFieldType::RWR : CsrFieldType::RO;
801
+ reset_value(): |
802
+ return COUNTINHIBIT_EN[30] ? UNDEFINED_LEGAL : 0;
803
+ sw_write(csr_value): |
804
+ if (CSR[menvcfg].CDE == 1'b0) {
805
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
806
+ }
807
+ if (virtual_mode?()) {
808
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
809
+ }
810
+ if (CSR[mcounteren].HPM30 == 1'b1) {
811
+ CSR[mcountinhibit].HPM30 = csr_value.HPM30;
812
+ return csr_value.HPM30;
813
+ }
814
+ return 1'b0;
815
+ HPM31:
816
+ location: 31
817
+ alias: mcountinhibit.HPM31
818
+ description: |
819
+ [when="COUNTINHIBIT_EN[31] == true"]
820
+ Alias of `mcountinhibit.HPM31` when `mhpmcounter31` is delegated to S-mode
821
+ (`mcounteren.HPM31`=1); otherwise read-only zero.
822
+
823
+ [when="COUNTINHIBIT_EN[31] == false"]
824
+ Since `mcountinhibit.HPM31` is not writable, this field is read-only zero.
825
+ type(): |
826
+ return COUNTINHIBIT_EN[31] ? CsrFieldType::RWR : CsrFieldType::RO;
827
+ reset_value(): |
828
+ return COUNTINHIBIT_EN[31] ? UNDEFINED_LEGAL : 0;
829
+ sw_write(csr_value): |
830
+ if (CSR[menvcfg].CDE == 1'b0) {
831
+ raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
832
+ }
833
+ if (virtual_mode?()) {
834
+ raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
835
+ }
836
+ if (CSR[mcounteren].HPM31 == 1'b1) {
837
+ CSR[mcountinhibit].HPM31 = csr_value.HPM31;
838
+ return csr_value.HPM31;
839
+ }
840
+ return 1'b0;