badline 0.16.1 → 0.18.0

data/lib/badline/snapshot/vice/p500_vicii.rb

@@ -0,0 +1,166 @@
+# frozen_string_literal: true
+
+module Badline
+  module Snapshot
+    module Vice
+      module P500
+        # VIC-II 1.3 as xcbm5x0 writes it, which runs VICE's line-based
+        # VIC-II rather than x64sc's, so the module is laid out otherwise
+        # than x64sc's under the same name: whether bad lines may happen,
+        # whether this line is one, the vertical border, the colour
+        # buffer, colour RAM, whether the sequencer is idle, the light
+        # pen's trigger and position, the video matrix buffer, the sprites
+        # whose DMA starts next line, a word xcbm5x0 keeps at $00100000,
+        # the beam's cycle and line, the registers, the sprite collisions
+        # pending, the sprites' DMA, the VIC's bank, VC, the matrix's
+        # width, VCBASE, then sprite and drawing fields with the bank
+        # again, the line its picture draws next and its size, and the
+        # picture. xcbm5x0's cycle in the line is badline's column.
+        #
+        # Written: the registers, colour RAM, the buffers, the beam with
+        # its counters and the sprites' DMA as badline's VIC has them, the
+        # bank as TPI2's PC6 and PC7 pick it, and the rest as xcbm5x0
+        # leaves it. The picture is left blank, as xcbm5x0 paints it again.
+        #
+        # Read: the registers, colour RAM, the buffers, the beam with VC,
+        # VCBASE and whether the sequencer is idle, the light pen and the
+        # sprites' DMA, through the x64sc module's reader (VICII::Import).
+        # The row counter follows from the line and YSCROLL, and the
+        # sprites' counters and the borders' flip-flops start afresh.
+        # xcbm5x0's VIC isn't x64sc's, so a program badline runs on from its
+        # snapshot reads the raster a cycle or so off now and then.
+        module VICII
+          NAME = Vice::VICII::NAME
+          MAJOR = 1
+          MINOR = 3
+          ALLOW_BAD_LINES = 0x000
+          BAD_LINE = 0x001
+          BLANK = 0x002
+          COLOR_BUFFER = 0x003
+          COLOR_RAM = 0x02b
+          IDLE = 0x42b
+          LIGHT_PEN = 0x42c
+          MATRIX_BUFFER = 0x42f
+          RAM_BASE = 0x458
+          CYCLE = 0x45c
+          LINE = 0x45d
+          REGISTERS = 0x45f
+          SPRITE_DMA = 0x4a0
+          BANK = 0x4a2
+          VC = 0x4a4
+          VC_ADD = 0x4a6
+          VC_BASE = 0x4a7
+          VIDEO_INT = 0x4a9
+          DRAW_FLAGS = 0x4cd
+          FETCH_BANK = 0x4cf
+          DRAWN_LINE = 0x4d1
+          PICTURE = 0x4d5
+          HEADER = 0x4e1
+          # The picture's size: PAL's and NTSC's.
+          SIZES = { 312 => [504, 312], 263 => [520, 275] }.freeze
+
+          module_function
+
+          def reads?(section) = section.major == MAJOR && section.minor == MINOR
+
+          # The lines xcbm5x0's picture has, which name its region.
+          def picture_lines(section) = FieldReader.new(section).skip(PICTURE + 4).dword
+
+          def export(machine)
+            vic = machine.vic
+            width, height = SIZES.fetch(vic.region.lines_per_frame)
+            bytes = Array.new(HEADER + (width * (height + 4)), 0)
+            sequencer(vic, bytes)
+            bytes[COLOR_RAM, 0x400] = Array.new(0x400) { |offset| machine.color_ram.nibble(0xd400 + offset) }
+            beam(vic, bytes)
+            bank = ((machine.tpi2.port_c_output >> 6) & 0x03) << 14
+            [BANK, FETCH_BANK].each { |at| word(bytes, at, bank) }
+            [RAM_BASE + 2, DRAW_FLAGS].each { |at| bytes[at] = 0x10 }
+            bytes[VIDEO_INT] = 1
+            [vic.rasterline, width, height, width].each_with_index do |value, n|
+              dword(bytes, DRAWN_LINE + (4 * n), value)
+            end
+            FieldWriter.new.bytes(bytes).section(NAME, MAJOR, MINOR)
+          end
+
+          # The sequencer's state and the buffers it reads.
+          def sequencer(vic, bytes)
+            state = vic.display_state
+            bytes[ALLOW_BAD_LINES] = state.bad_lines_enabled ? 1 : 0
+            bytes[BAD_LINE] = state.bad_line_condition? ? 1 : 0
+            bytes[BLANK] = vic.sequencer.borders.first ? 1 : 0
+            bytes[COLOR_BUFFER, 40] = vic.color_buffer.map { |value| value || 0 }
+            bytes[IDLE] = state.display? ? 0 : 1
+            bytes[MATRIX_BUFFER, 40] = vic.character_buffer.map { |value| value || 0 }
+          end
+
+          # The beam, the registers and the counters.
+          def beam(vic, bytes)
+            state = vic.display_state
+            bytes[CYCLE] = vic.column
+            word(bytes, LINE, vic.rasterline)
+            bytes[REGISTERS, 0x40] = vic.register_file
+            bytes[SPRITE_DMA] = 8.times.sum { |n| vic.sprites[n].displaying? ? 1 << n : 0 }
+            word(bytes, VC, state.vc)
+            bytes[VC_ADD] = 40
+            word(bytes, VC_BASE, state.vc_base)
+          end
+
+          def word(bytes, at, value) = bytes[at, 2] = [value & 0xffff].pack("v").bytes
+
+          def dword(bytes, at, value) = bytes[at, 4] = [value].pack("V").bytes
+
+          def import(section, vic, color_ram)
+            Import.new(section, vic.region).apply_to(vic, color_ram, 0xd400)
+          end
+
+          # Reads xcbm5x0's module into the fields x64sc's reader puts into
+          # badline's VIC.
+          class Import < Vice::VICII::Import
+            # x64sc's cycle is badline's column plus one, its cycle 0 the
+            # last column of the line before (VICII.vice_cycle).
+            def initialize(section, region)
+              super(nil)
+              bytes = section.data.bytes
+              @registers = bytes[REGISTERS, 0x40]
+              line = bytes[LINE] | (bytes[LINE + 1] << 8)
+              @cycle = (bytes[CYCLE] + 1) % region.cycles_per_line
+              @line = @cycle.zero? ? (line + 1) % region.lines_per_frame : line
+              @frame_start = false
+              @irq_status = @registers[0x19]
+              @raster_match = false
+              @character_buffer = bytes[MATRIX_BUFFER, 40]
+              @color_buffer = bytes[COLOR_BUFFER, 40]
+              read_old_counters(bytes)
+              @color_ram = bytes[COLOR_RAM, 0x400]
+              @sprite_mc = Array.new(8, 0)
+              @sprite_mcbase = Array.new(8, 0)
+              @sprite_exp_ff = 0
+            end
+
+            private
+
+            def read_old_counters(bytes)
+              @bad_lines_enabled = !bytes[ALLOW_BAD_LINES].zero?
+              @collisions = [@registers[0x1e], @registers[0x1f]]
+              @display = bytes[IDLE].zero?
+              @vc_base = bytes[VC_BASE] | (bytes[VC_BASE + 1] << 8)
+              @vc = bytes[VC] | (bytes[VC + 1] << 8)
+              @rc = @display ? (@line - @registers[0x11]) & 0x07 : 7
+              @vmli = 0
+              @lp_low = false
+              @lp_triggered = !bytes[LIGHT_PEN].zero?
+              @fetch_d011 = @registers[0x11]
+              @dma_bits = bytes[SPRITE_DMA]
+              @display_bits = @dma_bits
+              blank = !bytes[BLANK].zero?
+              @vertical_border = blank
+              @vertical_armed = false
+              @main_border = blank
+            end
+          end
+        end
+      end
+    end
+  end
+end

data/lib/badline/snapshot/vice/pet.rb

@@ -1,17 +1,21 @@
 # frozen_string_literal: true
 
+require "badline/snapshot/vice/cbm2_acia"
 require "badline/snapshot/vice/pet_cpu"
 require "badline/snapshot/vice/pet_mem"
 require "badline/snapshot/vice/pet_pias"
 require "badline/snapshot/vice/pet_via"
 require "badline/snapshot/vice/pet_crtc"
+require "badline/snapshot/vice/pet_drive"
+require "badline/snapshot/vice/pet_drive8050"
 require "badline/snapshot/vice/pet_restore"
 
 module Badline
   module Snapshot
     module Vice
-      # xpet's modules for the PET: the CPU, the RAM, the CRTC, both PIAs
-      # and the VIA, written from badline's machine and read into it. Each
+      # xpet's modules for the PET: the CPU, the RAM, the CRTC, both PIAs,
+      # the VIA and a true 2031, written from badline's machine and read
+      # into it. Each
       # module's file says what maps and what is approximated. They go
       # through the PET's own keyed fields (Keyed), which a save writes and a
       # load reads, so they read no chip's insides.
@@ -19,8 +23,8 @@ module Badline
         # The models badline builds by the board PETMEM names (PETMem): the
         # discrete board is a 2001's where xpet's settings say so, and a
         # 3032 otherwise.
-        MODELS = { PETMem::CRTC40 => "4032", PETMem::CRTC80 => "8032", PETMem::CBM8096 => "8096",
-                   PETMem::CBM8296 => "8296" }.freeze
+        MODELS = { PETMem::CRTC40 => "4032", PETMem::CRTC80 => "8032", PETMem::SUPERPET => "superpet",
+                   PETMem::CBM8096 => "8096", PETMem::CBM8296 => "8296" }.freeze
         # The modules xpet resets the machine without, for the parts badline
         # doesn't model in VICE's terms, each as xpet leaves them with
         # nothing attached: no file system drive open, both cassette ports
@@ -45,8 +49,10 @@ module Badline
           [MainCPU.export(machine), CPU6809.export(machine), PETMem.export(machine),
            CRTC.export(machine, reader(readers, "BL-CRTC"), reader(readers, "BL-VIDEO")),
            PIAs.export("PIA1", machine.pia1, reader(readers, "BL-PIA1")),
-           PIAs.export("PIA2", machine.pia2, reader(readers, "BL-PIA2")), VIA.export(reader(readers, "BL-VIA"))] +
-            PERIPHERALS.map { |name, major, minor, bytes| FieldWriter.new.bytes(bytes).section(name, major, minor) }
+           PIAs.export("PIA2", machine.pia2, reader(readers, "BL-PIA2")), VIA.export(reader(readers, "BL-VIA")),
+           *Drive2031.export(machine, readers), *Drive8050.export(machine, readers)] +
+            PERIPHERALS.map { |name, major, minor, bytes| FieldWriter.new.bytes(bytes).section(name, major, minor) } +
+            (machine.superpet? ? [CBM2::ACIA.export(reader(readers, "BL-ACIA"), machine.cycles)] : [])
         end
 
         def reader(readers, name) = readers[name] || Keyed::Reader.missing(name)
@@ -57,7 +63,9 @@ module Badline
         # xpet doesn't save the keyboard, the ROMs or an 8296's jumpers, so
         # a discrete board is a 3032 with the graphics keyboard unless it is
         # a 2001, each model has its own ROMs, and an 8296 none of its
-        # jumpers, as xpet's own has.
+        # jumpers, as xpet's own has. Nor does it save the SuperPET's
+        # switches: its CPU switch is at the CPU that has the bus, and its
+        # RAM switch at R/W, which is the only position xpet has.
         def setup(container)
           memory = memory(container)
           ram_kb = PETMem.ram_kb(memory)
@@ -71,8 +79,11 @@ module Badline
           crtc = nil unless crtc.nil? || CRTC.reads?(crtc)
           refresh_hz = refresh_hz(crtc, profile)
           profile = Badline::PET::Model.upgraded(profile, nil, editor(crtc, profile, refresh_hz))
+          superpet = profile.superpet?
+          cpu_switch = PETMem.m6809?(memory) ? "6809" : "6502"
           PETSetup.new(model: name, ram_kb:, refresh_hz:, basic: profile.basic, editor: profile.editor(refresh_hz),
-                       kernal: profile.kernal, characters: profile.characters, jumpers: "")
+                       kernal: profile.kernal, characters: profile.characters, jumpers: "",
+                       cpu_switch: superpet ? cpu_switch : "", ram_switch: superpet ? "rw" : "")
         end
 
         def memory(container)
@@ -90,8 +101,7 @@ module Badline
           name = MODELS[board]
           return name unless name.nil?
 
-          what = board == PETMem::SUPERPET ? "a SuperPET" : "board #{board}"
-          raise FormatError, "#{memory}: #{what}, which badline doesn't build"
+          raise FormatError, "#{memory}: board #{board}, which badline doesn't build"
         end
 
         # The editor's frame rate, from the cycles the CRTC's registers set

data/lib/badline/snapshot/vice/pet_cpu.rb

@@ -26,13 +26,20 @@ module Badline
           def reads?(section) = section.major == MAJOR && section.minor == MINOR
 
           def export(machine)
+            sources = [machine.pia1.irq?, machine.pia2.irq?, machine.via.irq?]
+            sources << machine.acia_irq? if machine.superpet?
+            write(machine, sources.count(true))
+          end
+
+          # The module for `machine`, whose CPU's IRQ line `irqs` sources
+          # pull.
+          def write(machine, irqs)
             cpu = machine.cpu
             fields = FieldWriter.new.qword(machine.cycles)
             [cpu.a, cpu.x, cpu.y, cpu.stack_pointer].each { |register| fields.byte(register) }
             fields.word(cpu.program_counter).byte(cpu.p)
             fields.dword(0).dword(0).dword(0)
             5.times { fields.qword(0) }
-            irqs = [machine.pia1.irq?, machine.pia2.irq?, machine.via.irq?].count(true)
             fields.dword(irqs).dword(0).dword(irqs.positive? ? IK_IRQ : 0)
             fields.section(NAME, MAJOR, MINOR)
           end
@@ -49,16 +56,46 @@ module Badline
         end
 
         # The SuperPET's 6809, CPU6809 1.1, which xpet saves on every model
-        # and won't load a snapshot without: the clock and the registers as
-        # an xpet with no SuperPET board leaves them. badline doesn't read
-        # it.
+        # and won't load a snapshot without: the clock, X, Y, U, S and PC,
+        # DP, CC, A and B, then five bytes. xpet 3.10's layout was inferred
+        # from its snapshots of a 6809 running a loop that loads each
+        # register with a value of its own; the five bytes are 0 in every
+        # snapshot xpet wrote.
+        #
+        # Written: the clock and the registers, the SuperPET's 6809's
+        # between instructions while it has the bus, and otherwise the
+        # registers of a 6809 that hasn't run, as xpet leaves them. Read:
+        # the registers, with the 6809 on an instruction boundary, as
+        # xpet's snapshot is taken on one.
         module CPU6809
           NAME = "CPU6809"
+          MAJOR = 1
+          MINOR = 1
+          # The CC an xpet without a SuperPET board saves.
+          IDLE_CC = 0x04
 
           module_function
 
+          def reads?(section) = section.major == MAJOR && section.minor == MINOR
+
           def export(machine)
-            FieldWriter.new.qword(machine.cycles).zeros(11).byte(0x04).zeros(7).section(NAME, 1, 1)
+            fields = FieldWriter.new.qword(machine.cycles)
+            unless machine.superpet? && machine.m6809_running?
+              return fields.zeros(11).byte(IDLE_CC).zeros(7).section(NAME, MAJOR, MINOR)
+            end
+
+            cpu = machine.m6809
+            [cpu.x, cpu.y, cpu.u, cpu.s, cpu.pc].each { |register| fields.word(register) }
+            fields.byte(cpu.dp).byte(cpu.cc).byte(cpu.a).byte(cpu.b).zeros(5).section(NAME, MAJOR, MINOR)
+          end
+
+          # The registers by their BL-M6809 keys, in a keyed module's writer,
+          # with the 6809's cycle count the machine's `cycles`.
+          def import(section, out, cycles)
+            fields = FieldReader.new(section).skip(8)
+            %w[x y u s pc].each { |name| out.int(name, fields.word) }
+            %w[dp cc a b].each { |name| out.int(name, fields.byte) }
+            out.int("cycles", cycles).bool("nmi.armed", true)
           end
         end
       end

data/lib/badline/snapshot/vice/pet_crtc.rb

@@ -6,7 +6,7 @@ module Badline
       module PET
         # CRTC 1.2, which xpet saves on every model, the discrete boards'
         # video too, as a 6545 with the registers fixed: the board's screen
-        # settings, the registers, the one selected, the beam's character,
+        # settings, the character set VIA CA2 picks, the registers, the one selected, the beam's character,
         # row and line in the row, whether the frame is in its vertical
         # adjust, the row's start in screen RAM, the lines of vertical sync
         # left, whether the rows show, the picture's size, the lines in the
@@ -36,6 +36,13 @@ module Badline
           SETTINGS = [0xff, 0x03, 0x00, 0x20, 0x00, 0x20, 0x00, 0x10, 0xff, 0x1f].freeze
           # The 8296's, whose screen RAM spans 4K.
           SETTINGS_8296 = [0xff, 0x0f, 0x00, 0x20, 0x00, 0x20, 0xff, 0x0f, 0xff, 0x1f].freeze
+          # The SuperPET's, whose character ROM spans 4K, inferred from
+          # xpet 3.10's SuperPET snapshots.
+          SETTINGS_SUPERPET = [0xff, 0x03, 0x00, 0x20, 0x00, 0x20, 0x00, 0x10, 0xff, 0x3f].freeze
+          # The word after the settings while VIA CA2 is high, picking the
+          # character ROM's second set, as xpet 3.10 writes it and paints
+          # the picture from on every PET board.
+          SECOND_SET = 0x1000
           # The 2001's and 3000 series' video as xpet's CRTC runs it: 64
           # cycles a line, 32 rows of 8 lines and 4 more, the first 25 rows
           # shown.
@@ -82,9 +89,10 @@ module Badline
             beam = if discrete
                      discrete_beam(video_input)
                    else
-                     crtc_beam(run_on(machine, crtc_input, -CRTC_LEAD % frame_cycles(registers)), registers)
+                     crtc_beam(run_on(fresh_crtc(machine), crtc_input, -CRTC_LEAD % frame_cycles(registers)),
+                               registers)
                    end
-            fields = FieldWriter.new.bytes(model.cbm8296? ? SETTINGS_8296 : SETTINGS).word(attributes(model))
+            fields = FieldWriter.new.bytes(settings(model)).word(machine.via.ca2_output ? SECOND_SET : 0)
             fields.byte(0).byte(columns(model))
             fields.byte(model.basic1? ? 1 : 0).bytes(registers).byte(discrete ? 0 : crtc_input.int("selected", 0))
             beam_fields(fields, beam, registers, model)
@@ -92,6 +100,12 @@ module Badline
             fields.section(NAME, MAJOR, MINOR)
           end
 
+          def settings(model)
+            return SETTINGS_8296 if model.cbm8296?
+
+            model.superpet? ? SETTINGS_SUPERPET : SETTINGS
+          end
+
           def crtc_registers(input)
             registers = input.bytes("registers", "".b).bytes
             Array.new(REGISTERS) { |index| registers[index] || 0 }
@@ -119,10 +133,12 @@ module Badline
 
           def frame_cycles(registers) = (registers[0] + 1) * frame_lines(registers)
 
-          # The BL-CRTC fields of a CRTC loaded with those in `input` and run
-          # `cycles` cycles on its own, in a machine built as `machine` was.
-          def run_on(machine, input, cycles)
-            crtc = PETSetup.of(machine).build.crtc
+          # The CRTC of a machine built as `machine` was, at power-on.
+          def fresh_crtc(machine) = PETSetup.of(machine).build.crtc
+
+          # The BL-CRTC fields of `crtc`, a CRTC of its own, loaded with those
+          # in `input` and run `cycles` cycles.
+          def run_on(crtc, input, cycles)
             crtc.load_fields(input)
             cycles.times { crtc.cycle! }
             Keyed::Reader.parse(Keyed.section("BL-CRTC") { |out| crtc.save_fields(out) })
@@ -135,16 +151,13 @@ module Badline
             %w[adjusting row_display column_display].each { |key| out.bool(key, input.bool(key, false)) }
           end
 
-          # Both move a row's start on at R1 of its last line, and badline's
-          # moves it again where the vertical adjust runs past R9 lines,
-          # which xpet's doesn't.
+          # Both move a row's start on at R1 of its last line.
           def crtc_beam(input, registers)
             column = input.int("column", 0)
             row = input.int("row", 0)
             line = input.int("line", 0)
             adjusting = input.bool("adjusting", false)
             start = input.int("row_start", 0)
-            start = (start - registers[1]) & 0x3fff if adjusting && moved?(line, column, registers)
             rows = registers[4] + 1
             lines = registers[9] + 1
             Beam.new(column:, row: adjusting ? rows : row, raster: adjusting ? 0 : line,
@@ -212,12 +225,7 @@ module Badline
             adjusting = beam.row >= rows
             line = adjusting ? beam.frame_line - (rows * (registers[9] + 1)) : beam.raster
             start = start_address(beam.start, registers, columns, attributes)
-            if adjusting
-              start += registers[1] if line > registers[9]
-            elsif moved?(line, column_of(section), registers)
-              start -= registers[1]
-            end
-            start &= 0x3fff
+            start = (start - registers[1]) & 0x3fff if !adjusting && moved?(line, column_of(section), registers)
             out.bytes("registers", registers.first(Chips::CRTC::MASKS.length)).int("selected", selected(section) & 0x1f)
             out.int("column", 0).int("line", [line, 0].max).int("row", adjusting ? rows - 1 : beam.row)
             out.int("since_hsync", registers[0] + 1 - registers[2]).int("vsync_lines", beam.vsync)

data/lib/badline/snapshot/vice/pet_drive.rb

@@ -0,0 +1,180 @@
+# frozen_string_literal: true
+
+module Badline
+  module Snapshot
+    module Vice
+      module PET
+        # A true 2031 on device 8, as xpet 3.10, xcbm2 and xcbm5x0 save it with true drive
+        # emulation: DRIVE8 to DRIVE11 2.0, one a unit, DRIVECPU0 1.3, the
+        # drive's 6502 and its RAM, and its VIAs as VIA 2.2 modules,
+        # 2031VIA1D0 at $1800 on the IEEE-488 bus and VIA2D0 at $1C00 on
+        # the mechanism.
+        #
+        # DRIVECPU0 holds the clock, the registers, the last opcode, the
+        # main CPU's clock, more clocks of the drive's interrupt bookkeeping,
+        # then the 2K of RAM from $5C and twelve bytes after it. DRIVE8
+        # holds the head's half track at $10, with track 18 at 36 as badline
+        # numbers them, the speed zone its VIA set at $24, $47 and $4B, the
+        # drive's type as a word at $28, and from $2C the disk's place in
+        # its turn and the clock it was last moved on at. The rest of it,
+        # the read electronics among it, badline doesn't read. xpet's head
+        # rests on a half track two phases on from where badline's stepper
+        # puts it (SLIP).
+        #
+        # Written: the registers and the RAM, the VIAs as the PET's VIA is
+        # written with the stepper's phase moved to xpet's, and DRIVE8 as
+        # xpet saves an idle 2031 but for the head's half track, the zone,
+        # and the disk at the start of its turn as of the snapshot's clock.
+        # The interrupt clocks are written as long past. The snapshot is
+        # settled with the drive's CPU between instructions too
+        # (PET#settle_for_vice!). One taken while the drive is mid-transfer
+        # on the bus may stall there in xpet, as xpet's own snapshots taken
+        # while it searches for a file do.
+        #
+        # Read: the registers, the RAM, the VIAs as the PET's VIA is read,
+        # and the head's half track, with the motor, the LED and the zone
+        # from VIA 2's port B and the stepper's phase as xpet's (SLIP). The
+        # disk turns on from where badline's left it, and the disk in the
+        # drive stays.
+        module Drive2031
+          UNITS = %w[DRIVE8 DRIVE9 DRIVE10 DRIVE11].freeze
+          DRIVE_MAJOR = 2
+          DRIVE_MINOR = 0
+          CPU = "DRIVECPU0"
+          CPU_MAJOR = 1
+          CPU_MINOR = 3
+          VIA1 = "2031VIA1D0"
+          VIA2 = "VIA2D0"
+          NAMES = [*UNITS, CPU, VIA1, VIA2].freeze
+          # Where DRIVECPU0's RAM starts, and its length.
+          RAM_AT = 0x5c
+          RAM_SIZE = 0x800
+          TAIL = 12
+          HALF_TRACK = 0x10
+          ZONES = [0x24, 0x47, 0x4b].freeze
+          SIZE = 145
+          # The disk's place in its turn, and the clock it was last moved on at.
+          TURN = 0x2c
+          # DRIVE8 as xpet saves an idle 2031, and a unit with no drive, by
+          # the bytes that aren't 0.
+          IDLE = { 0x00 => 0x01, 0x01 => 0x01, 0x02 => 0x01, 0x0f => 0x01, 0x10 => 0x25, 0x1a => 0x01, 0x1b => 0xdf,
+                   0x1f => 0x54, 0x20 => 0x55, 0x24 => 0x03, 0x28 => 0xef, 0x29 => 0x07, 0x2c => 0x60, 0x2d => 0x41,
+                   0x2e => 0x0f, 0x30 => 0x17, 0x31 => 0x51, 0x32 => 0x0f, 0x40 => 0x54, 0x41 => 0x01, 0x42 => 0x54,
+                   0x47 => 0x03, 0x4b => 0x03, 0x6f => 0xcd, 0x70 => 0xab, 0x71 => 0x34, 0x72 => 0x12 }.freeze
+          NONE = { 0x00 => 0x01, 0x01 => 0x01, 0x02 => 0x01, 0x0e => 0x01, 0x0f => 0x01, 0x10 => 0x24, 0x1a => 0x01,
+                   0x20 => 0x55, 0x6f => 0xcd, 0x70 => 0xab, 0x71 => 0x34, 0x72 => 0x12, 0x8f => 0x01 }.freeze
+          SLIP = 2
+          MOTOR = 0x04
+          LED = 0x08
+
+          module_function
+
+          # Whether the snapshot has a true 2031.
+          def present?(container) = !container[CPU].nil? && !container[VIA1].nil?
+
+          def reads?(section)
+            case section.name
+            when CPU then section.major == CPU_MAJOR && section.minor == CPU_MINOR
+            when VIA1, VIA2 then VIA.reads?(section)
+            else section.major == DRIVE_MAJOR && section.minor == DRIVE_MINOR
+            end
+          end
+
+          # xpet's modules for the 2031 whose BL-D8 modules `readers` holds,
+          # and none without one or for an 8050 or 8250, which they leave
+          # out.
+          def export(machine, readers)
+            drive = readers["BL-D8"]
+            return [] if drive.nil? || drive.text("model", "2031") != "2031"
+
+            via2 = readers.fetch("BL-D8-VIA2")
+            mechanism = readers.fetch("BL-D8-MECH")
+            zone = ((via2.int("orb", 0) | ~via2.int("ddrb", 0)) >> 5) & 0x03
+            idle = filled(IDLE)
+            idle[HALF_TRACK] = mechanism.int("half_track", 36)
+            ZONES.each { |offset| idle[offset] = zone }
+            idle[TURN, 8] = [0, machine.cycles & 0xffff_ffff].pack("VV").bytes
+            [FieldWriter.new.bytes(idle).section(UNITS.first, DRIVE_MAJOR, DRIVE_MINOR),
+             *UNITS.drop(1).map { |name| unit(NONE, name) },
+             cpu(machine, readers.fetch("BL-D8-CPU"), readers.fetch("BL-D8-RAM")),
+             stepper(VIA.export(via2, VIA2), mechanism.int("slip", 0)),
+             VIA.export(readers.fetch("BL-D8-VIA1"), VIA1)]
+          end
+
+          # VIA 2's port B with the stepper's phase as xpet's head takes it
+          # where badline's head is: SLIP on from badline's.
+          def stepper(section, slip)
+            bytes = section.data.bytes
+            bytes[2] = (bytes[2] & 0xfc) | ((bytes[2] - slip + SLIP) & 0x03)
+            section.with(data: bytes.pack("C*"))
+          end
+
+          def unit(bytes, name) = FieldWriter.new.bytes(filled(bytes)).section(name, DRIVE_MAJOR, DRIVE_MINOR)
+
+          def filled(bytes) = Array.new(SIZE) { |offset| bytes.fetch(offset, 0) }
+
+          def cpu(machine, input, ram)
+            bytes = ram.bytes("ram", "".b).bytes
+            cpu_section(machine, input, Array.new(RAM_SIZE) { |address| bytes[address] || 0 })
+          end
+
+          # The drive's clock, at its 1 MHz, for the machine's at its own.
+          def drive_clock(machine) = machine.cycles * Drives::Model2031::CLOCK_HZ / machine.timing.clock_hz
+
+          # DRIVECPU0 for a drive CPU whose BL- fields `input` holds, with
+          # `ram` the drive's RAM as xpet lays it out: the drive's clock,
+          # the registers, the machine's clock, the drive's clock again, and
+          # the RAM.
+          def cpu_section(machine, input, ram)
+            clock = drive_clock(machine)
+            fields = FieldWriter.new.qword(clock)
+            %w[a x y sp].each { |key| fields.byte(input.int(key, 0)) }
+            fields.word(input.int("pc", 0)).byte(input.int("p", 0x20)).dword(0)
+            fields.qword(machine.cycles).zeros(16).qword(clock).zeros(1).qword(0).zeros(8).qword(0)
+            fields.zeros(16).bytes(ram).zeros(TAIL)
+            fields.section(CPU, CPU_MAJOR, CPU_MINOR)
+          end
+
+          # The 2031's keyed modules, named for device 8, from the
+          # snapshot's, with `disk` the drive's disk module badline keeps,
+          # or nil.
+          def import(container, disk)
+            via2 = container[VIA2]
+            sections = [Keyed.section("BL-D8") { |out| drive(container, out) },
+                        Keyed.section("BL-D8-RAM") { |out| out.bytes("ram", ram(container[CPU])) },
+                        Keyed.section("BL-D8-VIA1") { |out| VIA.import(container[VIA1], out) },
+                        Keyed.section("BL-D8-VIA2") { |out| VIA.import(via2, out) },
+                        Keyed.section("BL-D8-CPU") { |out| registers(container[CPU], out) },
+                        Keyed.section("BL-D8-MECH") { |out| mechanism(container, via2, out) }]
+            disk ? sections + [disk] : sections
+          end
+
+          def drive(container, out)
+            out.text("model", "2031").int("phase", 0).int("cycles", FieldReader.new(container[CPU]).qword)
+            out.bool("so_pending", false)
+          end
+
+          def ram(section) = FieldReader.new(section).skip(RAM_AT).string(RAM_SIZE)
+
+          def registers(section, out)
+            fields = FieldReader.new(section)
+            clock = fields.qword
+            out.int("a", fields.byte).int("x", fields.byte).int("y", fields.byte).int("sp", fields.byte)
+            out.int("pc", fields.word).int("p", fields.byte).int("cycles", clock)
+          end
+
+          # The head where DRIVE8 has it, and the stepper's phase as VIA 2
+          # drives it, which the half track's low two bits stand for.
+          def mechanism(container, via2, out)
+            half_track = FieldReader.new(container[UNITS.first]).skip(HALF_TRACK).byte
+            bytes = FieldReader.new(via2).bytes(4)
+            port_b = bytes[2] | (~bytes[3] & 0xff)
+            out.int("half_track", half_track).int("slip", SLIP)
+            out.int("zone", (port_b >> 5) & 0x03)
+            out.bool("motor", port_b.anybits?(MOTOR)).bool("led", port_b.anybits?(LED))
+          end
+        end
+      end
+    end
+  end
+end