badline 0.16.1 → 0.18.0

data/lib/badline/drives/datasette.rb

@@ -14,7 +14,6 @@ module Badline
       # What inserting a tape raises on a machine without a cassette port.
       class Missing < ArgumentError; end
       attr_reader :tape
-      attr_writer :motor
 
       def initialize(tape = nil, level: false)
         @tape = tape
@@ -30,6 +29,8 @@ module Badline
         @low_recorded = false
         @flag_handler = nil
         @sense_handler = nil
+        @running_handler = nil
+        @running = false
       end
 
       # Falling edges on the tape read line.
@@ -42,6 +43,17 @@ module Badline
         @sense_handler = handler
       end
 
+      # Whether the tape runs (#running?), each time that changes, a
+      # snapshot's load included.
+      def on_running_change(&handler)
+        @running_handler = handler
+      end
+
+      def motor=(on)
+        @motor = on
+        update_running
+      end
+
       # Whether the machine has a datasette at its cassette port. The SX-64
       # has none: its keys stay up and it takes no tape.
       def connected? = @connected
@@ -56,11 +68,13 @@ module Badline
 
         @tape = tape
         rewind
+        update_running
       end
 
       def eject
         stop!
         @tape = nil
+        update_running
       end
 
       def rewind
@@ -117,7 +131,8 @@ module Badline
 
       def motor? = @motor
 
-      def running? = @playing && @motor && !@tape.nil?
+      # Whether the tape moves: a key down, the motor on and a tape in.
+      def running? = @running
 
       # The tape read line's level, on a datasette built with +level: true+.
       # Each pulse holds it low for its first half and high for its second,
@@ -131,7 +146,7 @@ module Badline
       end
 
       def cycle!
-        return unless running?
+        return unless @running
         return @since += 1 if @recording
 
         next_pulse if @countdown.zero?
@@ -175,9 +190,18 @@ module Badline
 
         finish_recording unless down
         @playing = down
+        update_running
         @sense_handler&.call
       end
 
+      def update_running
+        running = @playing && @motor && !@tape.nil?
+        return if running == @running
+
+        @running = running
+        @running_handler&.call
+      end
+
       # Releasing the keys ends a recording, and writes the tape out.
       def finish_recording
         return unless @recording

data/lib/badline/drives/ieee_models.rb

@@ -0,0 +1,54 @@
+# frozen_string_literal: true
+
+module Badline
+  module Drives
+    # The true drives the PET's and the CBM-II's IEEE-488 bus takes, by the
+    # names --drive-type gives them, xpet's drive types, and the disk images
+    # each reads. Options reads it to check --drive-type, and
+    # Media::TrueDrive to pick the drive an image goes in, so it loads
+    # nothing else. Machine::IEEEDrives builds each.
+    module IEEEModels
+      # The images each model reads, by extension.
+      MEDIA = {
+        "2031" => %w[.d64 .g64], "8050" => %w[.d80], "8250" => %w[.d82], "1001" => %w[.d82], "4040" => %w[.d64 .d67],
+        "3040" => %w[.d64 .d67], "2040" => %w[.d67], "9060" => %w[.d90], "9090" => %w[.d90]
+      }.freeze
+
+      # The model --true-drive plugs in without --drive-type.
+      DEFAULT = "2031"
+
+      # The model an image goes in when neither the drive on device 8 nor
+      # the machine's own model reads it. A .d90 goes by its size
+      # (hard_disk_model).
+      FOR_IMAGES = { ".d64" => "2031", ".g64" => "2031", ".d80" => "8050", ".d82" => "8250", ".d67" => "2040" }.freeze
+
+      NAMES = MEDIA.keys.freeze
+
+      module_function
+
+      # Whether the image at path is a hard disk's, which only a true drive
+      # reads.
+      def hard_disk?(path) = File.extname(path).casecmp?(".d90")
+
+      # The hard disk a .d90 image belongs to, by its size: a D9090 for a
+      # D9090's, and otherwise a D9060.
+      def hard_disk_model(path) = Storage::D90Image.heads_for(File.size?(path).to_i) == 6 ? "9090" : "9060"
+
+      # Whether the model reads the image at path.
+      def reads?(model, path) = MEDIA.fetch(model, []).include?(File.extname(path).downcase)
+
+      # The model the image at path goes in: the drive's on device 8,
+      # `present`, if it reads it, or else the machine's own, `chosen`, or
+      # else the image's own, or nil for an image none reads. A .d90 goes
+      # in the machine's own model if that is a hard disk, and otherwise in
+      # the one its size names.
+      def taking(path, present, chosen)
+        return reads?(chosen, path) ? chosen : hard_disk_model(path) if hard_disk?(path)
+        return present if present && reads?(present, path)
+        return chosen if reads?(chosen, path)
+
+        FOR_IMAGES[File.extname(path).downcase]
+      end
+    end
+  end
+end

data/lib/badline/drives/model1001.rb

@@ -0,0 +1,37 @@
+# frozen_string_literal: true
+
+require "badline/drives/model8050"
+
+module Badline
+  module Drives
+    # The SFD-1001: the 8250LP's board redrawn as one PCB with one
+    # double-sided drive, a Matsushita JU-570-2 (schematic 251406). Both
+    # processors see an 8250. The interface processor runs DOS 2.7, which
+    # doesn't know there is one drive, and the controller runs 251257-02A
+    # from the EPROM on its 6530 adaptor (251252-01): the 8250LP's program
+    # with an interrupt every 3 ms for the JU-570's step rate, a longer head
+    # settle, and every job for drive 1 ended with an error. Drive 1's
+    # stepper, motor and LED aren't wired, so the unit takes no disk there,
+    # and its LED never lights.
+    class Model1001 < Model8250
+      # The LED bit of drive 1, which the board leaves unwired.
+      DRIVE1_LED = 0x01
+
+      def model_name = "1001"
+
+      # +fdc_rom+ defaults to 251257-02A, the rest as Model8050's.
+      def initialize(dos_rom: nil, fdc_rom: nil, host_clock_hz: CLOCK_HZ, device: 8)
+        super(dos_rom:, fdc_rom: fdc_rom || ROM.read("1001/fdc-251257-02a.rom"), host_clock_hz:, device:)
+      end
+
+      def leds = super & ~DRIVE1_LED
+
+      # Puts a Disk in drive 0, the only one. Drive 1 raises ArgumentError.
+      def insert(disk, drive: 0)
+        raise ArgumentError, "the 1001 has one drive, not drive #{drive}" unless drive.zero?
+
+        super
+      end
+    end
+  end
+end

data/lib/badline/drives/model2031.rb

@@ -34,6 +34,12 @@ module Badline
 
       def model_name = "2031"
 
+      def boot_cycles = BOOT_CYCLES
+
+      # Whether the drive is where VICE saves it: its CPU between
+      # instructions.
+      def settled_for_vice? = cpu.boundary?
+
       # +rom+ covers $C000-$FFFF, and defaults to the DOS image in the ROM
       # path. +device+ is the number the jumpers set, 8 to 11.
       def initialize(rom: nil, host_clock_hz: CLOCK_HZ, device: 8, debug: false)

data/lib/badline/drives/model4040/disk.rb

@@ -0,0 +1,62 @@
+# frozen_string_literal: true
+
+module Badline
+  module Drives
+    class Model4040
+      # A .d64 image as the 4040's controller finds it on the disk, each
+      # track a ring of byte cells as on the 8050 (Model8050::Disk), laid
+      # out as DOS 2.1's format writes it, sector after sector:
+      #
+      #   4 sync, $08, checksum, sector, track, ID 2, ID 1,
+      #   9 x $00, 4 sync, $07, 256 data bytes, checksum, then $00
+      #
+      # nine cells being the header gap the interface processor gives the
+      # controller ($049D, from DOS 2.1's SECTRK table), past which a write
+      # puts its syncs. A .d67, DOS 1's disk, is laid out as DOS 1 writes a
+      # sector: 2 sync, the header, one $08, 2 sync, $07, the data and its
+      # checksum. DOS 1's format writes headers only, so this is the track as
+      # if every sector had been written. The disk's ID is the BAM's, at
+      # 18/0 $A2. A turn passes 80,000 / (16 - zone) cells, the 16 MHz bit
+      # clock's.
+      class Disk < Model8050::Disk
+        # How many tracks a disk holds: 35.
+        def side_tracks = 35
+
+        def sides = 1
+
+        # The cells a track of the zone holds in one turn at 300 rpm: the
+        # 200,000 µs of a turn over 2.5 µs times 16 less the zone a byte.
+        def self.cells_in(zone) = 80_000 / (16 - zone)
+
+        # The zone a track is recorded in, 3 outermost to 0 innermost.
+        def self.zone_of(track) = Storage::D64Image.zone(track)
+
+        private
+
+        def build(number)
+          id1, id2 = disk_id
+          cells = []
+          sectors = @image.sectors_in(number)
+          dos1 = @image.is_a?(Storage::D67Image)
+          sectors.times do |sector|
+            data = @image.read_block(number, sector)
+            header = [0x08, number ^ sector ^ id1 ^ id2, sector, number, id2, id1]
+            if dos1
+              cells.push(SYNC, SYNC, *header, 0x08, SYNC, SYNC, 0x07)
+            else
+              cells.push(SYNC, SYNC, SYNC, SYNC, *header, *Array.new(9, 0x00), SYNC, SYNC, SYNC, SYNC, 0x07)
+            end
+            cells.concat(data)
+            cells << checksum(data)
+          end
+          pad(cells, sectors, self.class.cells_in(self.class.zone_of(number)))
+        end
+
+        def disk_id
+          bam = @image.read_block(18, 0)
+          [bam[0xa2], bam[0xa3]]
+        end
+      end
+    end
+  end
+end

data/lib/badline/drives/model4040/ip_bus.rb

@@ -0,0 +1,46 @@
+# frozen_string_literal: true
+
+module Badline
+  module Drives
+    class Model4040
+      # The interface processor's bus (schematic 320806, sheet 1). UB3
+      # decodes A12-A14 only, so the map repeats every 32 KB:
+      #
+      # $0000-$0FFF - the two 6532s, as on the 8050 (Model8050::IPBus)
+      # $1000-$4FFF - the common RAM, 1 KB in each block, mirrored through it
+      # $5000-$7FFF - the ROM sockets UJ1, UL1 and UH1, seen again at
+      #               $D000-$FFFF, where the processor finds its vectors
+      #
+      # A socket left empty, as UJ1 is under DOS 1, reads as open bus: the
+      # last byte on the data bus.
+      class IPBus < Model8050::IPBus
+        def peek(addr)
+          addr &= 0x7fff
+          return @data = rom_peek(addr | 0x8000) if addr >= 0x5000
+
+          @data = if addr < 0x1000
+                    peek_riots(addr)
+                  else
+                    @common.peek((((addr >> 12) - 1) << 10) | (addr & 0x03ff))
+                  end
+        end
+
+        def poke(addr, value)
+          @data = value
+          addr &= 0x7fff
+          return if addr >= 0x5000
+
+          if addr < 0x1000
+            poke_riots(addr, value)
+          else
+            poke_common((((addr >> 12) - 1) << 10) | (addr & 0x03ff), value)
+          end
+        end
+
+        private
+
+        def rom_peek(addr) = addr >= @rom.start ? @rom.peek(addr) : @data
+      end
+    end
+  end
+end

data/lib/badline/drives/model4040/keyed_state.rb

@@ -0,0 +1,57 @@
+# frozen_string_literal: true
+
+module Badline
+  module Drives
+    class Model4040
+      class Disk
+        def image_format = @image.is_a?(Storage::D67Image) ? "d67" : "d64"
+
+        # The disk a BL-D8-DISK module holds, as Model8050::Disk's, from a
+        # .d64 or a .d67.
+        def self.from_fields(input, detached: false)
+          path = input.text("path", "")
+          read_only = input.bool("read_only", false) || detached
+          kind = input.choice("image.format", %w[d64 d67], "d64")
+          bytes = input.bytes("image", "".b).bytes
+          path = "" if detached || !File.file?(path)
+          image = if kind == "d67"
+                    Storage::D67Image.new(path, read_only:, bytes:)
+                  else
+                    Storage::D64Image.new(path, read_only:, bytes:)
+                  end
+          new(image).load_track_fields(input)
+        end
+      end
+
+      class Mechanism
+        # The drives' fields in a keyed snapshot module (BL-D8-MECH), a value
+        # a drive in each list: the heads' half tracks, the stepper counts,
+        # each disk's place in its turn and its bit clock and the motors,
+        # then byte ready, the byte on VIA port A and SYNC. The disks load
+        # from their own modules.
+        module KeyedState
+          def save_fields(out)
+            out.ints("half_tracks", @half_tracks).ints("phases", @phases).ints("positions", @positions)
+            out.ints("bit_clocks", @clocks)
+            out.ints("motors", @motors.map { |on| on ? 1 : 0 }).ints("syncs", @syncs.map { |low| low ? 1 : 0 })
+            out.bool("ca1_low", @ca1_low).int("data_in", @data_in)
+          end
+
+          def load_fields(input, disks)
+            @disks = disks
+            input.ints_into("half_tracks", @half_tracks)
+            input.ints_into("phases", @phases)
+            input.ints_into("positions", @positions)
+            input.ints_into("bit_clocks", @clocks)
+            @motors = input.ints("motors", [0, 0]).map { |on| on == 1 }
+            @syncs = input.ints("syncs", [0, 0]).map { |low| low == 1 }
+            @ca1_low = input.bool("ca1_low", @ca1_low)
+            @data_in = input.byte("data_in", @data_in)
+          end
+        end
+
+        include KeyedState
+      end
+    end
+  end
+end

data/lib/badline/drives/model4040/mechanism.rb

@@ -0,0 +1,192 @@
+# frozen_string_literal: true
+
+module Badline
+  module Drives
+    class Model4040
+      # The unit's two SA390 drives as the 6504 sees them through the VIA
+      # and the 6530 (schematic 320806, sheets 2 and 3).
+      #
+      # VIA port B runs the drives: PB5 drive 0's motor and PB4 drive 1's,
+      # each on while low, PB2-3 drive 0's stepper and PB0-1 drive 1's. The
+      # 6530's port B picks the drive on PB0 and the zone on PB1-2, and
+      # reads write protect on PB3, high while the disk can't be written,
+      # and SYNC on PB6, low while ten one bits sit in the shift register.
+      # Its port A holds the byte to write.
+      #
+      # Each stepper's two bits count in binary: one up moves the head half
+      # a track in, one down half a track out, and the controller steps
+      # once an interrupt, twice a track ($FF82), bumping the head against
+      # track 1 with 116 steps out.
+      #
+      # A turning disk passes one byte cell under the head every ten bit
+      # cells, at 16 MHz divided by 16 less the track's zone and then by 4,
+      # and the byte cells come round 300 times a minute (Disk). Each data
+      # cell ends in byte ready, which latches the byte into VIA port A
+      # through CA1; the controller has no SO pin and polls the VIA's
+      # interrupt flags for it. A sync cell holds SYNC low instead. While
+      # the VIA's CB2 is low the drive writes: each cell takes the 6530's
+      # port A, or a sync while CA2 is high, and still ends in byte ready.
+      # The format code holds CA2 high in pulse mode, which reading port A
+      # pulls low for a cycle.
+      class Mechanism
+        WRITE_PROTECT = 0x08
+        SYNC_LINE = 0x40
+
+        # The half tracks a head can reach: track 1 to 35.
+        HALF_TRACKS = 70
+
+        attr_reader :data_in, :half_tracks
+        attr_accessor :via, :rriot
+
+        def initialize
+          @via = nil
+          @rriot = nil
+          @disks = [nil, nil]
+          @half_tracks = [0, 0]
+          @phases = [0, 0]
+          @positions = [0, 0]
+          @clocks = [0, 0]
+          @motors = [false, false]
+          @data_in = 0xff
+          @syncs = [false, false]
+          @ca1_low = false
+        end
+
+        # The Disk in +drive+, 0 or 1, or nil.
+        def disk(drive = 0) = @disks[drive]
+
+        def insert(disk, drive = 0)
+          @disks[drive]&.flush
+          @disks[drive] = disk
+        end
+
+        def flush
+          @disks.each { |disk| disk&.flush }
+        end
+
+        def motor_on?(drive = 0) = @motors[drive]
+
+        # The track under +drive+'s head, 1 to 35.
+        def track(drive = 0) = (@half_tracks[drive] >> 1) + 1
+
+        def cycle!
+          if @ca1_low
+            @ca1_low = false
+            @via.ca1 = true
+          end
+          drives = @via.port_b_output
+          turn(0, drives.nobits?(0x20), (drives >> 2) & 0x03)
+          turn(1, drives.nobits?(0x10), drives & 0x03)
+        end
+
+        # Whether a cycle would change nothing: both motors off and no byte
+        # ready under way.
+        def quiet? = !@motors[0] && !@motors[1] && !@ca1_low
+
+        # What the drives hold, for comparing them at two points.
+        def idle_state = [*@half_tracks, *@phases, *@motors, *@syncs, @data_in]
+
+        # The 6530's port B inputs.
+        def status_lines
+          drive = selected_drive
+          lines = 0xff
+          lines &= ~WRITE_PROTECT unless @disks[drive]&.write_protected?
+          @syncs[drive] ? lines & ~SYNC_LINE : lines
+        end
+
+        private
+
+        def selected_drive = @rriot.port_b_output & 0x01
+
+        def turn(drive, motor, phase)
+          step(drive, phase) if phase != @phases[drive]
+          motor_off(drive) if @motors[drive] && !motor
+          @motors[drive] = motor
+          return @syncs[drive] = false unless motor && @disks[drive]
+
+          clock = @clocks[drive] + 2
+          byte = 5 * (16 - Disk.zone_of(track(drive)))
+          if clock >= byte
+            clock -= byte
+            pass_cell(drive)
+          end
+          @clocks[drive] = clock
+        end
+
+        def step(drive, phase)
+          change = (phase - @phases[drive]) & 0x03
+          @phases[drive] = phase
+          half_track = @half_tracks[drive]
+          if change == 1
+            half_track += 1
+          elsif change == 3
+            half_track -= 1
+          end
+          @half_tracks[drive] = half_track.clamp(0, HALF_TRACKS - 1)
+        end
+
+        def motor_off(drive)
+          @disks[drive]&.flush
+        end
+
+        # A cell has passed under +drive+'s head.
+        def pass_cell(drive)
+          disk = @disks[drive]
+          number = track(drive)
+          cells = disk.track(number)
+          return unless cells
+
+          position = @positions[drive] % cells.length
+          @positions[drive] = position + 1
+          return unless drive == selected_drive
+
+          writing? ? write_cell(drive, disk, number, cells, position) : read_cell(drive, cells, position)
+        end
+
+        def writing? = !@via.cb2_output
+
+        def read_cell(drive, cells, position)
+          cell = cells[position]
+          @syncs[drive] = cell == Disk::SYNC
+          byte_ready(cell) unless cell == Disk::SYNC
+        end
+
+        def write_cell(drive, disk, number, cells, position)
+          cells[position] = @via.ca2_output ? Disk::SYNC : @rriot.port_a_output
+          disk.written(number)
+          @syncs[drive] = false
+          byte_ready(@data_in)
+        end
+
+        def byte_ready(byte)
+          @data_in = byte
+          @via.ca1 = false
+          @ca1_low = true
+        end
+      end
+
+      # VIA port A reads the byte the last cell latched. Port B drives the
+      # drives only.
+      class ReadLines
+        def initialize(mechanism)
+          @mechanism = mechanism
+        end
+
+        def read_a(_lines) = @mechanism.data_in
+
+        def read_b(_lines) = 0xff
+      end
+
+      # The 6530's port B inputs from the drives.
+      class StatusLines
+        def initialize(mechanism)
+          @mechanism = mechanism
+        end
+
+        def read_a(_lines) = 0xff
+
+        def read_b(_lines) = @mechanism.status_lines
+      end
+    end
+  end
+end

data/lib/badline/drives/model4040/parts.rb

@@ -0,0 +1,20 @@
+# frozen_string_literal: true
+
+module Badline
+  module Drives
+    class Model4040
+      # The interface processor's 6502, UN1, on the 4040's IPBus.
+      class IPCPU
+        include Badline::Chips::CPU::Core
+        include Engine::IdleCPU
+      end
+
+      # The floppy controller's 6504, UH3, on the 8050's FDCBus. It has no
+      # SO pin.
+      class FDCCPU
+        include Badline::Chips::CPU::Core
+        include Engine::IdleCPU
+      end
+    end
+  end
+end