v86 0.3.6 → 0.4.0

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (369) hide show
  1. package/Readme.md +17 -6
  2. package/bios/seabios/.config +113 -0
  3. package/bios/seabios/.config.old +114 -0
  4. package/bios/seabios/.gitignore +4 -0
  5. package/bios/seabios/COPYING +674 -0
  6. package/bios/seabios/COPYING.LESSER +165 -0
  7. package/bios/seabios/Makefile +286 -0
  8. package/bios/seabios/README +17 -0
  9. package/bios/seabios/docs/Build_overview.md +104 -0
  10. package/bios/seabios/docs/Contributing.md +20 -0
  11. package/bios/seabios/docs/Debugging.md +111 -0
  12. package/bios/seabios/docs/Developer_Documentation.md +25 -0
  13. package/bios/seabios/docs/Developer_links.md +86 -0
  14. package/bios/seabios/docs/Download.md +27 -0
  15. package/bios/seabios/docs/Execution_and_code_flow.md +178 -0
  16. package/bios/seabios/docs/Linking_overview.md +160 -0
  17. package/bios/seabios/docs/Mailinglist.md +8 -0
  18. package/bios/seabios/docs/Memory_Model.md +253 -0
  19. package/bios/seabios/docs/README +5 -0
  20. package/bios/seabios/docs/Releases.md +482 -0
  21. package/bios/seabios/docs/Runtime_config.md +193 -0
  22. package/bios/seabios/docs/SeaBIOS.md +17 -0
  23. package/bios/seabios/docs/SeaVGABIOS.md +39 -0
  24. package/bios/seabios/out/autoconf.h +117 -0
  25. package/bios/seabios/out/include/config/acpi/dsdt.h +0 -0
  26. package/bios/seabios/out/include/config/acpi.h +0 -0
  27. package/bios/seabios/out/include/config/ahci.h +0 -0
  28. package/bios/seabios/out/include/config/apmbios.h +0 -0
  29. package/bios/seabios/out/include/config/ata/dma.h +0 -0
  30. package/bios/seabios/out/include/config/ata/pio32.h +0 -0
  31. package/bios/seabios/out/include/config/ata.h +0 -0
  32. package/bios/seabios/out/include/config/auto.conf +69 -0
  33. package/bios/seabios/out/include/config/auto.conf.cmd +9 -0
  34. package/bios/seabios/out/include/config/boot.h +0 -0
  35. package/bios/seabios/out/include/config/bootorder.h +0 -0
  36. package/bios/seabios/out/include/config/build/vgabios.h +0 -0
  37. package/bios/seabios/out/include/config/call32/smm.h +0 -0
  38. package/bios/seabios/out/include/config/cdrom/boot.h +0 -0
  39. package/bios/seabios/out/include/config/cdrom/emu.h +0 -0
  40. package/bios/seabios/out/include/config/debug/level.h +0 -0
  41. package/bios/seabios/out/include/config/drives.h +0 -0
  42. package/bios/seabios/out/include/config/entry/extrastack.h +0 -0
  43. package/bios/seabios/out/include/config/esp/scsi.h +0 -0
  44. package/bios/seabios/out/include/config/flash/floppy.h +0 -0
  45. package/bios/seabios/out/include/config/floppy.h +0 -0
  46. package/bios/seabios/out/include/config/fw/romfile/load.h +0 -0
  47. package/bios/seabios/out/include/config/hardware/irq.h +0 -0
  48. package/bios/seabios/out/include/config/kbd/call/int15/4f.h +0 -0
  49. package/bios/seabios/out/include/config/keyboard.h +0 -0
  50. package/bios/seabios/out/include/config/lpt.h +0 -0
  51. package/bios/seabios/out/include/config/lsi/scsi.h +0 -0
  52. package/bios/seabios/out/include/config/malloc/uppermemory.h +0 -0
  53. package/bios/seabios/out/include/config/megasas.h +0 -0
  54. package/bios/seabios/out/include/config/mouse.h +0 -0
  55. package/bios/seabios/out/include/config/mpt/scsi.h +0 -0
  56. package/bios/seabios/out/include/config/mptable.h +0 -0
  57. package/bios/seabios/out/include/config/mtrr/init.h +0 -0
  58. package/bios/seabios/out/include/config/optionroms.h +0 -0
  59. package/bios/seabios/out/include/config/override/pci/id.h +0 -0
  60. package/bios/seabios/out/include/config/pcibios.h +0 -0
  61. package/bios/seabios/out/include/config/pirtable.h +0 -0
  62. package/bios/seabios/out/include/config/pmm.h +0 -0
  63. package/bios/seabios/out/include/config/pmtimer.h +0 -0
  64. package/bios/seabios/out/include/config/pnpbios.h +0 -0
  65. package/bios/seabios/out/include/config/ps2port.h +0 -0
  66. package/bios/seabios/out/include/config/pvscsi.h +0 -0
  67. package/bios/seabios/out/include/config/qemu/hardware.h +0 -0
  68. package/bios/seabios/out/include/config/qemu.h +0 -0
  69. package/bios/seabios/out/include/config/rom/size.h +0 -0
  70. package/bios/seabios/out/include/config/rtc/timer.h +0 -0
  71. package/bios/seabios/out/include/config/s3/resume.h +0 -0
  72. package/bios/seabios/out/include/config/sdcard.h +0 -0
  73. package/bios/seabios/out/include/config/serial.h +0 -0
  74. package/bios/seabios/out/include/config/tcgbios.h +0 -0
  75. package/bios/seabios/out/include/config/threads.h +0 -0
  76. package/bios/seabios/out/include/config/tristate.conf +4 -0
  77. package/bios/seabios/out/include/config/tsc/timer.h +0 -0
  78. package/bios/seabios/out/include/config/use/smm.h +0 -0
  79. package/bios/seabios/out/include/config/vga/allocate/extra/stack.h +0 -0
  80. package/bios/seabios/out/include/config/vga/bochs/stdvga.h +0 -0
  81. package/bios/seabios/out/include/config/vga/bochs.h +0 -0
  82. package/bios/seabios/out/include/config/vga/did.h +0 -0
  83. package/bios/seabios/out/include/config/vga/extra/stack/size.h +0 -0
  84. package/bios/seabios/out/include/config/vga/fixup/asm.h +0 -0
  85. package/bios/seabios/out/include/config/vga/pci.h +0 -0
  86. package/bios/seabios/out/include/config/vga/stdvga/ports.h +0 -0
  87. package/bios/seabios/out/include/config/vga/vbe.h +0 -0
  88. package/bios/seabios/out/include/config/vga/vid.h +0 -0
  89. package/bios/seabios/out/include/config/vgahooks.h +0 -0
  90. package/bios/seabios/out/include/config/virtio/blk.h +0 -0
  91. package/bios/seabios/out/include/config/virtio/scsi.h +0 -0
  92. package/bios/seabios/out/include/config/xen.h +0 -0
  93. package/bios/seabios/out/scripts/kconfig/conf +0 -0
  94. package/bios/seabios/out/scripts/kconfig/conf.o +0 -0
  95. package/bios/seabios/out/scripts/kconfig/zconf.hash.c +289 -0
  96. package/bios/seabios/out/scripts/kconfig/zconf.lex.c +2420 -0
  97. package/bios/seabios/out/scripts/kconfig/zconf.tab.c +2538 -0
  98. package/bios/seabios/out/scripts/kconfig/zconf.tab.o +0 -0
  99. package/bios/seabios/scripts/acpi_extract.py +366 -0
  100. package/bios/seabios/scripts/acpi_extract_preprocess.py +41 -0
  101. package/bios/seabios/scripts/buildrom.py +56 -0
  102. package/bios/seabios/scripts/buildversion.py +134 -0
  103. package/bios/seabios/scripts/checkrom.py +95 -0
  104. package/bios/seabios/scripts/checkstack.py +226 -0
  105. package/bios/seabios/scripts/checksum.py +16 -0
  106. package/bios/seabios/scripts/encodeint.py +21 -0
  107. package/bios/seabios/scripts/gen-offsets.sh +17 -0
  108. package/bios/seabios/scripts/kconfig/.gitignore +22 -0
  109. package/bios/seabios/scripts/kconfig/Makefile +331 -0
  110. package/bios/seabios/scripts/kconfig/POTFILES.in +12 -0
  111. package/bios/seabios/scripts/kconfig/check.sh +13 -0
  112. package/bios/seabios/scripts/kconfig/conf.c +718 -0
  113. package/bios/seabios/scripts/kconfig/confdata.c +1250 -0
  114. package/bios/seabios/scripts/kconfig/expr.c +1168 -0
  115. package/bios/seabios/scripts/kconfig/expr.h +241 -0
  116. package/bios/seabios/scripts/kconfig/gconf.c +1542 -0
  117. package/bios/seabios/scripts/kconfig/gconf.glade +661 -0
  118. package/bios/seabios/scripts/kconfig/images.c +326 -0
  119. package/bios/seabios/scripts/kconfig/kxgettext.c +235 -0
  120. package/bios/seabios/scripts/kconfig/lex.zconf.c +2430 -0
  121. package/bios/seabios/scripts/kconfig/list.h +131 -0
  122. package/bios/seabios/scripts/kconfig/lkc.h +200 -0
  123. package/bios/seabios/scripts/kconfig/lkc_proto.h +57 -0
  124. package/bios/seabios/scripts/kconfig/lxdialog/.gitignore +4 -0
  125. package/bios/seabios/scripts/kconfig/lxdialog/BIG.FAT.WARNING +4 -0
  126. package/bios/seabios/scripts/kconfig/lxdialog/check-lxdialog.sh +87 -0
  127. package/bios/seabios/scripts/kconfig/lxdialog/checklist.c +332 -0
  128. package/bios/seabios/scripts/kconfig/lxdialog/dialog.h +257 -0
  129. package/bios/seabios/scripts/kconfig/lxdialog/inputbox.c +301 -0
  130. package/bios/seabios/scripts/kconfig/lxdialog/menubox.c +437 -0
  131. package/bios/seabios/scripts/kconfig/lxdialog/textbox.c +408 -0
  132. package/bios/seabios/scripts/kconfig/lxdialog/util.c +713 -0
  133. package/bios/seabios/scripts/kconfig/lxdialog/yesno.c +114 -0
  134. package/bios/seabios/scripts/kconfig/mconf.c +1036 -0
  135. package/bios/seabios/scripts/kconfig/menu.c +697 -0
  136. package/bios/seabios/scripts/kconfig/merge_config.sh +150 -0
  137. package/bios/seabios/scripts/kconfig/nconf.c +1556 -0
  138. package/bios/seabios/scripts/kconfig/nconf.gui.c +656 -0
  139. package/bios/seabios/scripts/kconfig/nconf.h +96 -0
  140. package/bios/seabios/scripts/kconfig/qconf.cc +1795 -0
  141. package/bios/seabios/scripts/kconfig/qconf.h +338 -0
  142. package/bios/seabios/scripts/kconfig/streamline_config.pl +647 -0
  143. package/bios/seabios/scripts/kconfig/symbol.c +1373 -0
  144. package/bios/seabios/scripts/kconfig/util.c +157 -0
  145. package/bios/seabios/scripts/kconfig/zconf.gperf +48 -0
  146. package/bios/seabios/scripts/kconfig/zconf.hash.c_shipped +289 -0
  147. package/bios/seabios/scripts/kconfig/zconf.l +363 -0
  148. package/bios/seabios/scripts/kconfig/zconf.lex.c_shipped +2420 -0
  149. package/bios/seabios/scripts/kconfig/zconf.tab.c_shipped +2538 -0
  150. package/bios/seabios/scripts/kconfig/zconf.y +733 -0
  151. package/bios/seabios/scripts/layoutrom.py +705 -0
  152. package/bios/seabios/scripts/python23compat.py +14 -0
  153. package/bios/seabios/scripts/readserial.py +190 -0
  154. package/bios/seabios/scripts/tarball.sh +36 -0
  155. package/bios/seabios/scripts/test-build.sh +90 -0
  156. package/bios/seabios/scripts/transdump.py +53 -0
  157. package/bios/seabios/scripts/vgafixup.py +96 -0
  158. package/bios/seabios/src/Kconfig +579 -0
  159. package/bios/seabios/src/apm.c +215 -0
  160. package/bios/seabios/src/asm-offsets.c +23 -0
  161. package/bios/seabios/src/biosvar.h +130 -0
  162. package/bios/seabios/src/block.c +623 -0
  163. package/bios/seabios/src/block.h +121 -0
  164. package/bios/seabios/src/bmp.c +117 -0
  165. package/bios/seabios/src/boot.c +793 -0
  166. package/bios/seabios/src/bootsplash.c +255 -0
  167. package/bios/seabios/src/bregs.h +80 -0
  168. package/bios/seabios/src/byteorder.h +71 -0
  169. package/bios/seabios/src/cdrom.c +322 -0
  170. package/bios/seabios/src/clock.c +506 -0
  171. package/bios/seabios/src/code16gcc.s +1 -0
  172. package/bios/seabios/src/config.h +108 -0
  173. package/bios/seabios/src/cp437.c +275 -0
  174. package/bios/seabios/src/cp437.h +1 -0
  175. package/bios/seabios/src/disk.c +779 -0
  176. package/bios/seabios/src/e820map.c +152 -0
  177. package/bios/seabios/src/e820map.h +26 -0
  178. package/bios/seabios/src/entryfuncs.S +165 -0
  179. package/bios/seabios/src/farptr.h +208 -0
  180. package/bios/seabios/src/font.c +139 -0
  181. package/bios/seabios/src/fw/acpi-dsdt-cpu-hotplug.dsl +78 -0
  182. package/bios/seabios/src/fw/acpi-dsdt-dbug.dsl +26 -0
  183. package/bios/seabios/src/fw/acpi-dsdt-hpet.dsl +36 -0
  184. package/bios/seabios/src/fw/acpi-dsdt-isa.dsl +102 -0
  185. package/bios/seabios/src/fw/acpi-dsdt-pci-crs.dsl +90 -0
  186. package/bios/seabios/src/fw/acpi-dsdt.dsl +342 -0
  187. package/bios/seabios/src/fw/acpi-dsdt.hex +554 -0
  188. package/bios/seabios/src/fw/acpi.c +685 -0
  189. package/bios/seabios/src/fw/biostables.c +491 -0
  190. package/bios/seabios/src/fw/coreboot.c +569 -0
  191. package/bios/seabios/src/fw/csm.c +347 -0
  192. package/bios/seabios/src/fw/dev-pci.h +52 -0
  193. package/bios/seabios/src/fw/dev-piix.h +29 -0
  194. package/bios/seabios/src/fw/dev-q35.h +52 -0
  195. package/bios/seabios/src/fw/lzmadecode.c +398 -0
  196. package/bios/seabios/src/fw/lzmadecode.h +67 -0
  197. package/bios/seabios/src/fw/mptable.c +197 -0
  198. package/bios/seabios/src/fw/mtrr.c +105 -0
  199. package/bios/seabios/src/fw/multiboot.c +111 -0
  200. package/bios/seabios/src/fw/paravirt.c +624 -0
  201. package/bios/seabios/src/fw/paravirt.h +63 -0
  202. package/bios/seabios/src/fw/pciinit.c +1187 -0
  203. package/bios/seabios/src/fw/pirtable.c +103 -0
  204. package/bios/seabios/src/fw/q35-acpi-dsdt.dsl +450 -0
  205. package/bios/seabios/src/fw/romfile_loader.c +259 -0
  206. package/bios/seabios/src/fw/romfile_loader.h +91 -0
  207. package/bios/seabios/src/fw/shadow.c +208 -0
  208. package/bios/seabios/src/fw/smbios.c +585 -0
  209. package/bios/seabios/src/fw/smm.c +269 -0
  210. package/bios/seabios/src/fw/smp.c +194 -0
  211. package/bios/seabios/src/fw/ssdt-misc.dsl +104 -0
  212. package/bios/seabios/src/fw/ssdt-misc.hex +88 -0
  213. package/bios/seabios/src/fw/ssdt-pcihp.dsl +36 -0
  214. package/bios/seabios/src/fw/ssdt-pcihp.hex +38 -0
  215. package/bios/seabios/src/fw/ssdt-proc.dsl +48 -0
  216. package/bios/seabios/src/fw/ssdt-proc.hex +35 -0
  217. package/bios/seabios/src/fw/xen.c +149 -0
  218. package/bios/seabios/src/fw/xen.h +125 -0
  219. package/bios/seabios/src/gen-defs.h +19 -0
  220. package/bios/seabios/src/hw/ahci.c +697 -0
  221. package/bios/seabios/src/hw/ahci.h +201 -0
  222. package/bios/seabios/src/hw/ata.c +1046 -0
  223. package/bios/seabios/src/hw/ata.h +163 -0
  224. package/bios/seabios/src/hw/blockcmd.c +372 -0
  225. package/bios/seabios/src/hw/blockcmd.h +114 -0
  226. package/bios/seabios/src/hw/dma.c +67 -0
  227. package/bios/seabios/src/hw/esp-scsi.c +241 -0
  228. package/bios/seabios/src/hw/esp-scsi.h +8 -0
  229. package/bios/seabios/src/hw/floppy.c +741 -0
  230. package/bios/seabios/src/hw/lsi-scsi.c +221 -0
  231. package/bios/seabios/src/hw/lsi-scsi.h +8 -0
  232. package/bios/seabios/src/hw/megasas.c +405 -0
  233. package/bios/seabios/src/hw/megasas.h +8 -0
  234. package/bios/seabios/src/hw/mpt-scsi.c +319 -0
  235. package/bios/seabios/src/hw/mpt-scsi.h +8 -0
  236. package/bios/seabios/src/hw/nvme-int.h +199 -0
  237. package/bios/seabios/src/hw/nvme.c +708 -0
  238. package/bios/seabios/src/hw/nvme.h +17 -0
  239. package/bios/seabios/src/hw/pci.c +133 -0
  240. package/bios/seabios/src/hw/pci.h +47 -0
  241. package/bios/seabios/src/hw/pci_ids.h +2632 -0
  242. package/bios/seabios/src/hw/pci_regs.h +556 -0
  243. package/bios/seabios/src/hw/pcidevice.c +192 -0
  244. package/bios/seabios/src/hw/pcidevice.h +76 -0
  245. package/bios/seabios/src/hw/pic.c +115 -0
  246. package/bios/seabios/src/hw/pic.h +60 -0
  247. package/bios/seabios/src/hw/ps2port.c +543 -0
  248. package/bios/seabios/src/hw/ps2port.h +67 -0
  249. package/bios/seabios/src/hw/pvscsi.c +333 -0
  250. package/bios/seabios/src/hw/pvscsi.h +8 -0
  251. package/bios/seabios/src/hw/ramdisk.c +108 -0
  252. package/bios/seabios/src/hw/rtc.c +100 -0
  253. package/bios/seabios/src/hw/rtc.h +75 -0
  254. package/bios/seabios/src/hw/sdcard.c +572 -0
  255. package/bios/seabios/src/hw/serialio.c +113 -0
  256. package/bios/seabios/src/hw/serialio.h +29 -0
  257. package/bios/seabios/src/hw/timer.c +259 -0
  258. package/bios/seabios/src/hw/tpm_drivers.c +636 -0
  259. package/bios/seabios/src/hw/tpm_drivers.h +127 -0
  260. package/bios/seabios/src/hw/usb-ehci.c +650 -0
  261. package/bios/seabios/src/hw/usb-ehci.h +177 -0
  262. package/bios/seabios/src/hw/usb-hid.c +442 -0
  263. package/bios/seabios/src/hw/usb-hid.h +29 -0
  264. package/bios/seabios/src/hw/usb-hub.c +205 -0
  265. package/bios/seabios/src/hw/usb-hub.h +64 -0
  266. package/bios/seabios/src/hw/usb-msc.c +222 -0
  267. package/bios/seabios/src/hw/usb-msc.h +10 -0
  268. package/bios/seabios/src/hw/usb-ohci.c +568 -0
  269. package/bios/seabios/src/hw/usb-ohci.h +144 -0
  270. package/bios/seabios/src/hw/usb-uas.c +289 -0
  271. package/bios/seabios/src/hw/usb-uas.h +9 -0
  272. package/bios/seabios/src/hw/usb-uhci.c +571 -0
  273. package/bios/seabios/src/hw/usb-uhci.h +128 -0
  274. package/bios/seabios/src/hw/usb-xhci.c +1161 -0
  275. package/bios/seabios/src/hw/usb-xhci.h +133 -0
  276. package/bios/seabios/src/hw/usb.c +499 -0
  277. package/bios/seabios/src/hw/usb.h +254 -0
  278. package/bios/seabios/src/hw/virtio-blk.c +211 -0
  279. package/bios/seabios/src/hw/virtio-blk.h +43 -0
  280. package/bios/seabios/src/hw/virtio-pci.c +501 -0
  281. package/bios/seabios/src/hw/virtio-pci.h +151 -0
  282. package/bios/seabios/src/hw/virtio-ring.c +147 -0
  283. package/bios/seabios/src/hw/virtio-ring.h +121 -0
  284. package/bios/seabios/src/hw/virtio-scsi.c +220 -0
  285. package/bios/seabios/src/hw/virtio-scsi.h +47 -0
  286. package/bios/seabios/src/jpeg.c +1055 -0
  287. package/bios/seabios/src/kbd.c +599 -0
  288. package/bios/seabios/src/list.h +91 -0
  289. package/bios/seabios/src/malloc.c +561 -0
  290. package/bios/seabios/src/malloc.h +70 -0
  291. package/bios/seabios/src/memmap.h +21 -0
  292. package/bios/seabios/src/misc.c +195 -0
  293. package/bios/seabios/src/mouse.c +342 -0
  294. package/bios/seabios/src/optionroms.c +475 -0
  295. package/bios/seabios/src/output.c +584 -0
  296. package/bios/seabios/src/output.h +68 -0
  297. package/bios/seabios/src/pcibios.c +241 -0
  298. package/bios/seabios/src/pmm.c +176 -0
  299. package/bios/seabios/src/pnpbios.c +88 -0
  300. package/bios/seabios/src/post.c +337 -0
  301. package/bios/seabios/src/resume.c +157 -0
  302. package/bios/seabios/src/romfile.c +146 -0
  303. package/bios/seabios/src/romfile.h +21 -0
  304. package/bios/seabios/src/romlayout.S +698 -0
  305. package/bios/seabios/src/sercon.c +677 -0
  306. package/bios/seabios/src/serial.c +317 -0
  307. package/bios/seabios/src/sha1.c +147 -0
  308. package/bios/seabios/src/sha1.h +8 -0
  309. package/bios/seabios/src/stacks.c +771 -0
  310. package/bios/seabios/src/stacks.h +68 -0
  311. package/bios/seabios/src/std/LegacyBios.h +985 -0
  312. package/bios/seabios/src/std/acpi.h +323 -0
  313. package/bios/seabios/src/std/bda.h +174 -0
  314. package/bios/seabios/src/std/disk.h +175 -0
  315. package/bios/seabios/src/std/mptable.h +77 -0
  316. package/bios/seabios/src/std/multiboot.h +260 -0
  317. package/bios/seabios/src/std/optionrom.h +59 -0
  318. package/bios/seabios/src/std/pirtable.h +35 -0
  319. package/bios/seabios/src/std/pmm.h +19 -0
  320. package/bios/seabios/src/std/pnpbios.h +24 -0
  321. package/bios/seabios/src/std/smbios.h +167 -0
  322. package/bios/seabios/src/std/tcg.h +554 -0
  323. package/bios/seabios/src/std/vbe.h +156 -0
  324. package/bios/seabios/src/std/vga.h +63 -0
  325. package/bios/seabios/src/string.c +251 -0
  326. package/bios/seabios/src/string.h +31 -0
  327. package/bios/seabios/src/system.c +357 -0
  328. package/bios/seabios/src/tcgbios.c +2014 -0
  329. package/bios/seabios/src/tcgbios.h +19 -0
  330. package/bios/seabios/src/types.h +156 -0
  331. package/bios/seabios/src/util.h +251 -0
  332. package/bios/seabios/src/version.c +5 -0
  333. package/bios/seabios/src/vgahooks.c +355 -0
  334. package/bios/seabios/src/x86.c +23 -0
  335. package/bios/seabios/src/x86.h +277 -0
  336. package/bios/seabios/vgasrc/Kconfig +211 -0
  337. package/bios/seabios/vgasrc/bochsdisplay.c +59 -0
  338. package/bios/seabios/vgasrc/bochsvga.c +447 -0
  339. package/bios/seabios/vgasrc/bochsvga.h +57 -0
  340. package/bios/seabios/vgasrc/cbvga.c +337 -0
  341. package/bios/seabios/vgasrc/clext.c +627 -0
  342. package/bios/seabios/vgasrc/geodevga.c +434 -0
  343. package/bios/seabios/vgasrc/geodevga.h +89 -0
  344. package/bios/seabios/vgasrc/ramfb.c +163 -0
  345. package/bios/seabios/vgasrc/stdvga.c +485 -0
  346. package/bios/seabios/vgasrc/stdvga.h +81 -0
  347. package/bios/seabios/vgasrc/stdvgaio.c +186 -0
  348. package/bios/seabios/vgasrc/stdvgamodes.c +534 -0
  349. package/bios/seabios/vgasrc/swcursor.c +96 -0
  350. package/bios/seabios/vgasrc/vbe.c +432 -0
  351. package/bios/seabios/vgasrc/vgabios.c +1131 -0
  352. package/bios/seabios/vgasrc/vgabios.h +88 -0
  353. package/bios/seabios/vgasrc/vgaentry.S +161 -0
  354. package/bios/seabios/vgasrc/vgafb.c +661 -0
  355. package/bios/seabios/vgasrc/vgafb.h +42 -0
  356. package/bios/seabios/vgasrc/vgafonts.c +785 -0
  357. package/bios/seabios/vgasrc/vgahw.h +152 -0
  358. package/bios/seabios/vgasrc/vgainit.c +202 -0
  359. package/bios/seabios/vgasrc/vgalayout.lds.S +23 -0
  360. package/bios/seabios/vgasrc/vgautil.h +103 -0
  361. package/bios/seabios/vgasrc/vgaversion.c +6 -0
  362. package/build/binaries.js +1 -1
  363. package/build/index-debug.cjs +1 -1
  364. package/build/index-debug.js +1 -1
  365. package/build/index.cjs +1 -1
  366. package/build/index.js +1 -1
  367. package/build/v86-debug.wasm +0 -0
  368. package/build/v86.wasm +0 -0
  369. package/package.json +1 -1
@@ -0,0 +1,259 @@
1
+ #include "romfile_loader.h"
2
+ #include "byteorder.h" // leXX_to_cpu/cpu_to_leXX
3
+ #include "util.h" // checksum
4
+ #include "string.h" // strcmp
5
+ #include "romfile.h" // struct romfile_s
6
+ #include "malloc.h" // Zone*, _malloc
7
+ #include "list.h" // struct hlist_node
8
+ #include "output.h" // warn_*
9
+ #include "paravirt.h" // qemu_cfg_write_file
10
+
11
+ struct romfile_loader_file {
12
+ struct romfile_s *file;
13
+ void *data;
14
+ };
15
+ struct romfile_loader_files {
16
+ int nfiles;
17
+ struct romfile_loader_file files[];
18
+ };
19
+
20
+ // Data structures for storing "write pointer" entries for possible replay
21
+ struct romfile_wr_pointer_entry {
22
+ u64 pointer;
23
+ u32 offset;
24
+ u16 key;
25
+ u8 ptr_size;
26
+ struct hlist_node node;
27
+ };
28
+ static struct hlist_head romfile_pointer_list;
29
+
30
+ static struct romfile_loader_file *
31
+ romfile_loader_find(const char *name,
32
+ struct romfile_loader_files *files)
33
+ {
34
+ int i;
35
+ if (name[ROMFILE_LOADER_FILESZ - 1])
36
+ return NULL;
37
+ for (i = 0; i < files->nfiles; ++i)
38
+ if (!strcmp(files->files[i].file->name, name))
39
+ return &files->files[i];
40
+ return NULL;
41
+ }
42
+
43
+ // Replay "write pointer" entries back to QEMU
44
+ void romfile_fw_cfg_resume(void)
45
+ {
46
+ if (!CONFIG_QEMU)
47
+ return;
48
+
49
+ struct romfile_wr_pointer_entry *entry;
50
+ hlist_for_each_entry(entry, &romfile_pointer_list, node) {
51
+ qemu_cfg_write_file_simple(&entry->pointer, entry->key,
52
+ entry->offset, entry->ptr_size);
53
+ }
54
+ }
55
+
56
+ static void romfile_loader_allocate(struct romfile_loader_entry_s *entry,
57
+ struct romfile_loader_files *files)
58
+ {
59
+ struct zone_s *zone;
60
+ struct romfile_loader_file *file = &files->files[files->nfiles];
61
+ void *data;
62
+ int ret;
63
+ unsigned alloc_align = le32_to_cpu(entry->alloc.align);
64
+
65
+ if (alloc_align & (alloc_align - 1))
66
+ goto err;
67
+
68
+ switch (entry->alloc.zone) {
69
+ case ROMFILE_LOADER_ALLOC_ZONE_HIGH:
70
+ zone = &ZoneHigh;
71
+ break;
72
+ case ROMFILE_LOADER_ALLOC_ZONE_FSEG:
73
+ zone = &ZoneFSeg;
74
+ break;
75
+ default:
76
+ goto err;
77
+ }
78
+ if (alloc_align < MALLOC_MIN_ALIGN)
79
+ alloc_align = MALLOC_MIN_ALIGN;
80
+ if (entry->alloc.file[ROMFILE_LOADER_FILESZ - 1])
81
+ goto err;
82
+ file->file = romfile_find(entry->alloc.file);
83
+ if (!file->file || !file->file->size)
84
+ return;
85
+ data = _malloc(zone, file->file->size, alloc_align);
86
+ if (!data) {
87
+ warn_noalloc();
88
+ return;
89
+ }
90
+ ret = file->file->copy(file->file, data, file->file->size);
91
+ if (ret != file->file->size)
92
+ goto file_err;
93
+ file->data = data;
94
+ files->nfiles++;
95
+ return;
96
+
97
+ file_err:
98
+ free(data);
99
+ err:
100
+ warn_internalerror();
101
+ }
102
+
103
+ static void romfile_loader_add_pointer(struct romfile_loader_entry_s *entry,
104
+ struct romfile_loader_files *files)
105
+ {
106
+ struct romfile_loader_file *dest_file;
107
+ struct romfile_loader_file *src_file;
108
+ unsigned offset = le32_to_cpu(entry->pointer.offset);
109
+ u64 pointer = 0;
110
+
111
+ dest_file = romfile_loader_find(entry->pointer.dest_file, files);
112
+ src_file = romfile_loader_find(entry->pointer.src_file, files);
113
+
114
+ if (!dest_file || !src_file || !dest_file->data || !src_file->data ||
115
+ offset + entry->pointer.size < offset ||
116
+ offset + entry->pointer.size > dest_file->file->size ||
117
+ entry->pointer.size < 1 || entry->pointer.size > 8 ||
118
+ entry->pointer.size & (entry->pointer.size - 1))
119
+ goto err;
120
+
121
+ memcpy(&pointer, dest_file->data + offset, entry->pointer.size);
122
+ pointer = le64_to_cpu(pointer);
123
+ pointer += (unsigned long)src_file->data;
124
+ pointer = cpu_to_le64(pointer);
125
+ memcpy(dest_file->data + offset, &pointer, entry->pointer.size);
126
+
127
+ return;
128
+ err:
129
+ warn_internalerror();
130
+ }
131
+
132
+ static void romfile_loader_add_checksum(struct romfile_loader_entry_s *entry,
133
+ struct romfile_loader_files *files)
134
+ {
135
+ struct romfile_loader_file *file;
136
+ unsigned offset = le32_to_cpu(entry->cksum.offset);
137
+ unsigned start = le32_to_cpu(entry->cksum.start);
138
+ unsigned len = le32_to_cpu(entry->cksum.length);
139
+ u8 *data;
140
+
141
+ file = romfile_loader_find(entry->cksum.file, files);
142
+
143
+ if (!file || !file->data || offset >= file->file->size ||
144
+ start + len < start || start + len > file->file->size)
145
+ goto err;
146
+
147
+ data = file->data + offset;
148
+ *data -= checksum(file->data + start, len);
149
+
150
+ return;
151
+ err:
152
+ warn_internalerror();
153
+ }
154
+
155
+ static void romfile_loader_write_pointer(struct romfile_loader_entry_s *entry,
156
+ struct romfile_loader_files *files)
157
+ {
158
+ struct romfile_s *dest_file;
159
+ struct romfile_loader_file *src_file;
160
+ unsigned dst_offset = le32_to_cpu(entry->wr_pointer.dst_offset);
161
+ unsigned src_offset = le32_to_cpu(entry->wr_pointer.src_offset);
162
+ u64 pointer = 0;
163
+
164
+ /* Writing back to a file that may not be loaded in RAM */
165
+ dest_file = romfile_find(entry->wr_pointer.dest_file);
166
+ src_file = romfile_loader_find(entry->wr_pointer.src_file, files);
167
+
168
+ if (!dest_file || !src_file || !src_file->data ||
169
+ dst_offset + entry->wr_pointer.size < dst_offset ||
170
+ dst_offset + entry->wr_pointer.size > dest_file->size ||
171
+ src_offset >= src_file->file->size ||
172
+ entry->wr_pointer.size < 1 || entry->wr_pointer.size > 8 ||
173
+ entry->wr_pointer.size & (entry->wr_pointer.size - 1)) {
174
+ goto err;
175
+ }
176
+
177
+ pointer = (unsigned long)src_file->data + src_offset;
178
+ /* Make sure the pointer fits within wr_pointer.size */
179
+ if ((entry->wr_pointer.size != sizeof(u64)) &&
180
+ ((pointer >> (entry->wr_pointer.size * 8)) > 0)) {
181
+ goto err;
182
+ }
183
+ pointer = cpu_to_le64(pointer);
184
+
185
+ /* Only supported on QEMU */
186
+ if (qemu_cfg_write_file(&pointer, dest_file, dst_offset,
187
+ entry->wr_pointer.size) != entry->wr_pointer.size) {
188
+ goto err;
189
+ }
190
+
191
+ /* Store the info so it can replayed later if necessary */
192
+ struct romfile_wr_pointer_entry *store = malloc_high(sizeof(*store));
193
+ if (!store) {
194
+ warn_noalloc();
195
+ return;
196
+ }
197
+ store->pointer = pointer;
198
+ store->key = qemu_get_romfile_key(dest_file);
199
+ store->offset = dst_offset;
200
+ store->ptr_size = entry->wr_pointer.size;
201
+ hlist_add_head(&store->node, &romfile_pointer_list);
202
+
203
+ return;
204
+ err:
205
+ warn_internalerror();
206
+ }
207
+
208
+ int romfile_loader_execute(const char *name)
209
+ {
210
+ struct romfile_loader_entry_s *entry;
211
+ int size, offset = 0, nfiles;
212
+ struct romfile_loader_files *files;
213
+ void *data = romfile_loadfile(name, &size);
214
+ if (!data)
215
+ return -1;
216
+
217
+ if (size % sizeof(*entry)) {
218
+ warn_internalerror();
219
+ goto err;
220
+ }
221
+
222
+ /* (over)estimate the number of files to load. */
223
+ nfiles = size / sizeof(*entry);
224
+ files = malloc_tmp(sizeof(*files) + nfiles * sizeof(files->files[0]));
225
+ if (!files) {
226
+ warn_noalloc();
227
+ goto err;
228
+ }
229
+ files->nfiles = 0;
230
+
231
+ for (offset = 0; offset < size; offset += sizeof(*entry)) {
232
+ entry = data + offset;
233
+ switch (le32_to_cpu(entry->command)) {
234
+ case ROMFILE_LOADER_COMMAND_ALLOCATE:
235
+ romfile_loader_allocate(entry, files);
236
+ break;
237
+ case ROMFILE_LOADER_COMMAND_ADD_POINTER:
238
+ romfile_loader_add_pointer(entry, files);
239
+ break;
240
+ case ROMFILE_LOADER_COMMAND_ADD_CHECKSUM:
241
+ romfile_loader_add_checksum(entry, files);
242
+ break;
243
+ case ROMFILE_LOADER_COMMAND_WRITE_POINTER:
244
+ romfile_loader_write_pointer(entry, files);
245
+ break;
246
+ default:
247
+ /* Skip commands that we don't recognize. */
248
+ break;
249
+ }
250
+ }
251
+
252
+ free(files);
253
+ free(data);
254
+ return 0;
255
+
256
+ err:
257
+ free(data);
258
+ return -1;
259
+ }
@@ -0,0 +1,91 @@
1
+ #ifndef __ROMFILE_LOADER_H
2
+ #define __ROMFILE_LOADER_H
3
+
4
+ #include "types.h" // u8
5
+ #include "util.h" // romfile_s
6
+
7
+ #define ROMFILE_LOADER_FILESZ 56
8
+
9
+ /* ROM file linker/loader interface. Linker uses little endian format */
10
+ struct romfile_loader_entry_s {
11
+ u32 command;
12
+ union {
13
+ /*
14
+ * COMMAND_ALLOCATE - allocate a table from @alloc.file
15
+ * subject to @alloc.align alignment (must be power of 2)
16
+ * and @alloc.zone (can be HIGH or FSEG) requirements.
17
+ *
18
+ * Must appear exactly once for each file, and before
19
+ * this file is referenced by any other command.
20
+ */
21
+ struct {
22
+ char file[ROMFILE_LOADER_FILESZ];
23
+ u32 align;
24
+ u8 zone;
25
+ } alloc;
26
+
27
+ /*
28
+ * COMMAND_ADD_POINTER - patch the table (originating from
29
+ * @dest_file) at @pointer.offset, by adding a pointer to the table
30
+ * originating from @src_file. 1,2,4 or 8 byte unsigned
31
+ * addition is used depending on @pointer.size.
32
+ */
33
+ struct {
34
+ char dest_file[ROMFILE_LOADER_FILESZ];
35
+ char src_file[ROMFILE_LOADER_FILESZ];
36
+ u32 offset;
37
+ u8 size;
38
+ } pointer;
39
+
40
+ /*
41
+ * COMMAND_ADD_CHECKSUM - calculate checksum of the range specified by
42
+ * @cksum.start and @cksum.length fields,
43
+ * and then add the value at @cksum_offset.
44
+ * Checksum simply sums -X for each byte X in the range
45
+ * using 8-bit math.
46
+ */
47
+ struct {
48
+ char file[ROMFILE_LOADER_FILESZ];
49
+ u32 offset;
50
+ u32 start;
51
+ u32 length;
52
+ } cksum;
53
+
54
+ /*
55
+ * COMMAND_WRITE_POINTER - Write back to a host file via DMA,
56
+ * @wr_pointer.dest_file at offset @wr_pointer.dst_offset, a pointer
57
+ * to the table originating from @wr_pointer.src_file at offset
58
+ * @wr_pointer.src_offset.
59
+ * 1,2,4 or 8 byte unsigned addition is used depending on
60
+ * @wr_pointer.size.
61
+ */
62
+ struct {
63
+ char dest_file[ROMFILE_LOADER_FILESZ];
64
+ char src_file[ROMFILE_LOADER_FILESZ];
65
+ u32 dst_offset;
66
+ u32 src_offset;
67
+ u8 size;
68
+ } wr_pointer;
69
+
70
+ /* padding */
71
+ char pad[124];
72
+ };
73
+ };
74
+
75
+ enum {
76
+ ROMFILE_LOADER_COMMAND_ALLOCATE = 0x1,
77
+ ROMFILE_LOADER_COMMAND_ADD_POINTER = 0x2,
78
+ ROMFILE_LOADER_COMMAND_ADD_CHECKSUM = 0x3,
79
+ ROMFILE_LOADER_COMMAND_WRITE_POINTER = 0x4,
80
+ };
81
+
82
+ enum {
83
+ ROMFILE_LOADER_ALLOC_ZONE_HIGH = 0x1,
84
+ ROMFILE_LOADER_ALLOC_ZONE_FSEG = 0x2,
85
+ };
86
+
87
+ int romfile_loader_execute(const char *name);
88
+
89
+ void romfile_fw_cfg_resume(void);
90
+
91
+ #endif
@@ -0,0 +1,208 @@
1
+ // Support for enabling/disabling BIOS ram shadowing.
2
+ //
3
+ // Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net>
4
+ // Copyright (C) 2006 Fabrice Bellard
5
+ //
6
+ // This file may be distributed under the terms of the GNU LGPLv3 license.
7
+
8
+ #include "config.h" // CONFIG_*
9
+ #include "dev-q35.h" // PCI_VENDOR_ID_INTEL
10
+ #include "dev-piix.h" // I440FX_PAM0
11
+ #include "hw/pci.h" // pci_config_writeb
12
+ #include "hw/pci_ids.h" // PCI_VENDOR_ID_INTEL
13
+ #include "hw/pci_regs.h" // PCI_VENDOR_ID
14
+ #include "malloc.h" // rom_get_last
15
+ #include "output.h" // dprintf
16
+ #include "paravirt.h" // runningOnXen
17
+ #include "string.h" // memset
18
+ #include "util.h" // make_bios_writable
19
+ #include "x86.h" // wbinvd
20
+
21
+ // On the emulators, the bios at 0xf0000 is also at 0xffff0000
22
+ #define BIOS_SRC_OFFSET 0xfff00000
23
+
24
+ union pamdata_u {
25
+ u8 data8[8];
26
+ u32 data32[2];
27
+ };
28
+
29
+ // Enable shadowing and copy bios.
30
+ static void
31
+ __make_bios_writable_intel(u16 bdf, u32 pam0)
32
+ {
33
+ // Read in current PAM settings from pci config space
34
+ union pamdata_u pamdata;
35
+ pamdata.data32[0] = pci_config_readl(bdf, ALIGN_DOWN(pam0, 4));
36
+ pamdata.data32[1] = pci_config_readl(bdf, ALIGN_DOWN(pam0, 4) + 4);
37
+ u8 *pam = &pamdata.data8[pam0 & 0x03];
38
+
39
+ // Make ram from 0xc0000-0xf0000 writable
40
+ int i;
41
+ for (i=0; i<6; i++)
42
+ pam[i + 1] = 0x33;
43
+
44
+ // Make ram from 0xf0000-0x100000 writable
45
+ int ram_present = pam[0] & 0x10;
46
+ pam[0] = 0x30;
47
+
48
+ // Write PAM settings back to pci config space
49
+ pci_config_writel(bdf, ALIGN_DOWN(pam0, 4), pamdata.data32[0]);
50
+ pci_config_writel(bdf, ALIGN_DOWN(pam0, 4) + 4, pamdata.data32[1]);
51
+
52
+ if (!ram_present)
53
+ // Copy bios.
54
+ memcpy(VSYMBOL(code32flat_start)
55
+ , VSYMBOL(code32flat_start) + BIOS_SRC_OFFSET
56
+ , SYMBOL(code32flat_end) - SYMBOL(code32flat_start));
57
+ }
58
+
59
+ static void
60
+ make_bios_writable_intel(u16 bdf, u32 pam0)
61
+ {
62
+ int reg = pci_config_readb(bdf, pam0);
63
+ if (!(reg & 0x10)) {
64
+ // QEMU doesn't fully implement the piix shadow capabilities -
65
+ // if ram isn't backing the bios segment when shadowing is
66
+ // disabled, the code itself won't be in memory. So, run the
67
+ // code from the high-memory flash location.
68
+ u32 pos = (u32)__make_bios_writable_intel + BIOS_SRC_OFFSET;
69
+ void (*func)(u16 bdf, u32 pam0) = (void*)pos;
70
+ func(bdf, pam0);
71
+ return;
72
+ }
73
+ // Ram already present - just enable writes
74
+ __make_bios_writable_intel(bdf, pam0);
75
+ }
76
+
77
+ static void
78
+ make_bios_readonly_intel(u16 bdf, u32 pam0)
79
+ {
80
+ // Flush any pending writes before locking memory.
81
+ wbinvd();
82
+
83
+ // Read in current PAM settings from pci config space
84
+ union pamdata_u pamdata;
85
+ pamdata.data32[0] = pci_config_readl(bdf, ALIGN_DOWN(pam0, 4));
86
+ pamdata.data32[1] = pci_config_readl(bdf, ALIGN_DOWN(pam0, 4) + 4);
87
+ u8 *pam = &pamdata.data8[pam0 & 0x03];
88
+
89
+ // Write protect roms from 0xc0000-0xf0000
90
+ u32 romlast = BUILD_BIOS_ADDR, rommax = BUILD_BIOS_ADDR;
91
+ if (CONFIG_WRITABLE_UPPERMEMORY)
92
+ romlast = rom_get_last();
93
+ if (CONFIG_MALLOC_UPPERMEMORY)
94
+ rommax = rom_get_max();
95
+ int i;
96
+ for (i=0; i<6; i++) {
97
+ u32 mem = BUILD_ROM_START + i * 32*1024;
98
+ if (romlast < mem + 16*1024 || rommax < mem + 32*1024) {
99
+ if (romlast >= mem && rommax >= mem + 16*1024)
100
+ pam[i + 1] = 0x31;
101
+ break;
102
+ }
103
+ pam[i + 1] = 0x11;
104
+ }
105
+
106
+ // Write protect 0xf0000-0x100000
107
+ pam[0] = 0x10;
108
+
109
+ // Write PAM settings back to pci config space
110
+ pci_config_writel(bdf, ALIGN_DOWN(pam0, 4), pamdata.data32[0]);
111
+ pci_config_writel(bdf, ALIGN_DOWN(pam0, 4) + 4, pamdata.data32[1]);
112
+ }
113
+
114
+ static int ShadowBDF = -1;
115
+
116
+ // Make the 0xc0000-0x100000 area read/writable.
117
+ void
118
+ make_bios_writable(void)
119
+ {
120
+ if (!CONFIG_QEMU || runningOnXen())
121
+ return;
122
+
123
+ dprintf(3, "enabling shadow ram\n");
124
+
125
+ // At this point, statically allocated variables can't be written,
126
+ // so do this search manually.
127
+ int bdf;
128
+ foreachbdf(bdf, 0) {
129
+ u32 vendev = pci_config_readl(bdf, PCI_VENDOR_ID);
130
+ u16 vendor = vendev & 0xffff, device = vendev >> 16;
131
+ if (vendor == PCI_VENDOR_ID_INTEL
132
+ && device == PCI_DEVICE_ID_INTEL_82441) {
133
+ make_bios_writable_intel(bdf, I440FX_PAM0);
134
+ code_mutable_preinit();
135
+ ShadowBDF = bdf;
136
+ return;
137
+ }
138
+ if (vendor == PCI_VENDOR_ID_INTEL
139
+ && device == PCI_DEVICE_ID_INTEL_Q35_MCH) {
140
+ make_bios_writable_intel(bdf, Q35_HOST_BRIDGE_PAM0);
141
+ code_mutable_preinit();
142
+ ShadowBDF = bdf;
143
+ return;
144
+ }
145
+ }
146
+ dprintf(1, "Unable to unlock ram - bridge not found\n");
147
+ }
148
+
149
+ // Make the BIOS code segment area (0xf0000) read-only.
150
+ void
151
+ make_bios_readonly(void)
152
+ {
153
+ if (!CONFIG_QEMU || runningOnXen())
154
+ return;
155
+ dprintf(3, "locking shadow ram\n");
156
+
157
+ if (ShadowBDF < 0) {
158
+ dprintf(1, "Unable to lock ram - bridge not found\n");
159
+ return;
160
+ }
161
+
162
+ u16 device = pci_config_readw(ShadowBDF, PCI_DEVICE_ID);
163
+ if (device == PCI_DEVICE_ID_INTEL_82441)
164
+ make_bios_readonly_intel(ShadowBDF, I440FX_PAM0);
165
+ else
166
+ make_bios_readonly_intel(ShadowBDF, Q35_HOST_BRIDGE_PAM0);
167
+ }
168
+
169
+ void
170
+ qemu_reboot(void)
171
+ {
172
+ if (!CONFIG_QEMU || runningOnXen())
173
+ return;
174
+ // QEMU doesn't map 0xc0000-0xfffff back to the original rom on a
175
+ // reset, so do that manually before invoking a hard reset.
176
+ void *flash = (void*)BIOS_SRC_OFFSET;
177
+ u32 hrp = (u32)&HaveRunPost;
178
+ if (readl(flash + hrp)) {
179
+ // There isn't a pristine copy of the BIOS at 0xffff0000 to copy
180
+ if (HaveRunPost == 3) {
181
+ // In a reboot loop. Try to shutdown the machine instead.
182
+ dprintf(1, "Unable to hard-reboot machine - attempting shutdown.\n");
183
+ apm_shutdown();
184
+ }
185
+ make_bios_writable();
186
+ HaveRunPost = 3;
187
+ } else {
188
+ // Copy the BIOS making sure to only reset HaveRunPost at end
189
+ make_bios_writable();
190
+ u32 cstart = SYMBOL(code32flat_start), cend = SYMBOL(code32flat_end);
191
+ memcpy((void*)cstart, flash + cstart, hrp - cstart);
192
+ memcpy((void*)hrp + 4, flash + hrp + 4, cend - (hrp + 4));
193
+ barrier();
194
+ HaveRunPost = 0;
195
+ barrier();
196
+ }
197
+
198
+ // Request a QEMU system reset. Do the reset in this function as
199
+ // the BIOS code was overwritten above and not all BIOS
200
+ // functionality may be available.
201
+
202
+ // Attempt PCI style reset
203
+ outb(0x02, PORT_PCI_REBOOT);
204
+ outb(0x06, PORT_PCI_REBOOT);
205
+
206
+ // Next try triple faulting the CPU to force a reset
207
+ asm volatile("int3");
208
+ }