udb 0.1.14 → 0.1.16

data/.data/spec/std/isa/param/COUNTINHIBIT_EN.yaml

@@ -25,6 +25,15 @@ schema:
     type: boolean
   maxItems: 32
   minItems: 32
+
+requirements:
+  idl(): |
+    for (U32 i = 3; i < 32; i++) {
+      (!HPM_COUNTER_EN[i]) -> !COUNTINHIBIT_EN[i];
+    }
+  reason: |
+    When mhpmcounter[i] is not implemented, it cannot be inhibited.
+
 definedBy:
   allOf:
     - extension:

data/.data/spec/std/isa/param/ELEN.yaml

@@ -8,13 +8,35 @@ kind: parameter
 name: ELEN
 description: |
   The maximum size in bits of a vector element that any operation can produce or consume.
-long_name: TODO
+long_name: maximum vector element bit width
 schema:
+  description: |
+    An unsigned power of 2 that is at least 8. The ISA states no maximum; the
+    absolute upper bound is (max VLEN) * (#VRs) = 64Ki * 32 = 2Mi, since an
+    element cannot exceed the total vector register state.
   type: integer
-#    requirements:
-#      idl(): |
-#        -> (ELEN >='h8) && (popcount(ELEN) == 1);
-#      reason: ELEN >= 8, which must be a power of 2.
+  enum:
+    [
+      0x8,
+      0x10,
+      0x20,
+      0x40,
+      0x80,
+      0x100,
+      0x200,
+      0x400,
+      0x800,
+      0x1000,
+      0x2000,
+      0x4000,
+      0x8000,
+      0x10000,
+      0x20000,
+      0x40000,
+      0x80000,
+      0x100000,
+      0x200000,
+    ]
 definedBy:
   extension:
     name: Zvl32b

data/.data/spec/std/isa/param/HCONTEXT_AVAILABLE.yaml

@@ -8,7 +8,7 @@ kind: parameter
 name: HCONTEXT_AVAILABLE
 description: |
   Specifies if HCONTEXT is available
-long_name: TODO
+long_name: HCONTEXT Availability
 schema:
   type: boolean
 definedBy:

data/.data/spec/std/isa/param/HCOUNTENABLE_EN.yaml

@@ -25,3 +25,16 @@ schema:
 definedBy:
   extension:
     name: H
+requirements:
+  idl(): |
+    for (U32 i = 0; i < 3; i++) {
+      !implemented?(ExtensionName::Zicntr) -> !HCOUNTENABLE_EN[i];
+    }
+    for (U32 i = 3; i < 32; i++) {
+      !implemented?(ExtensionName::Zihpm) -> !HCOUNTENABLE_EN[i];
+      (!HPM_COUNTER_EN[i]) -> !HCOUNTENABLE_EN[i];
+    }
+  reason: |
+    Counters 0-2 are defined by Zicntr
+    Counters 3..31 are defined by Zihpm
+    When mhpmcounter[i] is not implemented, it cannot be enabled.

data/.data/spec/std/isa/param/HPM_COUNTER_EN.yaml

@@ -7,10 +7,20 @@ $schema: param_schema.json#
 kind: parameter
 name: HPM_COUNTER_EN
 description: |
-  List of HPM counters that are enabled.
-  There is one entry for each hpmcounter.
+  Whether each HPM counter is implemented in hardware.
 
-  The first three entries *must* be false (as they correspond to CY, IR, TM in, _e.g._ `mhmpcountinhibit`)
+  `HPM_COUNTER_EN[n]` being `false` means `hpmcounter<n>`/`mhpmcounter<n>` and the
+  corresponding `mhpmevent<n>` are not implemented and are hardwired read-only zero.
+  (It does *not* mean the counter is implemented but currently stopped from counting;
+  that is a separate, run-time concept controlled by `mcountinhibit`.)
+
+  There is one entry for each hpmcounter, indexed 0-31.
+
+  Indices 0-2 *must* be false: they are placeholders for the three counters
+  (`cycle`/`mcycle` (CY), `time` (TM), and `instret`/`minstret` (IR)) whose
+  implementation this parameter does not control. These counters are associated
+  with indexes 0, 1, and 2. The rest of the HPM counters logically follow at
+  indexes 3-31.
   Index 3 in HPM_COUNTER_EN corresponds to mhpmcounter3.
   Index 31 in HPM_COUNTER_EN corresponds to mhpmcounter31.
 long_name: TODO

data/.data/spec/std/isa/param/HPM_EVENTS.yaml

@@ -28,9 +28,6 @@ definedBy:
           - name: HPM_COUNTER_EN
             index: 4
             equal: true
-          - name: HPM_COUNTER_EN
-            index: 4
-            equal: true
           - name: HPM_COUNTER_EN
             index: 5
             equal: true

data/.data/spec/std/isa/param/MCOUNTENABLE_EN.yaml

@@ -27,6 +27,14 @@ definedBy:
     name: Sm
 requirements:
   idl(): |
+    for (U32 i = 0; i < 3; i++) {
+      !implemented?(ExtensionName::Zicntr) -> !MCOUNTENABLE_EN[i];
+    }
     for (U32 i=3; i < 32; i++) {
+      !implemented?(ExtensionName::Zihpm) -> !MCOUNTENABLE_EN[i];
       MCOUNTENABLE_EN[i] -> HPM_COUNTER_EN[i];
     }
+  reason: |
+    Counters 0-2 are defined by Zicntr
+    Counters 3..31 are defined by Zihpm
+    When mhpmcounter[i] is not implemented, it cannot be enabled.

data/.data/spec/std/isa/param/MTVEC_BASE_ALIGNMENT_DIRECT.yaml

@@ -25,73 +25,79 @@ description: |
   the base, the minimum alignment cannot be less than 4.
 schema:
   description: An unsigned power of 2 greater than or equal to 4 that fits in 64 bits
-  default: 4
+  default: 0x4
   enum:
     [
-      4,
-      8,
-      16,
-      32,
-      64,
-      128,
-      256,
-      512,
-      1024,
-      2048,
-      4095,
-      8192,
-      16384,
-      32768,
-      65536,
-      131072,
-      262144,
-      524288,
-      1048576,
-      2097152,
-      4194304,
-      8388608,
-      16777216,
-      33554432,
-      67108864,
-      134217728,
-      268435456,
-      536870912,
-      1073741824,
-      2147483648,
-      4294967296,
-      8589934592,
-      17179869184,
-      34359738368,
-      68719476736,
-      137438953472,
-      274877906944,
-      549755813888,
-      1099511627776,
-      2199023255552,
-      4398046511104,
-      8796093022208,
-      17592186044416,
-      35184372088832,
-      70368744177664,
-      140737488355328,
-      281474976710656,
-      562949953421312,
-      1125899906842624,
-      2251799813685248,
-      4503599627370496,
-      9007199254740992,
-      18014398509481984,
-      36028797018963968,
-      72057594037927936,
-      144115188075855872,
-      288230376151711744,
-      576460752303423488,
-      1152921504606846976,
-      2305843009213693952,
-      4611686018427387904,
-      9223372036854775808,
+      0x4,
+      0x8,
+      0x10,
+      0x20,
+      0x40,
+      0x80,
+      0x100,
+      0x200,
+      0x400,
+      0x800,
+      0x1000,
+      0x2000,
+      0x4000,
+      0x8000,
+      0x10000,
+      0x20000,
+      0x40000,
+      0x80000,
+      0x100000,
+      0x200000,
+      0x400000,
+      0x800000,
+      0x1000000,
+      0x2000000,
+      0x4000000,
+      0x8000000,
+      0x10000000,
+      0x20000000,
+      0x40000000,
+      0x80000000,
+      0x100000000,
+      0x200000000,
+      0x400000000,
+      0x800000000,
+      0x1000000000,
+      0x2000000000,
+      0x4000000000,
+      0x8000000000,
+      0x10000000000,
+      0x20000000000,
+      0x40000000000,
+      0x80000000000,
+      0x100000000000,
+      0x200000000000,
+      0x400000000000,
+      0x800000000000,
+      0x1000000000000,
+      0x2000000000000,
+      0x4000000000000,
+      0x8000000000000,
+      0x10000000000000,
+      0x20000000000000,
+      0x40000000000000,
+      0x80000000000000,
+      0x100000000000000,
+      0x200000000000000,
+      0x400000000000000,
+      0x800000000000000,
+      0x1000000000000000,
+      0x2000000000000000,
+      0x4000000000000000,
+      0x8000000000000000,
     ]
 
 requirements:
-  idl(): |
-    (MXLEN == 32) -> MTVEC_BASE_ALIGNMENT_DIRECT <= 2147483648;
+  if:
+    param:
+      name: MXLEN
+      equal: 32
+  then:
+    param:
+      name: MTVEC_BASE_ALIGNMENT_DIRECT
+      lessThanOrEqual: 0x80000000

data/.data/spec/std/isa/param/MTVEC_BASE_ALIGNMENT_VECTORED.yaml

@@ -25,73 +25,79 @@ description: |
   the base, the minimum alignment cannot be less than 4.
 schema:
   description: An unsigned power of 2 greater than or equal to 4 that fits in 64 bits
-  default: 4
+  default: 0x4
   enum:
     [
-      4,
-      8,
-      16,
-      32,
-      64,
-      128,
-      256,
-      512,
-      1024,
-      2048,
-      4095,
-      8192,
-      16384,
-      32768,
-      65536,
-      131072,
-      262144,
-      524288,
-      1048576,
-      2097152,
-      4194304,
-      8388608,
-      16777216,
-      33554432,
-      67108864,
-      134217728,
-      268435456,
-      536870912,
-      1073741824,
-      2147483648,
-      4294967296,
-      8589934592,
-      17179869184,
-      34359738368,
-      68719476736,
-      137438953472,
-      274877906944,
-      549755813888,
-      1099511627776,
-      2199023255552,
-      4398046511104,
-      8796093022208,
-      17592186044416,
-      35184372088832,
-      70368744177664,
-      140737488355328,
-      281474976710656,
-      562949953421312,
-      1125899906842624,
-      2251799813685248,
-      4503599627370496,
-      9007199254740992,
-      18014398509481984,
-      36028797018963968,
-      72057594037927936,
-      144115188075855872,
-      288230376151711744,
-      576460752303423488,
-      1152921504606846976,
-      2305843009213693952,
-      4611686018427387904,
-      9223372036854775808,
+      0x4,
+      0x8,
+      0x10,
+      0x20,
+      0x40,
+      0x80,
+      0x100,
+      0x200,
+      0x400,
+      0x800,
+      0x1000,
+      0x2000,
+      0x4000,
+      0x8000,
+      0x10000,
+      0x20000,
+      0x40000,
+      0x80000,
+      0x100000,
+      0x200000,
+      0x400000,
+      0x800000,
+      0x1000000,
+      0x2000000,
+      0x4000000,
+      0x8000000,
+      0x10000000,
+      0x20000000,
+      0x40000000,
+      0x80000000,
+      0x100000000,
+      0x200000000,
+      0x400000000,
+      0x800000000,
+      0x1000000000,
+      0x2000000000,
+      0x4000000000,
+      0x8000000000,
+      0x10000000000,
+      0x20000000000,
+      0x40000000000,
+      0x80000000000,
+      0x100000000000,
+      0x200000000000,
+      0x400000000000,
+      0x800000000000,
+      0x1000000000000,
+      0x2000000000000,
+      0x4000000000000,
+      0x8000000000000,
+      0x10000000000000,
+      0x20000000000000,
+      0x40000000000000,
+      0x80000000000000,
+      0x100000000000000,
+      0x200000000000000,
+      0x400000000000000,
+      0x800000000000000,
+      0x1000000000000000,
+      0x2000000000000000,
+      0x4000000000000000,
+      0x8000000000000000,
     ]
 
 requirements:
-  idl(): |
-    (MXLEN == 32) -> MTVEC_BASE_ALIGNMENT_VECTORED <= 2147483648;
+  if:
+    param:
+      name: MXLEN
+      equal: 32
+  then:
+    param:
+      name: MTVEC_BASE_ALIGNMENT_VECTORED
+      lessThanOrEqual: 0x80000000

data/.data/spec/std/isa/param/MUTABLE_MISA_H.yaml

@@ -11,7 +11,7 @@ description:
   `misa.H` bit.
 
   "
-long_name: TODO
+long_name: "`misa.H` mutability"
 schema:
   type: boolean
 requirements:

data/.data/spec/std/isa/param/MUTABLE_MISA_S.yaml

@@ -11,7 +11,7 @@ description:
   `misa.S` bit.
 
   "
-long_name: TODO
+long_name: "`misa.S` mutability"
 schema:
   type: boolean
 requirements:

data/.data/spec/std/isa/param/STVAL_WIDTH.yaml

@@ -10,10 +10,11 @@ description: |
   The number of implemented bits in `stval`.
 
   Must be greater than or equal to _max_(`PHYS_ADDR_WIDTH`, `VA_SIZE`)
-long_name: TODO
+long_name: "`stval` implemented bits"
 schema:
   type: integer
-  maximum: 18446744073709551615
+  minimum: 0
+  maximum: 64
 definedBy:
   extension:
     name: S

data/.data/spec/std/isa/param/STVEC_BASE_ALIGNMENT_VECTORED.yaml

@@ -0,0 +1,100 @@
+# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+# SPDX-License-Identifier: BSD-3-Clause-Clear
+
+# yaml-language-server: $schema=../../../schemas/param_schema.json
+
+$schema: param_schema.json#
+kind: parameter
+name: STVEC_BASE_ALIGNMENT_VECTORED
+long_name: |
+  Minimum alignment of `stvec.BASE` when `stvec.MODE` is 1 (Vectored)
+definedBy:
+  allOf:
+    - extension:
+        name: S
+    - param:
+        name: STVEC_MODES
+        includes: 1
+        reason: Only relevant when vectored mode is supported
+description: |
+  Minimum alignment of the base pointer when `stvec.MODE` is Vectored. Because
+  `stvec` excludes the two least-significant bits of the base, the minimum
+  alignment cannot be less than 4 bytes.
+schema:
+  description: An unsigned power of 2 greater than or equal to 4 that fits in 64 bits
+  default: 0x4
+  enum:
+    [
+      0x4,
+      0x8,
+      0x10,
+      0x20,
+      0x40,
+      0x80,
+      0x100,
+      0x200,
+      0x400,
+      0x800,
+      0x1000,
+      0x2000,
+      0x4000,
+      0x8000,
+      0x10000,
+      0x20000,
+      0x40000,
+      0x80000,
+      0x100000,
+      0x200000,
+      0x400000,
+      0x800000,
+      0x1000000,
+      0x2000000,
+      0x4000000,
+      0x8000000,
+      0x10000000,
+      0x20000000,
+      0x40000000,
+      0x80000000,
+      0x100000000,
+      0x200000000,
+      0x400000000,
+      0x800000000,
+      0x1000000000,
+      0x2000000000,
+      0x4000000000,
+      0x8000000000,
+      0x10000000000,
+      0x20000000000,
+      0x40000000000,
+      0x80000000000,
+      0x100000000000,
+      0x200000000000,
+      0x400000000000,
+      0x800000000000,
+      0x1000000000000,
+      0x2000000000000,
+      0x4000000000000,
+      0x8000000000000,
+      0x10000000000000,
+      0x20000000000000,
+      0x40000000000000,
+      0x80000000000000,
+      0x100000000000000,
+      0x200000000000000,
+      0x400000000000000,
+      0x800000000000000,
+      0x1000000000000000,
+      0x2000000000000000,
+      0x4000000000000000,
+      0x8000000000000000,
+    ]
+
+requirements:
+  if:
+    param:
+      name: SXLEN
+      includes: 32
+  then:
+    param:
+      name: STVEC_BASE_ALIGNMENT_VECTORED
+      lessThanOrEqual: 0x80000000

data/.data/spec/std/isa/param/STVEC_MODES.yaml

@@ -0,0 +1,31 @@
+# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+# SPDX-License-Identifier: BSD-3-Clause-Clear
+
+# yaml-language-server: $schema=../../../schemas/param_schema.json
+
+$schema: param_schema.json#
+kind: parameter
+name: STVEC_MODES
+long_name: |
+  Modes supported by `stvec.MODE`
+definedBy:
+  extension:
+    name: S
+description: |
+  Options:
+
+    0::
+      Direct; All traps set `pc` to `stvec.BASE`
+    1::
+      Vectored; Asynchronous interrupts set `pc` to `stvec.BASE` + 4 x cause.
+
+  If only one mode is given, `stvec.MODE` is assumed to be read-only with that value.
+  Otherwise, `stvec.MODE` is read-write.
+schema:
+  type: array
+  items:
+    type: integer
+    enum: [0, 1]
+  minItems: 1
+  maxItems: 2
+  uniqueItems: true

data/.data/spec/std/isa/param/SV32_VSMODE_TRANSLATION.yaml

@@ -16,7 +16,7 @@ requirements:
   idl(): |
     # at least one of Bare, Sv32 must be supported
     !VSSTAGE_MODE_BARE
-      -> SV39_VSMODE_TRANSLATION;
+      -> SV32_VSMODE_TRANSLATION;
   reason: at least one of Bare, Sv32 must be supported
 definedBy:
   allOf:

data/.data/spec/std/isa/param/SXLEN.yaml

@@ -9,8 +9,8 @@ name: SXLEN
 description: |
   Set of XLENs supported in S-mode. Can be one of:
 
-    * 32:   SXLEN is always 32
-    * 64:   SXLEN is always 64
+    * [32]:     SXLEN is always 32
+    * [64]:     SXLEN is always 64
     * [32, 64]: SXLEN can be changed (via mstatus.SXL) between 32 and 64
 long_name: TODO
 schema:

data/.data/spec/std/isa/param/TINST_VALUE_ON_FINAL_INSTRUCTION_GUEST_PAGE_FAULT.yaml

@@ -7,7 +7,7 @@ $schema: param_schema.json#
 kind: parameter
 name: TINST_VALUE_ON_FINAL_INSTRUCTION_GUEST_PAGE_FAULT
 description: |
-  Value to write into htval/mtval2 when there is a guest page fault on a final translation.
+  Value written into htinst/mtinst when there is an instruction guest-page fault on a final translation.
 
   Possible values:
     * "always zero": Always write the value zero

data/.data/spec/std/isa/param/TINST_VALUE_ON_FINAL_LOAD_GUEST_PAGE_FAULT.yaml

@@ -7,7 +7,7 @@ $schema: param_schema.json#
 kind: parameter
 name: TINST_VALUE_ON_FINAL_LOAD_GUEST_PAGE_FAULT
 description: |
-  Value to write into htval/mtval2 when there is a guest page fault on a final translation.
+  Value written into htinst/mtinst when there is a load guest-page fault on a final translation.
 
   Possible values:
     * "always zero": Always write the value zero

data/.data/spec/std/isa/param/TINST_VALUE_ON_FINAL_STORE_AMO_GUEST_PAGE_FAULT.yaml

@@ -7,7 +7,7 @@ $schema: param_schema.json#
 kind: parameter
 name: TINST_VALUE_ON_FINAL_STORE_AMO_GUEST_PAGE_FAULT
 description: |
-  Value to write into htval/mtval2 when there is a guest page fault on a final translation.
+  Value written into htinst/mtinst when there is a store/AMO guest-page fault on a final translation.
 
   Possible values:
     * "always zero": Always write the value zero

data/.data/spec/std/isa/param/TINST_VALUE_ON_LOAD_ADDRESS_MISALIGNED.yaml

@@ -7,7 +7,7 @@ $schema: param_schema.json#
 kind: parameter
 name: TINST_VALUE_ON_LOAD_ADDRESS_MISALIGNED
 description: |
-  Value written into htinst/mtinst on a VirtualInstruction exception from VU/VS-mode.
+  Value written into htinst/mtinst on a LoadAddressMisaligned exception from VU/VS-mode.
 
   Possible values:
     * "always zero": Always write the value zero

data/.data/spec/std/isa/param/TINST_VALUE_ON_STORE_AMO_ADDRESS_MISALIGNED.yaml

@@ -7,7 +7,7 @@ $schema: param_schema.json#
 kind: parameter
 name: TINST_VALUE_ON_STORE_AMO_ADDRESS_MISALIGNED
 description: |
-  Value written into htinst/mtinst on a VirtualInstruction exception from VU/VS-mode.
+  Value written into htinst/mtinst on a StoreAmoAddressMisaligned exception from VU/VS-mode.
 
   Possible values:
     * "always zero": Always write the value zero

data/.data/spec/std/isa/param/UXLEN.yaml

@@ -7,7 +7,7 @@ $schema: param_schema.json#
 kind: parameter
 name: UXLEN
 description: |
-  Set of XLENs supported in U-mode. When both 32 and 64 are supported, SXLEN can be changed,
+  Set of XLENs supported in U-mode. When both 32 and 64 are supported, UXLEN can be changed,
   via mstatus.UXL, between 32 and 64.
 long_name: TODO
 schema: