HDLRuby 3.1.0 → 3.3.0
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- checksums.yaml +4 -4
- data/HDLRuby.gemspec +1 -0
- data/README.html +2330 -2670
- data/README.md +400 -100
- data/ext/hruby_sim/hruby_rcsim_build.c +402 -3
- data/ext/hruby_sim/hruby_sim.h +2 -1
- data/ext/hruby_sim/hruby_sim_calc.c +34 -7
- data/ext/hruby_sim/hruby_sim_core.c +15 -5
- data/ext/hruby_sim/hruby_sim_tree_calc.c +112 -23
- data/lib/HDLRuby/hdr_samples/c_program/echo.c +33 -0
- data/lib/HDLRuby/hdr_samples/comparison_bench.rb +2 -2
- data/lib/HDLRuby/hdr_samples/counter_bench.rb +1 -1
- data/lib/HDLRuby/hdr_samples/counter_dff_bench.rb +8 -7
- data/lib/HDLRuby/hdr_samples/dff_properties.rb +2 -0
- data/lib/HDLRuby/hdr_samples/enum_as_param.rb +52 -0
- data/lib/HDLRuby/hdr_samples/linear_test.rb +2 -0
- data/lib/HDLRuby/hdr_samples/logic_bench.rb +6 -0
- data/lib/HDLRuby/hdr_samples/mei8.rb +6 -6
- data/lib/HDLRuby/hdr_samples/mei8_bench.rb +6 -6
- data/lib/HDLRuby/hdr_samples/memory_test.rb +2 -0
- data/lib/HDLRuby/hdr_samples/named_sub.rb +9 -5
- data/lib/HDLRuby/hdr_samples/ram.rb +7 -6
- data/lib/HDLRuby/hdr_samples/ruby_fir_hw.rb +2 -0
- data/lib/HDLRuby/hdr_samples/ruby_program/echo.rb +9 -0
- data/lib/HDLRuby/hdr_samples/ruby_program/stdrw.rb +6 -0
- data/lib/HDLRuby/hdr_samples/ruby_program/sw_cpu_terminal.rb +614 -0
- data/lib/HDLRuby/hdr_samples/ruby_program/sw_inc_mem.rb +32 -0
- data/lib/HDLRuby/hdr_samples/ruby_program/sw_log.rb +33 -0
- data/lib/HDLRuby/hdr_samples/struct.rb +15 -3
- data/lib/HDLRuby/hdr_samples/with_board.rb +63 -0
- data/lib/HDLRuby/hdr_samples/with_bram.rb +1 -1
- data/lib/HDLRuby/hdr_samples/with_bram_frame_stack.rb +1 -1
- data/lib/HDLRuby/hdr_samples/with_bram_stack.rb +1 -1
- data/lib/HDLRuby/hdr_samples/with_channel.rb +2 -0
- data/lib/HDLRuby/hdr_samples/with_channel_other.rb +2 -0
- data/lib/HDLRuby/hdr_samples/with_class.rb +3 -1
- data/lib/HDLRuby/hdr_samples/with_clocks.rb +42 -0
- data/lib/HDLRuby/hdr_samples/with_connector.rb +2 -0
- data/lib/HDLRuby/hdr_samples/with_connector_memory.rb +2 -0
- data/lib/HDLRuby/hdr_samples/with_fixpoint.rb +6 -0
- data/lib/HDLRuby/hdr_samples/with_fixpoint_adv.rb +73 -0
- data/lib/HDLRuby/hdr_samples/with_leftright.rb +1 -1
- data/lib/HDLRuby/hdr_samples/with_of.rb +1 -1
- data/lib/HDLRuby/hdr_samples/with_program_c.rb +28 -0
- data/lib/HDLRuby/hdr_samples/with_program_ruby.rb +28 -0
- data/lib/HDLRuby/hdr_samples/with_program_ruby_cpu.rb +234 -0
- data/lib/HDLRuby/hdr_samples/with_program_ruby_io.rb +23 -0
- data/lib/HDLRuby/hdr_samples/with_program_ruby_mem.rb +58 -0
- data/lib/HDLRuby/hdr_samples/with_program_ruby_threads.rb +56 -0
- data/lib/HDLRuby/hdr_samples/with_sequencer.rb +17 -0
- data/lib/HDLRuby/hdr_samples/with_sequencer_channel.rb +58 -0
- data/lib/HDLRuby/hdr_samples/with_sequencer_enumerable.rb +10 -0
- data/lib/HDLRuby/hdr_samples/with_sequencer_enumerator.rb +18 -4
- data/lib/HDLRuby/hdr_samples/with_sequencer_func.rb +2 -4
- data/lib/HDLRuby/hdr_samples/with_sequencer_sync.rb +2 -1
- data/lib/HDLRuby/hdrcc.rb +72 -21
- data/lib/HDLRuby/hruby_error.rb +13 -0
- data/lib/HDLRuby/hruby_high.rb +125 -26
- data/lib/HDLRuby/hruby_low.rb +171 -3
- data/lib/HDLRuby/hruby_low2programs.rb +47 -0
- data/lib/HDLRuby/hruby_low_resolve.rb +3 -2
- data/lib/HDLRuby/hruby_low_without_namespace.rb +133 -5
- data/lib/HDLRuby/hruby_low_without_subsignals.rb +1 -1
- data/lib/HDLRuby/hruby_rcsim.rb +113 -6
- data/lib/HDLRuby/hruby_serializer.rb +2 -1
- data/lib/HDLRuby/hruby_verilog.rb +94 -20
- data/lib/HDLRuby/hruby_verilog_name.rb +3 -17
- data/lib/HDLRuby/std/clocks.rb +118 -50
- data/lib/HDLRuby/std/fixpoint.rb +2 -2
- data/lib/HDLRuby/std/function_generator.rb +1 -1
- data/lib/HDLRuby/std/linear.rb +7 -7
- data/lib/HDLRuby/std/sequencer.rb +263 -13
- data/lib/HDLRuby/std/sequencer_channel.rb +90 -0
- data/lib/HDLRuby/std/sequencer_func.rb +28 -15
- data/lib/HDLRuby/std/std.rb +6 -0
- data/lib/HDLRuby/ui/hruby_board.rb +1079 -0
- data/lib/HDLRuby/version.rb +1 -1
- data/lib/c/Rakefile +8 -0
- data/lib/c/cHDL.h +12 -0
- data/lib/c/extconf.rb +7 -0
- data/lib/rubyHDL.rb +33 -0
- data/tuto/gui_accum.png +0 -0
- data/tuto/gui_board.png +0 -0
- data/tuto/tutorial_sw.html +2263 -1890
- data/tuto/tutorial_sw.md +957 -62
- metadata +43 -5
- data/README.pdf +0 -0
- data/tuto/tutorial_sw.pdf +0 -0
metadata
CHANGED
@@ -1,14 +1,14 @@
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--- !ruby/object:Gem::Specification
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name: HDLRuby
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version: !ruby/object:Gem::Version
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version: 3.
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version: 3.3.0
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platform: ruby
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authors:
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- Lovic Gauthier
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autorequire:
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bindir: exe
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cert_chain: []
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date:
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date: 2024-04-02 00:00:00.000000000 Z
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dependencies:
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- !ruby/object:Gem::Dependency
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name: bundler
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- - ">="
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- !ruby/object:Gem::Version
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version: '10.0'
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- !ruby/object:Gem::Dependency
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name: rake-compiler
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requirement: !ruby/object:Gem::Requirement
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requirements:
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- - ">="
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- !ruby/object:Gem::Version
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version: '1.0'
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type: :development
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prerelease: false
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version_requirements: !ruby/object:Gem::Requirement
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requirements:
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- - ">="
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- !ruby/object:Gem::Version
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version: '1.0'
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description: HDLRuby is a library for describing and simulating digital electronic
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systems. With this library it will possible to describe synthesizable hardware using
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all the features of the Ruby language, e.g., object orientation, duck typing, closure.
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- LICENSE.txt
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- README.html
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- README.md
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- README.pdf
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- Rakefile
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- bin/console
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- bin/setup
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- lib/HDLRuby/hdr_samples/alu.rb
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- lib/HDLRuby/hdr_samples/arith_bench.rb
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- lib/HDLRuby/hdr_samples/bstr_bench.rb
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- lib/HDLRuby/hdr_samples/c_program/echo.c
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- lib/HDLRuby/hdr_samples/calculator.rb
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- lib/HDLRuby/hdr_samples/case_bench.rb
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- lib/HDLRuby/hdr_samples/comparison_bench.rb
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- lib/HDLRuby/hdr_samples/dff_override.rb
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- lib/HDLRuby/hdr_samples/dff_properties.rb
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- lib/HDLRuby/hdr_samples/dff_unit.rb
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- lib/HDLRuby/hdr_samples/enum_as_param.rb
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- lib/HDLRuby/hdr_samples/huge_rom.rb
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- lib/HDLRuby/hdr_samples/if_bench.rb
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- lib/HDLRuby/hdr_samples/include.rb
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- lib/HDLRuby/hdr_samples/ruby_fir_hw.rb
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- lib/HDLRuby/hdr_samples/ruby_program/echo.rb
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- lib/HDLRuby/hdr_samples/ruby_program/stdrw.rb
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- lib/HDLRuby/hdr_samples/ruby_program/sw_log.rb
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- lib/HDLRuby/hdr_samples/seqpar_bench.rb
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- lib/HDLRuby/hdr_samples/struct.rb
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- lib/HDLRuby/hdr_samples/tuple.rb
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- lib/HDLRuby/hdr_samples/type_minmax_bench.rb
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- lib/HDLRuby/hdr_samples/with_board.rb
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- lib/HDLRuby/hdr_samples/with_bram.rb
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- lib/HDLRuby/hdr_samples/with_bram_stack.rb
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- lib/HDLRuby/hdr_samples/with_class.rb
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- lib/HDLRuby/hdr_samples/with_clocks.rb
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- lib/HDLRuby/hdr_samples/with_connector_memory.rb
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- lib/HDLRuby/hdr_samples/with_fixpoint.rb
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- lib/HDLRuby/hdr_samples/with_fixpoint_adv.rb
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- lib/HDLRuby/hdr_samples/with_fsm.rb
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- lib/HDLRuby/hdr_samples/with_handshake.rb
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- lib/HDLRuby/hdr_samples/with_of.rb
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- lib/HDLRuby/hdr_samples/with_program_c.rb
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- lib/HDLRuby/hdr_samples/with_program_ruby.rb
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- lib/HDLRuby/hdr_samples/with_program_ruby_cpu.rb
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- lib/HDLRuby/hdr_samples/with_program_ruby_io.rb
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- lib/HDLRuby/std/reconf.rb
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- lib/HDLRuby/ui/hruby_board.rb
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- lib/HDLRuby/v_samples/adder.v
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- lib/rubyHDL.rb
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- makedoc
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- metadata.yaml
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- tuto/adder_sat_flags_vcd.png
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homepage: https://github.com/civol/HDLRuby
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licenses:
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version: '0'
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requirements: []
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rubygems_version: 3.5.3
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signing_key:
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specification_version: 4
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summary: HDLRuby is a library for describing and simulating digital electronic systems.
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data/README.pdf
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data/tuto/tutorial_sw.pdf
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