HDLRuby 2.11.11 → 3.0.0
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- checksums.yaml +4 -4
- data/README.html +3274 -0
- data/README.md +608 -99
- data/ext/hruby_sim/hruby_rcsim_build.c +27 -0
- data/ext/hruby_sim/hruby_sim.h +3 -0
- data/ext/hruby_sim/hruby_sim_calc.c +2 -0
- data/ext/hruby_sim/hruby_sim_core.c +17 -5
- data/ext/hruby_sim/hruby_sim_stack_calc.c +1 -1
- data/ext/hruby_sim/hruby_sim_tree_calc.c +8 -1
- data/ext/hruby_sim/hruby_sim_vcd.c +24 -7
- data/ext/hruby_sim/hruby_sim_vizualize.c +9 -1
- data/lib/HDLRuby/backend/hruby_allocator.rb +2 -2
- data/lib/HDLRuby/backend/hruby_c_allocator.rb +7 -7
- data/lib/HDLRuby/hdr_samples/constant_in_function.rb +3 -1
- data/lib/HDLRuby/hdr_samples/counter_dff_bench.rb +3 -1
- data/lib/HDLRuby/hdr_samples/huge_rom.rb +1 -1
- data/lib/HDLRuby/hdr_samples/mei8.rb +11 -11
- data/lib/HDLRuby/hdr_samples/mei8_bench.rb +12 -12
- data/lib/HDLRuby/hdr_samples/neg_arith_bench.rb +4 -4
- data/lib/HDLRuby/hdr_samples/rom_nest.rb +1 -1
- data/lib/HDLRuby/hdr_samples/ruby_fir_hw.rb +4 -4
- data/lib/HDLRuby/hdr_samples/struct.rb +44 -10
- data/lib/HDLRuby/hdr_samples/with_bram.rb +45 -0
- data/lib/HDLRuby/hdr_samples/with_bram_frame_stack.rb +105 -0
- data/lib/HDLRuby/hdr_samples/with_bram_stack.rb +69 -0
- data/lib/HDLRuby/hdr_samples/with_casts.rb +3 -3
- data/lib/HDLRuby/hdr_samples/with_concat.rb +6 -6
- data/lib/HDLRuby/hdr_samples/with_connector_memory.rb +2 -2
- data/lib/HDLRuby/hdr_samples/with_def.rb +10 -3
- data/lib/HDLRuby/hdr_samples/with_define_operator.rb +44 -0
- data/lib/HDLRuby/hdr_samples/with_fixpoint.rb +12 -12
- data/lib/HDLRuby/hdr_samples/with_init.rb +3 -3
- data/lib/HDLRuby/hdr_samples/with_leftright.rb +21 -0
- data/lib/HDLRuby/hdr_samples/with_reduce.rb +13 -13
- data/lib/HDLRuby/hdr_samples/with_ref_array.rb +6 -6
- data/lib/HDLRuby/hdr_samples/with_register_stack.rb +150 -0
- data/lib/HDLRuby/hdr_samples/with_sequencer.rb +190 -0
- data/lib/HDLRuby/hdr_samples/with_sequencer_deep.rb +91 -0
- data/lib/HDLRuby/hdr_samples/with_sequencer_enumerable.rb +405 -0
- data/lib/HDLRuby/hdr_samples/with_sequencer_enumerator.rb +89 -0
- data/lib/HDLRuby/hdr_samples/with_sequencer_sync.rb +120 -0
- data/lib/HDLRuby/hdr_samples/with_subsums.rb +3 -3
- data/lib/HDLRuby/hdr_samples/with_terminate.rb +3 -3
- data/lib/HDLRuby/hdr_samples/with_to_a.rb +10 -10
- data/lib/HDLRuby/hdr_samples/with_values.rb +3 -3
- data/lib/HDLRuby/hdrcc.rb +29 -3
- data/lib/HDLRuby/hdrlib.rb +1 -1
- data/lib/HDLRuby/hruby_bstr.rb +10 -5
- data/lib/HDLRuby/hruby_db.rb +2 -2
- data/lib/HDLRuby/hruby_high.rb +152 -47
- data/lib/HDLRuby/hruby_high_fullname.rb +3 -1
- data/lib/HDLRuby/hruby_low.rb +189 -18
- data/lib/HDLRuby/hruby_low2c.rb +129 -54
- data/lib/HDLRuby/hruby_low2hdr.rb +66 -40
- data/lib/HDLRuby/hruby_low2high.rb +86 -44
- data/lib/HDLRuby/hruby_low2seq.rb +26 -18
- data/lib/HDLRuby/hruby_low2sym.rb +14 -13
- data/lib/HDLRuby/hruby_low2vhd.rb +80 -44
- data/lib/HDLRuby/hruby_low_bool2select.rb +61 -46
- data/lib/HDLRuby/hruby_low_casts_without_expression.rb +56 -44
- data/lib/HDLRuby/hruby_low_cleanup.rb +18 -16
- data/lib/HDLRuby/hruby_low_fix_types.rb +65 -32
- data/lib/HDLRuby/hruby_low_mutable.rb +83 -119
- data/lib/HDLRuby/hruby_low_resolve.rb +38 -30
- data/lib/HDLRuby/hruby_low_with_bool.rb +33 -16
- data/lib/HDLRuby/hruby_low_with_port.rb +3 -3
- data/lib/HDLRuby/hruby_low_with_var.rb +23 -9
- data/lib/HDLRuby/hruby_low_without_concat.rb +45 -19
- data/lib/HDLRuby/hruby_low_without_namespace.rb +47 -32
- data/lib/HDLRuby/hruby_low_without_parinseq.rb +32 -16
- data/lib/HDLRuby/hruby_low_without_select.rb +37 -24
- data/lib/HDLRuby/hruby_low_without_subsignals.rb +280 -0
- data/lib/HDLRuby/hruby_rcsim.rb +158 -134
- data/lib/HDLRuby/hruby_rsim.rb +194 -20
- data/lib/HDLRuby/hruby_rsim_mute.rb +2 -3
- data/lib/HDLRuby/hruby_rsim_vcd.rb +125 -50
- data/lib/HDLRuby/hruby_values.rb +48 -33
- data/lib/HDLRuby/hruby_verilog.rb +90 -48
- data/lib/HDLRuby/soft/stacks.rb +219 -0
- data/lib/HDLRuby/std/bram.rb +26 -0
- data/lib/HDLRuby/std/clocks.rb +1 -1
- data/lib/HDLRuby/std/fixpoint.rb +2 -2
- data/lib/HDLRuby/std/fsm.rb +48 -11
- data/lib/HDLRuby/std/function_generator.rb +2 -2
- data/lib/HDLRuby/std/sequencer.rb +1857 -0
- data/lib/HDLRuby/std/sequencer_sync.rb +400 -0
- data/lib/HDLRuby/std/std.rb +12 -0
- data/lib/HDLRuby/version.rb +1 -1
- data/tuto/adder_sat_flags_vcd.png +0 -0
- data/tuto/addsub_vcd.png +0 -0
- data/tuto/alu_vcd.png +0 -0
- data/tuto/bit_pong_vcd.png +0 -0
- data/tuto/checksum_vcd.png +0 -0
- data/tuto/circuit_hdr.odg +0 -0
- data/tuto/circuit_hdr.png +0 -0
- data/tuto/circuit_hie.odg +0 -0
- data/tuto/circuit_hie.png +0 -0
- data/tuto/circuit_view.odg +0 -0
- data/tuto/circuit_view.png +0 -0
- data/tuto/clock_counter_vcd.png +0 -0
- data/tuto/counter_ext_vcd.png +0 -0
- data/tuto/fact_vcd.png +0 -0
- data/tuto/hw_flow.odg +0 -0
- data/tuto/hw_flow.png +0 -0
- data/tuto/maxxer_vcd.png +0 -0
- data/tuto/pingpong0_vcd.png +0 -0
- data/tuto/pingpong1_vcd.png +0 -0
- data/tuto/pingpong2_vcd.png +0 -0
- data/tuto/ram_vcd.png +0 -0
- data/tuto/serializer_vcd.png +0 -0
- data/tuto/sw_flow.odg +0 -0
- data/tuto/sw_flow.png +0 -0
- data/tuto/the_counter_vcd.png +0 -0
- data/tuto/tutorial_sw.html +2359 -0
- data/tuto/tutorial_sw.md +2684 -0
- data/tuto/tutorial_sw.pdf +0 -0
- data/tuto/tutorial_sw_jp.md +417 -0
- metadata +49 -3
- data/lib/HDLRuby/hdr_samples/sumprod.rb +0 -29
data/lib/HDLRuby/hruby_rcsim.rb
CHANGED
@@ -17,7 +17,6 @@ module HDLRuby::High
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17
17
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18
18
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## Gives the width of an int in the current computer.
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19
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def self.int_width
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20
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-
# puts "int_width=#{[1.to_i].pack("i").size*8}"
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return [1.to_i].pack("i").size*8
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21
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end
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22
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@@ -89,8 +88,8 @@ module HDLRuby::High
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92
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-
## Extends the SystemT class for hybrid Ruby-C simulation.
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class SystemT
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92
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+
## Extends the SystemT class for hybrid Ruby-C simulation.
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93
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95
94
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attr_reader :rcsystemT # The access to the C version of the systemT
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@@ -105,30 +104,18 @@ module HDLRuby::High
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105
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RCSim.rcsim_set_owner(@rcsystemT,rcowner)
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105
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end
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107
106
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# Create and add the interface signals.
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-
# self.each_input do |sig|
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-
# rcsig = sig.to_rcsim(@rcsystemT)
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-
# RCSim.rcsim_add_systemT_input(@rcsystemT,rcsig)
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-
# end
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112
107
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if self.each_input.any? then
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RCSim.rcsim_add_systemT_inputs(@rcsystemT,
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self.each_input.map do |sig|
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sig.to_rcsim(@rcsystemT)
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end)
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end
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-
# self.each_output do |sig|
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-
# rcsig = sig.to_rcsim(@rcsystemT)
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-
# RCSim.rcsim_add_systemT_output(@rcsystemT,rcsig)
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-
# end
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122
113
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if self.each_output.any? then
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RCSim.rcsim_add_systemT_outputs(@rcsystemT,
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self.each_output.map do |sig|
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sig.to_rcsim(@rcsystemT)
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end)
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end
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-
# self.each_inout do |sig|
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-
# rcsig = sig.to_rcsim(@rcsystemT)
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-
# RCSim.rcsim_add_systemT_inout(@rcsystemT,rcsig)
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-
# end
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132
119
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if self.each_inout.any? then
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RCSim.rcsim_add_systemT_inouts(@rcsystemT,
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self.each_inout.map do |sig|
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@@ -154,8 +141,8 @@ module HDLRuby::High
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end
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-
## Extends the Scope class for hybrid Ruby-C simulation.
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class Scope
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+
## Extends the Scope class for hybrid Ruby-C simulation.
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attr_reader :rcscope # The access to the C version of the scope.
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148
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@@ -174,10 +161,6 @@ module HDLRuby::High
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subowner = self.parent.is_a?(SystemT) ? rcowner : @rcscope
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# Create and add the inner signals.
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-
# self.each_inner do |sig|
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-
# rcsig = sig.to_rcsim(@rcscope)
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-
# RCSim.rcsim_add_scope_inner(@rcscope,rcsig)
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-
# end
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181
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if self.each_inner.any? then
|
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RCSim.rcsim_add_scope_inners(@rcscope,self.each_inner.map do|sig|
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183
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# sig.to_rcsim(@rcscope)
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@@ -186,10 +169,6 @@ module HDLRuby::High
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end
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# Create and add the system instances.
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-
# self.each_systemI do |sys|
|
190
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-
# rcsys = sys.to_rcsim(@rcscope)
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-
# RCSim.rcsim_add_scope_systemI(@rcscope,rcsys)
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-
# end
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193
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if self.each_systemI.any? then
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RCSim.rcsim_add_scope_systemIs(@rcscope,
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self.each_systemI.map do |sys|
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@@ -198,37 +177,7 @@ module HDLRuby::High
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177
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end)
|
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end
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201
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-
# # Create and add the behaviors.
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-
# if self.each_behavior.any? then
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-
# RCSim.rcsim_add_scope_behaviors(@rcscope,
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-
# self.each_behavior.map do |beh|
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-
# # beh.to_rcsim(@rcscope)
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-
# beh.to_rcsim(subowner)
|
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-
# end)
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-
# end
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-
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# # Create and add the connections.
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-
# if self.each_connection.any? then
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-
# RCSim.rcsim_add_scope_behaviors(@rcscope,
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-
# self.each_connection.map do |cxt|
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-
# # cxt.to_rcsim(@rcscope)
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-
# cxt.to_rcsim(subowner)
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-
# end)
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-
# end
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218
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-
rcbehs = self.each_behavior.map {|beh| beh.to_rcsim(subowner)} +
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-
self.each_connection.map {|cxt| cxt.to_rcsim(subowner) }
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-
if rcbehs.any? then
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-
RCSim.rcsim_add_scope_behaviors(@rcscope,rcbehs)
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-
end
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-
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# Create and add the codes.
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-
# TODO!!
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-
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# Create and add the sub scopes.
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-
# self.each_scope do |sub|
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# rcsub = sub.to_rcsim(@rcscope)
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# RCSim.rcsim_add_scope_scope(@rcscope,rcsub)
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# end
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if self.each_scope.any? then
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RCSim.rcsim_add_scope_scopes(@rcscope,self.each_scope.map do|sub|
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# sub.to_rcsim(@rcscope)
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@@ -236,14 +185,41 @@ module HDLRuby::High
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end)
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end
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+
# Create and add the behaviors and connections.
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rcbehs = self.each_behavior.map {|beh| beh.to_rcsim(subowner)} # +
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+
# self.each_connection.map {|cxt| cxt.to_rcsim(subowner) }
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self.each_connection do |cnx|
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+
# ICIICI
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193
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+
if !cnx.right.is_a?(RefObject) then
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rcbehs << cnx.to_rcsim(subowner)
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else
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# puts "cnx.left.object=#{cnx.left.object.fullname} cnx.right.object=#{cnx.right.object.fullname}"
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197
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+
rcbehs << cnx.to_rcsim(subowner)
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+
if cnx.left.is_a?(RefObject) then
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sigL = cnx.left.object
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prtL = sigL.parent
|
201
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+
if prtL.is_a?(SystemT) and prtL.each_inout.any?{|e| e.object_id == sigL.object_id} then
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202
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+
# puts "write to right with sigL=#{sigL.fullname}."
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203
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+
rcbehs << Connection.new(cnx.right.clone,cnx.left.clone).to_rcsim(subowner)
|
204
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+
end
|
205
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+
end
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+
end
|
207
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+
end
|
208
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+
if rcbehs.any? then
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+
RCSim.rcsim_add_scope_behaviors(@rcscope,rcbehs)
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+
end
|
211
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+
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212
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+
# Create and add the codes.
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# TODO!!
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+
|
239
215
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return @rcscope
|
240
216
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end
|
241
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end
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-
## Extends the Type class for hybrid Ruby-C simulation.
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class Type
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+
## Extends the Type class for hybrid Ruby-C simulation.
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attr_reader :rctype # The access to the C version of the scope.
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@@ -263,8 +239,8 @@ module HDLRuby::High
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263
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end
|
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end
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266
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-
## Extends the TypeDef class for hybrid Ruby-C simulation.
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class TypeDef
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+
## Extends the TypeDef class for hybrid Ruby-C simulation.
|
268
244
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269
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# Generate the C description of the type.
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def to_rcsim
|
@@ -274,8 +250,8 @@ module HDLRuby::High
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|
274
250
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end
|
275
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end
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277
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-
## Extends the TypeVector class for hybrid Ruby-C simulation.
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class TypeVector
|
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+
## Extends the TypeVector class for hybrid Ruby-C simulation.
|
279
255
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280
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# Generate the C description of the type.
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def to_rcsim
|
@@ -285,8 +261,8 @@ module HDLRuby::High
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285
261
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end
|
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end
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287
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|
288
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-
## Extends the TypeTuple class for hybrid Ruby-C simulation.
|
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class TypeTuple
|
265
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+
## Extends the TypeTuple class for hybrid Ruby-C simulation.
|
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266
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# Add the possibility to change the direction.
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291
267
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def direction=(dir)
|
292
268
|
@direction = dir == :little ? :little : :big
|
@@ -301,8 +277,9 @@ module HDLRuby::High
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|
301
277
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end
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-
## Extends the TypeStruct class for hybrid Ruby-C simulation.
|
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class TypeStruct
|
281
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+
## Extends the TypeStruct class for hybrid Ruby-C simulation.
|
282
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+
|
306
283
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# Add the possibility to change the direction.
|
307
284
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def direction=(dir)
|
308
285
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@direction = dir == :little ? :little : :big
|
@@ -322,6 +299,20 @@ module HDLRuby::High
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322
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|
323
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attr_reader :rcbehavior
|
324
301
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|
302
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+
# Add sub leaf events from +sig+ of +type+.
|
303
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+
def add_sub_events(type,sig)
|
304
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+
if sig.each_signal.any? then
|
305
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+
# The event is hierarchical, recurse.
|
306
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+
sig.each_signal do |sub|
|
307
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+
self.add_sub_events(type,sub)
|
308
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+
end
|
309
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+
else
|
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+
# Te event is not hierarchical, add it.
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+
ref = RefObject.new(this,sig)
|
312
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+
self.add_event(Event.new(type,ref))
|
313
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+
end
|
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+
end
|
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+
|
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# Generate the C description of the behavior comming from object
|
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# whose C description is +rcowner+
|
327
318
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def to_rcsim(rcowner)
|
@@ -346,10 +337,32 @@ module HDLRuby::High
|
|
346
337
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self.block.each_inner do |inner|
|
347
338
|
refs.delete_if {|r| r.name == inner.name }
|
348
339
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end
|
340
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+
# The get the left references: the will be removed from the
|
341
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+
# events.
|
342
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+
left_refs = self.block.each_node_deep.select do |node|
|
343
|
+
node.is_a?(RefObject) && node.leftvalue? &&
|
344
|
+
!node.parent.is_a?(RefObject)
|
345
|
+
end.to_a
|
346
|
+
# Keep only one left ref per signal.
|
347
|
+
left_refs.uniq! { |node| node.fullname }
|
348
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+
# Remove the left refs.
|
349
|
+
left_refs.each do |l|
|
350
|
+
refs.delete_if {|r| r.fullname == l.fullname }
|
351
|
+
end
|
349
352
|
# Generate the event.
|
350
353
|
events = refs.map {|ref| Event.new(:anyedge,ref.clone) }
|
351
354
|
# Add them to the behavior for further processing.
|
352
355
|
events.each {|event| self.add_event(event) }
|
356
|
+
else
|
357
|
+
# Maybe there are event on hierachical signals.
|
358
|
+
events.each do |event|
|
359
|
+
if event.ref.object.each_signal.any? then
|
360
|
+
# This is a hierarchical event, remove it.
|
361
|
+
self.delete_event!(event)
|
362
|
+
# And replace it by event of the subs of the signal.
|
363
|
+
self.add_sub_events(event.type,event.ref)
|
364
|
+
end
|
365
|
+
end
|
353
366
|
end
|
354
367
|
|
355
368
|
# Create the behavior C object.
|
@@ -360,13 +373,9 @@ module HDLRuby::High
|
|
360
373
|
RCSim.rcsim_set_owner(@rcbehavior,rcowner)
|
361
374
|
|
362
375
|
# Create and add the events.
|
363
|
-
# self.each_event do |ev|
|
364
|
-
# RCSim.rcsim_add_behavior_event(@rcbehavior,ev.to_rcsim)
|
365
|
-
# end
|
366
376
|
if self.each_event.any? then
|
367
377
|
RCSim.rcsim_add_behavior_events(@rcbehavior,
|
368
378
|
self.each_event.map do |ev|
|
369
|
-
# puts "adding event: #{ev.ref.object.name}(#{ev.type})"
|
370
379
|
ev.to_rcsim(@rcbehavior)
|
371
380
|
end)
|
372
381
|
end
|
@@ -379,19 +388,19 @@ module HDLRuby::High
|
|
379
388
|
end
|
380
389
|
|
381
390
|
|
382
|
-
## Extends the Behavior class for hybrid Ruby-C simulation.
|
383
391
|
class Behavior
|
392
|
+
## Extends the Behavior class for hybrid Ruby-C simulation.
|
384
393
|
include RCSimBehavior
|
385
394
|
end
|
386
395
|
|
387
|
-
## Extends the TimeBehavior class for hybrid Ruby-C simulation.
|
388
396
|
class TimeBehavior
|
397
|
+
## Extends the TimeBehavior class for hybrid Ruby-C simulation.
|
389
398
|
include RCSimBehavior
|
390
399
|
end
|
391
400
|
|
392
401
|
|
393
|
-
## Extends the Event class for hybrid Ruby-C simulation.
|
394
402
|
class Event
|
403
|
+
## Extends the Event class for hybrid Ruby-C simulation.
|
395
404
|
|
396
405
|
attr_reader :rcevent
|
397
406
|
|
@@ -409,8 +418,8 @@ module HDLRuby::High
|
|
409
418
|
end
|
410
419
|
|
411
420
|
|
412
|
-
## Extends the SignalI class for hybrid Ruby-C simulation.
|
413
421
|
class SignalI
|
422
|
+
## Extends the SignalI class for hybrid Ruby-C simulation.
|
414
423
|
|
415
424
|
attr_reader :rcsignalI
|
416
425
|
|
@@ -425,6 +434,12 @@ module HDLRuby::High
|
|
425
434
|
# Set the owner.
|
426
435
|
RCSim.rcsim_set_owner(@rcsignalI,rcowner)
|
427
436
|
|
437
|
+
# Create and add the sub signals if any.
|
438
|
+
RCSim.rcsim_add_signal_signals(@rcsignalI,
|
439
|
+
self.each_signal.each.map do |sig|
|
440
|
+
sig.to_rcsim(@rcsignalI)
|
441
|
+
end)
|
442
|
+
|
428
443
|
# Set the initial value if any.
|
429
444
|
if self.value then
|
430
445
|
RCSim.rcsim_set_signal_value(@rcsignalI,self.value.to_rcsim)
|
@@ -435,8 +450,8 @@ module HDLRuby::High
|
|
435
450
|
end
|
436
451
|
|
437
452
|
|
438
|
-
## Extends the SignalC class for hybrid Ruby-C simulation.
|
439
453
|
class SignalC
|
454
|
+
## Extends the SignalC class for hybrid Ruby-C simulation.
|
440
455
|
|
441
456
|
attr_reader :rcsignalC
|
442
457
|
|
@@ -458,8 +473,8 @@ module HDLRuby::High
|
|
458
473
|
end
|
459
474
|
|
460
475
|
|
461
|
-
## Extends the SystemI class for hybrid Ruby-C simulation.
|
462
476
|
class SystemI
|
477
|
+
## Extends the SystemI class for hybrid Ruby-C simulation.
|
463
478
|
|
464
479
|
attr_reader :rcsystemI
|
465
480
|
|
@@ -480,10 +495,6 @@ module HDLRuby::High
|
|
480
495
|
RCSim.rcsim_set_owner(@rcsystemI,rcowner)
|
481
496
|
|
482
497
|
# Add the alternate system types.
|
483
|
-
# self.each_systemT do |systemT|
|
484
|
-
# rcsys = systemT.to_rcsim(@rcsystemI)
|
485
|
-
# RCSim.rcsim_add_systemI_systemT(@rcsystemI,rcsys)
|
486
|
-
# end
|
487
498
|
if self.each_systemI.any? then
|
488
499
|
RCSim.rcsim_add_systemI_systemTs(@rcsystemI,
|
489
500
|
self.each_systemT.select do|sys|
|
@@ -499,19 +510,19 @@ module HDLRuby::High
|
|
499
510
|
end
|
500
511
|
|
501
512
|
|
502
|
-
## Extends the Chunk class for hybrid Ruby-C simulation.
|
503
513
|
class Chunk
|
514
|
+
## Extends the Chunk class for hybrid Ruby-C simulation.
|
504
515
|
# TODO!!
|
505
516
|
end
|
506
517
|
|
507
|
-
## Extends the Code class for hybrid Ruby-C simulation.
|
508
518
|
class Code
|
519
|
+
## Extends the Code class for hybrid Ruby-C simulation.
|
509
520
|
# TODO!!
|
510
521
|
end
|
511
522
|
|
512
523
|
|
513
|
-
## Extends the Statement class for hybrid Ruby-C simulation.
|
514
524
|
class Statement
|
525
|
+
## Extends the Statement class for hybrid Ruby-C simulation.
|
515
526
|
|
516
527
|
attr_reader :rcstatement
|
517
528
|
|
@@ -522,8 +533,8 @@ module HDLRuby::High
|
|
522
533
|
end
|
523
534
|
|
524
535
|
|
525
|
-
## Extends the Transmit class for hybrid Ruby-C simulation.
|
526
536
|
class Transmit
|
537
|
+
## Extends the Transmit class for hybrid Ruby-C simulation.
|
527
538
|
attr_reader :rcstatement
|
528
539
|
|
529
540
|
# Generate the C description of the transmit.
|
@@ -537,8 +548,8 @@ module HDLRuby::High
|
|
537
548
|
end
|
538
549
|
|
539
550
|
|
540
|
-
## Extends the Print class for hybrid Ruby-C simulation.
|
541
551
|
class Print
|
552
|
+
## Extends the Print class for hybrid Ruby-C simulation.
|
542
553
|
attr_reader :rcstatement
|
543
554
|
|
544
555
|
# Generate the C description of the print.
|
@@ -547,9 +558,6 @@ module HDLRuby::High
|
|
547
558
|
@rcstatement = RCSim.rcsim_make_print()
|
548
559
|
|
549
560
|
# Adds the arguments.
|
550
|
-
# self.each_arg do |arg|
|
551
|
-
# RCSim.rcsim_add_print_arg(@rcstatement,arg.to_rcsim)
|
552
|
-
# end
|
553
561
|
if self.each_arg.any? then
|
554
562
|
RCSim.rcsim_add_print_args(@rcstatement,
|
555
563
|
self.each_arg.map(&:to_rcsim))
|
@@ -560,8 +568,8 @@ module HDLRuby::High
|
|
560
568
|
end
|
561
569
|
|
562
570
|
|
563
|
-
## Extends the TimeTerminate class for hybrid Ruby-C simulation.
|
564
571
|
class TimeTerminate
|
572
|
+
## Extends the TimeTerminate class for hybrid Ruby-C simulation.
|
565
573
|
attr_reader :rcstatement
|
566
574
|
|
567
575
|
# Generate the C description of the terminate.
|
@@ -573,15 +581,15 @@ module HDLRuby::High
|
|
573
581
|
end
|
574
582
|
end
|
575
583
|
|
576
|
-
## Extends the Configure class for hybrid Ruby-C simulation.
|
577
584
|
class Configure
|
585
|
+
## Extends the Configure class for hybrid Ruby-C simulation.
|
578
586
|
attr_reader :rcstatement
|
579
587
|
# TODO!!!
|
580
588
|
end
|
581
589
|
|
582
590
|
|
583
|
-
## Extends the If class for hybrid Ruby-C simulation.
|
584
591
|
class If
|
592
|
+
## Extends the If class for hybrid Ruby-C simulation.
|
585
593
|
attr_reader :rcstatement
|
586
594
|
|
587
595
|
# Generate the C description of the hardware if.
|
@@ -592,9 +600,6 @@ module HDLRuby::High
|
|
592
600
|
self.no ? self.no.to_rcsim : nil)
|
593
601
|
|
594
602
|
# Add the alternate ifs if any.
|
595
|
-
# self.each_noif do |cond,stmnt|
|
596
|
-
# RCSim.rcsim_add_hif_noif(@rcstatement,cond.to_rcsim,stmnt.to_rcsim)
|
597
|
-
# end
|
598
603
|
rcsim_conds = self.each_noif.map {|cond,stmnt| cond.to_rcsim }
|
599
604
|
rcsim_stmnts = self.each_noif.map {|cond,stmnt| stmnt.to_rcsim }
|
600
605
|
if rcsim_conds.any? then
|
@@ -606,13 +611,13 @@ module HDLRuby::High
|
|
606
611
|
end
|
607
612
|
|
608
613
|
|
609
|
-
## Extends the When class for hybrid Ruby-C simulation.
|
610
614
|
class When
|
615
|
+
## Extends the When class for hybrid Ruby-C simulation.
|
611
616
|
# Nothing to add.
|
612
617
|
end
|
613
618
|
|
614
|
-
## Extends the Case class for hybrid Ruby-C simulation.
|
615
619
|
class Case
|
620
|
+
## Extends the Case class for hybrid Ruby-C simulation.
|
616
621
|
attr_reader :rcstatement
|
617
622
|
|
618
623
|
# Generate the C description of the hardware case.
|
@@ -622,10 +627,6 @@ module HDLRuby::High
|
|
622
627
|
self.default ? self.default.to_rcsim : nil)
|
623
628
|
|
624
629
|
# Add the hardware whens.
|
625
|
-
# self.each_when do |wh|
|
626
|
-
# RCSim.rcsim_add_hcase_when(@rcstatement,
|
627
|
-
# wh.match.to_rcsim,wh.statement.to_rcsim)
|
628
|
-
# end
|
629
630
|
rcsim_matches = self.each_when.map {|wh| wh.match.to_rcsim }
|
630
631
|
rcsim_stmnts = self.each_when.map {|wh| wh.statement.to_rcsim }
|
631
632
|
if rcsim_matches.any? then
|
@@ -638,13 +639,13 @@ module HDLRuby::High
|
|
638
639
|
end
|
639
640
|
|
640
641
|
|
641
|
-
## Extends the Delay class for hybrid Ruby-C simulation.
|
642
642
|
class Delay
|
643
|
+
## Extends the Delay class for hybrid Ruby-C simulation.
|
643
644
|
# Nothing to do.
|
644
645
|
end
|
645
646
|
|
646
|
-
## Extends the TimeWait class for hybrid Ruby-C simulation.
|
647
647
|
class TimeWait
|
648
|
+
## Extends the TimeWait class for hybrid Ruby-C simulation.
|
648
649
|
attr_reader :rcstatement
|
649
650
|
|
650
651
|
# Generate the C description of the time wait.
|
@@ -658,8 +659,8 @@ module HDLRuby::High
|
|
658
659
|
end
|
659
660
|
|
660
661
|
|
661
|
-
## Extends the TimeRepeat class for hybrid Ruby-C simulation.
|
662
662
|
class TimeRepeat
|
663
|
+
## Extends the TimeRepeat class for hybrid Ruby-C simulation.
|
663
664
|
attr_reader :rcstatement
|
664
665
|
|
665
666
|
# Generate the C description of the hardware case.
|
@@ -695,9 +696,6 @@ module HDLRuby::High
|
|
695
696
|
end
|
696
697
|
|
697
698
|
# Add the inner signals.
|
698
|
-
# self.each_inner do |inner|
|
699
|
-
# RCSim.rcsim_add_block_inner(@rcstatement,inner.to_rcsim(@rcstatement))
|
700
|
-
# end
|
701
699
|
if self.each_inner.any? then
|
702
700
|
RCSim.rcsim_add_block_inners(@rcstatement,
|
703
701
|
self.each_inner.map do |sig|
|
@@ -706,9 +704,6 @@ module HDLRuby::High
|
|
706
704
|
end
|
707
705
|
|
708
706
|
# Add the statements.
|
709
|
-
# self.each_statement do |stmnt|
|
710
|
-
# RCSim.rcsim_add_block_statement(@rcstatement,stmnt.to_rcsim)
|
711
|
-
# end
|
712
707
|
if self.each_statement.any? then
|
713
708
|
RCSim.rcsim_add_block_statements(@rcstatement,
|
714
709
|
self.each_statement.map do |stmnt|
|
@@ -720,21 +715,36 @@ module HDLRuby::High
|
|
720
715
|
end
|
721
716
|
end
|
722
717
|
|
723
|
-
## Extends the Block class for hybrid Ruby-C simulation.
|
724
718
|
class Block
|
719
|
+
## Extends the Block class for hybrid Ruby-C simulation.
|
725
720
|
include RCSimBlock
|
726
721
|
end
|
727
722
|
|
728
|
-
## Extends the TimeBlock class for hybrid Ruby-C simulation.
|
729
723
|
class TimeBlock
|
724
|
+
## Extends the TimeBlock class for hybrid Ruby-C simulation.
|
730
725
|
include RCSimBlock
|
731
726
|
end
|
732
727
|
|
733
728
|
|
734
|
-
## Extends the Connection class for hybrid Ruby-C simulation.
|
735
729
|
class Connection
|
730
|
+
## Extends the Connection class for hybrid Ruby-C simulation.
|
736
731
|
attr_reader :rcbehavior
|
737
732
|
|
733
|
+
# Add recursively any event to +rcevs+ for activativing the
|
734
|
+
# connection from signal +sig+ attached to +rcbehavior+
|
735
|
+
def self.add_rcevents(sig,rcevs,rcbehavior)
|
736
|
+
# puts "add_rcevents for sig=#{sig.fullname}"
|
737
|
+
# Recurse on sub signals if any.
|
738
|
+
sig.each_signal do |sub|
|
739
|
+
Connection.add_rcevents(sub,rcevs,rcbehavior)
|
740
|
+
end
|
741
|
+
# Apply on the current node.
|
742
|
+
rcsig = sig.is_a?(SignalI) ? sig.rcsignalI : sig.rcsignalC
|
743
|
+
ev = RCSim.rcsim_make_event(:anyedge,rcsig)
|
744
|
+
RCSim.rcsim_set_owner(ev,rcbehavior)
|
745
|
+
rcevs << ev
|
746
|
+
end
|
747
|
+
|
738
748
|
# Generate the C description of the connection.
|
739
749
|
# +rcowner+ is a link to the C description of the owner scope.
|
740
750
|
def to_rcsim(rcowner)
|
@@ -749,9 +759,10 @@ module HDLRuby::High
|
|
749
759
|
rcevs = []
|
750
760
|
self.right.each_node_deep do |node|
|
751
761
|
if node.is_a?(RefObject) && !node.parent.is_a?(RefObject) then
|
752
|
-
|
753
|
-
RCSim.
|
754
|
-
|
762
|
+
Connection.add_rcevents(node.object,rcevs,@rcbehavior)
|
763
|
+
# ev = RCSim.rcsim_make_event(:anyedge,node.to_rcsim)
|
764
|
+
# RCSim.rcsim_set_owner(ev,@rcbehavior)
|
765
|
+
# rcevs << ev
|
755
766
|
end
|
756
767
|
end
|
757
768
|
if rcevs.any? then
|
@@ -771,8 +782,8 @@ module HDLRuby::High
|
|
771
782
|
end
|
772
783
|
|
773
784
|
|
774
|
-
## Extends the Expression class for hybrid Ruby-C simulation.
|
775
785
|
class Expression
|
786
|
+
## Extends the Expression class for hybrid Ruby-C simulation.
|
776
787
|
|
777
788
|
# attr_reader :rcexpression
|
778
789
|
|
@@ -783,8 +794,8 @@ module HDLRuby::High
|
|
783
794
|
end
|
784
795
|
|
785
796
|
|
786
|
-
## Extends the Value class for hybrid Ruby-C simulation.
|
787
797
|
class Value
|
798
|
+
## Extends the Value class for hybrid Ruby-C simulation.
|
788
799
|
# attr_reader :rcexpression
|
789
800
|
|
790
801
|
# Generate the C description of the value.
|
@@ -819,8 +830,8 @@ module HDLRuby::High
|
|
819
830
|
end
|
820
831
|
end
|
821
832
|
|
822
|
-
## Extends the StringE class for hybrid Ruby-C simulation.
|
823
833
|
class StringE
|
834
|
+
## Extends the StringE class for hybrid Ruby-C simulation.
|
824
835
|
|
825
836
|
# Generate the C description of the value.
|
826
837
|
def to_rcsim
|
@@ -830,8 +841,8 @@ module HDLRuby::High
|
|
830
841
|
end
|
831
842
|
|
832
843
|
|
833
|
-
## Extends the Cast class for hybrid Ruby-C simulation.
|
834
844
|
class Cast
|
845
|
+
## Extends the Cast class for hybrid Ruby-C simulation.
|
835
846
|
# attr_reader :rcexpression
|
836
847
|
|
837
848
|
# Generate the C description of the cast.
|
@@ -850,13 +861,13 @@ module HDLRuby::High
|
|
850
861
|
end
|
851
862
|
|
852
863
|
|
853
|
-
## Extends the Operation class for hybrid Ruby-C simulation.
|
854
864
|
class Operation
|
865
|
+
## Extends the Operation class for hybrid Ruby-C simulation.
|
855
866
|
# Nothing to do.
|
856
867
|
end
|
857
868
|
|
858
|
-
## Extends the Unary class for hybrid Ruby-C simulation.
|
859
869
|
class Unary
|
870
|
+
## Extends the Unary class for hybrid Ruby-C simulation.
|
860
871
|
attr_reader :rcexpression
|
861
872
|
|
862
873
|
# Generate the C description of the unary operation.
|
@@ -867,8 +878,8 @@ module HDLRuby::High
|
|
867
878
|
end
|
868
879
|
end
|
869
880
|
|
870
|
-
## Extends the Binary class for hybrid Ruby-C simulation.
|
871
881
|
class Binary
|
882
|
+
## Extends the Binary class for hybrid Ruby-C simulation.
|
872
883
|
# attr_reader :rcexpression
|
873
884
|
|
874
885
|
# Generate the C description of the binary operation.
|
@@ -881,8 +892,8 @@ module HDLRuby::High
|
|
881
892
|
end
|
882
893
|
|
883
894
|
|
884
|
-
## Extends the Select class for hybrid Ruby-C simulation.
|
885
895
|
class Select
|
896
|
+
## Extends the Select class for hybrid Ruby-C simulation.
|
886
897
|
# attr_reader :rcexpression
|
887
898
|
|
888
899
|
# Generate the C description of the select operation.
|
@@ -892,9 +903,6 @@ module HDLRuby::High
|
|
892
903
|
self.select.to_rcsim)
|
893
904
|
|
894
905
|
# Add the choice expressions. */
|
895
|
-
# self.each_choice do |choice|
|
896
|
-
# rcsim_add_select_choice(rcexpression,choice.to_rcsim)
|
897
|
-
# end
|
898
906
|
if self.each_choice.any? then
|
899
907
|
RCSim.rcsim_add_select_choices(rcexpression,
|
900
908
|
self.each_choice.map(&:to_rcsim))
|
@@ -905,8 +913,8 @@ module HDLRuby::High
|
|
905
913
|
end
|
906
914
|
|
907
915
|
|
908
|
-
## Extends the Concat class for hybrid Ruby-C simulation.
|
909
916
|
class Concat
|
917
|
+
## Extends the Concat class for hybrid Ruby-C simulation.
|
910
918
|
# attr_reader :rcexpression
|
911
919
|
|
912
920
|
# Generate the C description of the concat operation.
|
@@ -916,9 +924,6 @@ module HDLRuby::High
|
|
916
924
|
self.type.direction)
|
917
925
|
|
918
926
|
# Add the concatenated expressions. */
|
919
|
-
# self.each_expression do |expr|
|
920
|
-
# RCSim.rcsim_add_concat_expression(rcexpression,expr.to_rcsim)
|
921
|
-
# end
|
922
927
|
if self.each_expression.any? then
|
923
928
|
RCSim.rcsim_add_concat_expressions(rcexpression,
|
924
929
|
self.each_expression.map(&:to_rcsim))
|
@@ -930,8 +935,8 @@ module HDLRuby::High
|
|
930
935
|
|
931
936
|
|
932
937
|
|
933
|
-
## Extends the Ref class for hybrid Ruby-C simulation.
|
934
938
|
class Ref
|
939
|
+
## Extends the Ref class for hybrid Ruby-C simulation.
|
935
940
|
# attr_reader :rcref
|
936
941
|
# alias_method :rcexpression, :rcref
|
937
942
|
|
@@ -942,8 +947,8 @@ module HDLRuby::High
|
|
942
947
|
end
|
943
948
|
|
944
949
|
|
945
|
-
## Extends the RefConcat class for hybrid Ruby-C simulation.
|
946
950
|
class RefConcat
|
951
|
+
## Extends the RefConcat class for hybrid Ruby-C simulation.
|
947
952
|
# attr_reader :rcref
|
948
953
|
# alias_method :rcexpression, :rcref
|
949
954
|
|
@@ -954,9 +959,6 @@ module HDLRuby::High
|
|
954
959
|
self.type.direction)
|
955
960
|
|
956
961
|
# Add the concatenated expressions. */
|
957
|
-
# self.each_ref do |ref|
|
958
|
-
# RCSim.rcsim_add_refConcat_ref(rcref,ref.to_rcsim)
|
959
|
-
# end
|
960
962
|
if self.each_ref.any? then
|
961
963
|
RCSim.rcsim_add_refConcat_refs(rcref,self.each_ref.map(&:to_rcsim))
|
962
964
|
end
|
@@ -966,8 +968,8 @@ module HDLRuby::High
|
|
966
968
|
end
|
967
969
|
|
968
970
|
|
969
|
-
## Extends the RefIndex class for hybrid Ruby-C simulation.
|
970
971
|
class RefIndex
|
972
|
+
## Extends the RefIndex class for hybrid Ruby-C simulation.
|
971
973
|
# attr_reader :rcref
|
972
974
|
# alias_method :rcexpression, :rcref
|
973
975
|
|
@@ -980,8 +982,8 @@ module HDLRuby::High
|
|
980
982
|
end
|
981
983
|
|
982
984
|
|
983
|
-
## Extends the RefRange class for hybrid Ruby-C simulation.
|
984
985
|
class RefRange
|
986
|
+
## Extends the RefRange class for hybrid Ruby-C simulation.
|
985
987
|
# attr_reader :rcref
|
986
988
|
# alias_method :rcexpression, :rcref
|
987
989
|
|
@@ -996,14 +998,14 @@ module HDLRuby::High
|
|
996
998
|
end
|
997
999
|
|
998
1000
|
|
999
|
-
## Extends the RefName class for hybrid Ruby-C simulation.
|
1000
1001
|
class RefName
|
1002
|
+
## Extends the RefName class for hybrid Ruby-C simulation.
|
1001
1003
|
# Should not be used with rcsim.
|
1002
1004
|
end
|
1003
1005
|
|
1004
1006
|
|
1005
|
-
## Extends the RefThis class for hybrid Ruby-C simulation.
|
1006
1007
|
class RefThis
|
1008
|
+
## Extends the RefThis class for hybrid Ruby-C simulation.
|
1007
1009
|
# attr_reader :rcref
|
1008
1010
|
# alias_method :rcexpression, :rcref
|
1009
1011
|
|
@@ -1014,18 +1016,40 @@ module HDLRuby::High
|
|
1014
1016
|
end
|
1015
1017
|
|
1016
1018
|
|
1017
|
-
## Extends the RefObject class for hybrid Ruby-C simulation.
|
1018
1019
|
class RefObject
|
1020
|
+
## Extends the RefObject class for hybrid Ruby-C simulation.
|
1019
1021
|
# attr_reader :rcref
|
1020
1022
|
# alias_method :rcexpression, :rcref
|
1023
|
+
|
1024
|
+
# Generate the C description of the reference object with sub signals.
|
1025
|
+
def to_rcsim_subs
|
1026
|
+
# Create the reference concat C object.
|
1027
|
+
# The reference is always big endian, it is the sequence
|
1028
|
+
# of element which is reversed if necessary.
|
1029
|
+
rcref = RCSim.rcsim_make_refConcat(self.type.to_rcsim,:big)
|
1030
|
+
# self.type.direction)
|
1031
|
+
|
1032
|
+
# Add the concatenated expressions. */
|
1033
|
+
if self.object.each_signal.any? then
|
1034
|
+
iter = self.object.each_signal
|
1035
|
+
iter = iter.reverse_each if self.type.direction == :big
|
1036
|
+
RCSim.rcsim_add_refConcat_refs(rcref, iter.map do|sig|
|
1037
|
+
sig.is_a?(SignalI) ? sig.rcsignalI : sig.rcsignalC
|
1038
|
+
end)
|
1039
|
+
end
|
1040
|
+
|
1041
|
+
return rcref
|
1042
|
+
end
|
1021
1043
|
|
1022
1044
|
# Generate the C description of the reference object.
|
1023
1045
|
def to_rcsim
|
1024
1046
|
# puts "object=#{self.object.name}(#{self.object})"
|
1025
1047
|
if self.object.is_a?(SignalI)
|
1026
|
-
return self.object.
|
1048
|
+
return self.object.each_signal.any? ? self.to_rcsim_subs :
|
1049
|
+
self.object.rcsignalI
|
1027
1050
|
elsif self.object.is_a?(SignalC)
|
1028
|
-
return self.object.
|
1051
|
+
return self.object.each_signal.any? ? self.to_rcsim_subs :
|
1052
|
+
self.object.rcsignalC
|
1029
1053
|
else
|
1030
1054
|
raise "Invalid object: #{self.object}"
|
1031
1055
|
end
|