pyvex 9.2.189__cp312-cp312-win_amd64.whl

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (60) hide show
  1. pyvex/__init__.py +92 -0
  2. pyvex/_register_info.py +1800 -0
  3. pyvex/arches.py +94 -0
  4. pyvex/block.py +697 -0
  5. pyvex/const.py +426 -0
  6. pyvex/const_val.py +26 -0
  7. pyvex/data_ref.py +55 -0
  8. pyvex/enums.py +156 -0
  9. pyvex/errors.py +31 -0
  10. pyvex/expr.py +974 -0
  11. pyvex/include/libvex.h +1029 -0
  12. pyvex/include/libvex_basictypes.h +236 -0
  13. pyvex/include/libvex_emnote.h +142 -0
  14. pyvex/include/libvex_guest_amd64.h +252 -0
  15. pyvex/include/libvex_guest_arm.h +224 -0
  16. pyvex/include/libvex_guest_arm64.h +203 -0
  17. pyvex/include/libvex_guest_mips32.h +175 -0
  18. pyvex/include/libvex_guest_mips64.h +173 -0
  19. pyvex/include/libvex_guest_offsets.h +941 -0
  20. pyvex/include/libvex_guest_ppc32.h +298 -0
  21. pyvex/include/libvex_guest_ppc64.h +343 -0
  22. pyvex/include/libvex_guest_riscv64.h +148 -0
  23. pyvex/include/libvex_guest_s390x.h +201 -0
  24. pyvex/include/libvex_guest_tilegx.h +149 -0
  25. pyvex/include/libvex_guest_x86.h +322 -0
  26. pyvex/include/libvex_ir.h +3113 -0
  27. pyvex/include/libvex_s390x_common.h +123 -0
  28. pyvex/include/libvex_trc_values.h +99 -0
  29. pyvex/include/pyvex.h +96 -0
  30. pyvex/lib/pyvex.dll +0 -0
  31. pyvex/lib/pyvex.lib +0 -0
  32. pyvex/lifting/__init__.py +18 -0
  33. pyvex/lifting/gym/README.md +7 -0
  34. pyvex/lifting/gym/__init__.py +5 -0
  35. pyvex/lifting/gym/aarch64_spotter.py +40 -0
  36. pyvex/lifting/gym/arm_spotter.py +427 -0
  37. pyvex/lifting/gym/x86_spotter.py +129 -0
  38. pyvex/lifting/libvex.py +117 -0
  39. pyvex/lifting/lift_function.py +304 -0
  40. pyvex/lifting/lifter.py +124 -0
  41. pyvex/lifting/post_processor.py +16 -0
  42. pyvex/lifting/util/__init__.py +14 -0
  43. pyvex/lifting/util/instr_helper.py +422 -0
  44. pyvex/lifting/util/lifter_helper.py +154 -0
  45. pyvex/lifting/util/syntax_wrapper.py +312 -0
  46. pyvex/lifting/util/vex_helper.py +301 -0
  47. pyvex/lifting/zerodivision.py +71 -0
  48. pyvex/native.py +63 -0
  49. pyvex/py.typed +1 -0
  50. pyvex/stmt.py +740 -0
  51. pyvex/types.py +48 -0
  52. pyvex/utils.py +63 -0
  53. pyvex/vex_ffi.py +1452 -0
  54. pyvex-9.2.189.dist-info/METADATA +181 -0
  55. pyvex-9.2.189.dist-info/RECORD +60 -0
  56. pyvex-9.2.189.dist-info/WHEEL +5 -0
  57. pyvex-9.2.189.dist-info/licenses/LICENSE +24 -0
  58. pyvex-9.2.189.dist-info/licenses/pyvex_c/LICENSE +339 -0
  59. pyvex-9.2.189.dist-info/licenses/vex/LICENSE.GPL +340 -0
  60. pyvex-9.2.189.dist-info/licenses/vex/LICENSE.README +23 -0
pyvex/vex_ffi.py ADDED
@@ -0,0 +1,1452 @@
1
+ ffi_str = """typedef unsigned char UChar;
2
+ typedef signed char Char;
3
+ typedef char HChar;
4
+ typedef unsigned short UShort;
5
+ typedef signed short Short;
6
+ typedef unsigned int UInt;
7
+ typedef signed int Int;
8
+ typedef unsigned long long int ULong;
9
+ typedef signed long long int Long;
10
+ typedef unsigned long SizeT;
11
+ typedef UInt U128[4];
12
+ typedef UInt U256[8];
13
+ typedef
14
+ union {
15
+ UChar w8[16];
16
+ UShort w16[8];
17
+ UInt w32[4];
18
+ ULong w64[2];
19
+ }
20
+ V128;
21
+ typedef
22
+ union {
23
+ UChar w8[32];
24
+ UShort w16[16];
25
+ UInt w32[8];
26
+ ULong w64[4];
27
+ }
28
+ V256;
29
+ typedef float Float;
30
+ typedef double Double;
31
+ typedef unsigned char Bool;
32
+ typedef UInt Addr32;
33
+ typedef ULong Addr64;
34
+ typedef Addr64 Addr;
35
+ typedef unsigned long long HWord;
36
+ typedef
37
+ enum {
38
+ Ity_INVALID=0x1100,
39
+ Ity_I1,
40
+ Ity_I8,
41
+ Ity_I16,
42
+ Ity_I32,
43
+ Ity_I64,
44
+ Ity_I128,
45
+ Ity_F16,
46
+ Ity_F32,
47
+ Ity_F64,
48
+ Ity_D32,
49
+ Ity_D64,
50
+ Ity_D128,
51
+ Ity_F128,
52
+ Ity_V128,
53
+ Ity_V256
54
+ }
55
+ IRType;
56
+ extern void ppIRType ( IRType );
57
+ extern Int sizeofIRType ( IRType );
58
+ extern IRType integerIRTypeOfSize ( Int szB );
59
+ typedef
60
+ enum {
61
+ Iend_LE=0x1200,
62
+ Iend_BE
63
+ }
64
+ IREndness;
65
+ typedef
66
+ enum {
67
+ Ico_U1=0x1300,
68
+ Ico_U8,
69
+ Ico_U16,
70
+ Ico_U32,
71
+ Ico_U64,
72
+ Ico_F32,
73
+ Ico_F32i,
74
+ Ico_F64,
75
+ Ico_F64i,
76
+ Ico_V128,
77
+ Ico_V256
78
+ }
79
+ IRConstTag;
80
+ typedef
81
+ struct _IRConst {
82
+ IRConstTag tag;
83
+ union {
84
+ Bool U1;
85
+ UChar U8;
86
+ UShort U16;
87
+ UInt U32;
88
+ ULong U64;
89
+ Float F32;
90
+ UInt F32i;
91
+ Double F64;
92
+ ULong F64i;
93
+ UShort V128;
94
+ UInt V256;
95
+ } Ico;
96
+ }
97
+ IRConst;
98
+ extern IRConst* IRConst_U1 ( Bool );
99
+ extern IRConst* IRConst_U8 ( UChar );
100
+ extern IRConst* IRConst_U16 ( UShort );
101
+ extern IRConst* IRConst_U32 ( UInt );
102
+ extern IRConst* IRConst_U64 ( ULong );
103
+ extern IRConst* IRConst_F32 ( Float );
104
+ extern IRConst* IRConst_F32i ( UInt );
105
+ extern IRConst* IRConst_F64 ( Double );
106
+ extern IRConst* IRConst_F64i ( ULong );
107
+ extern IRConst* IRConst_V128 ( UShort );
108
+ extern IRConst* IRConst_V256 ( UInt );
109
+ extern IRConst* deepCopyIRConst ( const IRConst* );
110
+ extern void ppIRConst ( const IRConst* );
111
+ extern Bool eqIRConst ( const IRConst*, const IRConst* );
112
+ typedef
113
+ struct {
114
+ Int regparms;
115
+ const HChar* name;
116
+ void* addr;
117
+ UInt mcx_mask;
118
+ }
119
+ IRCallee;
120
+ extern IRCallee* mkIRCallee ( Int regparms, const HChar* name, void* addr );
121
+ extern IRCallee* deepCopyIRCallee ( const IRCallee* );
122
+ extern void ppIRCallee ( const IRCallee* );
123
+ typedef
124
+ struct {
125
+ Int base;
126
+ IRType elemTy;
127
+ Int nElems;
128
+ }
129
+ IRRegArray;
130
+ extern IRRegArray* mkIRRegArray ( Int, IRType, Int );
131
+ extern IRRegArray* deepCopyIRRegArray ( const IRRegArray* );
132
+ extern void ppIRRegArray ( const IRRegArray* );
133
+ extern Bool eqIRRegArray ( const IRRegArray*, const IRRegArray* );
134
+ typedef UInt IRTemp;
135
+ extern void ppIRTemp ( IRTemp );
136
+ typedef
137
+ enum {
138
+ Iop_INVALID=0x1400,
139
+ Iop_Add8, Iop_Add16, Iop_Add32, Iop_Add64,
140
+ Iop_Sub8, Iop_Sub16, Iop_Sub32, Iop_Sub64,
141
+ Iop_Mul8, Iop_Mul16, Iop_Mul32, Iop_Mul64,
142
+ Iop_Or8, Iop_Or16, Iop_Or32, Iop_Or64,
143
+ Iop_And8, Iop_And16, Iop_And32, Iop_And64,
144
+ Iop_Xor8, Iop_Xor16, Iop_Xor32, Iop_Xor64,
145
+ Iop_Shl8, Iop_Shl16, Iop_Shl32, Iop_Shl64,
146
+ Iop_Shr8, Iop_Shr16, Iop_Shr32, Iop_Shr64,
147
+ Iop_Sar8, Iop_Sar16, Iop_Sar32, Iop_Sar64,
148
+ Iop_CmpEQ8, Iop_CmpEQ16, Iop_CmpEQ32, Iop_CmpEQ64,
149
+ Iop_CmpNE8, Iop_CmpNE16, Iop_CmpNE32, Iop_CmpNE64,
150
+ Iop_Not8, Iop_Not16, Iop_Not32, Iop_Not64,
151
+ Iop_CasCmpEQ8, Iop_CasCmpEQ16, Iop_CasCmpEQ32, Iop_CasCmpEQ64,
152
+ Iop_CasCmpNE8, Iop_CasCmpNE16, Iop_CasCmpNE32, Iop_CasCmpNE64,
153
+ Iop_ExpCmpNE8, Iop_ExpCmpNE16, Iop_ExpCmpNE32, Iop_ExpCmpNE64,
154
+ Iop_MullS8, Iop_MullS16, Iop_MullS32, Iop_MullS64,
155
+ Iop_MullU8, Iop_MullU16, Iop_MullU32, Iop_MullU64,
156
+ Iop_Clz64, Iop_Clz32,
157
+ Iop_Ctz64, Iop_Ctz32,
158
+ Iop_CmpLT32S, Iop_CmpLT64S,
159
+ Iop_CmpLE32S, Iop_CmpLE64S,
160
+ Iop_CmpLT32U, Iop_CmpLT64U,
161
+ Iop_CmpLE32U, Iop_CmpLE64U,
162
+ Iop_CmpNEZ8, Iop_CmpNEZ16, Iop_CmpNEZ32, Iop_CmpNEZ64,
163
+ Iop_CmpwNEZ32, Iop_CmpwNEZ64,
164
+ Iop_Left8, Iop_Left16, Iop_Left32, Iop_Left64,
165
+ Iop_Max32U,
166
+ Iop_CmpORD32U, Iop_CmpORD64U,
167
+ Iop_CmpORD32S, Iop_CmpORD64S,
168
+ Iop_DivU32,
169
+ Iop_DivS32,
170
+ Iop_DivU64,
171
+ Iop_DivS64,
172
+ Iop_DivU64E,
173
+ Iop_DivS64E,
174
+ Iop_DivU32E,
175
+ Iop_DivS32E,
176
+ Iop_DivModU64to32,
177
+ Iop_DivModS64to32,
178
+ Iop_DivModU128to64,
179
+ Iop_DivModS128to64,
180
+ Iop_DivModS64to64,
181
+ Iop_8Uto16, Iop_8Uto32, Iop_8Uto64,
182
+ Iop_16Uto32, Iop_16Uto64,
183
+ Iop_32Uto64,
184
+ Iop_8Sto16, Iop_8Sto32, Iop_8Sto64,
185
+ Iop_16Sto32, Iop_16Sto64,
186
+ Iop_32Sto64,
187
+ Iop_64to8, Iop_32to8, Iop_64to16,
188
+ Iop_16to8,
189
+ Iop_16HIto8,
190
+ Iop_8HLto16,
191
+ Iop_32to16,
192
+ Iop_32HIto16,
193
+ Iop_16HLto32,
194
+ Iop_64to32,
195
+ Iop_64HIto32,
196
+ Iop_32HLto64,
197
+ Iop_128to64,
198
+ Iop_128HIto64,
199
+ Iop_64HLto128,
200
+ Iop_Not1,
201
+ Iop_32to1,
202
+ Iop_64to1,
203
+ Iop_1Uto8,
204
+ Iop_1Uto32,
205
+ Iop_1Uto64,
206
+ Iop_1Sto8,
207
+ Iop_1Sto16,
208
+ Iop_1Sto32,
209
+ Iop_1Sto64,
210
+ Iop_AddF64, Iop_SubF64, Iop_MulF64, Iop_DivF64,
211
+ Iop_AddF32, Iop_SubF32, Iop_MulF32, Iop_DivF32,
212
+ Iop_AddF64r32, Iop_SubF64r32, Iop_MulF64r32, Iop_DivF64r32,
213
+ Iop_NegF64, Iop_AbsF64,
214
+ Iop_NegF32, Iop_AbsF32,
215
+ Iop_SqrtF64,
216
+ Iop_SqrtF32,
217
+ Iop_CmpF64,
218
+ Iop_CmpF32,
219
+ Iop_CmpF128,
220
+ Iop_F64toI16S,
221
+ Iop_F64toI32S,
222
+ Iop_F64toI64S,
223
+ Iop_F64toI64U,
224
+ Iop_F64toI32U,
225
+ Iop_I32StoF64,
226
+ Iop_I64StoF64,
227
+ Iop_I64UtoF64,
228
+ Iop_I64UtoF32,
229
+ Iop_I32UtoF32,
230
+ Iop_I32UtoF64,
231
+ Iop_F32toI32S,
232
+ Iop_F32toI64S,
233
+ Iop_F32toI32U,
234
+ Iop_F32toI64U,
235
+ Iop_I32StoF32,
236
+ Iop_I64StoF32,
237
+ Iop_F32toF64,
238
+ Iop_F64toF32,
239
+ Iop_ReinterpF64asI64, Iop_ReinterpI64asF64,
240
+ Iop_ReinterpF32asI32, Iop_ReinterpI32asF32,
241
+ Iop_F64HLtoF128,
242
+ Iop_F128HItoF64,
243
+ Iop_F128LOtoF64,
244
+ Iop_AddF128, Iop_SubF128, Iop_MulF128, Iop_DivF128,
245
+ Iop_MAddF128,
246
+ Iop_MSubF128,
247
+ Iop_NegMAddF128,
248
+ Iop_NegMSubF128,
249
+ Iop_NegF128, Iop_AbsF128,
250
+ Iop_SqrtF128,
251
+ Iop_I32StoF128,
252
+ Iop_I64StoF128,
253
+ Iop_I32UtoF128,
254
+ Iop_I64UtoF128,
255
+ Iop_F32toF128,
256
+ Iop_F64toF128,
257
+ Iop_F128toI32S,
258
+ Iop_F128toI64S,
259
+ Iop_F128toI32U,
260
+ Iop_F128toI64U,
261
+ Iop_F128toI128S,
262
+ Iop_F128toF64,
263
+ Iop_F128toF32,
264
+ Iop_RndF128,
265
+ Iop_TruncF128toI32S,
266
+ Iop_TruncF128toI32U,
267
+ Iop_TruncF128toI64U,
268
+ Iop_TruncF128toI64S,
269
+ Iop_AtanF64,
270
+ Iop_Yl2xF64,
271
+ Iop_Yl2xp1F64,
272
+ Iop_PRemF64,
273
+ Iop_PRemC3210F64,
274
+ Iop_PRem1F64,
275
+ Iop_PRem1C3210F64,
276
+ Iop_ScaleF64,
277
+ Iop_SinF64,
278
+ Iop_CosF64,
279
+ Iop_TanF64,
280
+ Iop_2xm1F64,
281
+ Iop_RoundF128toInt,
282
+ Iop_RoundF64toInt,
283
+ Iop_RoundF32toInt,
284
+ Iop_MAddF32, Iop_MSubF32,
285
+ Iop_MAddF64, Iop_MSubF64,
286
+ Iop_MAddF64r32, Iop_MSubF64r32,
287
+ Iop_RSqrtEst5GoodF64,
288
+ Iop_RoundF64toF64_NEAREST,
289
+ Iop_RoundF64toF64_NegINF,
290
+ Iop_RoundF64toF64_PosINF,
291
+ Iop_RoundF64toF64_ZERO,
292
+ Iop_TruncF64asF32,
293
+ Iop_RoundF64toF32,
294
+ Iop_RecpExpF64,
295
+ Iop_RecpExpF32,
296
+ Iop_MaxNumF64,
297
+ Iop_MinNumF64,
298
+ Iop_MaxNumF32,
299
+ Iop_MinNumF32,
300
+ Iop_F16toF64,
301
+ Iop_F64toF16,
302
+ Iop_F16toF32,
303
+ Iop_F32toF16,
304
+ Iop_QAdd32S,
305
+ Iop_QSub32S,
306
+ Iop_Add16x2, Iop_Sub16x2,
307
+ Iop_QAdd16Sx2, Iop_QAdd16Ux2,
308
+ Iop_QSub16Sx2, Iop_QSub16Ux2,
309
+ Iop_HAdd16Ux2, Iop_HAdd16Sx2,
310
+ Iop_HSub16Ux2, Iop_HSub16Sx2,
311
+ Iop_Add8x4, Iop_Sub8x4,
312
+ Iop_QAdd8Sx4, Iop_QAdd8Ux4,
313
+ Iop_QSub8Sx4, Iop_QSub8Ux4,
314
+ Iop_HAdd8Ux4, Iop_HAdd8Sx4,
315
+ Iop_HSub8Ux4, Iop_HSub8Sx4,
316
+ Iop_Sad8Ux4,
317
+ Iop_CmpNEZ16x2, Iop_CmpNEZ8x4,
318
+ Iop_I32UtoFx2, Iop_I32StoFx2,
319
+ Iop_FtoI32Ux2_RZ, Iop_FtoI32Sx2_RZ,
320
+ Iop_F32ToFixed32Ux2_RZ, Iop_F32ToFixed32Sx2_RZ,
321
+ Iop_Fixed32UToF32x2_RN, Iop_Fixed32SToF32x2_RN,
322
+ Iop_Max32Fx2, Iop_Min32Fx2,
323
+ Iop_PwMax32Fx2, Iop_PwMin32Fx2,
324
+ Iop_CmpEQ32Fx2, Iop_CmpGT32Fx2, Iop_CmpGE32Fx2,
325
+ Iop_RecipEst32Fx2,
326
+ Iop_RecipStep32Fx2,
327
+ Iop_RSqrtEst32Fx2,
328
+ Iop_RSqrtStep32Fx2,
329
+ Iop_Neg32Fx2, Iop_Abs32Fx2,
330
+ Iop_CmpNEZ8x8, Iop_CmpNEZ16x4, Iop_CmpNEZ32x2,
331
+ Iop_Add8x8, Iop_Add16x4, Iop_Add32x2,
332
+ Iop_QAdd8Ux8, Iop_QAdd16Ux4, Iop_QAdd32Ux2, Iop_QAdd64Ux1,
333
+ Iop_QAdd8Sx8, Iop_QAdd16Sx4, Iop_QAdd32Sx2, Iop_QAdd64Sx1,
334
+ Iop_PwAdd8x8, Iop_PwAdd16x4, Iop_PwAdd32x2,
335
+ Iop_PwMax8Sx8, Iop_PwMax16Sx4, Iop_PwMax32Sx2,
336
+ Iop_PwMax8Ux8, Iop_PwMax16Ux4, Iop_PwMax32Ux2,
337
+ Iop_PwMin8Sx8, Iop_PwMin16Sx4, Iop_PwMin32Sx2,
338
+ Iop_PwMin8Ux8, Iop_PwMin16Ux4, Iop_PwMin32Ux2,
339
+ Iop_PwAddL8Ux8, Iop_PwAddL16Ux4, Iop_PwAddL32Ux2,
340
+ Iop_PwAddL8Sx8, Iop_PwAddL16Sx4, Iop_PwAddL32Sx2,
341
+ Iop_Sub8x8, Iop_Sub16x4, Iop_Sub32x2,
342
+ Iop_QSub8Ux8, Iop_QSub16Ux4, Iop_QSub32Ux2, Iop_QSub64Ux1,
343
+ Iop_QSub8Sx8, Iop_QSub16Sx4, Iop_QSub32Sx2, Iop_QSub64Sx1,
344
+ Iop_Abs8x8, Iop_Abs16x4, Iop_Abs32x2,
345
+ Iop_Mul8x8, Iop_Mul16x4, Iop_Mul32x2,
346
+ Iop_Mul32Fx2,
347
+ Iop_MulHi16Ux4,
348
+ Iop_MulHi16Sx4,
349
+ Iop_PolynomialMul8x8,
350
+ Iop_QDMulHi16Sx4, Iop_QDMulHi32Sx2,
351
+ Iop_QRDMulHi16Sx4, Iop_QRDMulHi32Sx2,
352
+ Iop_Avg8Ux8,
353
+ Iop_Avg16Ux4,
354
+ Iop_Max8Sx8, Iop_Max16Sx4, Iop_Max32Sx2,
355
+ Iop_Max8Ux8, Iop_Max16Ux4, Iop_Max32Ux2,
356
+ Iop_Min8Sx8, Iop_Min16Sx4, Iop_Min32Sx2,
357
+ Iop_Min8Ux8, Iop_Min16Ux4, Iop_Min32Ux2,
358
+ Iop_CmpEQ8x8, Iop_CmpEQ16x4, Iop_CmpEQ32x2,
359
+ Iop_CmpGT8Ux8, Iop_CmpGT16Ux4, Iop_CmpGT32Ux2,
360
+ Iop_CmpGT8Sx8, Iop_CmpGT16Sx4, Iop_CmpGT32Sx2,
361
+ Iop_Cnt8x8,
362
+ Iop_Clz8x8, Iop_Clz16x4, Iop_Clz32x2,
363
+ Iop_Cls8x8, Iop_Cls16x4, Iop_Cls32x2,
364
+ Iop_Clz64x2,
365
+ Iop_Ctz8x16, Iop_Ctz16x8, Iop_Ctz32x4, Iop_Ctz64x2,
366
+ Iop_Shl8x8, Iop_Shl16x4, Iop_Shl32x2,
367
+ Iop_Shr8x8, Iop_Shr16x4, Iop_Shr32x2,
368
+ Iop_Sar8x8, Iop_Sar16x4, Iop_Sar32x2,
369
+ Iop_Sal8x8, Iop_Sal16x4, Iop_Sal32x2, Iop_Sal64x1,
370
+ Iop_ShlN8x8, Iop_ShlN16x4, Iop_ShlN32x2,
371
+ Iop_ShrN8x8, Iop_ShrN16x4, Iop_ShrN32x2,
372
+ Iop_SarN8x8, Iop_SarN16x4, Iop_SarN32x2,
373
+ Iop_QShl8x8, Iop_QShl16x4, Iop_QShl32x2, Iop_QShl64x1,
374
+ Iop_QSal8x8, Iop_QSal16x4, Iop_QSal32x2, Iop_QSal64x1,
375
+ Iop_QShlNsatSU8x8, Iop_QShlNsatSU16x4,
376
+ Iop_QShlNsatSU32x2, Iop_QShlNsatSU64x1,
377
+ Iop_QShlNsatUU8x8, Iop_QShlNsatUU16x4,
378
+ Iop_QShlNsatUU32x2, Iop_QShlNsatUU64x1,
379
+ Iop_QShlNsatSS8x8, Iop_QShlNsatSS16x4,
380
+ Iop_QShlNsatSS32x2, Iop_QShlNsatSS64x1,
381
+ Iop_QNarrowBin16Sto8Ux8,
382
+ Iop_QNarrowBin16Sto8Sx8, Iop_QNarrowBin32Sto16Sx4,
383
+ Iop_NarrowBin16to8x8, Iop_NarrowBin32to16x4,
384
+ Iop_InterleaveHI8x8, Iop_InterleaveHI16x4, Iop_InterleaveHI32x2,
385
+ Iop_InterleaveLO8x8, Iop_InterleaveLO16x4, Iop_InterleaveLO32x2,
386
+ Iop_InterleaveOddLanes8x8, Iop_InterleaveEvenLanes8x8,
387
+ Iop_InterleaveOddLanes16x4, Iop_InterleaveEvenLanes16x4,
388
+ Iop_CatOddLanes8x8, Iop_CatOddLanes16x4,
389
+ Iop_CatEvenLanes8x8, Iop_CatEvenLanes16x4,
390
+ Iop_GetElem8x8, Iop_GetElem16x4, Iop_GetElem32x2,
391
+ Iop_SetElem8x8, Iop_SetElem16x4, Iop_SetElem32x2,
392
+ Iop_Dup8x8, Iop_Dup16x4, Iop_Dup32x2,
393
+ Iop_Slice64,
394
+ Iop_Reverse8sIn16_x4,
395
+ Iop_Reverse8sIn32_x2, Iop_Reverse16sIn32_x2,
396
+ Iop_Reverse8sIn64_x1, Iop_Reverse16sIn64_x1, Iop_Reverse32sIn64_x1,
397
+ Iop_Perm8x8,
398
+ Iop_GetMSBs8x8,
399
+ Iop_RecipEst32Ux2, Iop_RSqrtEst32Ux2,
400
+ Iop_AddD64, Iop_SubD64, Iop_MulD64, Iop_DivD64,
401
+ Iop_AddD128, Iop_SubD128, Iop_MulD128, Iop_DivD128,
402
+ Iop_ShlD64, Iop_ShrD64,
403
+ Iop_ShlD128, Iop_ShrD128,
404
+ Iop_D32toD64,
405
+ Iop_D64toD128,
406
+ Iop_I32StoD128,
407
+ Iop_I32UtoD128,
408
+ Iop_I64StoD128,
409
+ Iop_I64UtoD128,
410
+ Iop_D64toD32,
411
+ Iop_D128toD64,
412
+ Iop_I32StoD64,
413
+ Iop_I32UtoD64,
414
+ Iop_I64StoD64,
415
+ Iop_I64UtoD64,
416
+ Iop_D64toI32S,
417
+ Iop_D64toI32U,
418
+ Iop_D64toI64S,
419
+ Iop_D64toI64U,
420
+ Iop_D128toI32S,
421
+ Iop_D128toI32U,
422
+ Iop_D128toI64S,
423
+ Iop_D128toI64U,
424
+ Iop_F32toD32,
425
+ Iop_F32toD64,
426
+ Iop_F32toD128,
427
+ Iop_F64toD32,
428
+ Iop_F64toD64,
429
+ Iop_F64toD128,
430
+ Iop_F128toD32,
431
+ Iop_F128toD64,
432
+ Iop_F128toD128,
433
+ Iop_D32toF32,
434
+ Iop_D32toF64,
435
+ Iop_D32toF128,
436
+ Iop_D64toF32,
437
+ Iop_D64toF64,
438
+ Iop_D64toF128,
439
+ Iop_D128toF32,
440
+ Iop_D128toF64,
441
+ Iop_D128toF128,
442
+ Iop_RoundD64toInt,
443
+ Iop_RoundD128toInt,
444
+ Iop_CmpD64,
445
+ Iop_CmpD128,
446
+ Iop_CmpExpD64,
447
+ Iop_CmpExpD128,
448
+ Iop_QuantizeD64,
449
+ Iop_QuantizeD128,
450
+ Iop_SignificanceRoundD64,
451
+ Iop_SignificanceRoundD128,
452
+ Iop_ExtractExpD64,
453
+ Iop_ExtractExpD128,
454
+ Iop_ExtractSigD64,
455
+ Iop_ExtractSigD128,
456
+ Iop_InsertExpD64,
457
+ Iop_InsertExpD128,
458
+ Iop_D64HLtoD128, Iop_D128HItoD64, Iop_D128LOtoD64,
459
+ Iop_DPBtoBCD,
460
+ Iop_BCDtoDPB,
461
+ Iop_BCDAdd, Iop_BCDSub,
462
+ Iop_I128StoBCD128,
463
+ Iop_BCD128toI128S,
464
+ Iop_ReinterpI64asD64,
465
+ Iop_ReinterpD64asI64,
466
+ Iop_Add32Fx4, Iop_Sub32Fx4, Iop_Mul32Fx4, Iop_Div32Fx4,
467
+ Iop_Max32Fx4, Iop_Min32Fx4,
468
+ Iop_Add32Fx2, Iop_Sub32Fx2,
469
+ Iop_CmpEQ32Fx4, Iop_CmpLT32Fx4, Iop_CmpLE32Fx4, Iop_CmpUN32Fx4,
470
+ Iop_CmpGT32Fx4, Iop_CmpGE32Fx4,
471
+ Iop_PwMax32Fx4, Iop_PwMin32Fx4,
472
+ Iop_Abs32Fx4,
473
+ Iop_Neg32Fx4,
474
+ Iop_Sqrt32Fx4,
475
+ Iop_RecipEst32Fx4,
476
+ Iop_RecipStep32Fx4,
477
+ Iop_RSqrtEst32Fx4,
478
+ Iop_RSqrtStep32Fx4,
479
+ Iop_I32UtoFx4, Iop_I32StoFx4,
480
+ Iop_FtoI32Ux4_RZ, Iop_FtoI32Sx4_RZ,
481
+ Iop_QFtoI32Ux4_RZ, Iop_QFtoI32Sx4_RZ,
482
+ Iop_RoundF32x4_RM, Iop_RoundF32x4_RP,
483
+ Iop_RoundF32x4_RN, Iop_RoundF32x4_RZ,
484
+ Iop_F32ToFixed32Ux4_RZ, Iop_F32ToFixed32Sx4_RZ,
485
+ Iop_Fixed32UToF32x4_RN, Iop_Fixed32SToF32x4_RN,
486
+ Iop_F32toF16x4, Iop_F16toF32x4,
487
+ Iop_F64toF16x2, Iop_F16toF64x2,
488
+ Iop_Add32F0x4, Iop_Sub32F0x4, Iop_Mul32F0x4, Iop_Div32F0x4,
489
+ Iop_Max32F0x4, Iop_Min32F0x4,
490
+ Iop_CmpEQ32F0x4, Iop_CmpLT32F0x4, Iop_CmpLE32F0x4, Iop_CmpUN32F0x4,
491
+ Iop_RecipEst32F0x4, Iop_Sqrt32F0x4, Iop_RSqrtEst32F0x4,
492
+ Iop_Add64Fx2, Iop_Sub64Fx2, Iop_Mul64Fx2, Iop_Div64Fx2,
493
+ Iop_Max64Fx2, Iop_Min64Fx2,
494
+ Iop_CmpEQ64Fx2, Iop_CmpLT64Fx2, Iop_CmpLE64Fx2, Iop_CmpUN64Fx2,
495
+ Iop_Abs64Fx2,
496
+ Iop_Neg64Fx2,
497
+ Iop_Sqrt64Fx2,
498
+ Iop_RecipEst64Fx2,
499
+ Iop_RecipStep64Fx2,
500
+ Iop_RSqrtEst64Fx2,
501
+ Iop_RSqrtStep64Fx2,
502
+ Iop_Add64F0x2, Iop_Sub64F0x2, Iop_Mul64F0x2, Iop_Div64F0x2,
503
+ Iop_Max64F0x2, Iop_Min64F0x2,
504
+ Iop_CmpEQ64F0x2, Iop_CmpLT64F0x2, Iop_CmpLE64F0x2, Iop_CmpUN64F0x2,
505
+ Iop_Sqrt64F0x2,
506
+ Iop_V128to64,
507
+ Iop_V128HIto64,
508
+ Iop_64HLtoV128,
509
+ Iop_64UtoV128,
510
+ Iop_SetV128lo64,
511
+ Iop_ZeroHI64ofV128,
512
+ Iop_ZeroHI96ofV128,
513
+ Iop_ZeroHI112ofV128,
514
+ Iop_ZeroHI120ofV128,
515
+ Iop_32UtoV128,
516
+ Iop_V128to32,
517
+ Iop_SetV128lo32,
518
+ Iop_NotV128,
519
+ Iop_AndV128, Iop_OrV128, Iop_XorV128,
520
+ Iop_ShlV128, Iop_ShrV128, Iop_SarV128,
521
+ Iop_CmpNEZ8x16, Iop_CmpNEZ16x8, Iop_CmpNEZ32x4, Iop_CmpNEZ64x2,
522
+ Iop_CmpNEZ128x1,
523
+ Iop_Add8x16, Iop_Add16x8, Iop_Add32x4, Iop_Add64x2, Iop_Add128x1,
524
+ Iop_QAdd8Ux16, Iop_QAdd16Ux8, Iop_QAdd32Ux4, Iop_QAdd64Ux2,
525
+ Iop_QAdd8Sx16, Iop_QAdd16Sx8, Iop_QAdd32Sx4, Iop_QAdd64Sx2,
526
+ Iop_QAddExtUSsatSS8x16, Iop_QAddExtUSsatSS16x8,
527
+ Iop_QAddExtUSsatSS32x4, Iop_QAddExtUSsatSS64x2,
528
+ Iop_QAddExtSUsatUU8x16, Iop_QAddExtSUsatUU16x8,
529
+ Iop_QAddExtSUsatUU32x4, Iop_QAddExtSUsatUU64x2,
530
+ Iop_Sub8x16, Iop_Sub16x8, Iop_Sub32x4, Iop_Sub64x2, Iop_Sub128x1,
531
+ Iop_QSub8Ux16, Iop_QSub16Ux8, Iop_QSub32Ux4, Iop_QSub64Ux2,
532
+ Iop_QSub8Sx16, Iop_QSub16Sx8, Iop_QSub32Sx4, Iop_QSub64Sx2,
533
+ Iop_Mul8x16, Iop_Mul16x8, Iop_Mul32x4,
534
+ Iop_MulHi8Ux16, Iop_MulHi16Ux8, Iop_MulHi32Ux4,
535
+ Iop_MulHi8Sx16, Iop_MulHi16Sx8, Iop_MulHi32Sx4,
536
+ Iop_MullEven8Ux16, Iop_MullEven16Ux8, Iop_MullEven32Ux4,
537
+ Iop_MullEven8Sx16, Iop_MullEven16Sx8, Iop_MullEven32Sx4,
538
+ Iop_Mull8Ux8, Iop_Mull8Sx8,
539
+ Iop_Mull16Ux4, Iop_Mull16Sx4,
540
+ Iop_Mull32Ux2, Iop_Mull32Sx2,
541
+ Iop_QDMull16Sx4, Iop_QDMull32Sx2,
542
+ Iop_QDMulHi16Sx8, Iop_QDMulHi32Sx4,
543
+ Iop_QRDMulHi16Sx8, Iop_QRDMulHi32Sx4,
544
+ Iop_PolynomialMul8x16,
545
+ Iop_PolynomialMull8x8,
546
+ Iop_PolynomialMulAdd8x16, Iop_PolynomialMulAdd16x8,
547
+ Iop_PolynomialMulAdd32x4, Iop_PolynomialMulAdd64x2,
548
+ Iop_PwAdd8x16, Iop_PwAdd16x8, Iop_PwAdd32x4,
549
+ Iop_PwAdd32Fx2,
550
+ Iop_PwAddL8Ux16, Iop_PwAddL16Ux8, Iop_PwAddL32Ux4, Iop_PwAddL64Ux2,
551
+ Iop_PwAddL8Sx16, Iop_PwAddL16Sx8, Iop_PwAddL32Sx4,
552
+ Iop_PwBitMtxXpose64x2,
553
+ Iop_Abs8x16, Iop_Abs16x8, Iop_Abs32x4, Iop_Abs64x2,
554
+ Iop_Avg8Ux16, Iop_Avg16Ux8, Iop_Avg32Ux4, Iop_Avg64Ux2,
555
+ Iop_Avg8Sx16, Iop_Avg16Sx8, Iop_Avg32Sx4, Iop_Avg64Sx2,
556
+ Iop_Max8Sx16, Iop_Max16Sx8, Iop_Max32Sx4, Iop_Max64Sx2,
557
+ Iop_Max8Ux16, Iop_Max16Ux8, Iop_Max32Ux4, Iop_Max64Ux2,
558
+ Iop_Min8Sx16, Iop_Min16Sx8, Iop_Min32Sx4, Iop_Min64Sx2,
559
+ Iop_Min8Ux16, Iop_Min16Ux8, Iop_Min32Ux4, Iop_Min64Ux2,
560
+ Iop_CmpEQ8x16, Iop_CmpEQ16x8, Iop_CmpEQ32x4, Iop_CmpEQ64x2,
561
+ Iop_CmpGT8Sx16, Iop_CmpGT16Sx8, Iop_CmpGT32Sx4, Iop_CmpGT64Sx2,
562
+ Iop_CmpGT8Ux16, Iop_CmpGT16Ux8, Iop_CmpGT32Ux4, Iop_CmpGT64Ux2,
563
+ Iop_Cnt8x16,
564
+ Iop_Clz8x16, Iop_Clz16x8, Iop_Clz32x4,
565
+ Iop_Cls8x16, Iop_Cls16x8, Iop_Cls32x4,
566
+ Iop_ShlN8x16, Iop_ShlN16x8, Iop_ShlN32x4, Iop_ShlN64x2,
567
+ Iop_ShrN8x16, Iop_ShrN16x8, Iop_ShrN32x4, Iop_ShrN64x2,
568
+ Iop_SarN8x16, Iop_SarN16x8, Iop_SarN32x4, Iop_SarN64x2,
569
+ Iop_Shl8x16, Iop_Shl16x8, Iop_Shl32x4, Iop_Shl64x2,
570
+ Iop_Shr8x16, Iop_Shr16x8, Iop_Shr32x4, Iop_Shr64x2,
571
+ Iop_Sar8x16, Iop_Sar16x8, Iop_Sar32x4, Iop_Sar64x2,
572
+ Iop_Sal8x16, Iop_Sal16x8, Iop_Sal32x4, Iop_Sal64x2,
573
+ Iop_Rol8x16, Iop_Rol16x8, Iop_Rol32x4, Iop_Rol64x2,
574
+ Iop_QShl8x16, Iop_QShl16x8, Iop_QShl32x4, Iop_QShl64x2,
575
+ Iop_QSal8x16, Iop_QSal16x8, Iop_QSal32x4, Iop_QSal64x2,
576
+ Iop_QShlNsatSU8x16, Iop_QShlNsatSU16x8,
577
+ Iop_QShlNsatSU32x4, Iop_QShlNsatSU64x2,
578
+ Iop_QShlNsatUU8x16, Iop_QShlNsatUU16x8,
579
+ Iop_QShlNsatUU32x4, Iop_QShlNsatUU64x2,
580
+ Iop_QShlNsatSS8x16, Iop_QShlNsatSS16x8,
581
+ Iop_QShlNsatSS32x4, Iop_QShlNsatSS64x2,
582
+ Iop_QandUQsh8x16, Iop_QandUQsh16x8,
583
+ Iop_QandUQsh32x4, Iop_QandUQsh64x2,
584
+ Iop_QandSQsh8x16, Iop_QandSQsh16x8,
585
+ Iop_QandSQsh32x4, Iop_QandSQsh64x2,
586
+ Iop_QandUQRsh8x16, Iop_QandUQRsh16x8,
587
+ Iop_QandUQRsh32x4, Iop_QandUQRsh64x2,
588
+ Iop_QandSQRsh8x16, Iop_QandSQRsh16x8,
589
+ Iop_QandSQRsh32x4, Iop_QandSQRsh64x2,
590
+ Iop_Sh8Sx16, Iop_Sh16Sx8, Iop_Sh32Sx4, Iop_Sh64Sx2,
591
+ Iop_Sh8Ux16, Iop_Sh16Ux8, Iop_Sh32Ux4, Iop_Sh64Ux2,
592
+ Iop_Rsh8Sx16, Iop_Rsh16Sx8, Iop_Rsh32Sx4, Iop_Rsh64Sx2,
593
+ Iop_Rsh8Ux16, Iop_Rsh16Ux8, Iop_Rsh32Ux4, Iop_Rsh64Ux2,
594
+ Iop_QandQShrNnarrow16Uto8Ux8,
595
+ Iop_QandQShrNnarrow32Uto16Ux4, Iop_QandQShrNnarrow64Uto32Ux2,
596
+ Iop_QandQSarNnarrow16Sto8Sx8,
597
+ Iop_QandQSarNnarrow32Sto16Sx4, Iop_QandQSarNnarrow64Sto32Sx2,
598
+ Iop_QandQSarNnarrow16Sto8Ux8,
599
+ Iop_QandQSarNnarrow32Sto16Ux4, Iop_QandQSarNnarrow64Sto32Ux2,
600
+ Iop_QandQRShrNnarrow16Uto8Ux8,
601
+ Iop_QandQRShrNnarrow32Uto16Ux4, Iop_QandQRShrNnarrow64Uto32Ux2,
602
+ Iop_QandQRSarNnarrow16Sto8Sx8,
603
+ Iop_QandQRSarNnarrow32Sto16Sx4, Iop_QandQRSarNnarrow64Sto32Sx2,
604
+ Iop_QandQRSarNnarrow16Sto8Ux8,
605
+ Iop_QandQRSarNnarrow32Sto16Ux4, Iop_QandQRSarNnarrow64Sto32Ux2,
606
+ Iop_QNarrowBin16Sto8Ux16, Iop_QNarrowBin32Sto16Ux8,
607
+ Iop_QNarrowBin16Sto8Sx16, Iop_QNarrowBin32Sto16Sx8,
608
+ Iop_QNarrowBin16Uto8Ux16, Iop_QNarrowBin32Uto16Ux8,
609
+ Iop_NarrowBin16to8x16, Iop_NarrowBin32to16x8,
610
+ Iop_QNarrowBin64Sto32Sx4, Iop_QNarrowBin64Uto32Ux4,
611
+ Iop_NarrowBin64to32x4,
612
+ Iop_NarrowUn16to8x8, Iop_NarrowUn32to16x4, Iop_NarrowUn64to32x2,
613
+ Iop_QNarrowUn16Sto8Sx8, Iop_QNarrowUn32Sto16Sx4, Iop_QNarrowUn64Sto32Sx2,
614
+ Iop_QNarrowUn16Sto8Ux8, Iop_QNarrowUn32Sto16Ux4, Iop_QNarrowUn64Sto32Ux2,
615
+ Iop_QNarrowUn16Uto8Ux8, Iop_QNarrowUn32Uto16Ux4, Iop_QNarrowUn64Uto32Ux2,
616
+ Iop_Widen8Uto16x8, Iop_Widen16Uto32x4, Iop_Widen32Uto64x2,
617
+ Iop_Widen8Sto16x8, Iop_Widen16Sto32x4, Iop_Widen32Sto64x2,
618
+ Iop_InterleaveHI8x16, Iop_InterleaveHI16x8,
619
+ Iop_InterleaveHI32x4, Iop_InterleaveHI64x2,
620
+ Iop_InterleaveLO8x16, Iop_InterleaveLO16x8,
621
+ Iop_InterleaveLO32x4, Iop_InterleaveLO64x2,
622
+ Iop_InterleaveOddLanes8x16, Iop_InterleaveEvenLanes8x16,
623
+ Iop_InterleaveOddLanes16x8, Iop_InterleaveEvenLanes16x8,
624
+ Iop_InterleaveOddLanes32x4, Iop_InterleaveEvenLanes32x4,
625
+ Iop_CatOddLanes8x16, Iop_CatOddLanes16x8, Iop_CatOddLanes32x4,
626
+ Iop_CatEvenLanes8x16, Iop_CatEvenLanes16x8, Iop_CatEvenLanes32x4,
627
+ Iop_GetElem8x16, Iop_GetElem16x8, Iop_GetElem32x4, Iop_GetElem64x2,
628
+ Iop_SetElem8x16, Iop_SetElem16x8, Iop_SetElem32x4, Iop_SetElem64x2,
629
+ Iop_Dup8x16, Iop_Dup16x8, Iop_Dup32x4,
630
+ Iop_SliceV128,
631
+ Iop_Reverse8sIn16_x8,
632
+ Iop_Reverse8sIn32_x4, Iop_Reverse16sIn32_x4,
633
+ Iop_Reverse8sIn64_x2, Iop_Reverse16sIn64_x2, Iop_Reverse32sIn64_x2,
634
+ Iop_Reverse1sIn8_x16,
635
+ Iop_Perm8x16,
636
+ Iop_Perm32x4,
637
+ Iop_Perm8x16x2,
638
+ Iop_GetMSBs8x16,
639
+ Iop_RecipEst32Ux4, Iop_RSqrtEst32Ux4,
640
+ Iop_MulI128by10,
641
+ Iop_MulI128by10Carry,
642
+ Iop_MulI128by10E,
643
+ Iop_MulI128by10ECarry,
644
+ Iop_V256to64_0,
645
+ Iop_V256to64_1,
646
+ Iop_V256to64_2,
647
+ Iop_V256to64_3,
648
+ Iop_64x4toV256,
649
+ Iop_V256toV128_0,
650
+ Iop_V256toV128_1,
651
+ Iop_V128HLtoV256,
652
+ Iop_AndV256,
653
+ Iop_OrV256,
654
+ Iop_XorV256,
655
+ Iop_NotV256,
656
+ Iop_CmpNEZ8x32, Iop_CmpNEZ16x16, Iop_CmpNEZ32x8, Iop_CmpNEZ64x4,
657
+ Iop_Add8x32, Iop_Add16x16, Iop_Add32x8, Iop_Add64x4,
658
+ Iop_Sub8x32, Iop_Sub16x16, Iop_Sub32x8, Iop_Sub64x4,
659
+ Iop_CmpEQ8x32, Iop_CmpEQ16x16, Iop_CmpEQ32x8, Iop_CmpEQ64x4,
660
+ Iop_CmpGT8Sx32, Iop_CmpGT16Sx16, Iop_CmpGT32Sx8, Iop_CmpGT64Sx4,
661
+ Iop_ShlN16x16, Iop_ShlN32x8, Iop_ShlN64x4,
662
+ Iop_ShrN16x16, Iop_ShrN32x8, Iop_ShrN64x4,
663
+ Iop_SarN16x16, Iop_SarN32x8,
664
+ Iop_Max8Sx32, Iop_Max16Sx16, Iop_Max32Sx8,
665
+ Iop_Max8Ux32, Iop_Max16Ux16, Iop_Max32Ux8,
666
+ Iop_Min8Sx32, Iop_Min16Sx16, Iop_Min32Sx8,
667
+ Iop_Min8Ux32, Iop_Min16Ux16, Iop_Min32Ux8,
668
+ Iop_Mul16x16, Iop_Mul32x8,
669
+ Iop_MulHi16Ux16, Iop_MulHi16Sx16,
670
+ Iop_QAdd8Ux32, Iop_QAdd16Ux16,
671
+ Iop_QAdd8Sx32, Iop_QAdd16Sx16,
672
+ Iop_QSub8Ux32, Iop_QSub16Ux16,
673
+ Iop_QSub8Sx32, Iop_QSub16Sx16,
674
+ Iop_Avg8Ux32, Iop_Avg16Ux16,
675
+ Iop_Perm32x8,
676
+ Iop_CipherV128, Iop_CipherLV128, Iop_CipherSV128,
677
+ Iop_NCipherV128, Iop_NCipherLV128,
678
+ Iop_SHA512, Iop_SHA256,
679
+ Iop_Add64Fx4, Iop_Sub64Fx4, Iop_Mul64Fx4, Iop_Div64Fx4,
680
+ Iop_Add32Fx8, Iop_Sub32Fx8, Iop_Mul32Fx8, Iop_Div32Fx8,
681
+ Iop_Sqrt32Fx8,
682
+ Iop_Sqrt64Fx4,
683
+ Iop_RSqrtEst32Fx8,
684
+ Iop_RecipEst32Fx8,
685
+ Iop_Max32Fx8, Iop_Min32Fx8,
686
+ Iop_Max64Fx4, Iop_Min64Fx4,
687
+ Iop_LAST
688
+ }
689
+ IROp;
690
+ extern void ppIROp ( IROp );
691
+ extern void typeOfPrimop ( IROp op,
692
+ IRType* t_dst, IRType* t_arg1,
693
+ IRType* t_arg2, IRType* t_arg3, IRType* t_arg4 );
694
+ typedef
695
+ enum {
696
+ Irrm_NEAREST = 0,
697
+ Irrm_NegINF = 1,
698
+ Irrm_PosINF = 2,
699
+ Irrm_ZERO = 3,
700
+ Irrm_NEAREST_TIE_AWAY_0 = 4,
701
+ Irrm_PREPARE_SHORTER = 5,
702
+ Irrm_AWAY_FROM_ZERO = 6,
703
+ Irrm_NEAREST_TIE_TOWARD_0 = 7,
704
+ Irrm_INVALID = 8
705
+ }
706
+ IRRoundingMode;
707
+ typedef
708
+ enum {
709
+ Ircr_UN = 0x45,
710
+ Ircr_LT = 0x01,
711
+ Ircr_GT = 0x00,
712
+ Ircr_EQ = 0x40
713
+ }
714
+ IRCmpFResult;
715
+ typedef IRCmpFResult IRCmpF32Result;
716
+ typedef IRCmpFResult IRCmpF64Result;
717
+ typedef IRCmpFResult IRCmpF128Result;
718
+ typedef IRCmpFResult IRCmpDResult;
719
+ typedef IRCmpDResult IRCmpD64Result;
720
+ typedef IRCmpDResult IRCmpD128Result;
721
+ typedef struct _IRQop IRQop;
722
+ typedef struct _IRTriop IRTriop;
723
+ typedef
724
+ enum {
725
+ Iex_Binder=0x1900,
726
+ Iex_Get,
727
+ Iex_GetI,
728
+ Iex_RdTmp,
729
+ Iex_Qop,
730
+ Iex_Triop,
731
+ Iex_Binop,
732
+ Iex_Unop,
733
+ Iex_Load,
734
+ Iex_Const,
735
+ Iex_ITE,
736
+ Iex_CCall,
737
+ Iex_VECRET,
738
+ Iex_GSPTR
739
+ }
740
+ IRExprTag;
741
+ typedef
742
+ struct _IRExpr
743
+ IRExpr;
744
+ struct _IRExpr {
745
+ IRExprTag tag;
746
+ union {
747
+ struct {
748
+ Int binder;
749
+ } Binder;
750
+ struct {
751
+ Int offset;
752
+ IRType ty;
753
+ } Get;
754
+ struct {
755
+ IRRegArray* descr;
756
+ IRExpr* ix;
757
+ Int bias;
758
+ } GetI;
759
+ struct {
760
+ IRTemp tmp;
761
+ } RdTmp;
762
+ struct {
763
+ IRQop* details;
764
+ } Qop;
765
+ struct {
766
+ IRTriop* details;
767
+ } Triop;
768
+ struct {
769
+ IROp op;
770
+ IRExpr* arg1;
771
+ IRExpr* arg2;
772
+ } Binop;
773
+ struct {
774
+ IROp op;
775
+ IRExpr* arg;
776
+ } Unop;
777
+ struct {
778
+ IREndness end;
779
+ IRType ty;
780
+ IRExpr* addr;
781
+ } Load;
782
+ struct {
783
+ IRConst* con;
784
+ } Const;
785
+ struct {
786
+ IRCallee* cee;
787
+ IRType retty;
788
+ IRExpr** args;
789
+ } CCall;
790
+ struct {
791
+ IRExpr* cond;
792
+ IRExpr* iftrue;
793
+ IRExpr* iffalse;
794
+ } ITE;
795
+ } Iex;
796
+ };
797
+ struct _IRTriop {
798
+ IROp op;
799
+ IRExpr* arg1;
800
+ IRExpr* arg2;
801
+ IRExpr* arg3;
802
+ };
803
+ struct _IRQop {
804
+ IROp op;
805
+ IRExpr* arg1;
806
+ IRExpr* arg2;
807
+ IRExpr* arg3;
808
+ IRExpr* arg4;
809
+ };
810
+ extern IRExpr* IRExpr_Binder ( Int binder );
811
+ extern IRExpr* IRExpr_Get ( Int off, IRType ty );
812
+ extern IRExpr* IRExpr_GetI ( IRRegArray* descr, IRExpr* ix, Int bias );
813
+ extern IRExpr* IRExpr_RdTmp ( IRTemp tmp );
814
+ extern IRExpr* IRExpr_Qop ( IROp op, IRExpr* arg1, IRExpr* arg2,
815
+ IRExpr* arg3, IRExpr* arg4 );
816
+ extern IRExpr* IRExpr_Triop ( IROp op, IRExpr* arg1,
817
+ IRExpr* arg2, IRExpr* arg3 );
818
+ extern IRExpr* IRExpr_Binop ( IROp op, IRExpr* arg1, IRExpr* arg2 );
819
+ extern IRExpr* IRExpr_Unop ( IROp op, IRExpr* arg );
820
+ extern IRExpr* IRExpr_Load ( IREndness end, IRType ty, IRExpr* addr );
821
+ extern IRExpr* IRExpr_Const ( IRConst* con );
822
+ extern IRExpr* IRExpr_CCall ( IRCallee* cee, IRType retty, IRExpr** args );
823
+ extern IRExpr* IRExpr_ITE ( IRExpr* cond, IRExpr* iftrue, IRExpr* iffalse );
824
+ extern IRExpr* IRExpr_VECRET ( void );
825
+ extern IRExpr* IRExpr_GSPTR ( void );
826
+ extern IRExpr* deepCopyIRExpr ( const IRExpr* );
827
+ extern void ppIRExpr ( const IRExpr* );
828
+ extern IRExpr** mkIRExprVec_0 ( void );
829
+ extern IRExpr** mkIRExprVec_1 ( IRExpr* );
830
+ extern IRExpr** mkIRExprVec_2 ( IRExpr*, IRExpr* );
831
+ extern IRExpr** mkIRExprVec_3 ( IRExpr*, IRExpr*, IRExpr* );
832
+ extern IRExpr** mkIRExprVec_4 ( IRExpr*, IRExpr*, IRExpr*, IRExpr* );
833
+ extern IRExpr** mkIRExprVec_5 ( IRExpr*, IRExpr*, IRExpr*, IRExpr*,
834
+ IRExpr* );
835
+ extern IRExpr** mkIRExprVec_6 ( IRExpr*, IRExpr*, IRExpr*, IRExpr*,
836
+ IRExpr*, IRExpr* );
837
+ extern IRExpr** mkIRExprVec_7 ( IRExpr*, IRExpr*, IRExpr*, IRExpr*,
838
+ IRExpr*, IRExpr*, IRExpr* );
839
+ extern IRExpr** mkIRExprVec_8 ( IRExpr*, IRExpr*, IRExpr*, IRExpr*,
840
+ IRExpr*, IRExpr*, IRExpr*, IRExpr* );
841
+ extern IRExpr** mkIRExprVec_9 ( IRExpr*, IRExpr*, IRExpr*, IRExpr*,
842
+ IRExpr*, IRExpr*, IRExpr*, IRExpr*, IRExpr* );
843
+ extern IRExpr** mkIRExprVec_13 ( IRExpr*, IRExpr*, IRExpr*, IRExpr*,
844
+ IRExpr*, IRExpr*, IRExpr*, IRExpr*,
845
+ IRExpr*, IRExpr*, IRExpr*, IRExpr*, IRExpr* );
846
+ extern IRExpr** shallowCopyIRExprVec ( IRExpr** );
847
+ extern IRExpr** deepCopyIRExprVec ( IRExpr *const * );
848
+ extern IRExpr* mkIRExpr_HWord ( HWord );
849
+ extern
850
+ IRExpr* mkIRExprCCall ( IRType retty,
851
+ Int regparms, const HChar* name, void* addr,
852
+ IRExpr** args );
853
+ extern Bool eqIRAtom ( const IRExpr*, const IRExpr* );
854
+ typedef
855
+ enum {
856
+ Ijk_INVALID=0x1A00,
857
+ Ijk_Boring,
858
+ Ijk_Call,
859
+ Ijk_Ret,
860
+ Ijk_ClientReq,
861
+ Ijk_Yield,
862
+ Ijk_EmWarn,
863
+ Ijk_EmFail,
864
+ Ijk_NoDecode,
865
+ Ijk_MapFail,
866
+ Ijk_InvalICache,
867
+ Ijk_FlushDCache,
868
+ Ijk_NoRedir,
869
+ Ijk_SigILL,
870
+ Ijk_SigTRAP,
871
+ Ijk_SigSEGV,
872
+ Ijk_SigBUS,
873
+ Ijk_SigFPE,
874
+ Ijk_SigFPE_IntDiv,
875
+ Ijk_SigFPE_IntOvf,
876
+ Ijk_Privileged,
877
+ Ijk_Sys_syscall,
878
+ Ijk_Sys_int,
879
+ Ijk_Sys_int32,
880
+ Ijk_Sys_int128,
881
+ Ijk_Sys_int129,
882
+ Ijk_Sys_int130,
883
+ Ijk_Sys_int145,
884
+ Ijk_Sys_int210,
885
+ Ijk_Sys_sysenter
886
+ }
887
+ IRJumpKind;
888
+ extern void ppIRJumpKind ( IRJumpKind );
889
+ typedef
890
+ enum {
891
+ Ifx_None=0x1B00,
892
+ Ifx_Read,
893
+ Ifx_Write,
894
+ Ifx_Modify,
895
+ }
896
+ IREffect;
897
+ extern void ppIREffect ( IREffect );
898
+ typedef
899
+ struct _IRDirty {
900
+ IRCallee* cee;
901
+ IRExpr* guard;
902
+ IRExpr** args;
903
+ IRTemp tmp;
904
+ IREffect mFx;
905
+ IRExpr* mAddr;
906
+ Int mSize;
907
+ Int nFxState;
908
+ struct {
909
+ IREffect fx:16;
910
+ UShort offset;
911
+ UShort size;
912
+ UChar nRepeats;
913
+ UChar repeatLen;
914
+ } fxState[7];
915
+ }
916
+ IRDirty;
917
+ extern void ppIRDirty ( const IRDirty* );
918
+ extern IRDirty* emptyIRDirty ( void );
919
+ extern IRDirty* deepCopyIRDirty ( const IRDirty* );
920
+ extern
921
+ IRDirty* unsafeIRDirty_0_N ( Int regparms, const HChar* name, void* addr,
922
+ IRExpr** args );
923
+ extern
924
+ IRDirty* unsafeIRDirty_1_N ( IRTemp dst,
925
+ Int regparms, const HChar* name, void* addr,
926
+ IRExpr** args );
927
+ typedef
928
+ enum {
929
+ Imbe_Fence=0x1C00,
930
+ Imbe_CancelReservation
931
+ }
932
+ IRMBusEvent;
933
+ extern void ppIRMBusEvent ( IRMBusEvent );
934
+ typedef
935
+ struct {
936
+ IRTemp oldHi;
937
+ IRTemp oldLo;
938
+ IREndness end;
939
+ IRExpr* addr;
940
+ IRExpr* expdHi;
941
+ IRExpr* expdLo;
942
+ IRExpr* dataHi;
943
+ IRExpr* dataLo;
944
+ }
945
+ IRCAS;
946
+ extern void ppIRCAS ( const IRCAS* cas );
947
+ extern IRCAS* mkIRCAS ( IRTemp oldHi, IRTemp oldLo,
948
+ IREndness end, IRExpr* addr,
949
+ IRExpr* expdHi, IRExpr* expdLo,
950
+ IRExpr* dataHi, IRExpr* dataLo );
951
+ extern IRCAS* deepCopyIRCAS ( const IRCAS* );
952
+ typedef
953
+ struct {
954
+ IRRegArray* descr;
955
+ IRExpr* ix;
956
+ Int bias;
957
+ IRExpr* data;
958
+ } IRPutI;
959
+ extern void ppIRPutI ( const IRPutI* puti );
960
+ extern IRPutI* mkIRPutI ( IRRegArray* descr, IRExpr* ix,
961
+ Int bias, IRExpr* data );
962
+ extern IRPutI* deepCopyIRPutI ( const IRPutI* );
963
+ typedef
964
+ struct {
965
+ IREndness end;
966
+ IRExpr* addr;
967
+ IRExpr* data;
968
+ IRExpr* guard;
969
+ }
970
+ IRStoreG;
971
+ typedef
972
+ enum {
973
+ ILGop_INVALID=0x1D00,
974
+ ILGop_IdentV128,
975
+ ILGop_Ident64,
976
+ ILGop_Ident32,
977
+ ILGop_16Uto32,
978
+ ILGop_16Sto32,
979
+ ILGop_8Uto32,
980
+ ILGop_8Sto32
981
+ }
982
+ IRLoadGOp;
983
+ typedef
984
+ struct {
985
+ IREndness end;
986
+ IRLoadGOp cvt;
987
+ IRTemp dst;
988
+ IRExpr* addr;
989
+ IRExpr* alt;
990
+ IRExpr* guard;
991
+ }
992
+ IRLoadG;
993
+ extern void ppIRStoreG ( const IRStoreG* sg );
994
+ extern void ppIRLoadGOp ( IRLoadGOp cvt );
995
+ extern void ppIRLoadG ( const IRLoadG* lg );
996
+ extern IRStoreG* mkIRStoreG ( IREndness end,
997
+ IRExpr* addr, IRExpr* data,
998
+ IRExpr* guard );
999
+ extern IRLoadG* mkIRLoadG ( IREndness end, IRLoadGOp cvt,
1000
+ IRTemp dst, IRExpr* addr, IRExpr* alt,
1001
+ IRExpr* guard );
1002
+ typedef
1003
+ enum {
1004
+ Ist_NoOp=0x1E00,
1005
+ Ist_IMark,
1006
+ Ist_AbiHint,
1007
+ Ist_Put,
1008
+ Ist_PutI,
1009
+ Ist_WrTmp,
1010
+ Ist_Store,
1011
+ Ist_LoadG,
1012
+ Ist_StoreG,
1013
+ Ist_CAS,
1014
+ Ist_LLSC,
1015
+ Ist_Dirty,
1016
+ Ist_MBE,
1017
+ Ist_Exit
1018
+ }
1019
+ IRStmtTag;
1020
+ typedef
1021
+ struct _IRStmt {
1022
+ IRStmtTag tag;
1023
+ union {
1024
+ struct {
1025
+ UInt dummy;
1026
+ } NoOp;
1027
+ struct {
1028
+ Addr addr;
1029
+ UInt len;
1030
+ UChar delta;
1031
+ } IMark;
1032
+ struct {
1033
+ IRExpr* base;
1034
+ Int len;
1035
+ IRExpr* nia;
1036
+ } AbiHint;
1037
+ struct {
1038
+ Int offset;
1039
+ IRExpr* data;
1040
+ } Put;
1041
+ struct {
1042
+ IRPutI* details;
1043
+ } PutI;
1044
+ struct {
1045
+ IRTemp tmp;
1046
+ IRExpr* data;
1047
+ } WrTmp;
1048
+ struct {
1049
+ IREndness end;
1050
+ IRExpr* addr;
1051
+ IRExpr* data;
1052
+ } Store;
1053
+ struct {
1054
+ IRStoreG* details;
1055
+ } StoreG;
1056
+ struct {
1057
+ IRLoadG* details;
1058
+ } LoadG;
1059
+ struct {
1060
+ IRCAS* details;
1061
+ } CAS;
1062
+ struct {
1063
+ IREndness end;
1064
+ IRTemp result;
1065
+ IRExpr* addr;
1066
+ IRExpr* storedata;
1067
+ } LLSC;
1068
+ struct {
1069
+ IRDirty* details;
1070
+ } Dirty;
1071
+ struct {
1072
+ IRMBusEvent event;
1073
+ } MBE;
1074
+ struct {
1075
+ IRExpr* guard;
1076
+ IRConst* dst;
1077
+ IRJumpKind jk;
1078
+ Int offsIP;
1079
+ } Exit;
1080
+ } Ist;
1081
+ }
1082
+ IRStmt;
1083
+ extern IRStmt* IRStmt_NoOp ( void );
1084
+ extern IRStmt* IRStmt_IMark ( Addr addr, UInt len, UChar delta );
1085
+ extern IRStmt* IRStmt_AbiHint ( IRExpr* base, Int len, IRExpr* nia );
1086
+ extern IRStmt* IRStmt_Put ( Int off, IRExpr* data );
1087
+ extern IRStmt* IRStmt_PutI ( IRPutI* details );
1088
+ extern IRStmt* IRStmt_WrTmp ( IRTemp tmp, IRExpr* data );
1089
+ extern IRStmt* IRStmt_Store ( IREndness end, IRExpr* addr, IRExpr* data );
1090
+ extern IRStmt* IRStmt_StoreG ( IREndness end, IRExpr* addr, IRExpr* data,
1091
+ IRExpr* guard );
1092
+ extern IRStmt* IRStmt_LoadG ( IREndness end, IRLoadGOp cvt, IRTemp dst,
1093
+ IRExpr* addr, IRExpr* alt, IRExpr* guard );
1094
+ extern IRStmt* IRStmt_CAS ( IRCAS* details );
1095
+ extern IRStmt* IRStmt_LLSC ( IREndness end, IRTemp result,
1096
+ IRExpr* addr, IRExpr* storedata );
1097
+ extern IRStmt* IRStmt_Dirty ( IRDirty* details );
1098
+ extern IRStmt* IRStmt_MBE ( IRMBusEvent event );
1099
+ extern IRStmt* IRStmt_Exit ( IRExpr* guard, IRJumpKind jk, IRConst* dst,
1100
+ Int offsIP );
1101
+ extern IRStmt* deepCopyIRStmt ( const IRStmt* );
1102
+ extern void ppIRStmt ( const IRStmt* );
1103
+ typedef
1104
+ struct {
1105
+ IRType* types;
1106
+ Int types_size;
1107
+ Int types_used;
1108
+ }
1109
+ IRTypeEnv;
1110
+ extern IRTemp newIRTemp ( IRTypeEnv*, IRType );
1111
+ extern IRTypeEnv* deepCopyIRTypeEnv ( const IRTypeEnv* );
1112
+ extern void ppIRTypeEnv ( const IRTypeEnv* );
1113
+ typedef
1114
+ struct {
1115
+ IRTypeEnv* tyenv;
1116
+ IRStmt** stmts;
1117
+ Int stmts_size;
1118
+ Int stmts_used;
1119
+ IRExpr* next;
1120
+ IRJumpKind jumpkind;
1121
+ Int offsIP;
1122
+ }
1123
+ IRSB;
1124
+ extern IRSB* emptyIRSB ( void );
1125
+ extern IRSB* deepCopyIRSB ( const IRSB* );
1126
+ extern IRSB* deepCopyIRSBExceptStmts ( const IRSB* );
1127
+ extern void ppIRSB ( const IRSB* );
1128
+ extern void addStmtToIRSB ( IRSB*, IRStmt* );
1129
+ extern IRTypeEnv* emptyIRTypeEnv ( void );
1130
+ extern IRType typeOfIRConst ( const IRConst* );
1131
+ extern IRType typeOfIRTemp ( const IRTypeEnv*, IRTemp );
1132
+ extern IRType typeOfIRExpr ( const IRTypeEnv*, const IRExpr* );
1133
+ extern void typeOfIRLoadGOp ( IRLoadGOp cvt,
1134
+ IRType* t_res,
1135
+ IRType* t_arg );
1136
+ extern void sanityCheckIRSB ( const IRSB* bb,
1137
+ const HChar* caller,
1138
+ Bool require_flatness,
1139
+ IRType guest_word_size );
1140
+ extern Bool isFlatIRStmt ( const IRStmt* );
1141
+ extern Bool isPlausibleIRType ( IRType ty );
1142
+ void vex_inject_ir(IRSB *, IREndness);
1143
+ typedef
1144
+ enum {
1145
+ VexArch_INVALID=0x400,
1146
+ VexArchX86,
1147
+ VexArchAMD64,
1148
+ VexArchARM,
1149
+ VexArchARM64,
1150
+ VexArchPPC32,
1151
+ VexArchPPC64,
1152
+ VexArchS390X,
1153
+ VexArchMIPS32,
1154
+ VexArchMIPS64,
1155
+ VexArchTILEGX,
1156
+ VexArchRISCV64
1157
+ }
1158
+ VexArch;
1159
+ typedef
1160
+ enum {
1161
+ VexEndness_INVALID=0x600,
1162
+ VexEndnessLE,
1163
+ VexEndnessBE
1164
+ }
1165
+ VexEndness;
1166
+ extern const HChar* LibVEX_ppVexArch ( VexArch );
1167
+ extern const HChar* LibVEX_ppVexEndness ( VexEndness endness );
1168
+ extern const HChar* LibVEX_ppVexHwCaps ( VexArch, UInt );
1169
+ typedef enum {
1170
+ DATA_CACHE=0x500,
1171
+ INSN_CACHE,
1172
+ UNIFIED_CACHE
1173
+ } VexCacheKind;
1174
+ typedef struct {
1175
+ VexCacheKind kind;
1176
+ UInt level;
1177
+ UInt sizeB;
1178
+ UInt line_sizeB;
1179
+ UInt assoc;
1180
+ Bool is_trace_cache;
1181
+ } VexCache;
1182
+ typedef struct {
1183
+ UInt num_levels;
1184
+ UInt num_caches;
1185
+ VexCache *caches;
1186
+ Bool icaches_maintain_coherence;
1187
+ } VexCacheInfo;
1188
+ typedef
1189
+ struct {
1190
+ UInt hwcaps;
1191
+ VexEndness endness;
1192
+ VexCacheInfo hwcache_info;
1193
+ Int ppc_icache_line_szB;
1194
+ UInt ppc_dcbz_szB;
1195
+ UInt ppc_dcbzl_szB;
1196
+ UInt arm64_dMinLine_lg2_szB;
1197
+ UInt arm64_iMinLine_lg2_szB;
1198
+ UInt x86_cr0;
1199
+ }
1200
+ VexArchInfo;
1201
+ extern
1202
+ void LibVEX_default_VexArchInfo ( VexArchInfo* vai );
1203
+ typedef
1204
+ struct {
1205
+ Int guest_stack_redzone_size;
1206
+ Bool guest_amd64_assume_fs_is_const;
1207
+ Bool guest_amd64_assume_gs_is_const;
1208
+ Bool guest_ppc_zap_RZ_at_blr;
1209
+ Bool (*guest_ppc_zap_RZ_at_bl)(Addr);
1210
+ Bool host_ppc_calls_use_fndescrs;
1211
+ Bool guest_mips_fp_mode64;
1212
+ Bool guest__use_fallback_LLSC;
1213
+ }
1214
+ VexAbiInfo;
1215
+ extern
1216
+ void LibVEX_default_VexAbiInfo ( VexAbiInfo* vbi );
1217
+ typedef
1218
+ enum {
1219
+ VexRegUpd_INVALID=0x700,
1220
+ VexRegUpdSpAtMemAccess,
1221
+ VexRegUpdUnwindregsAtMemAccess,
1222
+ VexRegUpdAllregsAtMemAccess,
1223
+ VexRegUpdAllregsAtEachInsn,
1224
+ VexRegUpdLdAllregsAtEachInsn
1225
+ }
1226
+ VexRegisterUpdates;
1227
+ typedef
1228
+ struct {
1229
+ Int iropt_verbosity;
1230
+ Int iropt_level;
1231
+ VexRegisterUpdates iropt_register_updates_default;
1232
+ Int iropt_unroll_thresh;
1233
+ Int guest_max_insns;
1234
+ Int guest_max_bytes;
1235
+ Int guest_chase_thresh;
1236
+ Bool guest_chase_cond;
1237
+ UInt regalloc_version;
1238
+ Bool arm_allow_optimizing_lookback;
1239
+ Bool strict_block_end;
1240
+ Bool arm64_allow_reordered_writeback;
1241
+ Bool x86_optimize_callpop_idiom;
1242
+ Bool special_instruction_support;
1243
+ UInt lookback_amount;
1244
+ }
1245
+ VexControl;
1246
+ extern
1247
+ void LibVEX_default_VexControl ( VexControl* vcon );
1248
+ extern void* LibVEX_Alloc ( SizeT nbytes );
1249
+ extern void LibVEX_ShowAllocStats ( void );
1250
+ typedef
1251
+ struct {
1252
+ Int total_sizeB;
1253
+ Int offset_SP;
1254
+ Int sizeof_SP;
1255
+ Int offset_FP;
1256
+ Int sizeof_FP;
1257
+ Int offset_IP;
1258
+ Int sizeof_IP;
1259
+ Int n_alwaysDefd;
1260
+ struct {
1261
+ Int offset;
1262
+ Int size;
1263
+ } alwaysDefd[24];
1264
+ }
1265
+ VexGuestLayout;
1266
+ extern void LibVEX_Init (
1267
+ void (*failure_exit) ( void ),
1268
+ void (*log_bytes) ( const HChar*, SizeT nbytes ),
1269
+ Int debuglevel,
1270
+ const VexControl* vcon
1271
+ );
1272
+ extern void LibVEX_Update_Control (const VexControl * );
1273
+ typedef
1274
+ struct {
1275
+ enum { VexTransOK=0x800,
1276
+ VexTransAccessFail, VexTransOutputFull } status;
1277
+ UInt n_sc_extents;
1278
+ Int offs_profInc;
1279
+ UInt n_guest_instrs;
1280
+ }
1281
+ VexTranslateResult;
1282
+ typedef
1283
+ struct {
1284
+ Addr base[3];
1285
+ UShort len[3];
1286
+ UShort n_used;
1287
+ }
1288
+ VexGuestExtents;
1289
+ typedef
1290
+ struct {
1291
+ VexArch arch_guest;
1292
+ VexArchInfo archinfo_guest;
1293
+ VexArch arch_host;
1294
+ VexArchInfo archinfo_host;
1295
+ VexAbiInfo abiinfo_both;
1296
+ void* callback_opaque;
1297
+ const UChar* guest_bytes;
1298
+ Addr guest_bytes_addr;
1299
+ Bool (*chase_into_ok) ( void*, Addr );
1300
+ VexGuestExtents* guest_extents;
1301
+ UChar* host_bytes;
1302
+ Int host_bytes_size;
1303
+ Int* host_bytes_used;
1304
+ IRSB* (*instrument1) ( void*,
1305
+ IRSB*,
1306
+ const VexGuestLayout*,
1307
+ const VexGuestExtents*,
1308
+ const VexArchInfo*,
1309
+ IRType gWordTy, IRType hWordTy );
1310
+ IRSB* (*instrument2) ( void*,
1311
+ IRSB*,
1312
+ const VexGuestLayout*,
1313
+ const VexGuestExtents*,
1314
+ const VexArchInfo*,
1315
+ IRType gWordTy, IRType hWordTy );
1316
+ IRSB* (*finaltidy) ( IRSB* );
1317
+ UInt (*needs_self_check)( void*,
1318
+ VexRegisterUpdates* pxControl,
1319
+ const VexGuestExtents* );
1320
+ Bool (*preamble_function)(void*, IRSB*);
1321
+ Int traceflags;
1322
+ Bool sigill_diag;
1323
+ Bool addProfInc;
1324
+ const void* disp_cp_chain_me_to_slowEP;
1325
+ const void* disp_cp_chain_me_to_fastEP;
1326
+ const void* disp_cp_xindir;
1327
+ const void* disp_cp_xassisted;
1328
+ }
1329
+ VexTranslateArgs;
1330
+ extern
1331
+ VexTranslateResult LibVEX_Translate ( VexTranslateArgs* );
1332
+ extern
1333
+ IRSB *LibVEX_Lift ( VexTranslateArgs*,
1334
+ VexTranslateResult*,
1335
+ VexRegisterUpdates* );
1336
+ extern
1337
+ void LibVEX_Codegen ( VexTranslateArgs*,
1338
+ VexTranslateResult*,
1339
+ IRSB*,
1340
+ VexRegisterUpdates );
1341
+ typedef
1342
+ struct {
1343
+ HWord start;
1344
+ HWord len;
1345
+ }
1346
+ VexInvalRange;
1347
+ extern
1348
+ VexInvalRange LibVEX_Chain ( VexArch arch_host,
1349
+ VexEndness endhess_host,
1350
+ void* place_to_chain,
1351
+ const void* disp_cp_chain_me_EXPECTED,
1352
+ const void* place_to_jump_to );
1353
+ extern
1354
+ VexInvalRange LibVEX_UnChain ( VexArch arch_host,
1355
+ VexEndness endness_host,
1356
+ void* place_to_unchain,
1357
+ const void* place_to_jump_to_EXPECTED,
1358
+ const void* disp_cp_chain_me );
1359
+ extern
1360
+ Int LibVEX_evCheckSzB ( VexArch arch_host );
1361
+ extern
1362
+ VexInvalRange LibVEX_PatchProfInc ( VexArch arch_host,
1363
+ VexEndness endness_host,
1364
+ void* place_to_patch,
1365
+ const ULong* location_of_counter );
1366
+ extern void LibVEX_ShowStats ( void );
1367
+ typedef
1368
+ struct {
1369
+ IROp op;
1370
+ HWord result;
1371
+ HWord opnd1;
1372
+ HWord opnd2;
1373
+ HWord opnd3;
1374
+ HWord opnd4;
1375
+ IRType t_result;
1376
+ IRType t_opnd1;
1377
+ IRType t_opnd2;
1378
+ IRType t_opnd3;
1379
+ IRType t_opnd4;
1380
+ UInt rounding_mode;
1381
+ UInt num_operands;
1382
+ UInt immediate_type;
1383
+ UInt immediate_index;
1384
+ }
1385
+ IRICB;
1386
+ extern void LibVEX_InitIRI ( const IRICB * );
1387
+ extern int log_level;
1388
+ extern VexTranslateArgs vta;
1389
+ extern char *msg_buffer;
1390
+ extern size_t msg_current_size;
1391
+ void clear_log(void);
1392
+ int vex_init(void);
1393
+ typedef struct _ExitInfo {
1394
+ Int stmt_idx;
1395
+ Addr ins_addr;
1396
+ IRStmt *stmt;
1397
+ } ExitInfo;
1398
+ typedef enum {
1399
+ Dt_Unknown = 0x9000,
1400
+ Dt_Integer,
1401
+ Dt_FP,
1402
+ Dt_StoreInteger
1403
+ } DataRefTypes;
1404
+ typedef struct _DataRef {
1405
+ Addr data_addr;
1406
+ Int size;
1407
+ DataRefTypes data_type;
1408
+ Int stmt_idx;
1409
+ Addr ins_addr;
1410
+ } DataRef;
1411
+ typedef struct _ConstVal {
1412
+ Int tmp;
1413
+ Int stmt_idx;
1414
+ ULong value;
1415
+ } ConstVal;
1416
+ typedef struct _VEXLiftResult {
1417
+ IRSB* irsb;
1418
+ Int size;
1419
+ Bool is_noop_block;
1420
+ Int exit_count;
1421
+ ExitInfo exits[400];
1422
+ Int is_default_exit_constant;
1423
+ Addr default_exit;
1424
+ Int insts;
1425
+ Addr inst_addrs[200];
1426
+ Int data_ref_count;
1427
+ DataRef data_refs[2000];
1428
+ Int const_val_count;
1429
+ ConstVal const_vals[1000];
1430
+ } VEXLiftResult;
1431
+ VEXLiftResult *vex_lift(
1432
+ VexArch guest,
1433
+ VexArchInfo archinfo,
1434
+ unsigned char *insn_start,
1435
+ unsigned long long insn_addr,
1436
+ unsigned int max_insns,
1437
+ unsigned int max_bytes,
1438
+ int opt_level,
1439
+ int traceflags,
1440
+ int allow_arch_optimizations,
1441
+ int strict_block_end,
1442
+ int collect_data_refs,
1443
+ int load_from_ro_regions,
1444
+ int const_prop,
1445
+ VexRegisterUpdates px_control,
1446
+ unsigned int lookback_amount);
1447
+ Bool register_readonly_region(ULong start, ULong size, unsigned char* content);
1448
+ void deregister_all_readonly_regions();
1449
+ Bool register_initial_register_value(UInt offset, UInt size, ULong value);
1450
+ Bool reset_initial_register_values();
1451
+ extern VexControl vex_control;"""
1452
+ guest_offsets = {('x86', 'eax'): 8, ('x86', 'ecx'): 12, ('x86', 'edx'): 16, ('x86', 'ebx'): 20, ('x86', 'esp'): 24, ('x86', 'ebp'): 28, ('x86', 'esi'): 32, ('x86', 'edi'): 36, ('x86', 'cc_op'): 40, ('x86', 'cc_dep1'): 44, ('x86', 'cc_dep2'): 48, ('x86', 'cc_ndep'): 52, ('x86', 'dflag'): 56, ('x86', 'idflag'): 60, ('x86', 'acflag'): 64, ('x86', 'eip'): 68, ('x86', 'fpreg'): 72, ('x86', 'fptag'): 136, ('x86', 'fpround'): 144, ('x86', 'fc3210'): 148, ('x86', 'ftop'): 152, ('x86', 'sseround'): 156, ('x86', 'xmm0'): 160, ('x86', 'xmm1'): 176, ('x86', 'xmm2'): 192, ('x86', 'xmm3'): 208, ('x86', 'xmm4'): 224, ('x86', 'xmm5'): 240, ('x86', 'xmm6'): 256, ('x86', 'xmm7'): 272, ('x86', 'cs'): 288, ('x86', 'ds'): 290, ('x86', 'es'): 292, ('x86', 'fs'): 294, ('x86', 'gs'): 296, ('x86', 'ss'): 298, ('x86', 'ldt'): 304, ('x86', 'gdt'): 312, ('x86', 'emnote'): 320, ('x86', 'cmstart'): 324, ('x86', 'cmlen'): 328, ('x86', 'nraddr'): 332, ('x86', 'sc_class'): 336, ('x86', 'ip_at_syscall'): 340, ('amd64', 'rax'): 16, ('amd64', 'rbx'): 40, ('amd64', 'rcx'): 24, ('amd64', 'rdx'): 32, ('amd64', 'rsi'): 64, ('amd64', 'rdi'): 72, ('amd64', 'rsp'): 48, ('amd64', 'rbp'): 56, ('amd64', 'r8'): 80, ('amd64', 'r9'): 88, ('amd64', 'r10'): 96, ('amd64', 'r11'): 104, ('amd64', 'r12'): 112, ('amd64', 'r13'): 120, ('amd64', 'r14'): 128, ('amd64', 'r15'): 136, ('amd64', 'rip'): 184, ('amd64', 'ip_at_syscall'): 1040, ('amd64', 'cc_op'): 144, ('amd64', 'cc_dep1'): 152, ('amd64', 'cc_dep2'): 160, ('amd64', 'cc_ndep'): 168, ('amd64', 'dflag'): 176, ('amd64', 'acflag'): 192, ('amd64', 'idflag'): 200, ('amd64', 'fs_const'): 208, ('amd64', 'sseround'): 216, ('amd64', 'ymm0'): 224, ('amd64', 'ymm1'): 256, ('amd64', 'ymm2'): 288, ('amd64', 'ymm3'): 320, ('amd64', 'ymm4'): 352, ('amd64', 'ymm5'): 384, ('amd64', 'ymm6'): 416, ('amd64', 'ymm7'): 448, ('amd64', 'ymm8'): 480, ('amd64', 'ymm9'): 512, ('amd64', 'ymm10'): 544, ('amd64', 'ymm11'): 576, ('amd64', 'ymm12'): 608, ('amd64', 'ymm13'): 640, ('amd64', 'ymm14'): 672, ('amd64', 'ymm15'): 704, ('amd64', 'ymm16'): 736, ('amd64', 'cr0'): 768, ('amd64', 'cr1'): 776, ('amd64', 'cr2'): 784, ('amd64', 'cr3'): 792, ('amd64', 'cr4'): 800, ('amd64', 'cr5'): 808, ('amd64', 'cr6'): 816, ('amd64', 'cr7'): 824, ('amd64', 'cr8'): 832, ('amd64', 'cr9'): 840, ('amd64', 'cr10'): 848, ('amd64', 'cr11'): 856, ('amd64', 'cr12'): 864, ('amd64', 'cr13'): 872, ('amd64', 'cr14'): 880, ('amd64', 'cr15'): 888, ('amd64', 'ftop'): 896, ('amd64', 'fpreg'): 904, ('amd64', 'fptag'): 968, ('amd64', 'fpround'): 976, ('amd64', 'fc3210'): 984, ('amd64', 'emnote'): 992, ('amd64', 'cmstart'): 1000, ('amd64', 'cmlen'): 1008, ('amd64', 'nraddr'): 1016, ('amd64', 'sc_class'): 1024, ('amd64', 'gs_const'): 1032, ('amd64', 'cs'): 1048, ('amd64', 'ds'): 1050, ('amd64', 'es'): 1052, ('amd64', 'fs'): 1054, ('amd64', 'gs'): 1056, ('amd64', 'ss'): 1058, ('ppc32', 'gpr0'): 16, ('ppc32', 'gpr1'): 20, ('ppc32', 'gpr2'): 24, ('ppc32', 'gpr3'): 28, ('ppc32', 'gpr4'): 32, ('ppc32', 'gpr5'): 36, ('ppc32', 'gpr6'): 40, ('ppc32', 'gpr7'): 44, ('ppc32', 'gpr8'): 48, ('ppc32', 'gpr9'): 52, ('ppc32', 'gpr10'): 56, ('ppc32', 'gpr11'): 60, ('ppc32', 'gpr12'): 64, ('ppc32', 'gpr13'): 68, ('ppc32', 'gpr14'): 72, ('ppc32', 'gpr15'): 76, ('ppc32', 'gpr16'): 80, ('ppc32', 'gpr17'): 84, ('ppc32', 'gpr18'): 88, ('ppc32', 'gpr19'): 92, ('ppc32', 'gpr20'): 96, ('ppc32', 'gpr21'): 100, ('ppc32', 'gpr22'): 104, ('ppc32', 'gpr23'): 108, ('ppc32', 'gpr24'): 112, ('ppc32', 'gpr25'): 116, ('ppc32', 'gpr26'): 120, ('ppc32', 'gpr27'): 124, ('ppc32', 'gpr28'): 128, ('ppc32', 'gpr29'): 132, ('ppc32', 'gpr30'): 136, ('ppc32', 'gpr31'): 140, ('ppc32', 'vsr0'): 144, ('ppc32', 'vsr1'): 160, ('ppc32', 'vsr2'): 176, ('ppc32', 'vsr3'): 192, ('ppc32', 'vsr4'): 208, ('ppc32', 'vsr5'): 224, ('ppc32', 'vsr6'): 240, ('ppc32', 'vsr7'): 256, ('ppc32', 'vsr8'): 272, ('ppc32', 'vsr9'): 288, ('ppc32', 'vsr10'): 304, ('ppc32', 'vsr11'): 320, ('ppc32', 'vsr12'): 336, ('ppc32', 'vsr13'): 352, ('ppc32', 'vsr14'): 368, ('ppc32', 'vsr15'): 384, ('ppc32', 'vsr16'): 400, ('ppc32', 'vsr17'): 416, ('ppc32', 'vsr18'): 432, ('ppc32', 'vsr19'): 448, ('ppc32', 'vsr20'): 464, ('ppc32', 'vsr21'): 480, ('ppc32', 'vsr22'): 496, ('ppc32', 'vsr23'): 512, ('ppc32', 'vsr24'): 528, ('ppc32', 'vsr25'): 544, ('ppc32', 'vsr26'): 560, ('ppc32', 'vsr27'): 576, ('ppc32', 'vsr28'): 592, ('ppc32', 'vsr29'): 608, ('ppc32', 'vsr30'): 624, ('ppc32', 'vsr31'): 640, ('ppc32', 'vsr32'): 656, ('ppc32', 'vsr33'): 672, ('ppc32', 'vsr34'): 688, ('ppc32', 'vsr35'): 704, ('ppc32', 'vsr36'): 720, ('ppc32', 'vsr37'): 736, ('ppc32', 'vsr38'): 752, ('ppc32', 'vsr39'): 768, ('ppc32', 'vsr40'): 784, ('ppc32', 'vsr41'): 800, ('ppc32', 'vsr42'): 816, ('ppc32', 'vsr43'): 832, ('ppc32', 'vsr44'): 848, ('ppc32', 'vsr45'): 864, ('ppc32', 'vsr46'): 880, ('ppc32', 'vsr47'): 896, ('ppc32', 'vsr48'): 912, ('ppc32', 'vsr49'): 928, ('ppc32', 'vsr50'): 944, ('ppc32', 'vsr51'): 960, ('ppc32', 'vsr52'): 976, ('ppc32', 'vsr53'): 992, ('ppc32', 'vsr54'): 1008, ('ppc32', 'vsr55'): 1024, ('ppc32', 'vsr56'): 1040, ('ppc32', 'vsr57'): 1056, ('ppc32', 'vsr58'): 1072, ('ppc32', 'vsr59'): 1088, ('ppc32', 'vsr60'): 1104, ('ppc32', 'vsr61'): 1120, ('ppc32', 'vsr62'): 1136, ('ppc32', 'vsr63'): 1152, ('ppc32', 'cia'): 1168, ('ppc32', 'lr'): 1172, ('ppc32', 'ctr'): 1176, ('ppc32', 'xer_so'): 1180, ('ppc32', 'xer_ov'): 1181, ('ppc32', 'xer_ca'): 1182, ('ppc32', 'xer_bc'): 1183, ('ppc32', 'cr0_321'): 1184, ('ppc32', 'cr0_0'): 1185, ('ppc32', 'cr1_321'): 1186, ('ppc32', 'cr1_0'): 1187, ('ppc32', 'cr2_321'): 1188, ('ppc32', 'cr2_0'): 1189, ('ppc32', 'cr3_321'): 1190, ('ppc32', 'cr3_0'): 1191, ('ppc32', 'cr4_321'): 1192, ('ppc32', 'cr4_0'): 1193, ('ppc32', 'cr5_321'): 1194, ('ppc32', 'cr5_0'): 1195, ('ppc32', 'cr6_321'): 1196, ('ppc32', 'cr6_0'): 1197, ('ppc32', 'cr7_321'): 1198, ('ppc32', 'cr7_0'): 1199, ('ppc32', 'fpround'): 1200, ('ppc32', 'dfpround'): 1201, ('ppc32', 'c_fpcc'): 1202, ('ppc32', 'vrsave'): 1204, ('ppc32', 'vscr'): 1208, ('ppc32', 'emnote'): 1212, ('ppc32', 'cmstart'): 1216, ('ppc32', 'cmlen'): 1220, ('ppc32', 'nraddr'): 1224, ('ppc32', 'nraddr_gpr2'): 1228, ('ppc32', 'redir_sp'): 1232, ('ppc32', 'redir_stack'): 1236, ('ppc32', 'ip_at_syscall'): 1364, ('ppc32', 'sprg3_ro'): 1368, ('ppc32', 'tfhar'): 1376, ('ppc32', 'texasr'): 1384, ('ppc32', 'tfiar'): 1392, ('ppc32', 'ppr'): 1400, ('ppc32', 'texasru'): 1408, ('ppc32', 'pspb'): 1412, ('ppc64', 'gpr0'): 16, ('ppc64', 'gpr1'): 24, ('ppc64', 'gpr2'): 32, ('ppc64', 'gpr3'): 40, ('ppc64', 'gpr4'): 48, ('ppc64', 'gpr5'): 56, ('ppc64', 'gpr6'): 64, ('ppc64', 'gpr7'): 72, ('ppc64', 'gpr8'): 80, ('ppc64', 'gpr9'): 88, ('ppc64', 'gpr10'): 96, ('ppc64', 'gpr11'): 104, ('ppc64', 'gpr12'): 112, ('ppc64', 'gpr13'): 120, ('ppc64', 'gpr14'): 128, ('ppc64', 'gpr15'): 136, ('ppc64', 'gpr16'): 144, ('ppc64', 'gpr17'): 152, ('ppc64', 'gpr18'): 160, ('ppc64', 'gpr19'): 168, ('ppc64', 'gpr20'): 176, ('ppc64', 'gpr21'): 184, ('ppc64', 'gpr22'): 192, ('ppc64', 'gpr23'): 200, ('ppc64', 'gpr24'): 208, ('ppc64', 'gpr25'): 216, ('ppc64', 'gpr26'): 224, ('ppc64', 'gpr27'): 232, ('ppc64', 'gpr28'): 240, ('ppc64', 'gpr29'): 248, ('ppc64', 'gpr30'): 256, ('ppc64', 'gpr31'): 264, ('ppc64', 'vsr0'): 272, ('ppc64', 'vsr1'): 288, ('ppc64', 'vsr2'): 304, ('ppc64', 'vsr3'): 320, ('ppc64', 'vsr4'): 336, ('ppc64', 'vsr5'): 352, ('ppc64', 'vsr6'): 368, ('ppc64', 'vsr7'): 384, ('ppc64', 'vsr8'): 400, ('ppc64', 'vsr9'): 416, ('ppc64', 'vsr10'): 432, ('ppc64', 'vsr11'): 448, ('ppc64', 'vsr12'): 464, ('ppc64', 'vsr13'): 480, ('ppc64', 'vsr14'): 496, ('ppc64', 'vsr15'): 512, ('ppc64', 'vsr16'): 528, ('ppc64', 'vsr17'): 544, ('ppc64', 'vsr18'): 560, ('ppc64', 'vsr19'): 576, ('ppc64', 'vsr20'): 592, ('ppc64', 'vsr21'): 608, ('ppc64', 'vsr22'): 624, ('ppc64', 'vsr23'): 640, ('ppc64', 'vsr24'): 656, ('ppc64', 'vsr25'): 672, ('ppc64', 'vsr26'): 688, ('ppc64', 'vsr27'): 704, ('ppc64', 'vsr28'): 720, ('ppc64', 'vsr29'): 736, ('ppc64', 'vsr30'): 752, ('ppc64', 'vsr31'): 768, ('ppc64', 'vsr32'): 784, ('ppc64', 'vsr33'): 800, ('ppc64', 'vsr34'): 816, ('ppc64', 'vsr35'): 832, ('ppc64', 'vsr36'): 848, ('ppc64', 'vsr37'): 864, ('ppc64', 'vsr38'): 880, ('ppc64', 'vsr39'): 896, ('ppc64', 'vsr40'): 912, ('ppc64', 'vsr41'): 928, ('ppc64', 'vsr42'): 944, ('ppc64', 'vsr43'): 960, ('ppc64', 'vsr44'): 976, ('ppc64', 'vsr45'): 992, ('ppc64', 'vsr46'): 1008, ('ppc64', 'vsr47'): 1024, ('ppc64', 'vsr48'): 1040, ('ppc64', 'vsr49'): 1056, ('ppc64', 'vsr50'): 1072, ('ppc64', 'vsr51'): 1088, ('ppc64', 'vsr52'): 1104, ('ppc64', 'vsr53'): 1120, ('ppc64', 'vsr54'): 1136, ('ppc64', 'vsr55'): 1152, ('ppc64', 'vsr56'): 1168, ('ppc64', 'vsr57'): 1184, ('ppc64', 'vsr58'): 1200, ('ppc64', 'vsr59'): 1216, ('ppc64', 'vsr60'): 1232, ('ppc64', 'vsr61'): 1248, ('ppc64', 'vsr62'): 1264, ('ppc64', 'vsr63'): 1280, ('ppc64', 'cia'): 1296, ('ppc64', 'lr'): 1304, ('ppc64', 'ctr'): 1312, ('ppc64', 'xer_so'): 1320, ('ppc64', 'xer_ov'): 1321, ('ppc64', 'xer_ca'): 1322, ('ppc64', 'xer_bc'): 1323, ('ppc64', 'cr0_321'): 1324, ('ppc64', 'cr0_0'): 1325, ('ppc64', 'cr1_321'): 1326, ('ppc64', 'cr1_0'): 1327, ('ppc64', 'cr2_321'): 1328, ('ppc64', 'cr2_0'): 1329, ('ppc64', 'cr3_321'): 1330, ('ppc64', 'cr3_0'): 1331, ('ppc64', 'cr4_321'): 1332, ('ppc64', 'cr4_0'): 1333, ('ppc64', 'cr5_321'): 1334, ('ppc64', 'cr5_0'): 1335, ('ppc64', 'cr6_321'): 1336, ('ppc64', 'cr6_0'): 1337, ('ppc64', 'cr7_321'): 1338, ('ppc64', 'cr7_0'): 1339, ('ppc64', 'fpround'): 1340, ('ppc64', 'dfpround'): 1341, ('ppc64', 'c_fpcc'): 1342, ('ppc64', 'vrsave'): 1344, ('ppc64', 'vscr'): 1348, ('ppc64', 'emnote'): 1352, ('ppc64', 'cmstart'): 1360, ('ppc64', 'cmlen'): 1368, ('ppc64', 'nraddr'): 1376, ('ppc64', 'nraddr_gpr2'): 1384, ('ppc64', 'redir_sp'): 1392, ('ppc64', 'redir_stack'): 1400, ('ppc64', 'ip_at_syscall'): 1656, ('ppc64', 'sprg3_ro'): 1664, ('ppc64', 'tfhar'): 1672, ('ppc64', 'texasr'): 1680, ('ppc64', 'tfiar'): 1688, ('ppc64', 'ppr'): 1696, ('ppc64', 'texasru'): 1704, ('ppc64', 'pspb'): 1708, ('arm', 'r0'): 8, ('arm', 'r1'): 12, ('arm', 'r2'): 16, ('arm', 'r3'): 20, ('arm', 'r4'): 24, ('arm', 'r5'): 28, ('arm', 'r6'): 32, ('arm', 'r7'): 36, ('arm', 'r8'): 40, ('arm', 'r9'): 44, ('arm', 'r10'): 48, ('arm', 'r11'): 52, ('arm', 'r12'): 56, ('arm', 'r13'): 60, ('arm', 'r14'): 64, ('arm', 'r15t'): 68, ('arm', 'cc_op'): 72, ('arm', 'cc_dep1'): 76, ('arm', 'cc_dep2'): 80, ('arm', 'cc_ndep'): 84, ('arm', 'qflag32'): 88, ('arm', 'geflag0'): 92, ('arm', 'geflag1'): 96, ('arm', 'geflag2'): 100, ('arm', 'geflag3'): 104, ('arm', 'emnote'): 108, ('arm', 'cmstart'): 112, ('arm', 'cmlen'): 116, ('arm', 'nraddr'): 120, ('arm', 'ip_at_syscall'): 124, ('arm', 'd0'): 128, ('arm', 'd1'): 136, ('arm', 'd2'): 144, ('arm', 'd3'): 152, ('arm', 'd4'): 160, ('arm', 'd5'): 168, ('arm', 'd6'): 176, ('arm', 'd7'): 184, ('arm', 'd8'): 192, ('arm', 'd9'): 200, ('arm', 'd10'): 208, ('arm', 'd11'): 216, ('arm', 'd12'): 224, ('arm', 'd13'): 232, ('arm', 'd14'): 240, ('arm', 'd15'): 248, ('arm', 'd16'): 256, ('arm', 'd17'): 264, ('arm', 'd18'): 272, ('arm', 'd19'): 280, ('arm', 'd20'): 288, ('arm', 'd21'): 296, ('arm', 'd22'): 304, ('arm', 'd23'): 312, ('arm', 'd24'): 320, ('arm', 'd25'): 328, ('arm', 'd26'): 336, ('arm', 'd27'): 344, ('arm', 'd28'): 352, ('arm', 'd29'): 360, ('arm', 'd30'): 368, ('arm', 'd31'): 376, ('arm', 'fpscr'): 384, ('arm', 'tpidruro'): 388, ('arm', 'itstate'): 392, ('arm64', 'x0'): 16, ('arm64', 'x1'): 24, ('arm64', 'x2'): 32, ('arm64', 'x3'): 40, ('arm64', 'x4'): 48, ('arm64', 'x5'): 56, ('arm64', 'x6'): 64, ('arm64', 'x7'): 72, ('arm64', 'x8'): 80, ('arm64', 'x9'): 88, ('arm64', 'x10'): 96, ('arm64', 'x11'): 104, ('arm64', 'x12'): 112, ('arm64', 'x13'): 120, ('arm64', 'x14'): 128, ('arm64', 'x15'): 136, ('arm64', 'x16'): 144, ('arm64', 'x17'): 152, ('arm64', 'x18'): 160, ('arm64', 'x19'): 168, ('arm64', 'x20'): 176, ('arm64', 'x21'): 184, ('arm64', 'x22'): 192, ('arm64', 'x23'): 200, ('arm64', 'x24'): 208, ('arm64', 'x25'): 216, ('arm64', 'x26'): 224, ('arm64', 'x27'): 232, ('arm64', 'x28'): 240, ('arm64', 'x29'): 248, ('arm64', 'x30'): 256, ('arm64', 'xsp'): 264, ('arm64', 'pc'): 272, ('arm64', 'cc_op'): 280, ('arm64', 'cc_dep1'): 288, ('arm64', 'cc_dep2'): 296, ('arm64', 'cc_ndep'): 304, ('arm64', 'tpidr_el0'): 312, ('arm64', 'q0'): 320, ('arm64', 'q1'): 336, ('arm64', 'q2'): 352, ('arm64', 'q3'): 368, ('arm64', 'q4'): 384, ('arm64', 'q5'): 400, ('arm64', 'q6'): 416, ('arm64', 'q7'): 432, ('arm64', 'q8'): 448, ('arm64', 'q9'): 464, ('arm64', 'q10'): 480, ('arm64', 'q11'): 496, ('arm64', 'q12'): 512, ('arm64', 'q13'): 528, ('arm64', 'q14'): 544, ('arm64', 'q15'): 560, ('arm64', 'q16'): 576, ('arm64', 'q17'): 592, ('arm64', 'q18'): 608, ('arm64', 'q19'): 624, ('arm64', 'q20'): 640, ('arm64', 'q21'): 656, ('arm64', 'q22'): 672, ('arm64', 'q23'): 688, ('arm64', 'q24'): 704, ('arm64', 'q25'): 720, ('arm64', 'q26'): 736, ('arm64', 'q27'): 752, ('arm64', 'q28'): 768, ('arm64', 'q29'): 784, ('arm64', 'q30'): 800, ('arm64', 'q31'): 816, ('arm64', 'qcflag'): 832, ('arm64', 'emnote'): 848, ('arm64', 'cmstart'): 856, ('arm64', 'cmlen'): 864, ('arm64', 'nraddr'): 872, ('arm64', 'ip_at_syscall'): 880, ('arm64', 'fpcr'): 888, ('s390x', 'a0'): 0, ('s390x', 'a1'): 4, ('s390x', 'a2'): 8, ('s390x', 'a3'): 12, ('s390x', 'a4'): 16, ('s390x', 'a5'): 20, ('s390x', 'a6'): 24, ('s390x', 'a7'): 28, ('s390x', 'a8'): 32, ('s390x', 'a9'): 36, ('s390x', 'a10'): 40, ('s390x', 'a11'): 44, ('s390x', 'a12'): 48, ('s390x', 'a13'): 52, ('s390x', 'a14'): 56, ('s390x', 'a15'): 60, ('s390x', 'v0'): 64, ('s390x', 'v1'): 80, ('s390x', 'v2'): 96, ('s390x', 'v3'): 112, ('s390x', 'v4'): 128, ('s390x', 'v5'): 144, ('s390x', 'v6'): 160, ('s390x', 'v7'): 176, ('s390x', 'v8'): 192, ('s390x', 'v9'): 208, ('s390x', 'v10'): 224, ('s390x', 'v11'): 240, ('s390x', 'v12'): 256, ('s390x', 'v13'): 272, ('s390x', 'v14'): 288, ('s390x', 'v15'): 304, ('s390x', 'v16'): 320, ('s390x', 'v17'): 336, ('s390x', 'v18'): 352, ('s390x', 'v19'): 368, ('s390x', 'v20'): 384, ('s390x', 'v21'): 400, ('s390x', 'v22'): 416, ('s390x', 'v23'): 432, ('s390x', 'v24'): 448, ('s390x', 'v25'): 464, ('s390x', 'v26'): 480, ('s390x', 'v27'): 496, ('s390x', 'v28'): 512, ('s390x', 'v29'): 528, ('s390x', 'v30'): 544, ('s390x', 'v31'): 560, ('s390x', 'r0'): 576, ('s390x', 'r1'): 584, ('s390x', 'r2'): 592, ('s390x', 'r3'): 600, ('s390x', 'r4'): 608, ('s390x', 'r5'): 616, ('s390x', 'r6'): 624, ('s390x', 'r7'): 632, ('s390x', 'r8'): 640, ('s390x', 'r9'): 648, ('s390x', 'r10'): 656, ('s390x', 'r11'): 664, ('s390x', 'r12'): 672, ('s390x', 'r13'): 680, ('s390x', 'r14'): 688, ('s390x', 'r15'): 696, ('s390x', 'counter'): 704, ('s390x', 'fpc'): 712, ('s390x', 'ia'): 720, ('s390x', 'sysno'): 728, ('s390x', 'cc_op'): 736, ('s390x', 'cc_dep1'): 744, ('s390x', 'cc_dep2'): 752, ('s390x', 'cc_ndep'): 760, ('s390x', 'nraddr'): 768, ('s390x', 'cmstart'): 776, ('s390x', 'cmlen'): 784, ('s390x', 'ip_at_syscall'): 792, ('s390x', 'emnote'): 800, ('mips32', 'r0'): 8, ('mips32', 'r1'): 12, ('mips32', 'r2'): 16, ('mips32', 'r3'): 20, ('mips32', 'r4'): 24, ('mips32', 'r5'): 28, ('mips32', 'r6'): 32, ('mips32', 'r7'): 36, ('mips32', 'r8'): 40, ('mips32', 'r9'): 44, ('mips32', 'r10'): 48, ('mips32', 'r11'): 52, ('mips32', 'r12'): 56, ('mips32', 'r13'): 60, ('mips32', 'r14'): 64, ('mips32', 'r15'): 68, ('mips32', 'r16'): 72, ('mips32', 'r17'): 76, ('mips32', 'r18'): 80, ('mips32', 'r19'): 84, ('mips32', 'r20'): 88, ('mips32', 'r21'): 92, ('mips32', 'r22'): 96, ('mips32', 'r23'): 100, ('mips32', 'r24'): 104, ('mips32', 'r25'): 108, ('mips32', 'r26'): 112, ('mips32', 'r27'): 116, ('mips32', 'r28'): 120, ('mips32', 'r29'): 124, ('mips32', 'r30'): 128, ('mips32', 'r31'): 132, ('mips32', 'pc'): 136, ('mips32', 'hi'): 140, ('mips32', 'lo'): 144, ('mips32', 'f0'): 152, ('mips32', 'f1'): 160, ('mips32', 'f2'): 168, ('mips32', 'f3'): 176, ('mips32', 'f4'): 184, ('mips32', 'f5'): 192, ('mips32', 'f6'): 200, ('mips32', 'f7'): 208, ('mips32', 'f8'): 216, ('mips32', 'f9'): 224, ('mips32', 'f10'): 232, ('mips32', 'f11'): 240, ('mips32', 'f12'): 248, ('mips32', 'f13'): 256, ('mips32', 'f14'): 264, ('mips32', 'f15'): 272, ('mips32', 'f16'): 280, ('mips32', 'f17'): 288, ('mips32', 'f18'): 296, ('mips32', 'f19'): 304, ('mips32', 'f20'): 312, ('mips32', 'f21'): 320, ('mips32', 'f22'): 328, ('mips32', 'f23'): 336, ('mips32', 'f24'): 344, ('mips32', 'f25'): 352, ('mips32', 'f26'): 360, ('mips32', 'f27'): 368, ('mips32', 'f28'): 376, ('mips32', 'f29'): 384, ('mips32', 'f30'): 392, ('mips32', 'f31'): 400, ('mips32', 'fir'): 408, ('mips32', 'fccr'): 412, ('mips32', 'fexr'): 416, ('mips32', 'fenr'): 420, ('mips32', 'fcsr'): 424, ('mips32', 'ulr'): 428, ('mips32', 'emnote'): 432, ('mips32', 'cmstart'): 436, ('mips32', 'cmlen'): 440, ('mips32', 'nraddr'): 444, ('mips32', 'cond'): 448, ('mips32', 'dspcontrol'): 452, ('mips32', 'ac0'): 456, ('mips32', 'ac1'): 464, ('mips32', 'ac2'): 472, ('mips32', 'ac3'): 480, ('mips32', 'cp0_status'): 488, ('mips32', 'ip_at_syscall'): 492, ('mips64', 'r0'): 16, ('mips64', 'r1'): 24, ('mips64', 'r2'): 32, ('mips64', 'r3'): 40, ('mips64', 'r4'): 48, ('mips64', 'r5'): 56, ('mips64', 'r6'): 64, ('mips64', 'r7'): 72, ('mips64', 'r8'): 80, ('mips64', 'r9'): 88, ('mips64', 'r10'): 96, ('mips64', 'r11'): 104, ('mips64', 'r12'): 112, ('mips64', 'r13'): 120, ('mips64', 'r14'): 128, ('mips64', 'r15'): 136, ('mips64', 'r16'): 144, ('mips64', 'r17'): 152, ('mips64', 'r18'): 160, ('mips64', 'r19'): 168, ('mips64', 'r20'): 176, ('mips64', 'r21'): 184, ('mips64', 'r22'): 192, ('mips64', 'r23'): 200, ('mips64', 'r24'): 208, ('mips64', 'r25'): 216, ('mips64', 'r26'): 224, ('mips64', 'r27'): 232, ('mips64', 'r28'): 240, ('mips64', 'r29'): 248, ('mips64', 'r30'): 256, ('mips64', 'r31'): 264, ('mips64', 'pc'): 272, ('mips64', 'hi'): 280, ('mips64', 'lo'): 288, ('mips64', 'f0'): 296, ('mips64', 'f1'): 304, ('mips64', 'f2'): 312, ('mips64', 'f3'): 320, ('mips64', 'f4'): 328, ('mips64', 'f5'): 336, ('mips64', 'f6'): 344, ('mips64', 'f7'): 352, ('mips64', 'f8'): 360, ('mips64', 'f9'): 368, ('mips64', 'f10'): 376, ('mips64', 'f11'): 384, ('mips64', 'f12'): 392, ('mips64', 'f13'): 400, ('mips64', 'f14'): 408, ('mips64', 'f15'): 416, ('mips64', 'f16'): 424, ('mips64', 'f17'): 432, ('mips64', 'f18'): 440, ('mips64', 'f19'): 448, ('mips64', 'f20'): 456, ('mips64', 'f21'): 464, ('mips64', 'f22'): 472, ('mips64', 'f23'): 480, ('mips64', 'f24'): 488, ('mips64', 'f25'): 496, ('mips64', 'f26'): 504, ('mips64', 'f27'): 512, ('mips64', 'f28'): 520, ('mips64', 'f29'): 528, ('mips64', 'f30'): 536, ('mips64', 'f31'): 544, ('mips64', 'fir'): 552, ('mips64', 'fccr'): 556, ('mips64', 'fexr'): 560, ('mips64', 'fenr'): 564, ('mips64', 'fcsr'): 568, ('mips64', 'cp0_status'): 572, ('mips64', 'ulr'): 576, ('mips64', 'emnote'): 584, ('mips64', 'cond'): 588, ('mips64', 'cmstart'): 592, ('mips64', 'cmlen'): 600, ('mips64', 'nraddr'): 608, ('mips64', 'ip_at_syscall'): 616, ('tilegx', 'r0'): 0, ('tilegx', 'r1'): 8, ('tilegx', 'r2'): 16, ('tilegx', 'r3'): 24, ('tilegx', 'r4'): 32, ('tilegx', 'r5'): 40, ('tilegx', 'r6'): 48, ('tilegx', 'r7'): 56, ('tilegx', 'r8'): 64, ('tilegx', 'r9'): 72, ('tilegx', 'r10'): 80, ('tilegx', 'r11'): 88, ('tilegx', 'r12'): 96, ('tilegx', 'r13'): 104, ('tilegx', 'r14'): 112, ('tilegx', 'r15'): 120, ('tilegx', 'r16'): 128, ('tilegx', 'r17'): 136, ('tilegx', 'r18'): 144, ('tilegx', 'r19'): 152, ('tilegx', 'r20'): 160, ('tilegx', 'r21'): 168, ('tilegx', 'r22'): 176, ('tilegx', 'r23'): 184, ('tilegx', 'r24'): 192, ('tilegx', 'r25'): 200, ('tilegx', 'r26'): 208, ('tilegx', 'r27'): 216, ('tilegx', 'r28'): 224, ('tilegx', 'r29'): 232, ('tilegx', 'r30'): 240, ('tilegx', 'r31'): 248, ('tilegx', 'r32'): 256, ('tilegx', 'r33'): 264, ('tilegx', 'r34'): 272, ('tilegx', 'r35'): 280, ('tilegx', 'r36'): 288, ('tilegx', 'r37'): 296, ('tilegx', 'r38'): 304, ('tilegx', 'r39'): 312, ('tilegx', 'r40'): 320, ('tilegx', 'r41'): 328, ('tilegx', 'r42'): 336, ('tilegx', 'r43'): 344, ('tilegx', 'r44'): 352, ('tilegx', 'r45'): 360, ('tilegx', 'r46'): 368, ('tilegx', 'r47'): 376, ('tilegx', 'r48'): 384, ('tilegx', 'r49'): 392, ('tilegx', 'r50'): 400, ('tilegx', 'r51'): 408, ('tilegx', 'r52'): 416, ('tilegx', 'r53'): 424, ('tilegx', 'r54'): 432, ('tilegx', 'r55'): 440, ('tilegx', 'r56'): 448, ('tilegx', 'r57'): 456, ('tilegx', 'r58'): 464, ('tilegx', 'r59'): 472, ('tilegx', 'r60'): 480, ('tilegx', 'r61'): 488, ('tilegx', 'r62'): 496, ('tilegx', 'r63'): 504, ('tilegx', 'pc'): 512, ('tilegx', 'spare'): 520, ('tilegx', 'emnote'): 528, ('tilegx', 'cmstart'): 536, ('tilegx', 'cmlen'): 544, ('tilegx', 'nraddr'): 552, ('tilegx', 'cmpexch'): 560, ('tilegx', 'zero'): 568, ('tilegx', 'ex_context_0'): 576, ('tilegx', 'ex_context_1'): 584, ('tilegx', 'cond'): 608, ('riscv64', 'x0'): 16, ('riscv64', 'x1'): 24, ('riscv64', 'x2'): 32, ('riscv64', 'x3'): 40, ('riscv64', 'x4'): 48, ('riscv64', 'x5'): 56, ('riscv64', 'x6'): 64, ('riscv64', 'x7'): 72, ('riscv64', 'x9'): 88, ('riscv64', 'x10'): 96, ('riscv64', 'x11'): 104, ('riscv64', 'x12'): 112, ('riscv64', 'x13'): 120, ('riscv64', 'x14'): 128, ('riscv64', 'x15'): 136, ('riscv64', 'x16'): 144, ('riscv64', 'x17'): 152, ('riscv64', 'x18'): 160, ('riscv64', 'x19'): 168, ('riscv64', 'x20'): 176, ('riscv64', 'x21'): 184, ('riscv64', 'x22'): 192, ('riscv64', 'x23'): 200, ('riscv64', 'x24'): 208, ('riscv64', 'x25'): 216, ('riscv64', 'x26'): 224, ('riscv64', 'x27'): 232, ('riscv64', 'x28'): 240, ('riscv64', 'x29'): 248, ('riscv64', 'x30'): 256, ('riscv64', 'x31'): 264, ('riscv64', 'pc'): 272, ('riscv64', 'f0'): 280, ('riscv64', 'f1'): 288, ('riscv64', 'f2'): 296, ('riscv64', 'f3'): 304, ('riscv64', 'f4'): 312, ('riscv64', 'f5'): 320, ('riscv64', 'f6'): 328, ('riscv64', 'f7'): 336, ('riscv64', 'f9'): 352, ('riscv64', 'f10'): 360, ('riscv64', 'f11'): 368, ('riscv64', 'f12'): 376, ('riscv64', 'f13'): 384, ('riscv64', 'f14'): 392, ('riscv64', 'f15'): 400, ('riscv64', 'f16'): 408, ('riscv64', 'f17'): 416, ('riscv64', 'f18'): 424, ('riscv64', 'f19'): 432, ('riscv64', 'f20'): 440, ('riscv64', 'f21'): 448, ('riscv64', 'f22'): 456, ('riscv64', 'f23'): 464, ('riscv64', 'f24'): 472, ('riscv64', 'f25'): 480, ('riscv64', 'f26'): 488, ('riscv64', 'f27'): 496, ('riscv64', 'f28'): 504, ('riscv64', 'f29'): 512, ('riscv64', 'f30'): 520, ('riscv64', 'f31'): 528}