v86 0.3.7 → 0.5.10

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (386) hide show
  1. package/Readme.md +64 -108
  2. package/build/libv86-debug.js +12677 -0
  3. package/build/libv86-debug.mjs +732 -0
  4. package/build/libv86.js +710 -0
  5. package/build/libv86.mjs +636 -0
  6. package/build/v86-debug.wasm +0 -0
  7. package/build/v86-fallback.wasm +0 -0
  8. package/build/v86.wasm +0 -0
  9. package/package.json +12 -35
  10. package/bios/.gitignore +0 -1
  11. package/bios/COPYING.LESSER +0 -165
  12. package/bios/bochs-bios.bin +0 -0
  13. package/bios/bochs-vgabios.bin +0 -0
  14. package/bios/fetch-and-build-seabios.sh +0 -13
  15. package/bios/seabios/.config +0 -113
  16. package/bios/seabios/.config.old +0 -114
  17. package/bios/seabios/.gitignore +0 -4
  18. package/bios/seabios/COPYING +0 -674
  19. package/bios/seabios/COPYING.LESSER +0 -165
  20. package/bios/seabios/Makefile +0 -286
  21. package/bios/seabios/README +0 -17
  22. package/bios/seabios/docs/Build_overview.md +0 -104
  23. package/bios/seabios/docs/Contributing.md +0 -20
  24. package/bios/seabios/docs/Debugging.md +0 -111
  25. package/bios/seabios/docs/Developer_Documentation.md +0 -25
  26. package/bios/seabios/docs/Developer_links.md +0 -86
  27. package/bios/seabios/docs/Download.md +0 -27
  28. package/bios/seabios/docs/Execution_and_code_flow.md +0 -178
  29. package/bios/seabios/docs/Linking_overview.md +0 -160
  30. package/bios/seabios/docs/Mailinglist.md +0 -8
  31. package/bios/seabios/docs/Memory_Model.md +0 -253
  32. package/bios/seabios/docs/README +0 -5
  33. package/bios/seabios/docs/Releases.md +0 -482
  34. package/bios/seabios/docs/Runtime_config.md +0 -193
  35. package/bios/seabios/docs/SeaBIOS.md +0 -17
  36. package/bios/seabios/docs/SeaVGABIOS.md +0 -39
  37. package/bios/seabios/out/autoconf.h +0 -117
  38. package/bios/seabios/out/include/config/acpi/dsdt.h +0 -0
  39. package/bios/seabios/out/include/config/acpi.h +0 -0
  40. package/bios/seabios/out/include/config/ahci.h +0 -0
  41. package/bios/seabios/out/include/config/apmbios.h +0 -0
  42. package/bios/seabios/out/include/config/ata/dma.h +0 -0
  43. package/bios/seabios/out/include/config/ata/pio32.h +0 -0
  44. package/bios/seabios/out/include/config/ata.h +0 -0
  45. package/bios/seabios/out/include/config/auto.conf +0 -69
  46. package/bios/seabios/out/include/config/auto.conf.cmd +0 -9
  47. package/bios/seabios/out/include/config/boot.h +0 -0
  48. package/bios/seabios/out/include/config/bootorder.h +0 -0
  49. package/bios/seabios/out/include/config/build/vgabios.h +0 -0
  50. package/bios/seabios/out/include/config/call32/smm.h +0 -0
  51. package/bios/seabios/out/include/config/cdrom/boot.h +0 -0
  52. package/bios/seabios/out/include/config/cdrom/emu.h +0 -0
  53. package/bios/seabios/out/include/config/debug/level.h +0 -0
  54. package/bios/seabios/out/include/config/drives.h +0 -0
  55. package/bios/seabios/out/include/config/entry/extrastack.h +0 -0
  56. package/bios/seabios/out/include/config/esp/scsi.h +0 -0
  57. package/bios/seabios/out/include/config/flash/floppy.h +0 -0
  58. package/bios/seabios/out/include/config/floppy.h +0 -0
  59. package/bios/seabios/out/include/config/fw/romfile/load.h +0 -0
  60. package/bios/seabios/out/include/config/hardware/irq.h +0 -0
  61. package/bios/seabios/out/include/config/kbd/call/int15/4f.h +0 -0
  62. package/bios/seabios/out/include/config/keyboard.h +0 -0
  63. package/bios/seabios/out/include/config/lpt.h +0 -0
  64. package/bios/seabios/out/include/config/lsi/scsi.h +0 -0
  65. package/bios/seabios/out/include/config/malloc/uppermemory.h +0 -0
  66. package/bios/seabios/out/include/config/megasas.h +0 -0
  67. package/bios/seabios/out/include/config/mouse.h +0 -0
  68. package/bios/seabios/out/include/config/mpt/scsi.h +0 -0
  69. package/bios/seabios/out/include/config/mptable.h +0 -0
  70. package/bios/seabios/out/include/config/mtrr/init.h +0 -0
  71. package/bios/seabios/out/include/config/optionroms.h +0 -0
  72. package/bios/seabios/out/include/config/override/pci/id.h +0 -0
  73. package/bios/seabios/out/include/config/pcibios.h +0 -0
  74. package/bios/seabios/out/include/config/pirtable.h +0 -0
  75. package/bios/seabios/out/include/config/pmm.h +0 -0
  76. package/bios/seabios/out/include/config/pmtimer.h +0 -0
  77. package/bios/seabios/out/include/config/pnpbios.h +0 -0
  78. package/bios/seabios/out/include/config/ps2port.h +0 -0
  79. package/bios/seabios/out/include/config/pvscsi.h +0 -0
  80. package/bios/seabios/out/include/config/qemu/hardware.h +0 -0
  81. package/bios/seabios/out/include/config/qemu.h +0 -0
  82. package/bios/seabios/out/include/config/rom/size.h +0 -0
  83. package/bios/seabios/out/include/config/rtc/timer.h +0 -0
  84. package/bios/seabios/out/include/config/s3/resume.h +0 -0
  85. package/bios/seabios/out/include/config/sdcard.h +0 -0
  86. package/bios/seabios/out/include/config/serial.h +0 -0
  87. package/bios/seabios/out/include/config/tcgbios.h +0 -0
  88. package/bios/seabios/out/include/config/threads.h +0 -0
  89. package/bios/seabios/out/include/config/tristate.conf +0 -4
  90. package/bios/seabios/out/include/config/tsc/timer.h +0 -0
  91. package/bios/seabios/out/include/config/use/smm.h +0 -0
  92. package/bios/seabios/out/include/config/vga/allocate/extra/stack.h +0 -0
  93. package/bios/seabios/out/include/config/vga/bochs/stdvga.h +0 -0
  94. package/bios/seabios/out/include/config/vga/bochs.h +0 -0
  95. package/bios/seabios/out/include/config/vga/did.h +0 -0
  96. package/bios/seabios/out/include/config/vga/extra/stack/size.h +0 -0
  97. package/bios/seabios/out/include/config/vga/fixup/asm.h +0 -0
  98. package/bios/seabios/out/include/config/vga/pci.h +0 -0
  99. package/bios/seabios/out/include/config/vga/stdvga/ports.h +0 -0
  100. package/bios/seabios/out/include/config/vga/vbe.h +0 -0
  101. package/bios/seabios/out/include/config/vga/vid.h +0 -0
  102. package/bios/seabios/out/include/config/vgahooks.h +0 -0
  103. package/bios/seabios/out/include/config/virtio/blk.h +0 -0
  104. package/bios/seabios/out/include/config/virtio/scsi.h +0 -0
  105. package/bios/seabios/out/include/config/xen.h +0 -0
  106. package/bios/seabios/out/scripts/kconfig/conf +0 -0
  107. package/bios/seabios/out/scripts/kconfig/conf.o +0 -0
  108. package/bios/seabios/out/scripts/kconfig/zconf.hash.c +0 -289
  109. package/bios/seabios/out/scripts/kconfig/zconf.lex.c +0 -2420
  110. package/bios/seabios/out/scripts/kconfig/zconf.tab.c +0 -2538
  111. package/bios/seabios/out/scripts/kconfig/zconf.tab.o +0 -0
  112. package/bios/seabios/scripts/acpi_extract.py +0 -366
  113. package/bios/seabios/scripts/acpi_extract_preprocess.py +0 -41
  114. package/bios/seabios/scripts/buildrom.py +0 -56
  115. package/bios/seabios/scripts/buildversion.py +0 -134
  116. package/bios/seabios/scripts/checkrom.py +0 -95
  117. package/bios/seabios/scripts/checkstack.py +0 -226
  118. package/bios/seabios/scripts/checksum.py +0 -16
  119. package/bios/seabios/scripts/encodeint.py +0 -21
  120. package/bios/seabios/scripts/gen-offsets.sh +0 -17
  121. package/bios/seabios/scripts/kconfig/.gitignore +0 -22
  122. package/bios/seabios/scripts/kconfig/Makefile +0 -331
  123. package/bios/seabios/scripts/kconfig/POTFILES.in +0 -12
  124. package/bios/seabios/scripts/kconfig/check.sh +0 -13
  125. package/bios/seabios/scripts/kconfig/conf.c +0 -718
  126. package/bios/seabios/scripts/kconfig/confdata.c +0 -1250
  127. package/bios/seabios/scripts/kconfig/expr.c +0 -1168
  128. package/bios/seabios/scripts/kconfig/expr.h +0 -241
  129. package/bios/seabios/scripts/kconfig/gconf.c +0 -1542
  130. package/bios/seabios/scripts/kconfig/gconf.glade +0 -661
  131. package/bios/seabios/scripts/kconfig/images.c +0 -326
  132. package/bios/seabios/scripts/kconfig/kxgettext.c +0 -235
  133. package/bios/seabios/scripts/kconfig/lex.zconf.c +0 -2430
  134. package/bios/seabios/scripts/kconfig/list.h +0 -131
  135. package/bios/seabios/scripts/kconfig/lkc.h +0 -200
  136. package/bios/seabios/scripts/kconfig/lkc_proto.h +0 -57
  137. package/bios/seabios/scripts/kconfig/lxdialog/.gitignore +0 -4
  138. package/bios/seabios/scripts/kconfig/lxdialog/BIG.FAT.WARNING +0 -4
  139. package/bios/seabios/scripts/kconfig/lxdialog/check-lxdialog.sh +0 -87
  140. package/bios/seabios/scripts/kconfig/lxdialog/checklist.c +0 -332
  141. package/bios/seabios/scripts/kconfig/lxdialog/dialog.h +0 -257
  142. package/bios/seabios/scripts/kconfig/lxdialog/inputbox.c +0 -301
  143. package/bios/seabios/scripts/kconfig/lxdialog/menubox.c +0 -437
  144. package/bios/seabios/scripts/kconfig/lxdialog/textbox.c +0 -408
  145. package/bios/seabios/scripts/kconfig/lxdialog/util.c +0 -713
  146. package/bios/seabios/scripts/kconfig/lxdialog/yesno.c +0 -114
  147. package/bios/seabios/scripts/kconfig/mconf.c +0 -1036
  148. package/bios/seabios/scripts/kconfig/menu.c +0 -697
  149. package/bios/seabios/scripts/kconfig/merge_config.sh +0 -150
  150. package/bios/seabios/scripts/kconfig/nconf.c +0 -1556
  151. package/bios/seabios/scripts/kconfig/nconf.gui.c +0 -656
  152. package/bios/seabios/scripts/kconfig/nconf.h +0 -96
  153. package/bios/seabios/scripts/kconfig/qconf.cc +0 -1795
  154. package/bios/seabios/scripts/kconfig/qconf.h +0 -338
  155. package/bios/seabios/scripts/kconfig/streamline_config.pl +0 -647
  156. package/bios/seabios/scripts/kconfig/symbol.c +0 -1373
  157. package/bios/seabios/scripts/kconfig/util.c +0 -157
  158. package/bios/seabios/scripts/kconfig/zconf.gperf +0 -48
  159. package/bios/seabios/scripts/kconfig/zconf.hash.c_shipped +0 -289
  160. package/bios/seabios/scripts/kconfig/zconf.l +0 -363
  161. package/bios/seabios/scripts/kconfig/zconf.lex.c_shipped +0 -2420
  162. package/bios/seabios/scripts/kconfig/zconf.tab.c_shipped +0 -2538
  163. package/bios/seabios/scripts/kconfig/zconf.y +0 -733
  164. package/bios/seabios/scripts/layoutrom.py +0 -705
  165. package/bios/seabios/scripts/python23compat.py +0 -14
  166. package/bios/seabios/scripts/readserial.py +0 -190
  167. package/bios/seabios/scripts/tarball.sh +0 -36
  168. package/bios/seabios/scripts/test-build.sh +0 -90
  169. package/bios/seabios/scripts/transdump.py +0 -53
  170. package/bios/seabios/scripts/vgafixup.py +0 -96
  171. package/bios/seabios/src/Kconfig +0 -579
  172. package/bios/seabios/src/apm.c +0 -215
  173. package/bios/seabios/src/asm-offsets.c +0 -23
  174. package/bios/seabios/src/biosvar.h +0 -130
  175. package/bios/seabios/src/block.c +0 -623
  176. package/bios/seabios/src/block.h +0 -121
  177. package/bios/seabios/src/bmp.c +0 -117
  178. package/bios/seabios/src/boot.c +0 -793
  179. package/bios/seabios/src/bootsplash.c +0 -255
  180. package/bios/seabios/src/bregs.h +0 -80
  181. package/bios/seabios/src/byteorder.h +0 -71
  182. package/bios/seabios/src/cdrom.c +0 -322
  183. package/bios/seabios/src/clock.c +0 -506
  184. package/bios/seabios/src/code16gcc.s +0 -1
  185. package/bios/seabios/src/config.h +0 -108
  186. package/bios/seabios/src/cp437.c +0 -275
  187. package/bios/seabios/src/cp437.h +0 -1
  188. package/bios/seabios/src/disk.c +0 -779
  189. package/bios/seabios/src/e820map.c +0 -152
  190. package/bios/seabios/src/e820map.h +0 -26
  191. package/bios/seabios/src/entryfuncs.S +0 -165
  192. package/bios/seabios/src/farptr.h +0 -208
  193. package/bios/seabios/src/font.c +0 -139
  194. package/bios/seabios/src/fw/acpi-dsdt-cpu-hotplug.dsl +0 -78
  195. package/bios/seabios/src/fw/acpi-dsdt-dbug.dsl +0 -26
  196. package/bios/seabios/src/fw/acpi-dsdt-hpet.dsl +0 -36
  197. package/bios/seabios/src/fw/acpi-dsdt-isa.dsl +0 -102
  198. package/bios/seabios/src/fw/acpi-dsdt-pci-crs.dsl +0 -90
  199. package/bios/seabios/src/fw/acpi-dsdt.dsl +0 -342
  200. package/bios/seabios/src/fw/acpi-dsdt.hex +0 -554
  201. package/bios/seabios/src/fw/acpi.c +0 -685
  202. package/bios/seabios/src/fw/biostables.c +0 -491
  203. package/bios/seabios/src/fw/coreboot.c +0 -569
  204. package/bios/seabios/src/fw/csm.c +0 -347
  205. package/bios/seabios/src/fw/dev-pci.h +0 -52
  206. package/bios/seabios/src/fw/dev-piix.h +0 -29
  207. package/bios/seabios/src/fw/dev-q35.h +0 -52
  208. package/bios/seabios/src/fw/lzmadecode.c +0 -398
  209. package/bios/seabios/src/fw/lzmadecode.h +0 -67
  210. package/bios/seabios/src/fw/mptable.c +0 -197
  211. package/bios/seabios/src/fw/mtrr.c +0 -105
  212. package/bios/seabios/src/fw/multiboot.c +0 -111
  213. package/bios/seabios/src/fw/paravirt.c +0 -624
  214. package/bios/seabios/src/fw/paravirt.h +0 -63
  215. package/bios/seabios/src/fw/pciinit.c +0 -1187
  216. package/bios/seabios/src/fw/pirtable.c +0 -103
  217. package/bios/seabios/src/fw/q35-acpi-dsdt.dsl +0 -450
  218. package/bios/seabios/src/fw/romfile_loader.c +0 -259
  219. package/bios/seabios/src/fw/romfile_loader.h +0 -91
  220. package/bios/seabios/src/fw/shadow.c +0 -208
  221. package/bios/seabios/src/fw/smbios.c +0 -585
  222. package/bios/seabios/src/fw/smm.c +0 -269
  223. package/bios/seabios/src/fw/smp.c +0 -194
  224. package/bios/seabios/src/fw/ssdt-misc.dsl +0 -104
  225. package/bios/seabios/src/fw/ssdt-misc.hex +0 -88
  226. package/bios/seabios/src/fw/ssdt-pcihp.dsl +0 -36
  227. package/bios/seabios/src/fw/ssdt-pcihp.hex +0 -38
  228. package/bios/seabios/src/fw/ssdt-proc.dsl +0 -48
  229. package/bios/seabios/src/fw/ssdt-proc.hex +0 -35
  230. package/bios/seabios/src/fw/xen.c +0 -149
  231. package/bios/seabios/src/fw/xen.h +0 -125
  232. package/bios/seabios/src/gen-defs.h +0 -19
  233. package/bios/seabios/src/hw/ahci.c +0 -697
  234. package/bios/seabios/src/hw/ahci.h +0 -201
  235. package/bios/seabios/src/hw/ata.c +0 -1046
  236. package/bios/seabios/src/hw/ata.h +0 -163
  237. package/bios/seabios/src/hw/blockcmd.c +0 -372
  238. package/bios/seabios/src/hw/blockcmd.h +0 -114
  239. package/bios/seabios/src/hw/dma.c +0 -67
  240. package/bios/seabios/src/hw/esp-scsi.c +0 -241
  241. package/bios/seabios/src/hw/esp-scsi.h +0 -8
  242. package/bios/seabios/src/hw/floppy.c +0 -741
  243. package/bios/seabios/src/hw/lsi-scsi.c +0 -221
  244. package/bios/seabios/src/hw/lsi-scsi.h +0 -8
  245. package/bios/seabios/src/hw/megasas.c +0 -405
  246. package/bios/seabios/src/hw/megasas.h +0 -8
  247. package/bios/seabios/src/hw/mpt-scsi.c +0 -319
  248. package/bios/seabios/src/hw/mpt-scsi.h +0 -8
  249. package/bios/seabios/src/hw/nvme-int.h +0 -199
  250. package/bios/seabios/src/hw/nvme.c +0 -708
  251. package/bios/seabios/src/hw/nvme.h +0 -17
  252. package/bios/seabios/src/hw/pci.c +0 -133
  253. package/bios/seabios/src/hw/pci.h +0 -47
  254. package/bios/seabios/src/hw/pci_ids.h +0 -2632
  255. package/bios/seabios/src/hw/pci_regs.h +0 -556
  256. package/bios/seabios/src/hw/pcidevice.c +0 -192
  257. package/bios/seabios/src/hw/pcidevice.h +0 -76
  258. package/bios/seabios/src/hw/pic.c +0 -115
  259. package/bios/seabios/src/hw/pic.h +0 -60
  260. package/bios/seabios/src/hw/ps2port.c +0 -543
  261. package/bios/seabios/src/hw/ps2port.h +0 -67
  262. package/bios/seabios/src/hw/pvscsi.c +0 -333
  263. package/bios/seabios/src/hw/pvscsi.h +0 -8
  264. package/bios/seabios/src/hw/ramdisk.c +0 -108
  265. package/bios/seabios/src/hw/rtc.c +0 -100
  266. package/bios/seabios/src/hw/rtc.h +0 -75
  267. package/bios/seabios/src/hw/sdcard.c +0 -572
  268. package/bios/seabios/src/hw/serialio.c +0 -113
  269. package/bios/seabios/src/hw/serialio.h +0 -29
  270. package/bios/seabios/src/hw/timer.c +0 -259
  271. package/bios/seabios/src/hw/tpm_drivers.c +0 -636
  272. package/bios/seabios/src/hw/tpm_drivers.h +0 -127
  273. package/bios/seabios/src/hw/usb-ehci.c +0 -650
  274. package/bios/seabios/src/hw/usb-ehci.h +0 -177
  275. package/bios/seabios/src/hw/usb-hid.c +0 -442
  276. package/bios/seabios/src/hw/usb-hid.h +0 -29
  277. package/bios/seabios/src/hw/usb-hub.c +0 -205
  278. package/bios/seabios/src/hw/usb-hub.h +0 -64
  279. package/bios/seabios/src/hw/usb-msc.c +0 -222
  280. package/bios/seabios/src/hw/usb-msc.h +0 -10
  281. package/bios/seabios/src/hw/usb-ohci.c +0 -568
  282. package/bios/seabios/src/hw/usb-ohci.h +0 -144
  283. package/bios/seabios/src/hw/usb-uas.c +0 -289
  284. package/bios/seabios/src/hw/usb-uas.h +0 -9
  285. package/bios/seabios/src/hw/usb-uhci.c +0 -571
  286. package/bios/seabios/src/hw/usb-uhci.h +0 -128
  287. package/bios/seabios/src/hw/usb-xhci.c +0 -1161
  288. package/bios/seabios/src/hw/usb-xhci.h +0 -133
  289. package/bios/seabios/src/hw/usb.c +0 -499
  290. package/bios/seabios/src/hw/usb.h +0 -254
  291. package/bios/seabios/src/hw/virtio-blk.c +0 -211
  292. package/bios/seabios/src/hw/virtio-blk.h +0 -43
  293. package/bios/seabios/src/hw/virtio-pci.c +0 -501
  294. package/bios/seabios/src/hw/virtio-pci.h +0 -151
  295. package/bios/seabios/src/hw/virtio-ring.c +0 -147
  296. package/bios/seabios/src/hw/virtio-ring.h +0 -121
  297. package/bios/seabios/src/hw/virtio-scsi.c +0 -220
  298. package/bios/seabios/src/hw/virtio-scsi.h +0 -47
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@@ -1,572 +0,0 @@
1
- // PCI SD Host Controller Interface
2
- //
3
- // Copyright (C) 2014 Kevin O'Connor <kevin@koconnor.net>
4
- //
5
- // This file may be distributed under the terms of the GNU LGPLv3 license.
6
-
7
- #include "block.h" // struct drive_s
8
- #include "malloc.h" // malloc_fseg
9
- #include "output.h" // znprintf
10
- #include "pcidevice.h" // foreachpci
11
- #include "pci_ids.h" // PCI_CLASS_SYSTEM_SDHCI
12
- #include "pci_regs.h" // PCI_BASE_ADDRESS_0
13
- #include "romfile.h" // romfile_findprefix
14
- #include "stacks.h" // yield
15
- #include "std/disk.h" // DISK_RET_SUCCESS
16
- #include "string.h" // memset
17
- #include "util.h" // boot_add_hd
18
- #include "x86.h" // writel
19
-
20
- // SDHCI MMIO registers
21
- struct sdhci_s {
22
- u32 sdma_addr;
23
- u16 block_size;
24
- u16 block_count;
25
- u32 arg;
26
- u16 transfer_mode;
27
- u16 cmd;
28
- u32 response[4];
29
- u32 data;
30
- u32 present_state;
31
- u8 host_control;
32
- u8 power_control;
33
- u8 block_gap_control;
34
- u8 wakeup_control;
35
- u16 clock_control;
36
- u8 timeout_control;
37
- u8 software_reset;
38
- u16 irq_status;
39
- u16 error_irq_status;
40
- u16 irq_enable;
41
- u16 error_irq_enable;
42
- u16 irq_signal;
43
- u16 error_signal;
44
- u16 auto_cmd12;
45
- u16 host_control2;
46
- u32 cap_lo, cap_hi;
47
- u64 max_current;
48
- u16 force_auto_cmd12;
49
- u16 force_error;
50
- u8 adma_error;
51
- u8 pad_55[3];
52
- u64 adma_addr;
53
- u8 pad_60[156];
54
- u16 slot_irq;
55
- u16 controller_version;
56
- } PACKED;
57
-
58
- // SDHCI commands
59
- #define SCB_R0 0x00 // No response
60
- #define SCB_R48 0x1a // Response R1 (no data), R5, R6, R7
61
- #define SCB_R48d 0x3a // Response R1 (with data)
62
- #define SCB_R48b 0x1b // Response R1b, R5b
63
- #define SCB_R48o 0x02 // Response R3, R4
64
- #define SCB_R136 0x09 // Response R2
65
- #define SC_GO_IDLE_STATE ((0<<8) | SCB_R0)
66
- #define SC_SEND_OP_COND ((1<<8) | SCB_R48o)
67
- #define SC_ALL_SEND_CID ((2<<8) | SCB_R136)
68
- #define SC_SEND_RELATIVE_ADDR ((3<<8) | SCB_R48)
69
- #define SC_SELECT_DESELECT_CARD ((7<<8) | SCB_R48b)
70
- #define SC_SEND_IF_COND ((8<<8) | SCB_R48)
71
- #define SC_SEND_EXT_CSD ((8<<8) | SCB_R48d)
72
- #define SC_SEND_CSD ((9<<8) | SCB_R136)
73
- #define SC_READ_SINGLE ((17<<8) | SCB_R48d)
74
- #define SC_READ_MULTIPLE ((18<<8) | SCB_R48d)
75
- #define SC_WRITE_SINGLE ((24<<8) | SCB_R48d)
76
- #define SC_WRITE_MULTIPLE ((25<<8) | SCB_R48d)
77
- #define SC_APP_CMD ((55<<8) | SCB_R48)
78
- #define SC_APP_SEND_OP_COND ((41<<8) | SCB_R48o)
79
-
80
- // SDHCI irqs
81
- #define SI_CMD_COMPLETE (1<<0)
82
- #define SI_TRANS_DONE (1<<1)
83
- #define SI_WRITE_READY (1<<4)
84
- #define SI_READ_READY (1<<5)
85
- #define SI_ERROR (1<<15)
86
-
87
- // SDHCI present_state flags
88
- #define SP_CMD_INHIBIT (1<<0)
89
- #define SP_DAT_INHIBIT (1<<1)
90
- #define SP_CARD_INSERTED (1<<16)
91
-
92
- // SDHCI transfer_mode flags
93
- #define ST_BLOCKCOUNT (1<<1)
94
- #define ST_AUTO_CMD12 (1<<2)
95
- #define ST_READ (1<<4)
96
- #define ST_MULTIPLE (1<<5)
97
-
98
- // SDHCI capabilities flags
99
- #define SD_CAPLO_V33 (1<<24)
100
- #define SD_CAPLO_V30 (1<<25)
101
- #define SD_CAPLO_V18 (1<<26)
102
- #define SD_CAPLO_BASECLOCK_SHIFT 8
103
- #define SD_CAPLO_BASECLOCK_MASK 0xff
104
-
105
- // SDHCI clock control flags
106
- #define SCC_INTERNAL_ENABLE (1<<0)
107
- #define SCC_STABLE (1<<1)
108
- #define SCC_CLOCK_ENABLE (1<<2)
109
- #define SCC_SDCLK_MASK 0xff
110
- #define SCC_SDCLK_SHIFT 8
111
- #define SCC_SDCLK_HI_MASK 0x300
112
- #define SCC_SDCLK_HI_RSHIFT 2
113
-
114
- // SDHCI power control flags
115
- #define SPC_POWER_ON (1<<0)
116
- #define SPC_V18 0x0a
117
- #define SPC_V30 0x0c
118
- #define SPC_V33 0x0e
119
-
120
- // SDHCI software reset flags
121
- #define SRF_ALL 0x01
122
- #define SRF_CMD 0x02
123
- #define SRF_DATA 0x04
124
-
125
- // SDHCI result flags
126
- #define SR_OCR_CCS (1<<30)
127
- #define SR_OCR_NOTBUSY (1<<31)
128
-
129
- // SDHCI timeouts
130
- #define SDHCI_POWER_OFF_TIME 1
131
- #define SDHCI_POWER_ON_TIME 5
132
- #define SDHCI_CLOCK_ON_TIME 1 // 74 clock cycles
133
- #define SDHCI_POWERUP_TIMEOUT 1000
134
- #define SDHCI_PIO_TIMEOUT 1000 // XXX - this is just made up
135
-
136
- // Internal 'struct drive_s' storage for a detected card
137
- struct sddrive_s {
138
- struct drive_s drive;
139
- struct sdhci_s *regs;
140
- int card_type;
141
- };
142
-
143
- // SD card types
144
- #define SF_MMC (1<<0)
145
- #define SF_HIGHCAPACITY (1<<1)
146
-
147
- // Repeatedly read a u16 register until any bit in a given mask is set
148
- static int
149
- sdcard_waitw(u16 *reg, u16 mask)
150
- {
151
- u32 end = timer_calc(SDHCI_PIO_TIMEOUT);
152
- for (;;) {
153
- u16 v = readw(reg);
154
- if (v & mask)
155
- return v;
156
- if (timer_check(end)) {
157
- dprintf(1, "scard_waitw: %p %x %x\n", reg, mask, v);
158
- warn_timeout();
159
- return -1;
160
- }
161
- yield();
162
- }
163
- }
164
-
165
- // Send an sdhci reset
166
- static int
167
- sdcard_reset(struct sdhci_s *regs, int flags)
168
- {
169
- writeb(&regs->software_reset, flags);
170
- u32 end = timer_calc(SDHCI_PIO_TIMEOUT);
171
- while (readb(&regs->software_reset))
172
- if (timer_check(end)) {
173
- warn_timeout();
174
- return -1;
175
- }
176
- return 0;
177
- }
178
-
179
- // Send a command to the card.
180
- static int
181
- sdcard_pio(struct sdhci_s *regs, int cmd, u32 *param)
182
- {
183
- u32 state = readl(&regs->present_state);
184
- dprintf(9, "sdcard_pio cmd %x %x %x\n", cmd, *param, state);
185
- if ((state & SP_CMD_INHIBIT)
186
- || ((cmd & 0x03) == 0x03 && state & SP_DAT_INHIBIT)) {
187
- dprintf(1, "sdcard_pio not ready %x\n", state);
188
- return -1;
189
- }
190
- // Send command
191
- writel(&regs->arg, *param);
192
- writew(&regs->cmd, cmd);
193
- int ret = sdcard_waitw(&regs->irq_status, SI_ERROR|SI_CMD_COMPLETE);
194
- if (ret < 0)
195
- return ret;
196
- if (ret & SI_ERROR) {
197
- u16 err = readw(&regs->error_irq_status);
198
- dprintf(3, "sdcard_pio command stop (code=%x)\n", err);
199
- sdcard_reset(regs, SRF_CMD|SRF_DATA);
200
- writew(&regs->error_irq_status, err);
201
- return -1;
202
- }
203
- writew(&regs->irq_status, SI_CMD_COMPLETE);
204
- // Read response
205
- memcpy(param, regs->response, sizeof(regs->response));
206
- dprintf(9, "sdcard cmd %x response %x %x %x %x\n"
207
- , cmd, param[0], param[1], param[2], param[3]);
208
- return 0;
209
- }
210
-
211
- // Send an "app specific" command to the card.
212
- static int
213
- sdcard_pio_app(struct sdhci_s *regs, int cmd, u32 *param)
214
- {
215
- u32 aparam[4] = {};
216
- int ret = sdcard_pio(regs, SC_APP_CMD, aparam);
217
- if (ret)
218
- return ret;
219
- return sdcard_pio(regs, cmd, param);
220
- }
221
-
222
- // Send a command to the card which transfers data.
223
- static int
224
- sdcard_pio_transfer(struct sddrive_s *drive, int cmd, u32 addr
225
- , void *data, int count)
226
- {
227
- // Send command
228
- writew(&drive->regs->block_size, DISK_SECTOR_SIZE);
229
- writew(&drive->regs->block_count, count);
230
- int isread = cmd != SC_WRITE_SINGLE && cmd != SC_WRITE_MULTIPLE;
231
- u16 tmode = ((count > 1 ? ST_MULTIPLE|ST_AUTO_CMD12|ST_BLOCKCOUNT : 0)
232
- | (isread ? ST_READ : 0));
233
- writew(&drive->regs->transfer_mode, tmode);
234
- if (!(drive->card_type & SF_HIGHCAPACITY))
235
- addr *= DISK_SECTOR_SIZE;
236
- u32 param[4] = { addr };
237
- int ret = sdcard_pio(drive->regs, cmd, param);
238
- if (ret)
239
- return ret;
240
- // Read/write data
241
- u16 cbit = isread ? SI_READ_READY : SI_WRITE_READY;
242
- while (count--) {
243
- ret = sdcard_waitw(&drive->regs->irq_status, cbit);
244
- if (ret < 0)
245
- return ret;
246
- writew(&drive->regs->irq_status, cbit);
247
- int i;
248
- for (i=0; i<DISK_SECTOR_SIZE/4; i++) {
249
- if (isread)
250
- *(u32*)data = readl(&drive->regs->data);
251
- else
252
- writel(&drive->regs->data, *(u32*)data);
253
- data += 4;
254
- }
255
- }
256
- // Complete command
257
- ret = sdcard_waitw(&drive->regs->irq_status, SI_TRANS_DONE);
258
- if (ret < 0)
259
- return ret;
260
- writew(&drive->regs->irq_status, SI_TRANS_DONE);
261
- return 0;
262
- }
263
-
264
- // Read/write a block of data to/from the card.
265
- static int
266
- sdcard_readwrite(struct disk_op_s *op, int iswrite)
267
- {
268
- struct sddrive_s *drive = container_of(
269
- op->drive_fl, struct sddrive_s, drive);
270
- int cmd = iswrite ? SC_WRITE_SINGLE : SC_READ_SINGLE;
271
- if (op->count > 1)
272
- cmd = iswrite ? SC_WRITE_MULTIPLE : SC_READ_MULTIPLE;
273
- int ret = sdcard_pio_transfer(drive, cmd, op->lba, op->buf_fl, op->count);
274
- if (ret)
275
- return DISK_RET_EBADTRACK;
276
- return DISK_RET_SUCCESS;
277
- }
278
-
279
- int
280
- sdcard_process_op(struct disk_op_s *op)
281
- {
282
- if (!CONFIG_SDCARD)
283
- return 0;
284
- switch (op->command) {
285
- case CMD_READ:
286
- return sdcard_readwrite(op, 0);
287
- case CMD_WRITE:
288
- return sdcard_readwrite(op, 1);
289
- default:
290
- return default_process_op(op);
291
- }
292
- }
293
-
294
-
295
- /****************************************************************
296
- * Setup
297
- ****************************************************************/
298
-
299
- static int
300
- sdcard_set_power(struct sdhci_s *regs)
301
- {
302
- u32 cap = readl(&regs->cap_lo);
303
- u32 volt, vbits;
304
- if (cap & SD_CAPLO_V33) {
305
- volt = 1<<20;
306
- vbits = SPC_V33;
307
- } else if (cap & SD_CAPLO_V30) {
308
- volt = 1<<18;
309
- vbits = SPC_V30;
310
- } else if (cap & SD_CAPLO_V18) {
311
- volt = 1<<7;
312
- vbits = SPC_V18;
313
- } else {
314
- dprintf(1, "SD controller unsupported volt range (%x)\n", cap);
315
- return -1;
316
- }
317
- writeb(&regs->power_control, 0);
318
- msleep(SDHCI_POWER_OFF_TIME);
319
- writeb(&regs->power_control, vbits | SPC_POWER_ON);
320
- msleep(SDHCI_POWER_ON_TIME);
321
- return volt;
322
- }
323
-
324
- static int
325
- sdcard_set_frequency(struct sdhci_s *regs, u32 khz)
326
- {
327
- u16 ver = readw(&regs->controller_version);
328
- u32 cap = readl(&regs->cap_lo);
329
- u32 base_freq = (cap >> SD_CAPLO_BASECLOCK_SHIFT) & SD_CAPLO_BASECLOCK_MASK;
330
- if (!base_freq) {
331
- dprintf(1, "Unknown base frequency for SD controller\n");
332
- return -1;
333
- }
334
- // Set new frequency
335
- u32 divisor = DIV_ROUND_UP(base_freq * 1000, khz);
336
- u16 creg;
337
- if ((ver & 0xff) <= 0x01) {
338
- divisor = divisor > 1 ? 1 << __fls(divisor-1) : 0;
339
- creg = (divisor & SCC_SDCLK_MASK) << SCC_SDCLK_SHIFT;
340
- } else {
341
- divisor = DIV_ROUND_UP(divisor, 2);
342
- creg = (divisor & SCC_SDCLK_MASK) << SCC_SDCLK_SHIFT;
343
- creg |= (divisor & SCC_SDCLK_HI_MASK) >> SCC_SDCLK_HI_RSHIFT;
344
- }
345
- dprintf(3, "sdcard_set_frequency %d %d %x\n", base_freq, khz, creg);
346
- writew(&regs->clock_control, 0);
347
- writew(&regs->clock_control, creg | SCC_INTERNAL_ENABLE);
348
- // Wait for frequency to become active
349
- int ret = sdcard_waitw(&regs->clock_control, SCC_STABLE);
350
- if (ret < 0)
351
- return ret;
352
- // Enable SD clock
353
- writew(&regs->clock_control, creg | SCC_INTERNAL_ENABLE | SCC_CLOCK_ENABLE);
354
- return 0;
355
- }
356
-
357
- // Obtain the disk size of an SD card
358
- static int
359
- sdcard_get_capacity(struct sddrive_s *drive, u8 *csd)
360
- {
361
- // Original MMC/SD card capacity formula
362
- u16 C_SIZE = (csd[6] >> 6) | (csd[7] << 2) | ((csd[8] & 0x03) << 10);
363
- u8 C_SIZE_MULT = (csd[4] >> 7) | ((csd[5] & 0x03) << 1);
364
- u8 READ_BL_LEN = csd[9] & 0x0f;
365
- u32 count = (C_SIZE+1) << (C_SIZE_MULT + 2 + READ_BL_LEN - 9);
366
- // Check for newer encoding formats.
367
- u8 CSD_STRUCTURE = csd[14] >> 6;
368
- if ((drive->card_type & SF_MMC) && CSD_STRUCTURE >= 2) {
369
- // Get capacity from EXT_CSD register
370
- u8 ext_csd[512];
371
- int ret = sdcard_pio_transfer(drive, SC_SEND_EXT_CSD, 0, ext_csd, 1);
372
- if (ret)
373
- return ret;
374
- count = *(u32*)&ext_csd[212];
375
- } else if (!(drive->card_type & SF_MMC) && CSD_STRUCTURE >= 1) {
376
- // High capacity SD card
377
- u32 C_SIZE2 = csd[5] | (csd[6] << 8) | ((csd[7] & 0x3f) << 16);
378
- count = (C_SIZE2+1) << (19-9);
379
- }
380
- // Fill drive struct and return
381
- drive->drive.blksize = DISK_SECTOR_SIZE;
382
- drive->drive.sectors = count;
383
- return 0;
384
- }
385
-
386
- // Initialize an SD card
387
- static int
388
- sdcard_card_setup(struct sddrive_s *drive, int volt, int prio)
389
- {
390
- struct sdhci_s *regs = drive->regs;
391
- // Set controller to initialization clock rate
392
- int ret = sdcard_set_frequency(regs, 400);
393
- if (ret)
394
- return ret;
395
- msleep(SDHCI_CLOCK_ON_TIME);
396
- // Reset card
397
- u32 param[4] = { };
398
- ret = sdcard_pio(regs, SC_GO_IDLE_STATE, param);
399
- if (ret)
400
- return ret;
401
- // Let card know SDHC/SDXC is supported and confirm voltage
402
- u32 hcs = 0, vrange = (volt >= (1<<15) ? 0x100 : 0x200) | 0xaa;
403
- param[0] = vrange;
404
- ret = sdcard_pio(regs, SC_SEND_IF_COND, param);
405
- if (!ret && param[0] == vrange)
406
- hcs = (1<<30);
407
- // Verify SD card (instead of MMC or SDIO)
408
- param[0] = 0x00;
409
- ret = sdcard_pio_app(regs, SC_APP_SEND_OP_COND, param);
410
- if (ret) {
411
- // Check for MMC card
412
- param[0] = 0x00;
413
- ret = sdcard_pio(regs, SC_SEND_OP_COND, param);
414
- if (ret)
415
- return ret;
416
- drive->card_type |= SF_MMC;
417
- hcs = (1<<30);
418
- }
419
- // Init card
420
- u32 end = timer_calc(SDHCI_POWERUP_TIMEOUT);
421
- for (;;) {
422
- param[0] = hcs | volt; // high-capacity support and voltage level
423
- if (drive->card_type & SF_MMC)
424
- ret = sdcard_pio(regs, SC_SEND_OP_COND, param);
425
- else
426
- ret = sdcard_pio_app(regs, SC_APP_SEND_OP_COND, param);
427
- if (ret)
428
- return ret;
429
- if (param[0] & SR_OCR_NOTBUSY)
430
- break;
431
- if (timer_check(end)) {
432
- warn_timeout();
433
- return -1;
434
- }
435
- msleep(5); // Avoid flooding log when debugging
436
- }
437
- drive->card_type |= (param[0] & SR_OCR_CCS) ? SF_HIGHCAPACITY : 0;
438
- // Select card (get cid, set rca, get csd, select card)
439
- param[0] = 0x00;
440
- ret = sdcard_pio(regs, SC_ALL_SEND_CID, param);
441
- if (ret)
442
- return ret;
443
- u8 cid[16];
444
- memcpy(cid, param, sizeof(cid));
445
- param[0] = drive->card_type & SF_MMC ? 0x0001 << 16 : 0x00;
446
- ret = sdcard_pio(regs, SC_SEND_RELATIVE_ADDR, param);
447
- if (ret)
448
- return ret;
449
- u16 rca = drive->card_type & SF_MMC ? 0x0001 : param[0] >> 16;
450
- param[0] = rca << 16;
451
- ret = sdcard_pio(regs, SC_SEND_CSD, param);
452
- if (ret)
453
- return ret;
454
- u8 csd[16];
455
- memcpy(csd, param, sizeof(csd));
456
- param[0] = rca << 16;
457
- ret = sdcard_pio(regs, SC_SELECT_DESELECT_CARD, param);
458
- if (ret)
459
- return ret;
460
- // Set controller to data transfer clock rate
461
- ret = sdcard_set_frequency(regs, 25000);
462
- if (ret)
463
- return ret;
464
- // Register drive
465
- ret = sdcard_get_capacity(drive, csd);
466
- if (ret)
467
- return ret;
468
- char pnm[7] = {};
469
- int i;
470
- for (i=0; i < (drive->card_type & SF_MMC ? 6 : 5); i++)
471
- pnm[i] = cid[11-i];
472
- char *desc = znprintf(MAXDESCSIZE, "%s %s %dMiB"
473
- , drive->card_type & SF_MMC ? "MMC drive" : "SD card"
474
- , pnm, (u32)(drive->drive.sectors >> 11));
475
- dprintf(1, "Found sdcard at %p: %s\n", regs, desc);
476
- boot_add_hd(&drive->drive, desc, prio);
477
- return 0;
478
- }
479
-
480
- // Setup and configure an SD card controller
481
- static void
482
- sdcard_controller_setup(struct sdhci_s *regs, int prio)
483
- {
484
- // Initialize controller
485
- u32 present_state = readl(&regs->present_state);
486
- if (!(present_state & SP_CARD_INSERTED))
487
- // No card present
488
- return;
489
- dprintf(3, "sdhci@%p ver=%x cap=%x %x\n", regs
490
- , readw(&regs->controller_version)
491
- , readl(&regs->cap_lo), readl(&regs->cap_hi));
492
- sdcard_reset(regs, SRF_ALL);
493
- writew(&regs->irq_signal, 0);
494
- writew(&regs->irq_enable, 0x01ff);
495
- writew(&regs->irq_status, readw(&regs->irq_status));
496
- writew(&regs->error_signal, 0);
497
- writew(&regs->error_irq_enable, 0x01ff);
498
- writew(&regs->error_irq_status, readw(&regs->error_irq_status));
499
- writeb(&regs->timeout_control, 0x0e); // Set to max timeout
500
- int volt = sdcard_set_power(regs);
501
- if (volt < 0)
502
- return;
503
-
504
- // Initialize card
505
- struct sddrive_s *drive = malloc_fseg(sizeof(*drive));
506
- if (!drive) {
507
- warn_noalloc();
508
- goto fail;
509
- }
510
- memset(drive, 0, sizeof(*drive));
511
- drive->drive.type = DTYPE_SDCARD;
512
- drive->regs = regs;
513
- int ret = sdcard_card_setup(drive, volt, prio);
514
- if (ret) {
515
- free(drive);
516
- goto fail;
517
- }
518
- return;
519
- fail:
520
- writeb(&regs->power_control, 0);
521
- writew(&regs->clock_control, 0);
522
- }
523
-
524
- static void
525
- sdcard_pci_setup(void *data)
526
- {
527
- struct pci_device *pci = data;
528
- // XXX - bars dependent on slot index register in pci config space
529
- struct sdhci_s *regs = pci_enable_membar(pci, PCI_BASE_ADDRESS_0);
530
- if (!regs)
531
- return;
532
- int prio = bootprio_find_pci_device(pci);
533
- sdcard_controller_setup(regs, prio);
534
- }
535
-
536
- static void
537
- sdcard_romfile_setup(void *data)
538
- {
539
- struct romfile_s *file = data;
540
- int prio = bootprio_find_named_rom(file->name, 0);
541
- u32 addr = romfile_loadint(file->name, 0);
542
- dprintf(1, "Starting sdcard controller check at addr %x\n", addr);
543
- sdcard_controller_setup((void*)addr, prio);
544
- }
545
-
546
- void
547
- sdcard_setup(void)
548
- {
549
- if (!CONFIG_SDCARD)
550
- return;
551
-
552
- struct romfile_s *file = NULL;
553
- int num_romfiles = 0;
554
- for (;;) {
555
- file = romfile_findprefix("etc/sdcard", file);
556
- if (!file)
557
- break;
558
- run_thread(sdcard_romfile_setup, file);
559
- num_romfiles++;
560
- }
561
- if (num_romfiles)
562
- // only scan for PCI controllers if etc/sdcard not used
563
- return;
564
-
565
- struct pci_device *pci;
566
- foreachpci(pci) {
567
- if (pci->class != PCI_CLASS_SYSTEM_SDHCI || pci->prog_if >= 2)
568
- // Not an SDHCI controller following SDHCI spec
569
- continue;
570
- run_thread(sdcard_pci_setup, pci);
571
- }
572
- }
@@ -1,113 +0,0 @@
1
- // Low-level serial (and serial-like) device access.
2
- //
3
- // Copyright (C) 2008-1013 Kevin O'Connor <kevin@koconnor.net>
4
- //
5
- // This file may be distributed under the terms of the GNU LGPLv3 license.
6
-
7
- #include "config.h" // CONFIG_DEBUG_SERIAL
8
- #include "fw/paravirt.h" // RunningOnQEMU
9
- #include "output.h" // dprintf
10
- #include "serialio.h" // serial_debug_preinit
11
- #include "x86.h" // outb
12
-
13
-
14
- /****************************************************************
15
- * Serial port debug output
16
- ****************************************************************/
17
-
18
- #define DEBUG_TIMEOUT 100000
19
-
20
- // Write to a serial port register
21
- static void
22
- serial_debug_write(u8 offset, u8 val)
23
- {
24
- if (CONFIG_DEBUG_SERIAL) {
25
- outb(val, CONFIG_DEBUG_SERIAL_PORT + offset);
26
- } else if (CONFIG_DEBUG_SERIAL_MMIO) {
27
- ASSERT32FLAT();
28
- writeb((void*)CONFIG_DEBUG_SERIAL_MEM_ADDRESS + 4*offset, val);
29
- }
30
- }
31
-
32
- // Read from a serial port register
33
- static u8
34
- serial_debug_read(u8 offset)
35
- {
36
- if (CONFIG_DEBUG_SERIAL)
37
- return inb(CONFIG_DEBUG_SERIAL_PORT + offset);
38
- if (CONFIG_DEBUG_SERIAL_MMIO) {
39
- ASSERT32FLAT();
40
- return readb((void*)CONFIG_DEBUG_SERIAL_MEM_ADDRESS + 4*offset);
41
- }
42
- }
43
-
44
- // Setup the debug serial port for output.
45
- void
46
- serial_debug_preinit(void)
47
- {
48
- if (!CONFIG_DEBUG_SERIAL && (!CONFIG_DEBUG_SERIAL_MMIO || MODESEGMENT))
49
- return;
50
- // setup for serial logging: 8N1
51
- u8 oldparam, newparam = 0x03;
52
- oldparam = serial_debug_read(SEROFF_LCR);
53
- serial_debug_write(SEROFF_LCR, newparam);
54
- // Disable irqs
55
- u8 oldier, newier = 0;
56
- oldier = serial_debug_read(SEROFF_IER);
57
- serial_debug_write(SEROFF_IER, newier);
58
-
59
- if (oldparam != newparam || oldier != newier)
60
- dprintf(1, "Changing serial settings was %x/%x now %x/%x\n"
61
- , oldparam, oldier, newparam, newier);
62
- }
63
-
64
- // Write a character to the serial port.
65
- static void
66
- serial_debug(char c)
67
- {
68
- if (!CONFIG_DEBUG_SERIAL && (!CONFIG_DEBUG_SERIAL_MMIO || MODESEGMENT))
69
- return;
70
- int timeout = DEBUG_TIMEOUT;
71
- while ((serial_debug_read(SEROFF_LSR) & 0x20) != 0x20)
72
- if (!timeout--)
73
- // Ran out of time.
74
- return;
75
- serial_debug_write(SEROFF_DATA, c);
76
- }
77
-
78
- void
79
- serial_debug_putc(char c)
80
- {
81
- if (c == '\n')
82
- serial_debug('\r');
83
- serial_debug(c);
84
- }
85
-
86
- // Make sure all serial port writes have been completely sent.
87
- void
88
- serial_debug_flush(void)
89
- {
90
- if (!CONFIG_DEBUG_SERIAL && (!CONFIG_DEBUG_SERIAL_MMIO || MODESEGMENT))
91
- return;
92
- int timeout = DEBUG_TIMEOUT;
93
- while ((serial_debug_read(SEROFF_LSR) & 0x60) != 0x60)
94
- if (!timeout--)
95
- // Ran out of time.
96
- return;
97
- }
98
-
99
-
100
- /****************************************************************
101
- * QEMU debug port
102
- ****************************************************************/
103
-
104
- u16 DebugOutputPort VARFSEG = 0x402;
105
-
106
- // Write a character to the special debugging port.
107
- void
108
- qemu_debug_putc(char c)
109
- {
110
- if (CONFIG_DEBUG_IO && runningOnQEMU())
111
- // Send character to debug port.
112
- outb(c, GET_GLOBAL(DebugOutputPort));
113
- }
@@ -1,29 +0,0 @@
1
- #ifndef __SERIALIO_H
2
- #define __SERIALIO_H
3
-
4
- #include "types.h" // u16
5
-
6
- #define PORT_LPT2 0x0278
7
- #define PORT_SERIAL4 0x02e8
8
- #define PORT_SERIAL2 0x02f8
9
- #define PORT_LPT1 0x0378
10
- #define PORT_SERIAL3 0x03e8
11
- #define PORT_SERIAL1 0x03f8
12
-
13
- // Serial port offsets
14
- #define SEROFF_DATA 0
15
- #define SEROFF_DLL 0
16
- #define SEROFF_IER 1
17
- #define SEROFF_DLH 1
18
- #define SEROFF_IIR 2
19
- #define SEROFF_LCR 3
20
- #define SEROFF_LSR 5
21
- #define SEROFF_MSR 6
22
-
23
- void serial_debug_preinit(void);
24
- void serial_debug_putc(char c);
25
- void serial_debug_flush(void);
26
- extern u16 DebugOutputPort;
27
- void qemu_debug_putc(char c);
28
-
29
- #endif // serialio.h