v86 0.3.7 → 0.5.10

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (386) hide show
  1. package/Readme.md +64 -108
  2. package/build/libv86-debug.js +12677 -0
  3. package/build/libv86-debug.mjs +732 -0
  4. package/build/libv86.js +710 -0
  5. package/build/libv86.mjs +636 -0
  6. package/build/v86-debug.wasm +0 -0
  7. package/build/v86-fallback.wasm +0 -0
  8. package/build/v86.wasm +0 -0
  9. package/package.json +12 -35
  10. package/bios/.gitignore +0 -1
  11. package/bios/COPYING.LESSER +0 -165
  12. package/bios/bochs-bios.bin +0 -0
  13. package/bios/bochs-vgabios.bin +0 -0
  14. package/bios/fetch-and-build-seabios.sh +0 -13
  15. package/bios/seabios/.config +0 -113
  16. package/bios/seabios/.config.old +0 -114
  17. package/bios/seabios/.gitignore +0 -4
  18. package/bios/seabios/COPYING +0 -674
  19. package/bios/seabios/COPYING.LESSER +0 -165
  20. package/bios/seabios/Makefile +0 -286
  21. package/bios/seabios/README +0 -17
  22. package/bios/seabios/docs/Build_overview.md +0 -104
  23. package/bios/seabios/docs/Contributing.md +0 -20
  24. package/bios/seabios/docs/Debugging.md +0 -111
  25. package/bios/seabios/docs/Developer_Documentation.md +0 -25
  26. package/bios/seabios/docs/Developer_links.md +0 -86
  27. package/bios/seabios/docs/Download.md +0 -27
  28. package/bios/seabios/docs/Execution_and_code_flow.md +0 -178
  29. package/bios/seabios/docs/Linking_overview.md +0 -160
  30. package/bios/seabios/docs/Mailinglist.md +0 -8
  31. package/bios/seabios/docs/Memory_Model.md +0 -253
  32. package/bios/seabios/docs/README +0 -5
  33. package/bios/seabios/docs/Releases.md +0 -482
  34. package/bios/seabios/docs/Runtime_config.md +0 -193
  35. package/bios/seabios/docs/SeaBIOS.md +0 -17
  36. package/bios/seabios/docs/SeaVGABIOS.md +0 -39
  37. package/bios/seabios/out/autoconf.h +0 -117
  38. package/bios/seabios/out/include/config/acpi/dsdt.h +0 -0
  39. package/bios/seabios/out/include/config/acpi.h +0 -0
  40. package/bios/seabios/out/include/config/ahci.h +0 -0
  41. package/bios/seabios/out/include/config/apmbios.h +0 -0
  42. package/bios/seabios/out/include/config/ata/dma.h +0 -0
  43. package/bios/seabios/out/include/config/ata/pio32.h +0 -0
  44. package/bios/seabios/out/include/config/ata.h +0 -0
  45. package/bios/seabios/out/include/config/auto.conf +0 -69
  46. package/bios/seabios/out/include/config/auto.conf.cmd +0 -9
  47. package/bios/seabios/out/include/config/boot.h +0 -0
  48. package/bios/seabios/out/include/config/bootorder.h +0 -0
  49. package/bios/seabios/out/include/config/build/vgabios.h +0 -0
  50. package/bios/seabios/out/include/config/call32/smm.h +0 -0
  51. package/bios/seabios/out/include/config/cdrom/boot.h +0 -0
  52. package/bios/seabios/out/include/config/cdrom/emu.h +0 -0
  53. package/bios/seabios/out/include/config/debug/level.h +0 -0
  54. package/bios/seabios/out/include/config/drives.h +0 -0
  55. package/bios/seabios/out/include/config/entry/extrastack.h +0 -0
  56. package/bios/seabios/out/include/config/esp/scsi.h +0 -0
  57. package/bios/seabios/out/include/config/flash/floppy.h +0 -0
  58. package/bios/seabios/out/include/config/floppy.h +0 -0
  59. package/bios/seabios/out/include/config/fw/romfile/load.h +0 -0
  60. package/bios/seabios/out/include/config/hardware/irq.h +0 -0
  61. package/bios/seabios/out/include/config/kbd/call/int15/4f.h +0 -0
  62. package/bios/seabios/out/include/config/keyboard.h +0 -0
  63. package/bios/seabios/out/include/config/lpt.h +0 -0
  64. package/bios/seabios/out/include/config/lsi/scsi.h +0 -0
  65. package/bios/seabios/out/include/config/malloc/uppermemory.h +0 -0
  66. package/bios/seabios/out/include/config/megasas.h +0 -0
  67. package/bios/seabios/out/include/config/mouse.h +0 -0
  68. package/bios/seabios/out/include/config/mpt/scsi.h +0 -0
  69. package/bios/seabios/out/include/config/mptable.h +0 -0
  70. package/bios/seabios/out/include/config/mtrr/init.h +0 -0
  71. package/bios/seabios/out/include/config/optionroms.h +0 -0
  72. package/bios/seabios/out/include/config/override/pci/id.h +0 -0
  73. package/bios/seabios/out/include/config/pcibios.h +0 -0
  74. package/bios/seabios/out/include/config/pirtable.h +0 -0
  75. package/bios/seabios/out/include/config/pmm.h +0 -0
  76. package/bios/seabios/out/include/config/pmtimer.h +0 -0
  77. package/bios/seabios/out/include/config/pnpbios.h +0 -0
  78. package/bios/seabios/out/include/config/ps2port.h +0 -0
  79. package/bios/seabios/out/include/config/pvscsi.h +0 -0
  80. package/bios/seabios/out/include/config/qemu/hardware.h +0 -0
  81. package/bios/seabios/out/include/config/qemu.h +0 -0
  82. package/bios/seabios/out/include/config/rom/size.h +0 -0
  83. package/bios/seabios/out/include/config/rtc/timer.h +0 -0
  84. package/bios/seabios/out/include/config/s3/resume.h +0 -0
  85. package/bios/seabios/out/include/config/sdcard.h +0 -0
  86. package/bios/seabios/out/include/config/serial.h +0 -0
  87. package/bios/seabios/out/include/config/tcgbios.h +0 -0
  88. package/bios/seabios/out/include/config/threads.h +0 -0
  89. package/bios/seabios/out/include/config/tristate.conf +0 -4
  90. package/bios/seabios/out/include/config/tsc/timer.h +0 -0
  91. package/bios/seabios/out/include/config/use/smm.h +0 -0
  92. package/bios/seabios/out/include/config/vga/allocate/extra/stack.h +0 -0
  93. package/bios/seabios/out/include/config/vga/bochs/stdvga.h +0 -0
  94. package/bios/seabios/out/include/config/vga/bochs.h +0 -0
  95. package/bios/seabios/out/include/config/vga/did.h +0 -0
  96. package/bios/seabios/out/include/config/vga/extra/stack/size.h +0 -0
  97. package/bios/seabios/out/include/config/vga/fixup/asm.h +0 -0
  98. package/bios/seabios/out/include/config/vga/pci.h +0 -0
  99. package/bios/seabios/out/include/config/vga/stdvga/ports.h +0 -0
  100. package/bios/seabios/out/include/config/vga/vbe.h +0 -0
  101. package/bios/seabios/out/include/config/vga/vid.h +0 -0
  102. package/bios/seabios/out/include/config/vgahooks.h +0 -0
  103. package/bios/seabios/out/include/config/virtio/blk.h +0 -0
  104. package/bios/seabios/out/include/config/virtio/scsi.h +0 -0
  105. package/bios/seabios/out/include/config/xen.h +0 -0
  106. package/bios/seabios/out/scripts/kconfig/conf +0 -0
  107. package/bios/seabios/out/scripts/kconfig/conf.o +0 -0
  108. package/bios/seabios/out/scripts/kconfig/zconf.hash.c +0 -289
  109. package/bios/seabios/out/scripts/kconfig/zconf.lex.c +0 -2420
  110. package/bios/seabios/out/scripts/kconfig/zconf.tab.c +0 -2538
  111. package/bios/seabios/out/scripts/kconfig/zconf.tab.o +0 -0
  112. package/bios/seabios/scripts/acpi_extract.py +0 -366
  113. package/bios/seabios/scripts/acpi_extract_preprocess.py +0 -41
  114. package/bios/seabios/scripts/buildrom.py +0 -56
  115. package/bios/seabios/scripts/buildversion.py +0 -134
  116. package/bios/seabios/scripts/checkrom.py +0 -95
  117. package/bios/seabios/scripts/checkstack.py +0 -226
  118. package/bios/seabios/scripts/checksum.py +0 -16
  119. package/bios/seabios/scripts/encodeint.py +0 -21
  120. package/bios/seabios/scripts/gen-offsets.sh +0 -17
  121. package/bios/seabios/scripts/kconfig/.gitignore +0 -22
  122. package/bios/seabios/scripts/kconfig/Makefile +0 -331
  123. package/bios/seabios/scripts/kconfig/POTFILES.in +0 -12
  124. package/bios/seabios/scripts/kconfig/check.sh +0 -13
  125. package/bios/seabios/scripts/kconfig/conf.c +0 -718
  126. package/bios/seabios/scripts/kconfig/confdata.c +0 -1250
  127. package/bios/seabios/scripts/kconfig/expr.c +0 -1168
  128. package/bios/seabios/scripts/kconfig/expr.h +0 -241
  129. package/bios/seabios/scripts/kconfig/gconf.c +0 -1542
  130. package/bios/seabios/scripts/kconfig/gconf.glade +0 -661
  131. package/bios/seabios/scripts/kconfig/images.c +0 -326
  132. package/bios/seabios/scripts/kconfig/kxgettext.c +0 -235
  133. package/bios/seabios/scripts/kconfig/lex.zconf.c +0 -2430
  134. package/bios/seabios/scripts/kconfig/list.h +0 -131
  135. package/bios/seabios/scripts/kconfig/lkc.h +0 -200
  136. package/bios/seabios/scripts/kconfig/lkc_proto.h +0 -57
  137. package/bios/seabios/scripts/kconfig/lxdialog/.gitignore +0 -4
  138. package/bios/seabios/scripts/kconfig/lxdialog/BIG.FAT.WARNING +0 -4
  139. package/bios/seabios/scripts/kconfig/lxdialog/check-lxdialog.sh +0 -87
  140. package/bios/seabios/scripts/kconfig/lxdialog/checklist.c +0 -332
  141. package/bios/seabios/scripts/kconfig/lxdialog/dialog.h +0 -257
  142. package/bios/seabios/scripts/kconfig/lxdialog/inputbox.c +0 -301
  143. package/bios/seabios/scripts/kconfig/lxdialog/menubox.c +0 -437
  144. package/bios/seabios/scripts/kconfig/lxdialog/textbox.c +0 -408
  145. package/bios/seabios/scripts/kconfig/lxdialog/util.c +0 -713
  146. package/bios/seabios/scripts/kconfig/lxdialog/yesno.c +0 -114
  147. package/bios/seabios/scripts/kconfig/mconf.c +0 -1036
  148. package/bios/seabios/scripts/kconfig/menu.c +0 -697
  149. package/bios/seabios/scripts/kconfig/merge_config.sh +0 -150
  150. package/bios/seabios/scripts/kconfig/nconf.c +0 -1556
  151. package/bios/seabios/scripts/kconfig/nconf.gui.c +0 -656
  152. package/bios/seabios/scripts/kconfig/nconf.h +0 -96
  153. package/bios/seabios/scripts/kconfig/qconf.cc +0 -1795
  154. package/bios/seabios/scripts/kconfig/qconf.h +0 -338
  155. package/bios/seabios/scripts/kconfig/streamline_config.pl +0 -647
  156. package/bios/seabios/scripts/kconfig/symbol.c +0 -1373
  157. package/bios/seabios/scripts/kconfig/util.c +0 -157
  158. package/bios/seabios/scripts/kconfig/zconf.gperf +0 -48
  159. package/bios/seabios/scripts/kconfig/zconf.hash.c_shipped +0 -289
  160. package/bios/seabios/scripts/kconfig/zconf.l +0 -363
  161. package/bios/seabios/scripts/kconfig/zconf.lex.c_shipped +0 -2420
  162. package/bios/seabios/scripts/kconfig/zconf.tab.c_shipped +0 -2538
  163. package/bios/seabios/scripts/kconfig/zconf.y +0 -733
  164. package/bios/seabios/scripts/layoutrom.py +0 -705
  165. package/bios/seabios/scripts/python23compat.py +0 -14
  166. package/bios/seabios/scripts/readserial.py +0 -190
  167. package/bios/seabios/scripts/tarball.sh +0 -36
  168. package/bios/seabios/scripts/test-build.sh +0 -90
  169. package/bios/seabios/scripts/transdump.py +0 -53
  170. package/bios/seabios/scripts/vgafixup.py +0 -96
  171. package/bios/seabios/src/Kconfig +0 -579
  172. package/bios/seabios/src/apm.c +0 -215
  173. package/bios/seabios/src/asm-offsets.c +0 -23
  174. package/bios/seabios/src/biosvar.h +0 -130
  175. package/bios/seabios/src/block.c +0 -623
  176. package/bios/seabios/src/block.h +0 -121
  177. package/bios/seabios/src/bmp.c +0 -117
  178. package/bios/seabios/src/boot.c +0 -793
  179. package/bios/seabios/src/bootsplash.c +0 -255
  180. package/bios/seabios/src/bregs.h +0 -80
  181. package/bios/seabios/src/byteorder.h +0 -71
  182. package/bios/seabios/src/cdrom.c +0 -322
  183. package/bios/seabios/src/clock.c +0 -506
  184. package/bios/seabios/src/code16gcc.s +0 -1
  185. package/bios/seabios/src/config.h +0 -108
  186. package/bios/seabios/src/cp437.c +0 -275
  187. package/bios/seabios/src/cp437.h +0 -1
  188. package/bios/seabios/src/disk.c +0 -779
  189. package/bios/seabios/src/e820map.c +0 -152
  190. package/bios/seabios/src/e820map.h +0 -26
  191. package/bios/seabios/src/entryfuncs.S +0 -165
  192. package/bios/seabios/src/farptr.h +0 -208
  193. package/bios/seabios/src/font.c +0 -139
  194. package/bios/seabios/src/fw/acpi-dsdt-cpu-hotplug.dsl +0 -78
  195. package/bios/seabios/src/fw/acpi-dsdt-dbug.dsl +0 -26
  196. package/bios/seabios/src/fw/acpi-dsdt-hpet.dsl +0 -36
  197. package/bios/seabios/src/fw/acpi-dsdt-isa.dsl +0 -102
  198. package/bios/seabios/src/fw/acpi-dsdt-pci-crs.dsl +0 -90
  199. package/bios/seabios/src/fw/acpi-dsdt.dsl +0 -342
  200. package/bios/seabios/src/fw/acpi-dsdt.hex +0 -554
  201. package/bios/seabios/src/fw/acpi.c +0 -685
  202. package/bios/seabios/src/fw/biostables.c +0 -491
  203. package/bios/seabios/src/fw/coreboot.c +0 -569
  204. package/bios/seabios/src/fw/csm.c +0 -347
  205. package/bios/seabios/src/fw/dev-pci.h +0 -52
  206. package/bios/seabios/src/fw/dev-piix.h +0 -29
  207. package/bios/seabios/src/fw/dev-q35.h +0 -52
  208. package/bios/seabios/src/fw/lzmadecode.c +0 -398
  209. package/bios/seabios/src/fw/lzmadecode.h +0 -67
  210. package/bios/seabios/src/fw/mptable.c +0 -197
  211. package/bios/seabios/src/fw/mtrr.c +0 -105
  212. package/bios/seabios/src/fw/multiboot.c +0 -111
  213. package/bios/seabios/src/fw/paravirt.c +0 -624
  214. package/bios/seabios/src/fw/paravirt.h +0 -63
  215. package/bios/seabios/src/fw/pciinit.c +0 -1187
  216. package/bios/seabios/src/fw/pirtable.c +0 -103
  217. package/bios/seabios/src/fw/q35-acpi-dsdt.dsl +0 -450
  218. package/bios/seabios/src/fw/romfile_loader.c +0 -259
  219. package/bios/seabios/src/fw/romfile_loader.h +0 -91
  220. package/bios/seabios/src/fw/shadow.c +0 -208
  221. package/bios/seabios/src/fw/smbios.c +0 -585
  222. package/bios/seabios/src/fw/smm.c +0 -269
  223. package/bios/seabios/src/fw/smp.c +0 -194
  224. package/bios/seabios/src/fw/ssdt-misc.dsl +0 -104
  225. package/bios/seabios/src/fw/ssdt-misc.hex +0 -88
  226. package/bios/seabios/src/fw/ssdt-pcihp.dsl +0 -36
  227. package/bios/seabios/src/fw/ssdt-pcihp.hex +0 -38
  228. package/bios/seabios/src/fw/ssdt-proc.dsl +0 -48
  229. package/bios/seabios/src/fw/ssdt-proc.hex +0 -35
  230. package/bios/seabios/src/fw/xen.c +0 -149
  231. package/bios/seabios/src/fw/xen.h +0 -125
  232. package/bios/seabios/src/gen-defs.h +0 -19
  233. package/bios/seabios/src/hw/ahci.c +0 -697
  234. package/bios/seabios/src/hw/ahci.h +0 -201
  235. package/bios/seabios/src/hw/ata.c +0 -1046
  236. package/bios/seabios/src/hw/ata.h +0 -163
  237. package/bios/seabios/src/hw/blockcmd.c +0 -372
  238. package/bios/seabios/src/hw/blockcmd.h +0 -114
  239. package/bios/seabios/src/hw/dma.c +0 -67
  240. package/bios/seabios/src/hw/esp-scsi.c +0 -241
  241. package/bios/seabios/src/hw/esp-scsi.h +0 -8
  242. package/bios/seabios/src/hw/floppy.c +0 -741
  243. package/bios/seabios/src/hw/lsi-scsi.c +0 -221
  244. package/bios/seabios/src/hw/lsi-scsi.h +0 -8
  245. package/bios/seabios/src/hw/megasas.c +0 -405
  246. package/bios/seabios/src/hw/megasas.h +0 -8
  247. package/bios/seabios/src/hw/mpt-scsi.c +0 -319
  248. package/bios/seabios/src/hw/mpt-scsi.h +0 -8
  249. package/bios/seabios/src/hw/nvme-int.h +0 -199
  250. package/bios/seabios/src/hw/nvme.c +0 -708
  251. package/bios/seabios/src/hw/nvme.h +0 -17
  252. package/bios/seabios/src/hw/pci.c +0 -133
  253. package/bios/seabios/src/hw/pci.h +0 -47
  254. package/bios/seabios/src/hw/pci_ids.h +0 -2632
  255. package/bios/seabios/src/hw/pci_regs.h +0 -556
  256. package/bios/seabios/src/hw/pcidevice.c +0 -192
  257. package/bios/seabios/src/hw/pcidevice.h +0 -76
  258. package/bios/seabios/src/hw/pic.c +0 -115
  259. package/bios/seabios/src/hw/pic.h +0 -60
  260. package/bios/seabios/src/hw/ps2port.c +0 -543
  261. package/bios/seabios/src/hw/ps2port.h +0 -67
  262. package/bios/seabios/src/hw/pvscsi.c +0 -333
  263. package/bios/seabios/src/hw/pvscsi.h +0 -8
  264. package/bios/seabios/src/hw/ramdisk.c +0 -108
  265. package/bios/seabios/src/hw/rtc.c +0 -100
  266. package/bios/seabios/src/hw/rtc.h +0 -75
  267. package/bios/seabios/src/hw/sdcard.c +0 -572
  268. package/bios/seabios/src/hw/serialio.c +0 -113
  269. package/bios/seabios/src/hw/serialio.h +0 -29
  270. package/bios/seabios/src/hw/timer.c +0 -259
  271. package/bios/seabios/src/hw/tpm_drivers.c +0 -636
  272. package/bios/seabios/src/hw/tpm_drivers.h +0 -127
  273. package/bios/seabios/src/hw/usb-ehci.c +0 -650
  274. package/bios/seabios/src/hw/usb-ehci.h +0 -177
  275. package/bios/seabios/src/hw/usb-hid.c +0 -442
  276. package/bios/seabios/src/hw/usb-hid.h +0 -29
  277. package/bios/seabios/src/hw/usb-hub.c +0 -205
  278. package/bios/seabios/src/hw/usb-hub.h +0 -64
  279. package/bios/seabios/src/hw/usb-msc.c +0 -222
  280. package/bios/seabios/src/hw/usb-msc.h +0 -10
  281. package/bios/seabios/src/hw/usb-ohci.c +0 -568
  282. package/bios/seabios/src/hw/usb-ohci.h +0 -144
  283. package/bios/seabios/src/hw/usb-uas.c +0 -289
  284. package/bios/seabios/src/hw/usb-uas.h +0 -9
  285. package/bios/seabios/src/hw/usb-uhci.c +0 -571
  286. package/bios/seabios/src/hw/usb-uhci.h +0 -128
  287. package/bios/seabios/src/hw/usb-xhci.c +0 -1161
  288. package/bios/seabios/src/hw/usb-xhci.h +0 -133
  289. package/bios/seabios/src/hw/usb.c +0 -499
  290. package/bios/seabios/src/hw/usb.h +0 -254
  291. package/bios/seabios/src/hw/virtio-blk.c +0 -211
  292. package/bios/seabios/src/hw/virtio-blk.h +0 -43
  293. package/bios/seabios/src/hw/virtio-pci.c +0 -501
  294. package/bios/seabios/src/hw/virtio-pci.h +0 -151
  295. package/bios/seabios/src/hw/virtio-ring.c +0 -147
  296. package/bios/seabios/src/hw/virtio-ring.h +0 -121
  297. package/bios/seabios/src/hw/virtio-scsi.c +0 -220
  298. package/bios/seabios/src/hw/virtio-scsi.h +0 -47
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  324. package/bios/seabios/src/std/LegacyBios.h +0 -985
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  349. package/bios/seabios/vgasrc/Kconfig +0 -211
  350. package/bios/seabios/vgasrc/bochsdisplay.c +0 -59
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  362. package/bios/seabios/vgasrc/swcursor.c +0 -96
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@@ -1,447 +0,0 @@
1
- // Bochs VGA interface to extended "VBE" modes
2
- //
3
- // Copyright (C) 2012 Kevin O'Connor <kevin@koconnor.net>
4
- // Copyright (C) 2011 Julian Pidancet <julian.pidancet@citrix.com>
5
- // Copyright (C) 2002 Jeroen Janssen
6
- //
7
- // This file may be distributed under the terms of the GNU LGPLv3 license.
8
-
9
- #include "biosvar.h" // GET_GLOBAL
10
- #include "bochsvga.h" // bochsvga_set_mode
11
- #include "config.h" // CONFIG_*
12
- #include "hw/pci.h" // pci_config_readl
13
- #include "hw/pci_regs.h" // PCI_BASE_ADDRESS_0
14
- #include "output.h" // dprintf
15
- #include "std/vbe.h" // VBE_CAPABILITY_8BIT_DAC
16
- #include "stdvga.h" // stdvga_get_linelength
17
- #include "vgabios.h" // SET_VGA
18
- #include "vgautil.h" // VBE_total_memory
19
- #include "x86.h" // outw
20
-
21
-
22
- /****************************************************************
23
- * Mode tables
24
- ****************************************************************/
25
-
26
- static struct bochsvga_mode
27
- {
28
- u16 mode;
29
- struct vgamode_s info;
30
- } bochsvga_modes[] VAR16 = {
31
- /* standard modes */
32
- { 0x100, { MM_PACKED, 640, 400, 8, 8, 16, SEG_GRAPH } },
33
- { 0x101, { MM_PACKED, 640, 480, 8, 8, 16, SEG_GRAPH } },
34
- { 0x102, { MM_PLANAR, 800, 600, 4, 8, 16, SEG_GRAPH } },
35
- { 0x103, { MM_PACKED, 800, 600, 8, 8, 16, SEG_GRAPH } },
36
- { 0x104, { MM_PLANAR, 1024, 768, 4, 8, 16, SEG_GRAPH } },
37
- { 0x105, { MM_PACKED, 1024, 768, 8, 8, 16, SEG_GRAPH } },
38
- { 0x106, { MM_PLANAR, 1280, 1024, 4, 8, 16, SEG_GRAPH } },
39
- { 0x107, { MM_PACKED, 1280, 1024, 8, 8, 16, SEG_GRAPH } },
40
- { 0x10D, { MM_DIRECT, 320, 200, 15, 8, 16, SEG_GRAPH } },
41
- { 0x10E, { MM_DIRECT, 320, 200, 16, 8, 16, SEG_GRAPH } },
42
- { 0x10F, { MM_DIRECT, 320, 200, 24, 8, 16, SEG_GRAPH } },
43
- { 0x110, { MM_DIRECT, 640, 480, 15, 8, 16, SEG_GRAPH } },
44
- { 0x111, { MM_DIRECT, 640, 480, 16, 8, 16, SEG_GRAPH } },
45
- { 0x112, { MM_DIRECT, 640, 480, 24, 8, 16, SEG_GRAPH } },
46
- { 0x113, { MM_DIRECT, 800, 600, 15, 8, 16, SEG_GRAPH } },
47
- { 0x114, { MM_DIRECT, 800, 600, 16, 8, 16, SEG_GRAPH } },
48
- { 0x115, { MM_DIRECT, 800, 600, 24, 8, 16, SEG_GRAPH } },
49
- { 0x116, { MM_DIRECT, 1024, 768, 15, 8, 16, SEG_GRAPH } },
50
- { 0x117, { MM_DIRECT, 1024, 768, 16, 8, 16, SEG_GRAPH } },
51
- { 0x118, { MM_DIRECT, 1024, 768, 24, 8, 16, SEG_GRAPH } },
52
- { 0x119, { MM_DIRECT, 1280, 1024, 15, 8, 16, SEG_GRAPH } },
53
- { 0x11A, { MM_DIRECT, 1280, 1024, 16, 8, 16, SEG_GRAPH } },
54
- { 0x11B, { MM_DIRECT, 1280, 1024, 24, 8, 16, SEG_GRAPH } },
55
- { 0x11C, { MM_PACKED, 1600, 1200, 8, 8, 16, SEG_GRAPH } },
56
- { 0x11D, { MM_DIRECT, 1600, 1200, 15, 8, 16, SEG_GRAPH } },
57
- { 0x11E, { MM_DIRECT, 1600, 1200, 16, 8, 16, SEG_GRAPH } },
58
- { 0x11F, { MM_DIRECT, 1600, 1200, 24, 8, 16, SEG_GRAPH } },
59
- /* BOCHS modes */
60
- { 0x140, { MM_DIRECT, 320, 200, 32, 8, 16, SEG_GRAPH } },
61
- { 0x141, { MM_DIRECT, 640, 400, 32, 8, 16, SEG_GRAPH } },
62
- { 0x142, { MM_DIRECT, 640, 480, 32, 8, 16, SEG_GRAPH } },
63
- { 0x143, { MM_DIRECT, 800, 600, 32, 8, 16, SEG_GRAPH } },
64
- { 0x144, { MM_DIRECT, 1024, 768, 32, 8, 16, SEG_GRAPH } },
65
- { 0x145, { MM_DIRECT, 1280, 1024, 32, 8, 16, SEG_GRAPH } },
66
- { 0x146, { MM_PACKED, 320, 200, 8, 8, 16, SEG_GRAPH } },
67
- { 0x147, { MM_DIRECT, 1600, 1200, 32, 8, 16, SEG_GRAPH } },
68
- { 0x148, { MM_PACKED, 1152, 864, 8, 8, 16, SEG_GRAPH } },
69
- { 0x149, { MM_DIRECT, 1152, 864, 15, 8, 16, SEG_GRAPH } },
70
- { 0x14a, { MM_DIRECT, 1152, 864, 16, 8, 16, SEG_GRAPH } },
71
- { 0x14b, { MM_DIRECT, 1152, 864, 24, 8, 16, SEG_GRAPH } },
72
- { 0x14c, { MM_DIRECT, 1152, 864, 32, 8, 16, SEG_GRAPH } },
73
- { 0x175, { MM_DIRECT, 1280, 768, 16, 8, 16, SEG_GRAPH } },
74
- { 0x176, { MM_DIRECT, 1280, 768, 24, 8, 16, SEG_GRAPH } },
75
- { 0x177, { MM_DIRECT, 1280, 768, 32, 8, 16, SEG_GRAPH } },
76
- { 0x178, { MM_DIRECT, 1280, 800, 16, 8, 16, SEG_GRAPH } },
77
- { 0x179, { MM_DIRECT, 1280, 800, 24, 8, 16, SEG_GRAPH } },
78
- { 0x17a, { MM_DIRECT, 1280, 800, 32, 8, 16, SEG_GRAPH } },
79
- { 0x17b, { MM_DIRECT, 1280, 960, 16, 8, 16, SEG_GRAPH } },
80
- { 0x17c, { MM_DIRECT, 1280, 960, 24, 8, 16, SEG_GRAPH } },
81
- { 0x17d, { MM_DIRECT, 1280, 960, 32, 8, 16, SEG_GRAPH } },
82
- { 0x17e, { MM_DIRECT, 1440, 900, 16, 8, 16, SEG_GRAPH } },
83
- { 0x17f, { MM_DIRECT, 1440, 900, 24, 8, 16, SEG_GRAPH } },
84
- { 0x180, { MM_DIRECT, 1440, 900, 32, 8, 16, SEG_GRAPH } },
85
- { 0x181, { MM_DIRECT, 1400, 1050, 16, 8, 16, SEG_GRAPH } },
86
- { 0x182, { MM_DIRECT, 1400, 1050, 24, 8, 16, SEG_GRAPH } },
87
- { 0x183, { MM_DIRECT, 1400, 1050, 32, 8, 16, SEG_GRAPH } },
88
- { 0x184, { MM_DIRECT, 1680, 1050, 16, 8, 16, SEG_GRAPH } },
89
- { 0x185, { MM_DIRECT, 1680, 1050, 24, 8, 16, SEG_GRAPH } },
90
- { 0x186, { MM_DIRECT, 1680, 1050, 32, 8, 16, SEG_GRAPH } },
91
- { 0x187, { MM_DIRECT, 1920, 1200, 16, 8, 16, SEG_GRAPH } },
92
- { 0x188, { MM_DIRECT, 1920, 1200, 24, 8, 16, SEG_GRAPH } },
93
- { 0x189, { MM_DIRECT, 1920, 1200, 32, 8, 16, SEG_GRAPH } },
94
- { 0x18a, { MM_DIRECT, 2560, 1600, 16, 8, 16, SEG_GRAPH } },
95
- { 0x18b, { MM_DIRECT, 2560, 1600, 24, 8, 16, SEG_GRAPH } },
96
- { 0x18c, { MM_DIRECT, 2560, 1600, 32, 8, 16, SEG_GRAPH } },
97
- { 0x18d, { MM_DIRECT, 1280, 720, 16, 8, 16, SEG_GRAPH } },
98
- { 0x18e, { MM_DIRECT, 1280, 720, 24, 8, 16, SEG_GRAPH } },
99
- { 0x18f, { MM_DIRECT, 1280, 720, 32, 8, 16, SEG_GRAPH } },
100
- { 0x190, { MM_DIRECT, 1920, 1080, 16, 8, 16, SEG_GRAPH } },
101
- { 0x191, { MM_DIRECT, 1920, 1080, 24, 8, 16, SEG_GRAPH } },
102
- { 0x192, { MM_DIRECT, 1920, 1080, 32, 8, 16, SEG_GRAPH } },
103
- };
104
-
105
- static int dispi_found VAR16 = 0;
106
-
107
- static int is_bochsvga_mode(struct vgamode_s *vmode_g)
108
- {
109
- return (vmode_g >= &bochsvga_modes[0].info
110
- && vmode_g <= &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)-1].info);
111
- }
112
-
113
- struct vgamode_s *bochsvga_find_mode(int mode)
114
- {
115
- struct bochsvga_mode *m = bochsvga_modes;
116
- if (GET_GLOBAL(dispi_found))
117
- for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)]; m++)
118
- if (GET_GLOBAL(m->mode) == mode)
119
- return &m->info;
120
- return stdvga_find_mode(mode);
121
- }
122
-
123
- void
124
- bochsvga_list_modes(u16 seg, u16 *dest, u16 *last)
125
- {
126
- struct bochsvga_mode *m = bochsvga_modes;
127
- if (GET_GLOBAL(dispi_found)) {
128
- for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)] && dest<last; m++) {
129
- u16 mode = GET_GLOBAL(m->mode);
130
- if (mode == 0xffff)
131
- continue;
132
- SET_FARVAR(seg, *dest, mode);
133
- dest++;
134
- }
135
- }
136
- stdvga_list_modes(seg, dest, last);
137
- }
138
-
139
-
140
- /****************************************************************
141
- * Helper functions
142
- ****************************************************************/
143
-
144
- static inline u16 dispi_read(u16 reg)
145
- {
146
- outw(reg, VBE_DISPI_IOPORT_INDEX);
147
- return inw(VBE_DISPI_IOPORT_DATA);
148
- }
149
- static inline void dispi_write(u16 reg, u16 val)
150
- {
151
- outw(reg, VBE_DISPI_IOPORT_INDEX);
152
- outw(val, VBE_DISPI_IOPORT_DATA);
153
- }
154
-
155
- static u8
156
- bochsvga_dispi_enabled(void)
157
- {
158
- if (!GET_GLOBAL(dispi_found))
159
- return 0;
160
- u16 en = dispi_read(VBE_DISPI_INDEX_ENABLE);
161
- if (!(en & VBE_DISPI_ENABLED))
162
- return 0;
163
- return 1;
164
- }
165
-
166
- int
167
- bochsvga_get_window(struct vgamode_s *vmode_g, int window)
168
- {
169
- if (!bochsvga_dispi_enabled())
170
- return stdvga_get_window(vmode_g, window);
171
- if (window != 0)
172
- return -1;
173
- return dispi_read(VBE_DISPI_INDEX_BANK);
174
- }
175
-
176
- int
177
- bochsvga_set_window(struct vgamode_s *vmode_g, int window, int val)
178
- {
179
- if (!bochsvga_dispi_enabled())
180
- return stdvga_set_window(vmode_g, window, val);
181
- if (window != 0)
182
- return -1;
183
- dispi_write(VBE_DISPI_INDEX_BANK, val);
184
- if (dispi_read(VBE_DISPI_INDEX_BANK) != val)
185
- return -1;
186
- return 0;
187
- }
188
-
189
- int
190
- bochsvga_get_linelength(struct vgamode_s *vmode_g)
191
- {
192
- if (!bochsvga_dispi_enabled())
193
- return stdvga_get_linelength(vmode_g);
194
- return dispi_read(VBE_DISPI_INDEX_VIRT_WIDTH) * vga_bpp(vmode_g) / 8;
195
- }
196
-
197
- int
198
- bochsvga_set_linelength(struct vgamode_s *vmode_g, int val)
199
- {
200
- stdvga_set_linelength(vmode_g, val);
201
- if (bochsvga_dispi_enabled()) {
202
- int pixels = (val * 8) / vga_bpp(vmode_g);
203
- dispi_write(VBE_DISPI_INDEX_VIRT_WIDTH, pixels);
204
- }
205
- return 0;
206
- }
207
-
208
- int
209
- bochsvga_get_displaystart(struct vgamode_s *vmode_g)
210
- {
211
- if (!bochsvga_dispi_enabled())
212
- return stdvga_get_displaystart(vmode_g);
213
- int bpp = vga_bpp(vmode_g);
214
- int linelength = dispi_read(VBE_DISPI_INDEX_VIRT_WIDTH) * bpp / 8;
215
- int x = dispi_read(VBE_DISPI_INDEX_X_OFFSET);
216
- int y = dispi_read(VBE_DISPI_INDEX_Y_OFFSET);
217
- return x * bpp / 8 + linelength * y;
218
- }
219
-
220
- int
221
- bochsvga_set_displaystart(struct vgamode_s *vmode_g, int val)
222
- {
223
- stdvga_set_displaystart(vmode_g, val);
224
- if (bochsvga_dispi_enabled()) {
225
- int bpp = vga_bpp(vmode_g);
226
- int linelength = dispi_read(VBE_DISPI_INDEX_VIRT_WIDTH) * bpp / 8;
227
- if (!linelength)
228
- return 0;
229
- dispi_write(VBE_DISPI_INDEX_X_OFFSET, (val % linelength) * 8 / bpp);
230
- dispi_write(VBE_DISPI_INDEX_Y_OFFSET, val / linelength);
231
- }
232
- return 0;
233
- }
234
-
235
- int
236
- bochsvga_get_dacformat(struct vgamode_s *vmode_g)
237
- {
238
- if (!bochsvga_dispi_enabled())
239
- return stdvga_get_dacformat(vmode_g);
240
- u16 en = dispi_read(VBE_DISPI_INDEX_ENABLE);
241
- return (en & VBE_DISPI_8BIT_DAC) ? 8 : 6;
242
- }
243
-
244
- int
245
- bochsvga_set_dacformat(struct vgamode_s *vmode_g, int val)
246
- {
247
- if (!bochsvga_dispi_enabled())
248
- return stdvga_set_dacformat(vmode_g, val);
249
- u16 en = dispi_read(VBE_DISPI_INDEX_ENABLE);
250
- if (val == 6)
251
- en &= ~VBE_DISPI_8BIT_DAC;
252
- else if (val == 8)
253
- en |= VBE_DISPI_8BIT_DAC;
254
- else
255
- return -1;
256
- dispi_write(VBE_DISPI_INDEX_ENABLE, en);
257
- return 0;
258
- }
259
-
260
- static int
261
- bochsvga_save_state(u16 seg, u16 *info)
262
- {
263
- u16 en = dispi_read(VBE_DISPI_INDEX_ENABLE);
264
- SET_FARVAR(seg, *info, en);
265
- info++;
266
- if (!(en & VBE_DISPI_ENABLED))
267
- return 0;
268
- int i;
269
- for (i = VBE_DISPI_INDEX_XRES; i <= VBE_DISPI_INDEX_Y_OFFSET; i++)
270
- if (i != VBE_DISPI_INDEX_ENABLE) {
271
- u16 v = dispi_read(i);
272
- SET_FARVAR(seg, *info, v);
273
- info++;
274
- }
275
- return 0;
276
- }
277
-
278
- static int
279
- bochsvga_restore_state(u16 seg, u16 *info)
280
- {
281
- u16 en = GET_FARVAR(seg, *info);
282
- info++;
283
- if (!(en & VBE_DISPI_ENABLED)) {
284
- dispi_write(VBE_DISPI_INDEX_ENABLE, en);
285
- return 0;
286
- }
287
- int i;
288
- for (i = VBE_DISPI_INDEX_XRES; i <= VBE_DISPI_INDEX_Y_OFFSET; i++)
289
- if (i == VBE_DISPI_INDEX_ENABLE) {
290
- dispi_write(i, en);
291
- } else {
292
- dispi_write(i, GET_FARVAR(seg, *info));
293
- info++;
294
- }
295
- return 0;
296
- }
297
-
298
- int
299
- bochsvga_save_restore(int cmd, u16 seg, void *data)
300
- {
301
- int ret = stdvga_save_restore(cmd, seg, data);
302
- if (ret < 0 || !(cmd & SR_REGISTERS) || !GET_GLOBAL(dispi_found))
303
- return ret;
304
-
305
- u16 *info = (data + ret);
306
- if (cmd & SR_SAVE)
307
- bochsvga_save_state(seg, info);
308
- if (cmd & SR_RESTORE)
309
- bochsvga_restore_state(seg, info);
310
- return ret + (VBE_DISPI_INDEX_Y_OFFSET-VBE_DISPI_INDEX_XRES+1)*sizeof(u16);
311
- }
312
-
313
-
314
- /****************************************************************
315
- * Mode setting
316
- ****************************************************************/
317
-
318
- int
319
- bochsvga_set_mode(struct vgamode_s *vmode_g, int flags)
320
- {
321
- if (GET_GLOBAL(dispi_found))
322
- dispi_write(VBE_DISPI_INDEX_ENABLE, VBE_DISPI_DISABLED);
323
- if (! is_bochsvga_mode(vmode_g))
324
- return stdvga_set_mode(vmode_g, flags);
325
- if (!GET_GLOBAL(dispi_found))
326
- return -1;
327
-
328
- u8 memmodel = GET_GLOBAL(vmode_g->memmodel);
329
- if (memmodel == MM_PLANAR)
330
- stdvga_set_mode(stdvga_find_mode(0x6a), 0);
331
- if (memmodel == MM_PACKED && !(flags & MF_NOPALETTE))
332
- stdvga_set_packed_palette();
333
-
334
- dispi_write(VBE_DISPI_INDEX_BPP, GET_GLOBAL(vmode_g->depth));
335
- u16 width = GET_GLOBAL(vmode_g->width);
336
- u16 height = GET_GLOBAL(vmode_g->height);
337
- dispi_write(VBE_DISPI_INDEX_XRES, width);
338
- dispi_write(VBE_DISPI_INDEX_YRES, height);
339
- dispi_write(VBE_DISPI_INDEX_BANK, 0);
340
- u16 bf = ((flags & MF_NOCLEARMEM ? VBE_DISPI_NOCLEARMEM : 0)
341
- | (flags & MF_LINEARFB ? VBE_DISPI_LFB_ENABLED : 0));
342
- dispi_write(VBE_DISPI_INDEX_ENABLE, VBE_DISPI_ENABLED | bf);
343
-
344
- /* VGA compat setup */
345
- u16 crtc_addr = VGAREG_VGA_CRTC_ADDRESS;
346
- stdvga_crtc_write(crtc_addr, 0x11, 0x00);
347
- stdvga_crtc_write(crtc_addr, 0x01, width / 8 - 1);
348
- stdvga_set_linelength(vmode_g, width);
349
- stdvga_crtc_write(crtc_addr, 0x12, height - 1);
350
- u8 v = 0;
351
- if ((height - 1) & 0x0100)
352
- v |= 0x02;
353
- if ((height - 1) & 0x0200)
354
- v |= 0x40;
355
- stdvga_crtc_mask(crtc_addr, 0x07, 0x42, v);
356
-
357
- stdvga_crtc_write(crtc_addr, 0x09, 0x00);
358
- stdvga_crtc_mask(crtc_addr, 0x17, 0x00, 0x03);
359
- stdvga_attr_mask(0x10, 0x00, 0x01);
360
- stdvga_grdc_write(0x06, 0x05);
361
- stdvga_sequ_write(0x02, 0x0f);
362
- if (memmodel != MM_PLANAR) {
363
- stdvga_crtc_mask(crtc_addr, 0x14, 0x00, 0x40);
364
- stdvga_attr_mask(0x10, 0x00, 0x40);
365
- stdvga_sequ_mask(0x04, 0x00, 0x08);
366
- stdvga_grdc_mask(0x05, 0x20, 0x40);
367
- }
368
- stdvga_attrindex_write(0x20);
369
-
370
- return 0;
371
- }
372
-
373
-
374
- /****************************************************************
375
- * Init
376
- ****************************************************************/
377
-
378
- int
379
- bochsvga_setup(void)
380
- {
381
- int ret = stdvga_setup();
382
- if (ret)
383
- return ret;
384
-
385
- /* Sanity checks */
386
- dispi_write(VBE_DISPI_INDEX_ID, VBE_DISPI_ID0);
387
- if (dispi_read(VBE_DISPI_INDEX_ID) != VBE_DISPI_ID0) {
388
- dprintf(1, "No VBE DISPI interface detected, falling back to stdvga\n");
389
- return 0;
390
- }
391
-
392
- dispi_write(VBE_DISPI_INDEX_ID, VBE_DISPI_ID5);
393
- SET_VGA(dispi_found, 1);
394
-
395
- if (GET_GLOBAL(HaveRunInit))
396
- return 0;
397
-
398
- u32 lfb_addr = VBE_DISPI_LFB_PHYSICAL_ADDRESS;
399
- int bdf = GET_GLOBAL(VgaBDF);
400
- if (CONFIG_VGA_PCI && bdf >= 0) {
401
- u16 vendor = pci_config_readw(bdf, PCI_VENDOR_ID);
402
- int barid;
403
- switch (vendor) {
404
- case 0x15ad: /* qemu vmware vga */
405
- barid = 1;
406
- break;
407
- default: /* stdvga, qxl, virtio */
408
- barid = 0;
409
- break;
410
- }
411
- u32 bar = pci_config_readl(bdf, PCI_BASE_ADDRESS_0 + barid * 4);
412
- lfb_addr = bar & PCI_BASE_ADDRESS_MEM_MASK;
413
- dprintf(1, "VBE DISPI: bdf %02x:%02x.%x, bar %d\n", pci_bdf_to_bus(bdf)
414
- , pci_bdf_to_dev(bdf), pci_bdf_to_fn(bdf), barid);
415
- }
416
-
417
- SET_VGA(VBE_framebuffer, lfb_addr);
418
- u32 totalmem = dispi_read(VBE_DISPI_INDEX_VIDEO_MEMORY_64K) * 64 * 1024;
419
- SET_VGA(VBE_total_memory, totalmem);
420
- SET_VGA(VBE_win_granularity, 64);
421
- SET_VGA(VBE_capabilities, VBE_CAPABILITY_8BIT_DAC);
422
-
423
- dprintf(1, "VBE DISPI: lfb_addr=%x, size %d MB\n",
424
- lfb_addr, totalmem >> 20);
425
-
426
- // Validate modes
427
- u16 en = dispi_read(VBE_DISPI_INDEX_ENABLE);
428
- dispi_write(VBE_DISPI_INDEX_ENABLE, en | VBE_DISPI_GETCAPS);
429
- u16 max_xres = dispi_read(VBE_DISPI_INDEX_XRES);
430
- u16 max_bpp = dispi_read(VBE_DISPI_INDEX_BPP);
431
- dispi_write(VBE_DISPI_INDEX_ENABLE, en);
432
- struct bochsvga_mode *m = bochsvga_modes;
433
- for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)]; m++) {
434
- u16 width = GET_GLOBAL(m->info.width);
435
- u16 height = GET_GLOBAL(m->info.height);
436
- u8 depth = GET_GLOBAL(m->info.depth);
437
- u32 mem = (height * DIV_ROUND_UP(width * vga_bpp(&m->info), 8)
438
- * stdvga_vram_ratio(&m->info));
439
-
440
- if (width > max_xres || depth > max_bpp || mem > totalmem) {
441
- dprintf(1, "Removing mode %x\n", GET_GLOBAL(m->mode));
442
- SET_VGA(m->mode, 0xffff);
443
- }
444
- }
445
-
446
- return 0;
447
- }
@@ -1,57 +0,0 @@
1
- #ifndef __BOCHSVGA_H
2
- #define __BOCHSVGA_H
3
-
4
- #include "types.h" // u8
5
-
6
- #define VBE_DISPI_BANK_ADDRESS 0xA0000
7
- #define VBE_DISPI_BANK_SIZE_KB 64
8
-
9
- #define VBE_DISPI_MAX_XRES 2560
10
- #define VBE_DISPI_MAX_YRES 1600
11
-
12
- #define VBE_DISPI_IOPORT_INDEX 0x01CE
13
- #define VBE_DISPI_IOPORT_DATA 0x01CF
14
-
15
- #define VBE_DISPI_INDEX_ID 0x0
16
- #define VBE_DISPI_INDEX_XRES 0x1
17
- #define VBE_DISPI_INDEX_YRES 0x2
18
- #define VBE_DISPI_INDEX_BPP 0x3
19
- #define VBE_DISPI_INDEX_ENABLE 0x4
20
- #define VBE_DISPI_INDEX_BANK 0x5
21
- #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
22
- #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
23
- #define VBE_DISPI_INDEX_X_OFFSET 0x8
24
- #define VBE_DISPI_INDEX_Y_OFFSET 0x9
25
- #define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa
26
-
27
- #define VBE_DISPI_ID0 0xB0C0
28
- #define VBE_DISPI_ID1 0xB0C1
29
- #define VBE_DISPI_ID2 0xB0C2
30
- #define VBE_DISPI_ID3 0xB0C3
31
- #define VBE_DISPI_ID4 0xB0C4
32
- #define VBE_DISPI_ID5 0xB0C5
33
-
34
- #define VBE_DISPI_DISABLED 0x00
35
- #define VBE_DISPI_ENABLED 0x01
36
- #define VBE_DISPI_GETCAPS 0x02
37
- #define VBE_DISPI_8BIT_DAC 0x20
38
- #define VBE_DISPI_LFB_ENABLED 0x40
39
- #define VBE_DISPI_NOCLEARMEM 0x80
40
-
41
- #define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
42
-
43
- struct vgamode_s *bochsvga_find_mode(int mode);
44
- void bochsvga_list_modes(u16 seg, u16 *dest, u16 *last);
45
- int bochsvga_get_window(struct vgamode_s *vmode_g, int window);
46
- int bochsvga_set_window(struct vgamode_s *vmode_g, int window, int val);
47
- int bochsvga_get_linelength(struct vgamode_s *vmode_g);
48
- int bochsvga_set_linelength(struct vgamode_s *vmode_g, int val);
49
- int bochsvga_get_displaystart(struct vgamode_s *vmode_g);
50
- int bochsvga_set_displaystart(struct vgamode_s *vmode_g, int val);
51
- int bochsvga_get_dacformat(struct vgamode_s *vmode_g);
52
- int bochsvga_set_dacformat(struct vgamode_s *vmode_g, int val);
53
- int bochsvga_save_restore(int cmd, u16 seg, void *data);
54
- int bochsvga_set_mode(struct vgamode_s *vmode_g, int flags);
55
- int bochsvga_setup(void);
56
-
57
- #endif // bochsvga.h