v86 0.3.7 → 0.5.10

package/bios/seabios/src/hw/pcidevice.c

@@ -1,192 +0,0 @@
-// Code to maintain and access the pci_device cache
-//
-// Copyright (C) 2008-2016  Kevin O'Connor <kevin@koconnor.net>
-//
-// This file may be distributed under the terms of the GNU LGPLv3 license.
-
-#include "malloc.h" // malloc_tmp
-#include "output.h" // dprintf
-#include "pci.h" // pci_config_writel
-#include "pcidevice.h" // pci_probe_devices
-#include "pci_regs.h" // PCI_VENDOR_ID
-#include "romfile.h" // romfile_loadint
-#include "stacks.h" // wait_preempt
-#include "string.h" // memset
-
-struct hlist_head PCIDevices VARVERIFY32INIT;
-int MaxPCIBus VARFSEG;
-
-// Find all PCI devices and populate PCIDevices linked list.
-void
-pci_probe_devices(void)
-{
-    dprintf(3, "PCI probe\n");
-    struct pci_device *busdevs[256];
-    memset(busdevs, 0, sizeof(busdevs));
-    struct hlist_node **pprev = &PCIDevices.first;
-    int extraroots = romfile_loadint("etc/extra-pci-roots", 0);
-    int bus = -1, lastbus = 0, rootbuses = 0, count=0;
-    while (bus < 0xff && (bus < MaxPCIBus || rootbuses < extraroots)) {
-        bus++;
-        int bdf;
-        foreachbdf(bdf, bus) {
-            // Create new pci_device struct and add to list.
-            struct pci_device *dev = malloc_tmp(sizeof(*dev));
-            if (!dev) {
-                warn_noalloc();
-                return;
-            }
-            memset(dev, 0, sizeof(*dev));
-            hlist_add(&dev->node, pprev);
-            pprev = &dev->node.next;
-            count++;
-
-            // Find parent device.
-            int rootbus;
-            struct pci_device *parent = busdevs[bus];
-            if (!parent) {
-                if (bus != lastbus)
-                    rootbuses++;
-                lastbus = bus;
-                rootbus = rootbuses;
-                if (bus > MaxPCIBus)
-                    MaxPCIBus = bus;
-            } else {
-                rootbus = parent->rootbus;
-            }
-
-            // Populate pci_device info.
-            dev->bdf = bdf;
-            dev->parent = parent;
-            dev->rootbus = rootbus;
-            u32 vendev = pci_config_readl(bdf, PCI_VENDOR_ID);
-            dev->vendor = vendev & 0xffff;
-            dev->device = vendev >> 16;
-            u32 classrev = pci_config_readl(bdf, PCI_CLASS_REVISION);
-            dev->class = classrev >> 16;
-            dev->prog_if = classrev >> 8;
-            dev->revision = classrev & 0xff;
-            dev->header_type = pci_config_readb(bdf, PCI_HEADER_TYPE);
-            u8 v = dev->header_type & 0x7f;
-            if (v == PCI_HEADER_TYPE_BRIDGE || v == PCI_HEADER_TYPE_CARDBUS) {
-                u8 secbus = pci_config_readb(bdf, PCI_SECONDARY_BUS);
-                dev->secondary_bus = secbus;
-                if (secbus > bus && !busdevs[secbus])
-                    busdevs[secbus] = dev;
-                if (secbus > MaxPCIBus)
-                    MaxPCIBus = secbus;
-            }
-            dprintf(4, "PCI device %pP (vd=%04x:%04x c=%04x)\n"
-                    , dev, dev->vendor, dev->device, dev->class);
-        }
-    }
-    dprintf(1, "Found %d PCI devices (max PCI bus is %02x)\n", count, MaxPCIBus);
-}
-
-// Search for a device with the specified vendor and device ids.
-struct pci_device *
-pci_find_device(u16 vendid, u16 devid)
-{
-    struct pci_device *pci;
-    foreachpci(pci) {
-        if (pci->vendor == vendid && pci->device == devid)
-            return pci;
-    }
-    return NULL;
-}
-
-// Search for a device with the specified class id.
-struct pci_device *
-pci_find_class(u16 classid)
-{
-    struct pci_device *pci;
-    foreachpci(pci) {
-        if (pci->class == classid)
-            return pci;
-    }
-    return NULL;
-}
-
-int pci_init_device(const struct pci_device_id *ids
-                    , struct pci_device *pci, void *arg)
-{
-    while (ids->vendid || ids->class_mask) {
-        if ((ids->vendid == PCI_ANY_ID || ids->vendid == pci->vendor) &&
-            (ids->devid == PCI_ANY_ID || ids->devid == pci->device) &&
-            !((ids->class ^ pci->class) & ids->class_mask)) {
-            if (ids->func)
-                ids->func(pci, arg);
-            return 0;
-        }
-        ids++;
-    }
-    return -1;
-}
-
-struct pci_device *
-pci_find_init_device(const struct pci_device_id *ids, void *arg)
-{
-    struct pci_device *pci;
-    foreachpci(pci) {
-        if (pci_init_device(ids, pci, arg) == 0)
-            return pci;
-    }
-    return NULL;
-}
-
-// Enable PCI bus-mastering (ie, DMA) support on a pci device
-void
-pci_enable_busmaster(struct pci_device *pci)
-{
-    wait_preempt();
-    pci_config_maskw(pci->bdf, PCI_COMMAND, 0, PCI_COMMAND_MASTER);
-    pci->have_driver = 1;
-}
-
-// Verify an IO bar and return it to the caller
-u16
-pci_enable_iobar(struct pci_device *pci, u32 addr)
-{
-    wait_preempt();
-    u32 bar = pci_config_readl(pci->bdf, addr);
-    if (!(bar & PCI_BASE_ADDRESS_SPACE_IO)) {
-        warn_internalerror();
-        return 0;
-    }
-    bar &= PCI_BASE_ADDRESS_IO_MASK;
-    if (bar == 0 || bar > 0xffff) {
-        warn_internalerror();
-        return 0;
-    }
-    pci_config_maskw(pci->bdf, PCI_COMMAND, 0, PCI_COMMAND_IO);
-    pci->have_driver = 1;
-    return bar;
-}
-
-// Verify a memory bar and return it to the caller
-void *
-pci_enable_membar(struct pci_device *pci, u32 addr)
-{
-    wait_preempt();
-    u32 bar = pci_config_readl(pci->bdf, addr);
-    if (bar & PCI_BASE_ADDRESS_SPACE_IO) {
-        warn_internalerror();
-        return NULL;
-    }
-    if (bar & PCI_BASE_ADDRESS_MEM_TYPE_64) {
-        u32 high = pci_config_readl(pci->bdf, addr+4);
-        if (high) {
-            dprintf(1, "Can not map memory bar over 4Gig\n");
-            return NULL;
-        }
-    }
-    bar &= PCI_BASE_ADDRESS_MEM_MASK;
-    if (bar + 4*1024*1024 < 20*1024*1024) {
-        // Bar doesn't look valid (it is in last 4M or first 16M)
-        warn_internalerror();
-        return NULL;
-    }
-    pci_config_maskw(pci->bdf, PCI_COMMAND, 0, PCI_COMMAND_MEMORY);
-    pci->have_driver = 1;
-    return (void*)bar;
-}

package/bios/seabios/src/hw/pcidevice.h

@@ -1,76 +0,0 @@
-#ifndef __PCIDEVICE_H
-#define __PCIDEVICE_H
-
-#include "types.h" // u32
-#include "list.h" // hlist_node
-
-struct pci_device {
-    u16 bdf;
-    u8 rootbus;
-    struct hlist_node node;
-    struct pci_device *parent;
-
-    // Configuration space device information
-    u16 vendor, device;
-    u16 class;
-    u8 prog_if, revision;
-    u8 header_type;
-    u8 secondary_bus;
-
-    // Local information on device.
-    int have_driver;
-};
-extern struct hlist_head PCIDevices;
-extern int MaxPCIBus;
-
-static inline u32 pci_classprog(struct pci_device *pci) {
-    return (pci->class << 8) | pci->prog_if;
-}
-
-#define foreachpci(PCI)                                 \
-    hlist_for_each_entry(PCI, &PCIDevices, node)
-
-#define PCI_ANY_ID      (~0)
-struct pci_device_id {
-    u32 vendid;
-    u32 devid;
-    u32 class;
-    u32 class_mask;
-    void (*func)(struct pci_device *pci, void *arg);
-};
-
-#define PCI_DEVICE(vendor_id, device_id, init_func)     \
-    {                                                   \
-        .vendid = (vendor_id),                          \
-        .devid = (device_id),                           \
-        .class = PCI_ANY_ID,                            \
-        .class_mask = 0,                                \
-        .func = (init_func)                             \
-    }
-
-#define PCI_DEVICE_CLASS(vendor_id, device_id, class_code, init_func)   \
-    {                                                                   \
-        .vendid = (vendor_id),                                          \
-        .devid = (device_id),                                           \
-        .class = (class_code),                                          \
-        .class_mask = ~0,                                               \
-        .func = (init_func)                                             \
-    }
-
-#define PCI_DEVICE_END                          \
-    {                                           \
-        .vendid = 0,                            \
-    }
-
-void pci_probe_devices(void);
-struct pci_device *pci_find_device(u16 vendid, u16 devid);
-struct pci_device *pci_find_class(u16 classid);
-int pci_init_device(const struct pci_device_id *ids
-                    , struct pci_device *pci, void *arg);
-struct pci_device *pci_find_init_device(const struct pci_device_id *ids
-                                        , void *arg);
-void pci_enable_busmaster(struct pci_device *pci);
-u16 pci_enable_iobar(struct pci_device *pci, u32 addr);
-void *pci_enable_membar(struct pci_device *pci, u32 addr);
-
-#endif // pcidevice.h

package/bios/seabios/src/hw/pic.c

@@ -1,115 +0,0 @@
-// Helpers for working with i8259 interrupt controller.
-//
-// Copyright (C) 2008  Kevin O'Connor <kevin@koconnor.net>
-// Copyright (C) 2002  MandrakeSoft S.A.
-//
-// This file may be distributed under the terms of the GNU LGPLv3 license.
-
-#include "biosvar.h" // SET_IVT
-#include "config.h" // CONFIG_*
-#include "output.h" // dprintf
-#include "pic.h" // pic_*
-
-u16
-pic_irqmask_read(void)
-{
-    if (!CONFIG_HARDWARE_IRQ)
-        return 0;
-    return inb(PORT_PIC1_DATA) | (inb(PORT_PIC2_DATA) << 8);
-}
-
-void
-pic_irqmask_write(u16 mask)
-{
-    if (!CONFIG_HARDWARE_IRQ)
-        return;
-    outb(mask, PORT_PIC1_DATA);
-    outb(mask >> 8, PORT_PIC2_DATA);
-}
-
-void
-pic_irqmask_mask(u16 off, u16 on)
-{
-    if (!CONFIG_HARDWARE_IRQ)
-        return;
-    u8 pic1off = off, pic1on = on, pic2off = off>>8, pic2on = on>>8;
-    outb((inb(PORT_PIC1_DATA) & ~pic1off) | pic1on, PORT_PIC1_DATA);
-    outb((inb(PORT_PIC2_DATA) & ~pic2off) | pic2on, PORT_PIC2_DATA);
-}
-
-void
-pic_reset(u8 irq0, u8 irq8)
-{
-    if (!CONFIG_HARDWARE_IRQ)
-        return;
-    // Send ICW1 (select OCW1 + will send ICW4)
-    outb(0x11, PORT_PIC1_CMD);
-    outb(0x11, PORT_PIC2_CMD);
-    // Send ICW2 (base irqs: 0x08-0x0f for irq0-7, 0x70-0x77 for irq8-15)
-    outb(irq0, PORT_PIC1_DATA);
-    outb(irq8, PORT_PIC2_DATA);
-    // Send ICW3 (cascaded pic ids)
-    outb(0x04, PORT_PIC1_DATA);
-    outb(0x02, PORT_PIC2_DATA);
-    // Send ICW4 (enable 8086 mode)
-    outb(0x01, PORT_PIC1_DATA);
-    outb(0x01, PORT_PIC2_DATA);
-    // Mask all irqs (except cascaded PIC2 irq)
-    pic_irqmask_write(PIC_IRQMASK_DEFAULT);
-}
-
-void
-pic_setup(void)
-{
-    dprintf(3, "init pic\n");
-    pic_reset(BIOS_HWIRQ0_VECTOR, BIOS_HWIRQ8_VECTOR);
-}
-
-void
-enable_hwirq(int hwirq, struct segoff_s func)
-{
-    if (!CONFIG_HARDWARE_IRQ)
-        return;
-    pic_irqmask_mask(1 << hwirq, 0);
-    int vector;
-    if (hwirq < 8)
-        vector = BIOS_HWIRQ0_VECTOR + hwirq;
-    else
-        vector = BIOS_HWIRQ8_VECTOR + hwirq - 8;
-    SET_IVT(vector, func);
-}
-
-static u8
-pic_isr1_read(void)
-{
-    if (!CONFIG_HARDWARE_IRQ)
-        return 0;
-    // 0x0b == select OCW1 + read ISR
-    outb(0x0b, PORT_PIC1_CMD);
-    return inb(PORT_PIC1_CMD);
-}
-
-static u8
-pic_isr2_read(void)
-{
-    if (!CONFIG_HARDWARE_IRQ)
-        return 0;
-    // 0x0b == select OCW1 + read ISR
-    outb(0x0b, PORT_PIC2_CMD);
-    return inb(PORT_PIC2_CMD);
-}
-
-// Handler for otherwise unused hardware irqs.
-void VISIBLE16
-handle_hwpic1(void)
-{
-    dprintf(DEBUG_ISR_hwpic1, "handle_hwpic1 irq=%x\n", pic_isr1_read());
-    pic_eoi1();
-}
-
-void VISIBLE16
-handle_hwpic2(void)
-{
-    dprintf(DEBUG_ISR_hwpic2, "handle_hwpic2 irq=%x\n", pic_isr2_read());
-    pic_eoi2();
-}

package/bios/seabios/src/hw/pic.h

@@ -1,60 +0,0 @@
-// Helpers for working with i8259 interrupt controller.
-//
-// Copyright (C) 2008  Kevin O'Connor <kevin@koconnor.net>
-// Copyright (C) 2002  MandrakeSoft S.A.
-//
-// This file may be distributed under the terms of the GNU LGPLv3 license.
-#ifndef __PIC_H
-#define __PIC_H
-
-#include "x86.h" // outb
-
-#define PORT_PIC1_CMD          0x0020
-#define PORT_PIC1_DATA         0x0021
-#define PORT_PIC2_CMD          0x00a0
-#define PORT_PIC2_DATA         0x00a1
-
-// PORT_PIC1 bitdefs
-#define PIC1_IRQ0  (1<<0)
-#define PIC1_IRQ1  (1<<1)
-#define PIC1_IRQ2  (1<<2)
-#define PIC1_IRQ5  (1<<5)
-#define PIC1_IRQ6  (1<<6)
-// PORT_PIC2 bitdefs
-#define PIC2_IRQ8  (1<<8)
-#define PIC2_IRQ12 (1<<12)
-#define PIC2_IRQ13 (1<<13)
-#define PIC2_IRQ14 (1<<14)
-
-#define PIC_IRQMASK_DEFAULT ((u16)~PIC1_IRQ2)
-
-#define BIOS_HWIRQ0_VECTOR 0x08
-#define BIOS_HWIRQ8_VECTOR 0x70
-
-static inline void
-pic_eoi1(void)
-{
-    if (!CONFIG_HARDWARE_IRQ)
-        return;
-    // Send eoi (select OCW2 + eoi)
-    outb(0x20, PORT_PIC1_CMD);
-}
-
-static inline void
-pic_eoi2(void)
-{
-    if (!CONFIG_HARDWARE_IRQ)
-        return;
-    // Send eoi (select OCW2 + eoi)
-    outb(0x20, PORT_PIC2_CMD);
-    pic_eoi1();
-}
-
-u16 pic_irqmask_read(void);
-void pic_irqmask_write(u16 mask);
-void pic_irqmask_mask(u16 off, u16 on);
-void pic_reset(u8 irq0, u8 irq8);
-void pic_setup(void);
-void enable_hwirq(int hwirq, struct segoff_s func);
-
-#endif // pic.h