udb 0.1.9 → 0.1.13

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (275) hide show
  1. checksums.yaml +4 -4
  2. data/.data/cfgs/example_rv64_with_overlay.yaml +5 -2
  3. data/.data/cfgs/mc100-32-full-example.yaml +1 -0
  4. data/.data/cfgs/profile/README.adoc +10 -0
  5. data/.data/cfgs/profile/RVA20S64.yaml +26 -6
  6. data/.data/cfgs/profile/RVA20U64.yaml +18 -4
  7. data/.data/cfgs/profile/RVA22S64.yaml +27 -7
  8. data/.data/cfgs/profile/RVA22U64.yaml +18 -4
  9. data/.data/cfgs/profile/RVA23S64.yaml +61 -7
  10. data/.data/cfgs/profile/RVA23U64.yaml +36 -4
  11. data/.data/cfgs/profile/RVB23S64.yaml +27 -7
  12. data/.data/cfgs/profile/RVB23U64.yaml +18 -4
  13. data/.data/cfgs/profile/RVI20U32.yaml +10 -4
  14. data/.data/cfgs/profile/RVI20U64.yaml +10 -4
  15. data/.data/cfgs/qc_iu.yaml +4 -1
  16. data/.data/cfgs/rv32-riscv-tests.yaml +2 -1
  17. data/.data/cfgs/rv32-vector.yaml +2 -1
  18. data/.data/cfgs/rv64-riscv-tests.yaml +2 -1
  19. data/.data/cfgs/rv64-vector.yaml +2 -1
  20. data/.data/spec/custom/isa/qc_iu/csr/Smrnmi/mnepc.yaml +17 -0
  21. data/.data/spec/custom/isa/qc_iu/csr/Xqccmi/qc.itba.yaml +45 -0
  22. data/.data/spec/custom/isa/qc_iu/csr/Xqccmi/qc.itdec.yaml +39 -0
  23. data/.data/spec/custom/isa/qc_iu/csr/jvt.yaml +11 -0
  24. data/.data/spec/custom/isa/qc_iu/csr/mepc.yaml +16 -0
  25. data/.data/spec/custom/isa/qc_iu/ext/Xqccmi.yaml +219 -0
  26. data/.data/spec/custom/isa/qc_iu/ext/Xqccmt.yaml +127 -0
  27. data/.data/spec/custom/isa/qc_iu/inst/Xqccmi/qc.cm.ilut.yaml +153 -0
  28. data/.data/spec/custom/isa/qc_iu/inst/Xqccmt/qc.cm.jalt.yaml +84 -0
  29. data/.data/spec/custom/isa/qc_iu/inst/Xqccmt/qc.cm.jt.yaml +60 -0
  30. data/.data/spec/custom/isa/qc_iu/isa/globals.isa +112 -0
  31. data/.data/spec/schemas/config_schema.json +219 -26
  32. data/.data/spec/schemas/csr_schema.json +0 -6
  33. data/.data/spec/schemas/ext_schema.json +80 -24
  34. data/.data/spec/schemas/inst_schema.json +0 -3
  35. data/.data/spec/schemas/profile_release_schema.json +1 -1
  36. data/.data/spec/schemas/profile_schema.json +0 -3
  37. data/.data/spec/schemas/register_file_schema.json +8 -3
  38. data/.data/spec/schemas/schema_defs.json +8 -27
  39. data/.data/spec/std/isa/csr/I/pmpcfg0.yaml +8 -8
  40. data/.data/spec/std/isa/csr/I/pmpcfg1.yaml +4 -4
  41. data/.data/spec/std/isa/csr/I/pmpcfg10.yaml +8 -8
  42. data/.data/spec/std/isa/csr/I/pmpcfg11.yaml +4 -4
  43. data/.data/spec/std/isa/csr/I/pmpcfg12.yaml +8 -8
  44. data/.data/spec/std/isa/csr/I/pmpcfg13.yaml +4 -4
  45. data/.data/spec/std/isa/csr/I/pmpcfg14.yaml +8 -8
  46. data/.data/spec/std/isa/csr/I/pmpcfg15.yaml +4 -4
  47. data/.data/spec/std/isa/csr/I/pmpcfg2.yaml +8 -8
  48. data/.data/spec/std/isa/csr/I/pmpcfg3.yaml +4 -4
  49. data/.data/spec/std/isa/csr/I/pmpcfg4.yaml +8 -8
  50. data/.data/spec/std/isa/csr/I/pmpcfg5.yaml +4 -4
  51. data/.data/spec/std/isa/csr/I/pmpcfg6.yaml +8 -8
  52. data/.data/spec/std/isa/csr/I/pmpcfg7.yaml +4 -4
  53. data/.data/spec/std/isa/csr/I/pmpcfg8.yaml +8 -8
  54. data/.data/spec/std/isa/csr/I/pmpcfg9.yaml +4 -4
  55. data/.data/spec/std/isa/csr/I/pmpcfgN.layout +1 -1
  56. data/.data/spec/std/isa/csr/Zicntr/mcountinhibit.layout +6 -2
  57. data/.data/spec/std/isa/csr/Zicntr/mcountinhibit.yaml +6 -2
  58. data/.data/spec/std/isa/csr/hstatus.yaml +16 -0
  59. data/.data/spec/std/isa/csr/mcycleh.yaml +1 -1
  60. data/.data/spec/std/isa/csr/misa.yaml +0 -12
  61. data/.data/spec/std/isa/csr/mstatus.yaml +38 -0
  62. data/.data/spec/std/isa/csr/mstatush.yaml +17 -15
  63. data/.data/spec/std/isa/csr/senvcfg.yaml +16 -0
  64. data/.data/spec/std/isa/csr/sstatus.yaml +12 -0
  65. data/.data/spec/std/isa/csr/vsstatus.yaml +24 -0
  66. data/.data/spec/std/isa/ext/A.yaml +5 -7
  67. data/.data/spec/std/isa/ext/S.yaml +12 -0
  68. data/.data/spec/std/isa/ext/Smpmpmt.yaml +52 -0
  69. data/.data/spec/std/isa/ext/Sv32.yaml +7 -19
  70. data/.data/spec/std/isa/ext/Sv39.yaml +7 -19
  71. data/.data/spec/std/isa/ext/Sv48.yaml +4 -20
  72. data/.data/spec/std/isa/ext/Sv57.yaml +4 -20
  73. data/.data/spec/std/isa/ext/Svukte.yaml +71 -0
  74. data/.data/spec/std/isa/ext/Zawrs.yaml +1 -1
  75. data/.data/spec/std/isa/ext/Zihpm.yaml +0 -12
  76. data/.data/spec/std/isa/inst/C/c.addi.yaml +1 -0
  77. data/.data/spec/std/isa/inst/C/c.addi16sp.yaml +1 -0
  78. data/.data/spec/std/isa/inst/C/c.addiw.yaml +1 -0
  79. data/.data/spec/std/isa/inst/C/c.andi.yaml +1 -0
  80. data/.data/spec/std/isa/inst/C/c.ldsp.yaml +1 -1
  81. data/.data/spec/std/isa/inst/C/c.li.yaml +1 -0
  82. data/.data/spec/std/isa/inst/C/c.lui.yaml +1 -0
  83. data/.data/spec/std/isa/inst/C/c.mv.yaml +1 -1
  84. data/.data/spec/std/isa/inst/C/c.sdsp.yaml +1 -1
  85. data/.data/spec/std/isa/inst/D/fsgnj.d.yaml +3 -0
  86. data/.data/spec/std/isa/inst/D/fsgnjn.d.yaml +3 -0
  87. data/.data/spec/std/isa/inst/D/fsgnjx.d.yaml +3 -0
  88. data/.data/spec/std/isa/inst/F/fadd.s.yaml +5 -5
  89. data/.data/spec/std/isa/inst/F/fclass.s.yaml +2 -2
  90. data/.data/spec/std/isa/inst/F/fcvt.l.s.yaml +1 -1
  91. data/.data/spec/std/isa/inst/F/fcvt.lu.s.yaml +1 -1
  92. data/.data/spec/std/isa/inst/F/fcvt.s.l.yaml +1 -1
  93. data/.data/spec/std/isa/inst/F/fcvt.s.lu.yaml +1 -1
  94. data/.data/spec/std/isa/inst/F/fcvt.s.w.yaml +1 -1
  95. data/.data/spec/std/isa/inst/F/fcvt.s.wu.yaml +1 -1
  96. data/.data/spec/std/isa/inst/F/fcvt.w.s.yaml +1 -1
  97. data/.data/spec/std/isa/inst/F/fcvt.wu.s.yaml +1 -1
  98. data/.data/spec/std/isa/inst/F/fdiv.s.yaml +1 -1
  99. data/.data/spec/std/isa/inst/F/feq.s.yaml +2 -2
  100. data/.data/spec/std/isa/inst/F/fle.s.yaml +2 -2
  101. data/.data/spec/std/isa/inst/F/fleq.s.yaml +2 -2
  102. data/.data/spec/std/isa/inst/F/flt.s.yaml +2 -2
  103. data/.data/spec/std/isa/inst/F/fltq.s.yaml +2 -2
  104. data/.data/spec/std/isa/inst/F/flw.yaml +2 -2
  105. data/.data/spec/std/isa/inst/F/fmadd.s.yaml +1 -1
  106. data/.data/spec/std/isa/inst/F/fmax.s.yaml +6 -6
  107. data/.data/spec/std/isa/inst/F/fmin.s.yaml +6 -6
  108. data/.data/spec/std/isa/inst/F/fmsub.s.yaml +1 -1
  109. data/.data/spec/std/isa/inst/F/fmul.s.yaml +1 -1
  110. data/.data/spec/std/isa/inst/F/fmv.w.x.yaml +2 -2
  111. data/.data/spec/std/isa/inst/F/fmv.x.w.yaml +1 -1
  112. data/.data/spec/std/isa/inst/F/fnmadd.s.yaml +2 -2
  113. data/.data/spec/std/isa/inst/F/fnmsub.s.yaml +1 -1
  114. data/.data/spec/std/isa/inst/F/fsgnj.s.yaml +4 -4
  115. data/.data/spec/std/isa/inst/F/fsgnjn.s.yaml +3 -3
  116. data/.data/spec/std/isa/inst/F/fsgnjx.s.yaml +4 -4
  117. data/.data/spec/std/isa/inst/F/fsqrt.s.yaml +1 -1
  118. data/.data/spec/std/isa/inst/F/fsub.s.yaml +1 -1
  119. data/.data/spec/std/isa/inst/F/fsw.yaml +1 -1
  120. data/.data/spec/std/isa/inst/I/addi.yaml +1 -1
  121. data/.data/spec/std/isa/inst/I/addiw.yaml +1 -1
  122. data/.data/spec/std/isa/inst/I/andi.yaml +1 -1
  123. data/.data/spec/std/isa/inst/I/beq.yaml +1 -1
  124. data/.data/spec/std/isa/inst/I/bge.yaml +4 -2
  125. data/.data/spec/std/isa/inst/I/bgeu.yaml +3 -0
  126. data/.data/spec/std/isa/inst/I/blt.yaml +4 -2
  127. data/.data/spec/std/isa/inst/I/bltu.yaml +3 -0
  128. data/.data/spec/std/isa/inst/I/bne.yaml +1 -1
  129. data/.data/spec/std/isa/inst/I/slt.yaml +2 -2
  130. data/.data/spec/std/isa/inst/I/sltiu.yaml +1 -1
  131. data/.data/spec/std/isa/inst/I/sltu.yaml +1 -1
  132. data/.data/spec/std/isa/inst/I/sub.yaml +1 -1
  133. data/.data/spec/std/isa/inst/I/subw.yaml +1 -1
  134. data/.data/spec/std/isa/inst/I/xori.yaml +1 -1
  135. data/.data/spec/std/isa/inst/M/mul.yaml +0 -19
  136. data/.data/spec/std/isa/inst/Q/fsgnj.q.yaml +1 -1
  137. data/.data/spec/std/isa/inst/S/sret.yaml +3 -1
  138. data/.data/spec/std/isa/inst/V/vadd.vv.yaml +1 -5
  139. data/.data/spec/std/isa/inst/V/vfsgnjn.vv.yaml +3 -0
  140. data/.data/spec/std/isa/inst/V/vfsgnjx.vv.yaml +3 -0
  141. data/.data/spec/std/isa/inst/V/vl1re8.v.yaml +3 -0
  142. data/.data/spec/std/isa/inst/V/vl2re8.v.yaml +3 -0
  143. data/.data/spec/std/isa/inst/V/vl4re8.v.yaml +3 -0
  144. data/.data/spec/std/isa/inst/V/vl8re8.v.yaml +3 -0
  145. data/.data/spec/std/isa/inst/V/vle8.v.yaml +3 -8
  146. data/.data/spec/std/isa/inst/V/vmand.mm.yaml +3 -0
  147. data/.data/spec/std/isa/inst/V/vmfle.vv.yaml +3 -0
  148. data/.data/spec/std/isa/inst/V/vmflt.vv.yaml +3 -0
  149. data/.data/spec/std/isa/inst/V/vmnand.mm.yaml +3 -0
  150. data/.data/spec/std/isa/inst/V/vmsgt.vi.yaml +3 -0
  151. data/.data/spec/std/isa/inst/V/vmsgtu.vi.yaml +3 -0
  152. data/.data/spec/std/isa/inst/V/vmsle.vi.yaml +3 -0
  153. data/.data/spec/std/isa/inst/V/vmsle.vv.yaml +3 -0
  154. data/.data/spec/std/isa/inst/V/vmsleu.vi.yaml +3 -0
  155. data/.data/spec/std/isa/inst/V/vmsleu.vv.yaml +3 -0
  156. data/.data/spec/std/isa/inst/V/vmslt.vv.yaml +3 -0
  157. data/.data/spec/std/isa/inst/V/vmsltu.vv.yaml +3 -0
  158. data/.data/spec/std/isa/inst/V/vmv.v.i.yaml +2 -13
  159. data/.data/spec/std/isa/inst/V/vmv.x.s.yaml +1 -1
  160. data/.data/spec/std/isa/inst/V/vmxnor.mm.yaml +3 -0
  161. data/.data/spec/std/isa/inst/V/vmxor.mm.yaml +3 -0
  162. data/.data/spec/std/isa/inst/V/vnsrl.wx.yaml +3 -0
  163. data/.data/spec/std/isa/inst/V/vrsub.vx.yaml +3 -0
  164. data/.data/spec/std/isa/inst/V/vse8.v.yaml +3 -4
  165. data/.data/spec/std/isa/inst/V/vwadd.vx.yaml +3 -0
  166. data/.data/spec/std/isa/inst/V/vwaddu.vx.yaml +3 -0
  167. data/.data/spec/std/isa/inst/V/vxor.vi.yaml +4 -0
  168. data/.data/spec/std/isa/inst/Zalasr/lSIZE.AQRL.layout +40 -5
  169. data/.data/spec/std/isa/inst/Zalasr/lb.aq.yaml +17 -1
  170. data/.data/spec/std/isa/inst/Zalasr/lb.aqrl.yaml +17 -1
  171. data/.data/spec/std/isa/inst/Zalasr/ld.aq.yaml +17 -1
  172. data/.data/spec/std/isa/inst/Zalasr/ld.aqrl.yaml +17 -1
  173. data/.data/spec/std/isa/inst/Zalasr/lh.aq.yaml +17 -1
  174. data/.data/spec/std/isa/inst/Zalasr/lh.aqrl.yaml +17 -1
  175. data/.data/spec/std/isa/inst/Zalasr/lw.aq.yaml +17 -1
  176. data/.data/spec/std/isa/inst/Zalasr/lw.aqrl.yaml +17 -1
  177. data/.data/spec/std/isa/inst/Zalasr/sSIZE.AQRL.layout +46 -5
  178. data/.data/spec/std/isa/inst/Zalasr/sb.aqrl.yaml +16 -1
  179. data/.data/spec/std/isa/inst/Zalasr/sb.rl.yaml +16 -1
  180. data/.data/spec/std/isa/inst/Zalasr/sd.aqrl.yaml +16 -1
  181. data/.data/spec/std/isa/inst/Zalasr/sd.rl.yaml +16 -1
  182. data/.data/spec/std/isa/inst/Zalasr/sh.aqrl.yaml +16 -1
  183. data/.data/spec/std/isa/inst/Zalasr/sh.rl.yaml +16 -1
  184. data/.data/spec/std/isa/inst/Zalasr/sw.aqrl.yaml +16 -1
  185. data/.data/spec/std/isa/inst/Zalasr/sw.rl.yaml +16 -1
  186. data/.data/spec/std/isa/inst/Zbkb/packw.yaml +1 -1
  187. data/.data/spec/std/isa/inst/Zcd/c.fld.yaml +1 -1
  188. data/.data/spec/std/isa/inst/Zcd/c.fldsp.yaml +1 -1
  189. data/.data/spec/std/isa/inst/Zcd/c.fsdsp.yaml +1 -1
  190. data/.data/spec/std/isa/inst/Zcf/c.flwsp.yaml +1 -1
  191. data/.data/spec/std/isa/inst/Zcf/c.fswsp.yaml +1 -1
  192. data/.data/spec/std/isa/inst/Zcmp/cm.pop.yaml +1 -1
  193. data/.data/spec/std/isa/inst/Zcmp/cm.popret.yaml +1 -1
  194. data/.data/spec/std/isa/inst/Zcmp/cm.popretz.yaml +1 -1
  195. data/.data/spec/std/isa/inst/Zcmp/cm.push.yaml +2 -3
  196. data/.data/spec/std/isa/inst/Zfa/fround.s.yaml +1 -1
  197. data/.data/spec/std/isa/inst/Zfh/fcvt.h.s.yaml +6 -6
  198. data/.data/spec/std/isa/inst/Zfh/fcvt.s.h.yaml +5 -5
  199. data/.data/spec/std/isa/inst/Zfh/flh.yaml +1 -1
  200. data/.data/spec/std/isa/inst/Zfh/fmv.h.x.yaml +1 -1
  201. data/.data/spec/std/isa/inst/Zfh/fmv.x.h.yaml +1 -1
  202. data/.data/spec/std/isa/inst/Zfh/fsh.yaml +1 -1
  203. data/.data/spec/std/isa/inst/Zicsr/csrrc.yaml +1 -1
  204. data/.data/spec/std/isa/inst/Zicsr/csrrci.yaml +1 -1
  205. data/.data/spec/std/isa/inst/Zicsr/csrrs.yaml +2 -2
  206. data/.data/spec/std/isa/inst/Zicsr/csrrsi.yaml +1 -1
  207. data/.data/spec/std/isa/inst/Zicsr/csrrw.yaml +1 -1
  208. data/.data/spec/std/isa/inst/Zicsr/csrrwi.yaml +1 -1
  209. data/.data/spec/std/isa/isa/builtin_functions.idl +17 -0
  210. data/.data/spec/std/isa/isa/fp.idl +1 -5
  211. data/.data/spec/std/isa/isa/globals.isa +45 -14
  212. data/.data/spec/std/isa/isa/vec.idl +1 -2
  213. data/.data/spec/std/isa/manual_version/isa/20240411/isa_20240411.yaml +5 -5
  214. data/.data/spec/std/isa/param/COUNTINHIBIT_EN.yaml +8 -2
  215. data/.data/spec/std/isa/param/JVT_BASE_MASK.yaml +1 -1
  216. data/.data/spec/std/isa/param/MCOUNTINHIBIT_IMPLEMENTED.yaml +25 -0
  217. data/.data/spec/std/isa/param/MTVEC_MODES.yaml +10 -3
  218. data/.data/spec/std/isa/param/VLEN.yaml +2 -0
  219. data/.data/spec/std/isa/profile/RVA20S64.yaml +11 -4
  220. data/.data/spec/std/isa/profile/RVA20U64.yaml +14 -5
  221. data/.data/spec/std/isa/profile/RVA22S64.yaml +14 -3
  222. data/.data/spec/std/isa/profile/RVA22U64.yaml +8 -1
  223. data/.data/spec/std/isa/profile/RVA23S64.yaml +13 -0
  224. data/.data/spec/std/isa/profile/RVA23U64.yaml +15 -1
  225. data/.data/spec/std/isa/profile/RVB23S64.yaml +15 -3
  226. data/.data/spec/std/isa/profile/RVB23U64.yaml +8 -1
  227. data/.data/spec/std/isa/profile/RVI20U32.yaml +8 -1
  228. data/.data/spec/std/isa/profile/RVI20U64.yaml +7 -0
  229. data/.data/spec/std/isa/register_file/F.yaml +3 -2
  230. data/.data/spec/std/isa/register_file/V.yaml +2 -2
  231. data/.data/spec/std/isa/register_file/X.yaml +2 -1
  232. data/lib/udb/architecture.rb +4 -25
  233. data/lib/udb/cfg_arch.rb +171 -59
  234. data/lib/udb/cli.rb +10 -1
  235. data/lib/udb/condition.rb +38 -37
  236. data/lib/udb/config.rb +72 -6
  237. data/lib/udb/logic.rb +29 -56
  238. data/lib/udb/obj/csr.rb +23 -5
  239. data/lib/udb/obj/csr_field.rb +36 -21
  240. data/lib/udb/obj/database_obj.rb +2 -5
  241. data/lib/udb/obj/extension.rb +0 -3
  242. data/lib/udb/obj/instruction.rb +1 -4
  243. data/lib/udb/obj/portfolio.rb +75 -20
  244. data/lib/udb/obj/profile.rb +0 -4
  245. data/lib/udb/obj/register_file.rb +63 -2
  246. data/lib/udb/portfolio_design.rb +3 -6
  247. data/lib/udb/resolver.rb +84 -23
  248. data/lib/udb/version.rb +1 -1
  249. data/lib/udb/version_spec.rb +8 -0
  250. data/lib/udb/z3.rb +23 -0
  251. data/lib/udb.rb +0 -3
  252. metadata +25 -37
  253. data/.data/cfgs/profile/RVA23M64.yaml +0 -159
  254. data/.data/cfgs/profile/RVB23M64.yaml +0 -149
  255. data/.data/spec/schemas/proc_cert_class_schema.json +0 -35
  256. data/.data/spec/schemas/proc_cert_model_schema.json +0 -336
  257. data/.data/spec/std/isa/proc_cert_class/AC.yaml +0 -13
  258. data/.data/spec/std/isa/proc_cert_class/MC.yaml +0 -13
  259. data/.data/spec/std/isa/proc_cert_class/RVI.yaml +0 -16
  260. data/.data/spec/std/isa/proc_cert_model/AC100.yaml +0 -72
  261. data/.data/spec/std/isa/proc_cert_model/AC200.yaml +0 -58
  262. data/.data/spec/std/isa/proc_cert_model/MC100-32.yaml +0 -155
  263. data/.data/spec/std/isa/proc_cert_model/MC100-64.yaml +0 -21
  264. data/.data/spec/std/isa/proc_cert_model/MC200-32.yaml +0 -60
  265. data/.data/spec/std/isa/proc_cert_model/MC200-64.yaml +0 -21
  266. data/.data/spec/std/isa/proc_cert_model/MC300-32.yaml +0 -40
  267. data/.data/spec/std/isa/proc_cert_model/MC300-64.yaml +0 -21
  268. data/.data/spec/std/isa/proc_cert_model/RVI20-32.yaml +0 -39
  269. data/.data/spec/std/isa/proc_cert_model/RVI20-64.yaml +0 -19
  270. data/.data/spec/std/isa/profile/RVA23M64.yaml +0 -24
  271. data/.data/spec/std/isa/profile/RVB23M64.yaml +0 -86
  272. data/lib/udb/cert_normative_rule.rb +0 -41
  273. data/lib/udb/obj/certifiable_obj.rb +0 -21
  274. data/lib/udb/obj/certificate.rb +0 -230
  275. data/lib/udb/proc_cert_design.rb +0 -77
@@ -1,336 +0,0 @@
1
- {
2
- "$schema": "http://json-schema.org/draft-07/schema#",
3
- "$id": "v0.1",
4
- "type": "object",
5
- "required": ["$schema", "kind", "name", "long_name", "base"],
6
- "additionalProperties": false,
7
- "properties": {
8
- "$inherits": {
9
- "oneOf": [
10
- {
11
- "type": "string",
12
- "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
13
- },
14
- {
15
- "type": "array",
16
- "items": {
17
- "type": "string",
18
- "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
19
- },
20
- "uniqueItems": true
21
- }
22
- ]
23
- },
24
- "$child_of": {
25
- "oneOf": [
26
- {
27
- "type": "string",
28
- "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
29
- },
30
- {
31
- "type": "array",
32
- "items": {
33
- "type": "string",
34
- "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
35
- },
36
- "uniqueItems": true
37
- }
38
- ]
39
- },
40
- "$parent_of": {
41
- "oneOf": [
42
- {
43
- "type": "string",
44
- "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
45
- },
46
- {
47
- "type": "array",
48
- "items": {
49
- "type": "string",
50
- "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
51
- },
52
- "uniqueItems": true
53
- }
54
- ]
55
- },
56
- "$schema": {
57
- "const": "proc_cert_model_schema.json#"
58
- },
59
- "kind": {
60
- "const": "processor certificate model"
61
- },
62
- "name": {
63
- "type": "string",
64
- "pattern": "^[A-Z][a-zA-Z0-9_-]*$",
65
- "description": "The short name of the model, used as a database key"
66
- },
67
- "long_name": {
68
- "type": "string",
69
- "description": "One line description of certificate model"
70
- },
71
- "class": {
72
- "type": "object",
73
- "properties": {
74
- "$ref": {
75
- "type": "string",
76
- "pattern": "^proc_cert_class/[A-Z][a-zA-Z0-9_]*\\.yaml#"
77
- }
78
- },
79
- "description": "Reference to the class this model belongs to"
80
- },
81
- "versions": {
82
- "type": "array",
83
- "items": {
84
- "type": "object",
85
- "required": ["version"],
86
- "properties": {
87
- "version": {
88
- "$ref": "schema_defs.json#/$defs/semantic_version"
89
- }
90
- },
91
- "additionalProperties": false
92
- },
93
- "minItems": 1,
94
- "description": "List of semantic versions within the model"
95
- },
96
- "base": {
97
- "enum": [32, 64],
98
- "description": "Base of the model"
99
- },
100
- "revision_history": {
101
- "type": "array",
102
- "items": {
103
- "$ref": "schema_defs.json#/$defs/revision_history_entry"
104
- },
105
- "minItems": 1,
106
- "description": "Revisions of the model document"
107
- },
108
- "introduction": {
109
- "type": "string",
110
- "description": "Asciidoc text containing the introduction prose for the model"
111
- },
112
- "tsc_profile_release": {
113
- "oneOf": [
114
- {
115
- "type": "null"
116
- },
117
- {
118
- "type": "object",
119
- "required": ["$ref"],
120
- "properties": {
121
- "$ref": {
122
- "type": "string",
123
- "pattern": "^profile_release/[A-Z][a-zA-Z0-9_]*\\.yaml#"
124
- }
125
- },
126
- "additionalProperties": false
127
- }
128
- ],
129
- "description": "Profile release associated with this certificate"
130
- },
131
- "unpriv_isa_manual_revision": {
132
- "type": "string"
133
- },
134
- "priv_isa_manual_revision": {
135
- "type": "string"
136
- },
137
- "debug_manual_revision": {
138
- "type": "string"
139
- },
140
- "in_scope_priv_modes": {
141
- "type": "array",
142
- "items": {
143
- "enum": ["M", "S", "U", "HS", "VS", "VU"]
144
- },
145
- "uniqueItems": true,
146
- "minItems": 1,
147
- "description": "List of in-scope privilege modes for the certificate"
148
- },
149
- "extensions": {
150
- "type": "object",
151
- "additionalProperties": false,
152
- "patternProperties": {
153
- "\\$inherits": {
154
- "oneOf": [
155
- {
156
- "type": "string",
157
- "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
158
- },
159
- {
160
- "type": "array",
161
- "items": {
162
- "type": "string",
163
- "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
164
- },
165
- "uniqueItems": true
166
- }
167
- ]
168
- },
169
- "\\$child_of": {
170
- "oneOf": [
171
- {
172
- "type": "string",
173
- "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
174
- },
175
- {
176
- "type": "array",
177
- "items": {
178
- "type": "string",
179
- "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
180
- },
181
- "uniqueItems": true
182
- }
183
- ]
184
- },
185
- "\\$parent_of": {
186
- "oneOf": [
187
- {
188
- "type": "string",
189
- "pattern": "^proc_cert_model/.*\\.yaml#.*"
190
- },
191
- {
192
- "type": "array",
193
- "items": {
194
- "type": "string",
195
- "pattern": "^proc_cert_model/.*\\.yaml#.*"
196
- },
197
- "uniqueItems": true
198
- }
199
- ]
200
- },
201
- "^([A-WY])|([SXZ][a-z0-9]+)$": {
202
- "type": "object",
203
- "properties": {
204
- "version": {
205
- "$ref": "schema_defs.json#/$defs/requirement_string"
206
- },
207
- "presence": {
208
- "$ref": "schema_defs.json#/$defs/extension_presence"
209
- },
210
- "note": {
211
- "type": "string"
212
- }
213
- },
214
- "additionalProperties": false
215
- }
216
- }
217
- },
218
- "param_constraints": {
219
- "type": "object",
220
- "patternProperties": {
221
- "^[A-Z][A-Z0-9_]+$": {
222
- "$ref": "schema_defs.json#/$defs/parameter_constraint"
223
- }
224
- }
225
- },
226
- "requirement_groups": {
227
- "type": "object",
228
- "additionalProperties": false,
229
- "patternProperties": {
230
- "\\$inherits": {
231
- "oneOf": [
232
- {
233
- "type": "string",
234
- "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
235
- },
236
- {
237
- "type": "array",
238
- "items": {
239
- "type": "string",
240
- "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
241
- },
242
- "uniqueItems": true
243
- }
244
- ]
245
- },
246
- "\\$child_of": {
247
- "oneOf": [
248
- {
249
- "type": "string",
250
- "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
251
- },
252
- {
253
- "type": "array",
254
- "items": {
255
- "type": "string",
256
- "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
257
- },
258
- "uniqueItems": true
259
- }
260
- ]
261
- },
262
- "\\$parent_of": {
263
- "oneOf": [
264
- {
265
- "type": "string",
266
- "pattern": "^proc_cert_model/.*\\.yaml#.*"
267
- },
268
- {
269
- "type": "array",
270
- "items": {
271
- "type": "string",
272
- "pattern": "^proc_cert_model/.*\\.yaml#.*"
273
- },
274
- "uniqueItems": true
275
- }
276
- ]
277
- },
278
- "^[A-Za-z0-9_-]+$": {
279
- "type": "object",
280
- "properties": {
281
- "name": {
282
- "type": "string"
283
- },
284
- "requirements": {
285
- "type": "array",
286
- "items": {
287
- "type": "object",
288
- "properties": {
289
- "name": {
290
- "type": "string"
291
- },
292
- "description": {
293
- "type": "string"
294
- },
295
- "when": {
296
- "$ref": "schema_defs.json#/$defs/when_condition"
297
- }
298
- },
299
- "additionalProperties": false
300
- }
301
- }
302
- }
303
- }
304
- }
305
- },
306
- "extra_notes": {
307
- "type": "array",
308
- "items": {
309
- "type": "object",
310
- "properties": {
311
- "presence": {
312
- "$ref": "schema_defs.json#/$defs/extension_presence"
313
- },
314
- "text": {
315
- "type": "string"
316
- }
317
- },
318
- "additionalProperties": false
319
- }
320
- },
321
- "recommendations": {
322
- "type": "array",
323
- "items": {
324
- "type": "object",
325
- "properties": {
326
- "text": {
327
- "type": "string"
328
- }
329
- }
330
- }
331
- },
332
- "$source": {
333
- "$ref": "schema_defs.json#/$defs/$source"
334
- }
335
- }
336
- }
@@ -1,13 +0,0 @@
1
- # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
2
- # SPDX-License-Identifier: BSD-3-Clause-Clear
3
-
4
- # yaml-language-server: $schema=../../../schemas/proc_cert_class_schema.json
5
-
6
- $schema: proc_cert_class_schema.json#
7
- kind: processor certificate class
8
- processor_kind: Apps Processor
9
- name: AC
10
- long_name: Apps Processor Certificate Class
11
-
12
- introduction: |
13
- The AC (Apps processor Class) targets processors that support virtual memory and run rich operating systems such as Linux and Android.
@@ -1,13 +0,0 @@
1
- # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
2
- # SPDX-License-Identifier: BSD-3-Clause-Clear
3
-
4
- # yaml-language-server: $schema=../../../schemas/proc_cert_class_schema.json
5
-
6
- $schema: proc_cert_class_schema.json#
7
- kind: processor certificate class
8
- processor_kind: Microcontroller
9
- name: MC
10
- long_name: Microcontroller Processor Certificate Class
11
-
12
- introduction: |
13
- The MC (Microcontroller Class) targets processors running low-level software on an RTOS or bare-metal.
@@ -1,16 +0,0 @@
1
- # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
2
- # SPDX-License-Identifier: BSD-3-Clause-Clear
3
-
4
- # yaml-language-server: $schema=../../schemas/proc_cert_class_schema.json
5
-
6
- $schema: proc_cert_class_schema.json#
7
- kind: processor certificate class
8
- processor_kind: Generic Unprivileged
9
- name: RVI
10
- long_name: RVI Certificate Class
11
-
12
- introduction: |
13
- The RVI certificate class corresponds to the RVI Profile Family.
14
- This certificate class only includes the RISC-V Unprivileged ISA.
15
- Certificates for the RVI certificate class are intended for internal
16
- use by the RVCP (RISC-V Certification Program).
@@ -1,72 +0,0 @@
1
- # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
2
- # SPDX-License-Identifier: BSD-3-Clause-Clear
3
-
4
- # yaml-language-server: $schema=../../../schemas/proc_cert_model_schema.json
5
-
6
- $schema: proc_cert_model_schema.json#
7
- kind: processor certificate model
8
- name: AC100
9
- long_name: AC100 Apps Processor Certificate based on the RVB23 profile release
10
- class:
11
- $ref: proc_cert_class/AC.yaml#
12
-
13
- # MXLEN used by rakefile
14
- base: 64
15
-
16
- # Semantic versions within the model
17
- versions:
18
- - version: "1.0.0"
19
-
20
- revision_history:
21
- - revision: "0.1.0"
22
- date: "2025-02-03"
23
- changes:
24
- - Created
25
-
26
- introduction: |
27
- The AC100 Processor Certificate targets RISC-V Apps Processors running rich operating systems such as
28
- custom Yocto Linux.
29
- Software source code compatibility is a strong requirement and binary compatibility is a lesser requirement.
30
-
31
- AC100 is based on the following:
32
-
33
- * RVB23 Profile without Hypervisor or Vector support
34
- * M-mode requirements
35
- * AIA or PLIC interrupt controller
36
- * Debug and trace (TBD)
37
-
38
- # Specification versions
39
- tsc_profile_release:
40
- $ref: profile_release/RVB23.yaml#
41
- unpriv_isa_manual_revision: "20240411"
42
- priv_isa_manual_revision: "20240411"
43
- debug_manual_revision: "1.0.0"
44
-
45
- # Certificate doesn't include hypervisor
46
- in_scope_priv_modes:
47
- - U
48
- - S
49
- - M
50
-
51
- extensions:
52
- $inherits:
53
- - "profile/RVB23M64.yaml#/extensions"
54
- requirement_groups:
55
- m_mode_reqs:
56
- name: M-mode Requirements
57
- description: |
58
- Extra requirements for M-mode beyond the minimum M-mode defined by the Sm extension.
59
- These extra requirements come from https://github.com/riscv/riscv-profiles/blob/main/src/old-m-profiles.adoc.
60
- requirements:
61
- - name: REQ-M_Mode-Non_Zero_CSRs
62
- description: The `mvendorid`, `marchid`, and `mimpid` CSRs must be nonzero.
63
- - name: REQ-M_Mode-mstatus_writable_fields
64
- description: The `mstatus.TVM`, `mstatus.TW`, and `mstatus.TSR` CSR fields must be writable.
65
- - name: REQ-M_Mode-medeleg_writable_bits
66
- description: The `medeleg` CSR bits 3, 8, 12, 13, and 15 must be writable.
67
- - name: REQ-M_Mode-mideleg_writable_bits
68
- description: The `mideleg` CSR bits 1, 5, and 9 must be writable.
69
- - name: REQ-M_Mode-mideleg_readonlyzero_bits
70
- description: The `mideleg` CSR bits 3, 7, and 11 must be read-only zero.
71
- - name: REQ-M_Mode-mcounteren_writable_bits
72
- description: For any `mhpmcounter` that is writable, the corresponding bit in `mcounteren` must be writable.
@@ -1,58 +0,0 @@
1
- # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
2
- # SPDX-License-Identifier: BSD-3-Clause-Clear
3
-
4
- # yaml-language-server: $schema=../../../schemas/proc_cert_model_schema.json
5
-
6
- $schema: proc_cert_model_schema.json#
7
- kind: processor certificate model
8
- name: AC200
9
- long_name: AC200 Apps Processor Certificate based on the RVA23 profile release
10
- class:
11
- $ref: proc_cert_class/AC.yaml#
12
-
13
- # MXLEN used by rakefile
14
- base: 64
15
-
16
- # Semantic versions within the model
17
- versions:
18
- - version: "1.0.0"
19
-
20
- revision_history:
21
- - revision: "0.1.0"
22
- date: "2025-03-07"
23
- changes:
24
- - Created
25
-
26
- introduction: |
27
- The AC200 Processor Certificate targets RISC-V Apps Processors running rich operating systems such as
28
- commercial Linux distributions or Android.
29
- Software source code compatibility and binary compatibility between implementations are strong requirements.
30
-
31
- AC200 is based on the following:
32
-
33
- * RVA23 Profile (includes mandatory Hypervisor and Vector support)
34
- * M-mode requirements
35
- * AIA or PLIC interrupt controller
36
- * Debug and trace (TBD)
37
-
38
- # Specification versions
39
- tsc_profile_release:
40
- $ref: profile_release/RVA23.yaml#
41
- unpriv_isa_manual_revision: "20240411"
42
- priv_isa_manual_revision: "20240411"
43
- debug_manual_revision: "1.0.0"
44
-
45
- in_scope_priv_modes:
46
- - U
47
- - S
48
- - M
49
- - HS
50
- - VS
51
- - VU
52
-
53
- extensions:
54
- $inherits:
55
- - "profile/RVA23M64.yaml#/extensions"
56
- requirement_groups:
57
- $inherits:
58
- - "proc_cert_model/AC100.yaml#/requirement_groups"
@@ -1,155 +0,0 @@
1
- # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
2
- # SPDX-License-Identifier: BSD-3-Clause-Clear
3
-
4
- # yaml-language-server: $schema=../../../schemas/proc_cert_model_schema.json
5
-
6
- $schema: proc_cert_model_schema.json#
7
- kind: processor certificate model
8
- name: MC100-32
9
- long_name: Basic 32-bit Microcontroller Certificate
10
- class:
11
- $ref: proc_cert_class/MC.yaml#
12
-
13
- # Semantic versions within the model
14
- versions:
15
- - version: "1.0.0"
16
-
17
- # MXLEN used by rakefile
18
- base: 32
19
-
20
- in_scope_priv_modes:
21
- - M
22
-
23
- # History of this certificate.
24
- revision_history:
25
- - revision: "0.9.0"
26
- date: "2025-10-29"
27
- changes:
28
- - |
29
- Made Zicntr from mandatory to optional since recent published ISA manuals have it as "recommended"
30
- - revision: "0.8.0"
31
- date: "2025-01-19"
32
- changes:
33
- - Updated so that content can apply equally to all certificate-related documents
34
- such as CRDs (Certification Requirement Documents) and CTPs (Certification Test Plans).
35
- - revision: "0.7.0"
36
- date: "2024-07-29"
37
- changes:
38
- - First version after moving non-microcontroller content in this document to a new document
39
- called "RISC-V CRDs (Certification Requirement Documents)"
40
- - Change MC100 Unpriv ISA spec from
41
- "https://riscv.org/wp-content/uploads/2016/06/riscv-spec-v2.1.pdf[riscv-spec-v2.1], May 31,
42
- 2016" to https://github.com/riscv/riscv-isa-manual/releases/tag/Ratified-IMAFDQC since the
43
- former isn't ratified by the latter is the oldest ratified version.
44
- - Added requirements for WFI instruction
45
- - Added requirements related to msip memory-mapped register
46
- - revision: "0.6.0"
47
- date: "2024-07-11"
48
- changes:
49
- - Supporting multiple MC versions to support customers wanting to certify existing microcontrollers not using the latest version of ratified standards.
50
- - Changed versioning scheme to use major.minor.patch instead of 3-digit major & minor.
51
- - Added a table showing the mapping from MC version to ISA manuals.
52
- - Reluctantly made interrupts OUT OF SCOPE for MC100 since only the CLINT interrupt controller
53
- was ratified at that time and isn't anticipated to be the interrupt controller used by MC100 implementations.
54
- - Clarified MANDATORY behaviors for mie and mip CSRs
55
- - Removed canonical discovery recipe because the OPT-* options directly inform the certification
56
- tests and certification reference model of the status of the various options. Also, canonical
57
- discovery recipes (e.g., probing for CLIC) violate the certification approach of avoiding writing
58
- potentially illegal values to CSR fields.
59
- - Added more options for interrupts
60
- - Moved non-microcontroller content in this document to a new document called "RISC-V Certification Plans"
61
- - revision: "0.5.0"
62
- date: "2024-06-03"
63
- changes:
64
- - Renamed to "RISC-V Microcontroller Certification Plan" based on Jason's recommendation
65
- - Added mvendorid, marchid, mimpid, and mhardid read-only priv CSRs because Allen pointed out
66
- these are mandatory in M-mode v1.13 (probably older versions too, haven't looked yet).
67
- - Added table showing mapping of MC versions to associated RISC-V specifications
68
- - revision: "0.4.0"
69
- date: "2024-06-03"
70
- changes:
71
- - Added M-mode instruction requirements
72
- - Made Zicntr MANDATORY due to very low cost for implementations to support (in the spirit of minimizing options).
73
- - Removed OPT-CNTR-PREC since minstret and mcycle must be a full 64 bits to be standard-compliant.
74
- - revision: "0.3.0"
75
- date: "2024-05-25"
76
- changes:
77
- - Includes Zicntr as OPTIONAL and then has only 32-bit counters for instret and cycle.
78
- - revision: "0.2.0"
79
- date: "2024-05-20"
80
- changes:
81
- - Very early draft
82
- - revision: "0.1.0"
83
- date: "2024-05-16"
84
- changes:
85
- - Initial version
86
-
87
- introduction: |
88
- The MC100 Processor Certificate targets basic RISC-V microcontrollers.
89
- It supports either a 32-bit (MC100-32) or 64-bit (MC100-64) base ISA.
90
- MC100 is not intended for the smallest possible microcontrollers but rather for applications
91
- benefiting from a minimal but standardized microcontroller. It consists of:
92
-
93
- * Unprivileged ISA: RV32I for MC100-32 and RV64I for MC100-64 with a few extensions suitable
94
- for a basic microcontroller.
95
- * Privileged ISA: Only the M-mode features listed as mandatory in the RISC-V Privileged ISA manual
96
-
97
- # Specification versions
98
- tsc_profile_release: null # None for MC100
99
- unpriv_isa_manual_revision: "20191213"
100
- priv_isa_manual_revision: "20190608-Priv-MSU-Ratified"
101
- debug_manual_revision: "0.13.2"
102
-
103
- # XXX - Remove version information since specifying priv/unpriv ISA manual should imply this.
104
- extensions:
105
- I:
106
- version: "~> 2.1"
107
- presence: mandatory
108
- C:
109
- version: "~> 2.2"
110
- presence: mandatory
111
- M:
112
- version: "~> 2.0"
113
- presence: optional
114
- Zicsr:
115
- version: "~> 2.0"
116
- presence: mandatory
117
- Zicntr:
118
- version: "~> 2.0"
119
- presence: optional
120
- Sm:
121
- version: "~> 1.11.0"
122
- presence: mandatory
123
- param_constraints:
124
- TIME_CSR_IMPLEMENTED: {} # Unconstrained
125
- MTVEC_BASE_ALIGNMENT_DIRECT: {} # Unconstrained
126
- MTVEC_BASE_ALIGNMENT_VECTORED: {} # Unconstrained
127
- ARCH_ID_VALUE: {} # Unconstrained
128
- IMP_ID_VALUE: {} # Unconstrained
129
- VENDOR_ID_BANK: {} # Unconstrained
130
- VENDOR_ID_OFFSET: {} # Unconstrained
131
- MISA_CSR_IMPLEMENTED: {} # Unconstrained
132
- MTVAL_WIDTH: {} # Unconstrained
133
- MTVEC_MODES: {} # Unconstrained
134
- PHYS_ADDR_WIDTH: {} # Unconstrained
135
- MISALIGNED_LDST: {} # Unconstrained
136
- MISALIGNED_LDST_EXCEPTION_PRIORITY: {} # Unconstrained
137
- MISALIGNED_MAX_ATOMICITY_GRANULE_SIZE: {} # Unconstrained
138
- MISALIGNED_SPLIT_STRATEGY:
139
- schema:
140
- const: sequential_bytes
141
- PRECISE_SYNCHRONOUS_EXCEPTIONS:
142
- schema:
143
- const: true
144
- TRAP_ON_ECALL_FROM_M:
145
- schema:
146
- const: true
147
- TRAP_ON_EBREAK:
148
- schema:
149
- const: true
150
- M_MODE_ENDIANNESS:
151
- schema:
152
- const: little
153
- MXLEN:
154
- schema:
155
- const: 32
@@ -1,21 +0,0 @@
1
- # Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
2
- # SPDX-License-Identifier: BSD-3-Clause-Clear
3
-
4
- # yaml-language-server: $schema=../../../schemas/proc_cert_model_schema.json
5
-
6
- $schema: proc_cert_model_schema.json#
7
- kind: processor certificate model
8
- name: MC100-64
9
- long_name: Basic 64-bit Microcontroller Certificate
10
- class:
11
- $ref: proc_cert_class/MC.yaml#
12
-
13
- $inherits: "proc_cert_model/MC100-32.yaml#"
14
-
15
- # MXLEN used by rakefile
16
- base: 64
17
-
18
- param_constraints:
19
- MXLEN:
20
- schema:
21
- const: 64