udb 0.1.9 → 0.1.13

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (275) hide show
  1. checksums.yaml +4 -4
  2. data/.data/cfgs/example_rv64_with_overlay.yaml +5 -2
  3. data/.data/cfgs/mc100-32-full-example.yaml +1 -0
  4. data/.data/cfgs/profile/README.adoc +10 -0
  5. data/.data/cfgs/profile/RVA20S64.yaml +26 -6
  6. data/.data/cfgs/profile/RVA20U64.yaml +18 -4
  7. data/.data/cfgs/profile/RVA22S64.yaml +27 -7
  8. data/.data/cfgs/profile/RVA22U64.yaml +18 -4
  9. data/.data/cfgs/profile/RVA23S64.yaml +61 -7
  10. data/.data/cfgs/profile/RVA23U64.yaml +36 -4
  11. data/.data/cfgs/profile/RVB23S64.yaml +27 -7
  12. data/.data/cfgs/profile/RVB23U64.yaml +18 -4
  13. data/.data/cfgs/profile/RVI20U32.yaml +10 -4
  14. data/.data/cfgs/profile/RVI20U64.yaml +10 -4
  15. data/.data/cfgs/qc_iu.yaml +4 -1
  16. data/.data/cfgs/rv32-riscv-tests.yaml +2 -1
  17. data/.data/cfgs/rv32-vector.yaml +2 -1
  18. data/.data/cfgs/rv64-riscv-tests.yaml +2 -1
  19. data/.data/cfgs/rv64-vector.yaml +2 -1
  20. data/.data/spec/custom/isa/qc_iu/csr/Smrnmi/mnepc.yaml +17 -0
  21. data/.data/spec/custom/isa/qc_iu/csr/Xqccmi/qc.itba.yaml +45 -0
  22. data/.data/spec/custom/isa/qc_iu/csr/Xqccmi/qc.itdec.yaml +39 -0
  23. data/.data/spec/custom/isa/qc_iu/csr/jvt.yaml +11 -0
  24. data/.data/spec/custom/isa/qc_iu/csr/mepc.yaml +16 -0
  25. data/.data/spec/custom/isa/qc_iu/ext/Xqccmi.yaml +219 -0
  26. data/.data/spec/custom/isa/qc_iu/ext/Xqccmt.yaml +127 -0
  27. data/.data/spec/custom/isa/qc_iu/inst/Xqccmi/qc.cm.ilut.yaml +153 -0
  28. data/.data/spec/custom/isa/qc_iu/inst/Xqccmt/qc.cm.jalt.yaml +84 -0
  29. data/.data/spec/custom/isa/qc_iu/inst/Xqccmt/qc.cm.jt.yaml +60 -0
  30. data/.data/spec/custom/isa/qc_iu/isa/globals.isa +112 -0
  31. data/.data/spec/schemas/config_schema.json +219 -26
  32. data/.data/spec/schemas/csr_schema.json +0 -6
  33. data/.data/spec/schemas/ext_schema.json +80 -24
  34. data/.data/spec/schemas/inst_schema.json +0 -3
  35. data/.data/spec/schemas/profile_release_schema.json +1 -1
  36. data/.data/spec/schemas/profile_schema.json +0 -3
  37. data/.data/spec/schemas/register_file_schema.json +8 -3
  38. data/.data/spec/schemas/schema_defs.json +8 -27
  39. data/.data/spec/std/isa/csr/I/pmpcfg0.yaml +8 -8
  40. data/.data/spec/std/isa/csr/I/pmpcfg1.yaml +4 -4
  41. data/.data/spec/std/isa/csr/I/pmpcfg10.yaml +8 -8
  42. data/.data/spec/std/isa/csr/I/pmpcfg11.yaml +4 -4
  43. data/.data/spec/std/isa/csr/I/pmpcfg12.yaml +8 -8
  44. data/.data/spec/std/isa/csr/I/pmpcfg13.yaml +4 -4
  45. data/.data/spec/std/isa/csr/I/pmpcfg14.yaml +8 -8
  46. data/.data/spec/std/isa/csr/I/pmpcfg15.yaml +4 -4
  47. data/.data/spec/std/isa/csr/I/pmpcfg2.yaml +8 -8
  48. data/.data/spec/std/isa/csr/I/pmpcfg3.yaml +4 -4
  49. data/.data/spec/std/isa/csr/I/pmpcfg4.yaml +8 -8
  50. data/.data/spec/std/isa/csr/I/pmpcfg5.yaml +4 -4
  51. data/.data/spec/std/isa/csr/I/pmpcfg6.yaml +8 -8
  52. data/.data/spec/std/isa/csr/I/pmpcfg7.yaml +4 -4
  53. data/.data/spec/std/isa/csr/I/pmpcfg8.yaml +8 -8
  54. data/.data/spec/std/isa/csr/I/pmpcfg9.yaml +4 -4
  55. data/.data/spec/std/isa/csr/I/pmpcfgN.layout +1 -1
  56. data/.data/spec/std/isa/csr/Zicntr/mcountinhibit.layout +6 -2
  57. data/.data/spec/std/isa/csr/Zicntr/mcountinhibit.yaml +6 -2
  58. data/.data/spec/std/isa/csr/hstatus.yaml +16 -0
  59. data/.data/spec/std/isa/csr/mcycleh.yaml +1 -1
  60. data/.data/spec/std/isa/csr/misa.yaml +0 -12
  61. data/.data/spec/std/isa/csr/mstatus.yaml +38 -0
  62. data/.data/spec/std/isa/csr/mstatush.yaml +17 -15
  63. data/.data/spec/std/isa/csr/senvcfg.yaml +16 -0
  64. data/.data/spec/std/isa/csr/sstatus.yaml +12 -0
  65. data/.data/spec/std/isa/csr/vsstatus.yaml +24 -0
  66. data/.data/spec/std/isa/ext/A.yaml +5 -7
  67. data/.data/spec/std/isa/ext/S.yaml +12 -0
  68. data/.data/spec/std/isa/ext/Smpmpmt.yaml +52 -0
  69. data/.data/spec/std/isa/ext/Sv32.yaml +7 -19
  70. data/.data/spec/std/isa/ext/Sv39.yaml +7 -19
  71. data/.data/spec/std/isa/ext/Sv48.yaml +4 -20
  72. data/.data/spec/std/isa/ext/Sv57.yaml +4 -20
  73. data/.data/spec/std/isa/ext/Svukte.yaml +71 -0
  74. data/.data/spec/std/isa/ext/Zawrs.yaml +1 -1
  75. data/.data/spec/std/isa/ext/Zihpm.yaml +0 -12
  76. data/.data/spec/std/isa/inst/C/c.addi.yaml +1 -0
  77. data/.data/spec/std/isa/inst/C/c.addi16sp.yaml +1 -0
  78. data/.data/spec/std/isa/inst/C/c.addiw.yaml +1 -0
  79. data/.data/spec/std/isa/inst/C/c.andi.yaml +1 -0
  80. data/.data/spec/std/isa/inst/C/c.ldsp.yaml +1 -1
  81. data/.data/spec/std/isa/inst/C/c.li.yaml +1 -0
  82. data/.data/spec/std/isa/inst/C/c.lui.yaml +1 -0
  83. data/.data/spec/std/isa/inst/C/c.mv.yaml +1 -1
  84. data/.data/spec/std/isa/inst/C/c.sdsp.yaml +1 -1
  85. data/.data/spec/std/isa/inst/D/fsgnj.d.yaml +3 -0
  86. data/.data/spec/std/isa/inst/D/fsgnjn.d.yaml +3 -0
  87. data/.data/spec/std/isa/inst/D/fsgnjx.d.yaml +3 -0
  88. data/.data/spec/std/isa/inst/F/fadd.s.yaml +5 -5
  89. data/.data/spec/std/isa/inst/F/fclass.s.yaml +2 -2
  90. data/.data/spec/std/isa/inst/F/fcvt.l.s.yaml +1 -1
  91. data/.data/spec/std/isa/inst/F/fcvt.lu.s.yaml +1 -1
  92. data/.data/spec/std/isa/inst/F/fcvt.s.l.yaml +1 -1
  93. data/.data/spec/std/isa/inst/F/fcvt.s.lu.yaml +1 -1
  94. data/.data/spec/std/isa/inst/F/fcvt.s.w.yaml +1 -1
  95. data/.data/spec/std/isa/inst/F/fcvt.s.wu.yaml +1 -1
  96. data/.data/spec/std/isa/inst/F/fcvt.w.s.yaml +1 -1
  97. data/.data/spec/std/isa/inst/F/fcvt.wu.s.yaml +1 -1
  98. data/.data/spec/std/isa/inst/F/fdiv.s.yaml +1 -1
  99. data/.data/spec/std/isa/inst/F/feq.s.yaml +2 -2
  100. data/.data/spec/std/isa/inst/F/fle.s.yaml +2 -2
  101. data/.data/spec/std/isa/inst/F/fleq.s.yaml +2 -2
  102. data/.data/spec/std/isa/inst/F/flt.s.yaml +2 -2
  103. data/.data/spec/std/isa/inst/F/fltq.s.yaml +2 -2
  104. data/.data/spec/std/isa/inst/F/flw.yaml +2 -2
  105. data/.data/spec/std/isa/inst/F/fmadd.s.yaml +1 -1
  106. data/.data/spec/std/isa/inst/F/fmax.s.yaml +6 -6
  107. data/.data/spec/std/isa/inst/F/fmin.s.yaml +6 -6
  108. data/.data/spec/std/isa/inst/F/fmsub.s.yaml +1 -1
  109. data/.data/spec/std/isa/inst/F/fmul.s.yaml +1 -1
  110. data/.data/spec/std/isa/inst/F/fmv.w.x.yaml +2 -2
  111. data/.data/spec/std/isa/inst/F/fmv.x.w.yaml +1 -1
  112. data/.data/spec/std/isa/inst/F/fnmadd.s.yaml +2 -2
  113. data/.data/spec/std/isa/inst/F/fnmsub.s.yaml +1 -1
  114. data/.data/spec/std/isa/inst/F/fsgnj.s.yaml +4 -4
  115. data/.data/spec/std/isa/inst/F/fsgnjn.s.yaml +3 -3
  116. data/.data/spec/std/isa/inst/F/fsgnjx.s.yaml +4 -4
  117. data/.data/spec/std/isa/inst/F/fsqrt.s.yaml +1 -1
  118. data/.data/spec/std/isa/inst/F/fsub.s.yaml +1 -1
  119. data/.data/spec/std/isa/inst/F/fsw.yaml +1 -1
  120. data/.data/spec/std/isa/inst/I/addi.yaml +1 -1
  121. data/.data/spec/std/isa/inst/I/addiw.yaml +1 -1
  122. data/.data/spec/std/isa/inst/I/andi.yaml +1 -1
  123. data/.data/spec/std/isa/inst/I/beq.yaml +1 -1
  124. data/.data/spec/std/isa/inst/I/bge.yaml +4 -2
  125. data/.data/spec/std/isa/inst/I/bgeu.yaml +3 -0
  126. data/.data/spec/std/isa/inst/I/blt.yaml +4 -2
  127. data/.data/spec/std/isa/inst/I/bltu.yaml +3 -0
  128. data/.data/spec/std/isa/inst/I/bne.yaml +1 -1
  129. data/.data/spec/std/isa/inst/I/slt.yaml +2 -2
  130. data/.data/spec/std/isa/inst/I/sltiu.yaml +1 -1
  131. data/.data/spec/std/isa/inst/I/sltu.yaml +1 -1
  132. data/.data/spec/std/isa/inst/I/sub.yaml +1 -1
  133. data/.data/spec/std/isa/inst/I/subw.yaml +1 -1
  134. data/.data/spec/std/isa/inst/I/xori.yaml +1 -1
  135. data/.data/spec/std/isa/inst/M/mul.yaml +0 -19
  136. data/.data/spec/std/isa/inst/Q/fsgnj.q.yaml +1 -1
  137. data/.data/spec/std/isa/inst/S/sret.yaml +3 -1
  138. data/.data/spec/std/isa/inst/V/vadd.vv.yaml +1 -5
  139. data/.data/spec/std/isa/inst/V/vfsgnjn.vv.yaml +3 -0
  140. data/.data/spec/std/isa/inst/V/vfsgnjx.vv.yaml +3 -0
  141. data/.data/spec/std/isa/inst/V/vl1re8.v.yaml +3 -0
  142. data/.data/spec/std/isa/inst/V/vl2re8.v.yaml +3 -0
  143. data/.data/spec/std/isa/inst/V/vl4re8.v.yaml +3 -0
  144. data/.data/spec/std/isa/inst/V/vl8re8.v.yaml +3 -0
  145. data/.data/spec/std/isa/inst/V/vle8.v.yaml +3 -8
  146. data/.data/spec/std/isa/inst/V/vmand.mm.yaml +3 -0
  147. data/.data/spec/std/isa/inst/V/vmfle.vv.yaml +3 -0
  148. data/.data/spec/std/isa/inst/V/vmflt.vv.yaml +3 -0
  149. data/.data/spec/std/isa/inst/V/vmnand.mm.yaml +3 -0
  150. data/.data/spec/std/isa/inst/V/vmsgt.vi.yaml +3 -0
  151. data/.data/spec/std/isa/inst/V/vmsgtu.vi.yaml +3 -0
  152. data/.data/spec/std/isa/inst/V/vmsle.vi.yaml +3 -0
  153. data/.data/spec/std/isa/inst/V/vmsle.vv.yaml +3 -0
  154. data/.data/spec/std/isa/inst/V/vmsleu.vi.yaml +3 -0
  155. data/.data/spec/std/isa/inst/V/vmsleu.vv.yaml +3 -0
  156. data/.data/spec/std/isa/inst/V/vmslt.vv.yaml +3 -0
  157. data/.data/spec/std/isa/inst/V/vmsltu.vv.yaml +3 -0
  158. data/.data/spec/std/isa/inst/V/vmv.v.i.yaml +2 -13
  159. data/.data/spec/std/isa/inst/V/vmv.x.s.yaml +1 -1
  160. data/.data/spec/std/isa/inst/V/vmxnor.mm.yaml +3 -0
  161. data/.data/spec/std/isa/inst/V/vmxor.mm.yaml +3 -0
  162. data/.data/spec/std/isa/inst/V/vnsrl.wx.yaml +3 -0
  163. data/.data/spec/std/isa/inst/V/vrsub.vx.yaml +3 -0
  164. data/.data/spec/std/isa/inst/V/vse8.v.yaml +3 -4
  165. data/.data/spec/std/isa/inst/V/vwadd.vx.yaml +3 -0
  166. data/.data/spec/std/isa/inst/V/vwaddu.vx.yaml +3 -0
  167. data/.data/spec/std/isa/inst/V/vxor.vi.yaml +4 -0
  168. data/.data/spec/std/isa/inst/Zalasr/lSIZE.AQRL.layout +40 -5
  169. data/.data/spec/std/isa/inst/Zalasr/lb.aq.yaml +17 -1
  170. data/.data/spec/std/isa/inst/Zalasr/lb.aqrl.yaml +17 -1
  171. data/.data/spec/std/isa/inst/Zalasr/ld.aq.yaml +17 -1
  172. data/.data/spec/std/isa/inst/Zalasr/ld.aqrl.yaml +17 -1
  173. data/.data/spec/std/isa/inst/Zalasr/lh.aq.yaml +17 -1
  174. data/.data/spec/std/isa/inst/Zalasr/lh.aqrl.yaml +17 -1
  175. data/.data/spec/std/isa/inst/Zalasr/lw.aq.yaml +17 -1
  176. data/.data/spec/std/isa/inst/Zalasr/lw.aqrl.yaml +17 -1
  177. data/.data/spec/std/isa/inst/Zalasr/sSIZE.AQRL.layout +46 -5
  178. data/.data/spec/std/isa/inst/Zalasr/sb.aqrl.yaml +16 -1
  179. data/.data/spec/std/isa/inst/Zalasr/sb.rl.yaml +16 -1
  180. data/.data/spec/std/isa/inst/Zalasr/sd.aqrl.yaml +16 -1
  181. data/.data/spec/std/isa/inst/Zalasr/sd.rl.yaml +16 -1
  182. data/.data/spec/std/isa/inst/Zalasr/sh.aqrl.yaml +16 -1
  183. data/.data/spec/std/isa/inst/Zalasr/sh.rl.yaml +16 -1
  184. data/.data/spec/std/isa/inst/Zalasr/sw.aqrl.yaml +16 -1
  185. data/.data/spec/std/isa/inst/Zalasr/sw.rl.yaml +16 -1
  186. data/.data/spec/std/isa/inst/Zbkb/packw.yaml +1 -1
  187. data/.data/spec/std/isa/inst/Zcd/c.fld.yaml +1 -1
  188. data/.data/spec/std/isa/inst/Zcd/c.fldsp.yaml +1 -1
  189. data/.data/spec/std/isa/inst/Zcd/c.fsdsp.yaml +1 -1
  190. data/.data/spec/std/isa/inst/Zcf/c.flwsp.yaml +1 -1
  191. data/.data/spec/std/isa/inst/Zcf/c.fswsp.yaml +1 -1
  192. data/.data/spec/std/isa/inst/Zcmp/cm.pop.yaml +1 -1
  193. data/.data/spec/std/isa/inst/Zcmp/cm.popret.yaml +1 -1
  194. data/.data/spec/std/isa/inst/Zcmp/cm.popretz.yaml +1 -1
  195. data/.data/spec/std/isa/inst/Zcmp/cm.push.yaml +2 -3
  196. data/.data/spec/std/isa/inst/Zfa/fround.s.yaml +1 -1
  197. data/.data/spec/std/isa/inst/Zfh/fcvt.h.s.yaml +6 -6
  198. data/.data/spec/std/isa/inst/Zfh/fcvt.s.h.yaml +5 -5
  199. data/.data/spec/std/isa/inst/Zfh/flh.yaml +1 -1
  200. data/.data/spec/std/isa/inst/Zfh/fmv.h.x.yaml +1 -1
  201. data/.data/spec/std/isa/inst/Zfh/fmv.x.h.yaml +1 -1
  202. data/.data/spec/std/isa/inst/Zfh/fsh.yaml +1 -1
  203. data/.data/spec/std/isa/inst/Zicsr/csrrc.yaml +1 -1
  204. data/.data/spec/std/isa/inst/Zicsr/csrrci.yaml +1 -1
  205. data/.data/spec/std/isa/inst/Zicsr/csrrs.yaml +2 -2
  206. data/.data/spec/std/isa/inst/Zicsr/csrrsi.yaml +1 -1
  207. data/.data/spec/std/isa/inst/Zicsr/csrrw.yaml +1 -1
  208. data/.data/spec/std/isa/inst/Zicsr/csrrwi.yaml +1 -1
  209. data/.data/spec/std/isa/isa/builtin_functions.idl +17 -0
  210. data/.data/spec/std/isa/isa/fp.idl +1 -5
  211. data/.data/spec/std/isa/isa/globals.isa +45 -14
  212. data/.data/spec/std/isa/isa/vec.idl +1 -2
  213. data/.data/spec/std/isa/manual_version/isa/20240411/isa_20240411.yaml +5 -5
  214. data/.data/spec/std/isa/param/COUNTINHIBIT_EN.yaml +8 -2
  215. data/.data/spec/std/isa/param/JVT_BASE_MASK.yaml +1 -1
  216. data/.data/spec/std/isa/param/MCOUNTINHIBIT_IMPLEMENTED.yaml +25 -0
  217. data/.data/spec/std/isa/param/MTVEC_MODES.yaml +10 -3
  218. data/.data/spec/std/isa/param/VLEN.yaml +2 -0
  219. data/.data/spec/std/isa/profile/RVA20S64.yaml +11 -4
  220. data/.data/spec/std/isa/profile/RVA20U64.yaml +14 -5
  221. data/.data/spec/std/isa/profile/RVA22S64.yaml +14 -3
  222. data/.data/spec/std/isa/profile/RVA22U64.yaml +8 -1
  223. data/.data/spec/std/isa/profile/RVA23S64.yaml +13 -0
  224. data/.data/spec/std/isa/profile/RVA23U64.yaml +15 -1
  225. data/.data/spec/std/isa/profile/RVB23S64.yaml +15 -3
  226. data/.data/spec/std/isa/profile/RVB23U64.yaml +8 -1
  227. data/.data/spec/std/isa/profile/RVI20U32.yaml +8 -1
  228. data/.data/spec/std/isa/profile/RVI20U64.yaml +7 -0
  229. data/.data/spec/std/isa/register_file/F.yaml +3 -2
  230. data/.data/spec/std/isa/register_file/V.yaml +2 -2
  231. data/.data/spec/std/isa/register_file/X.yaml +2 -1
  232. data/lib/udb/architecture.rb +4 -25
  233. data/lib/udb/cfg_arch.rb +171 -59
  234. data/lib/udb/cli.rb +10 -1
  235. data/lib/udb/condition.rb +38 -37
  236. data/lib/udb/config.rb +72 -6
  237. data/lib/udb/logic.rb +29 -56
  238. data/lib/udb/obj/csr.rb +23 -5
  239. data/lib/udb/obj/csr_field.rb +36 -21
  240. data/lib/udb/obj/database_obj.rb +2 -5
  241. data/lib/udb/obj/extension.rb +0 -3
  242. data/lib/udb/obj/instruction.rb +1 -4
  243. data/lib/udb/obj/portfolio.rb +75 -20
  244. data/lib/udb/obj/profile.rb +0 -4
  245. data/lib/udb/obj/register_file.rb +63 -2
  246. data/lib/udb/portfolio_design.rb +3 -6
  247. data/lib/udb/resolver.rb +84 -23
  248. data/lib/udb/version.rb +1 -1
  249. data/lib/udb/version_spec.rb +8 -0
  250. data/lib/udb/z3.rb +23 -0
  251. data/lib/udb.rb +0 -3
  252. metadata +25 -37
  253. data/.data/cfgs/profile/RVA23M64.yaml +0 -159
  254. data/.data/cfgs/profile/RVB23M64.yaml +0 -149
  255. data/.data/spec/schemas/proc_cert_class_schema.json +0 -35
  256. data/.data/spec/schemas/proc_cert_model_schema.json +0 -336
  257. data/.data/spec/std/isa/proc_cert_class/AC.yaml +0 -13
  258. data/.data/spec/std/isa/proc_cert_class/MC.yaml +0 -13
  259. data/.data/spec/std/isa/proc_cert_class/RVI.yaml +0 -16
  260. data/.data/spec/std/isa/proc_cert_model/AC100.yaml +0 -72
  261. data/.data/spec/std/isa/proc_cert_model/AC200.yaml +0 -58
  262. data/.data/spec/std/isa/proc_cert_model/MC100-32.yaml +0 -155
  263. data/.data/spec/std/isa/proc_cert_model/MC100-64.yaml +0 -21
  264. data/.data/spec/std/isa/proc_cert_model/MC200-32.yaml +0 -60
  265. data/.data/spec/std/isa/proc_cert_model/MC200-64.yaml +0 -21
  266. data/.data/spec/std/isa/proc_cert_model/MC300-32.yaml +0 -40
  267. data/.data/spec/std/isa/proc_cert_model/MC300-64.yaml +0 -21
  268. data/.data/spec/std/isa/proc_cert_model/RVI20-32.yaml +0 -39
  269. data/.data/spec/std/isa/proc_cert_model/RVI20-64.yaml +0 -19
  270. data/.data/spec/std/isa/profile/RVA23M64.yaml +0 -24
  271. data/.data/spec/std/isa/profile/RVB23M64.yaml +0 -86
  272. data/lib/udb/cert_normative_rule.rb +0 -41
  273. data/lib/udb/obj/certifiable_obj.rb +0 -21
  274. data/lib/udb/obj/certificate.rb +0 -230
  275. data/lib/udb/proc_cert_design.rb +0 -77
@@ -38,7 +38,7 @@ extensions:
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  Svbare is a new extension name introduced with RVA20.
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  Sv39:
40
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  presence: mandatory
41
- version: "~> 1.11"
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+ version: "~> 1.0"
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  Svade:
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  presence: mandatory
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  version: "~> 1.0"
@@ -64,7 +64,7 @@ extensions:
64
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  Sstvala is a new extension name introduced with RVA20.
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  Sv48:
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  presence: optional
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- version: "~> 1.11"
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+ version: "~> 1.0"
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  Ssu64xl:
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  presence: optional
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  version: "~> 1.0"
@@ -72,5 +72,12 @@ extensions:
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  Ssu64xl is a new extension name introduced with RVA20.
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  requirements:
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  param:
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- name: U_MODE_ENDIANNESS
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- equal: little
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+ allOf:
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+ - name: U_MODE_ENDIANNESS
77
+ equal: little
78
+ - name: S_MODE_ENDIANNESS
79
+ equal: little
80
+ - name: SXLEN
81
+ includes: 64
82
+ - name: UXLEN
83
+ includes: 64
@@ -8,7 +8,7 @@ kind: profile
8
8
  name: RVA20U64
9
9
  long_name: U-mode extensions for version 20 of the 64-bit Apps Processor profile
10
10
  marketing_name: RVA20U64
11
- mode: Unpriv
11
+ mode: U
12
12
  base: 64
13
13
  release: { $ref: profile_release/RVA20.yaml# }
14
14
  introduction: |
@@ -21,21 +21,26 @@ extensions:
21
21
  $remove: Zifencei # Not allowed as an option for Unpriv ISA (only available in Priv ISA).
22
22
  A:
23
23
  presence: mandatory
24
+ version: ~> 2.1
24
25
  C:
25
26
  presence: mandatory
27
+ version: ~> 2.0
26
28
  D:
27
29
  presence: mandatory
30
+ version: ~> 2.2.0
28
31
  F:
29
32
  presence: mandatory
33
+ version: ~> 2.2.0
30
34
  M:
31
35
  presence: mandatory
36
+ version: ~> 2.0
32
37
  U:
33
38
  presence: mandatory
34
39
  version: "~> 1.0"
35
- Zicsr:
40
+ Zicntr:
36
41
  presence: mandatory
37
42
  version: "~> 2.0"
38
- Zicntr:
43
+ Zicsr:
39
44
  presence: mandatory
40
45
  version: "~> 2.0"
41
46
  Ziccif:
@@ -102,7 +107,11 @@ recommendations:
102
107
  - text: |
103
108
  Implementations are strongly recommended to raise illegal-instruction
104
109
  exceptions on attempts to execute unimplemented opcodes.
110
+
105
111
  requirements:
106
112
  param:
107
- name: U_MODE_ENDIANNESS
108
- equal: little
113
+ allOf:
114
+ - name: U_MODE_ENDIANNESS
115
+ equal: little
116
+ - name: UXLEN
117
+ includes: 64
@@ -36,13 +36,13 @@ extensions:
36
36
  version: "~> 1.0"
37
37
  Sv39:
38
38
  presence: mandatory
39
- version: "~> 1.12"
39
+ version: "~> 1.0"
40
40
  Sv48:
41
41
  presence: optional
42
- version: "~> 1.12"
42
+ version: "~> 1.0"
43
43
  Sv57:
44
44
  presence: optional
45
- version: "~> 1.12"
45
+ version: "~> 1.0"
46
46
  Svnapot:
47
47
  presence: optional
48
48
  version: "~> 1.0"
@@ -78,3 +78,14 @@ extensions:
78
78
  The Sha extension name was introduced in RVA23/RVB23 and wasn't
79
79
  in the ratified RVA22 profile but has since been added retroactively
80
80
  as a documentation-only change (doesn't affect requirements or functionality).
81
+ requirements:
82
+ param:
83
+ allOf:
84
+ - name: U_MODE_ENDIANNESS
85
+ equal: little
86
+ - name: S_MODE_ENDIANNESS
87
+ equal: little
88
+ - name: SXLEN
89
+ includes: 64
90
+ - name: UXLEN
91
+ includes: 64
@@ -8,7 +8,7 @@ kind: profile
8
8
  name: RVA22U64
9
9
  long_name: U-mode extensions for version 22 of the 64-bit Apps Processor profile
10
10
  marketing_name: RVA22U64
11
- mode: Unpriv
11
+ mode: U
12
12
  base: 64
13
13
  release: { $ref: profile_release/RVA22.yaml# }
14
14
  introduction: |
@@ -138,3 +138,10 @@ extra_notes:
138
138
  text: |
139
139
  The Zfinx, Zdinx, Zhinx, Zhinxmin extensions are incompatible
140
140
  with the profile mandates to support the F and D extensions.
141
+ requirements:
142
+ param:
143
+ allOf:
144
+ - name: U_MODE_ENDIANNESS
145
+ equal: little
146
+ - name: UXLEN
147
+ includes: 64
@@ -48,8 +48,21 @@ extensions:
48
48
 
49
49
  Ssnpm:
50
50
  presence: mandatory
51
+ version: ~> 1.0
51
52
  # Pointer masking, with *senvcfg*.PME supporting, at minimum
52
53
 
53
54
  Sha:
54
55
  presence: mandatory
56
+ version: ~> 1.0
55
57
  # collection of Hypervisor extensions
58
+ requirements:
59
+ param:
60
+ allOf:
61
+ - name: U_MODE_ENDIANNESS
62
+ equal: little
63
+ - name: S_MODE_ENDIANNESS
64
+ equal: little
65
+ - name: SXLEN
66
+ includes: 64
67
+ - name: UXLEN
68
+ includes: 64
@@ -8,7 +8,7 @@ kind: profile
8
8
  name: RVA23U64
9
9
  long_name: U-mode extensions for version 23 of the 64-bit Apps Processor profile
10
10
  marketing_name: RVA23U64
11
- mode: Unpriv
11
+ mode: U
12
12
  base: 64
13
13
  release: { $ref: profile_release/RVA23.yaml# }
14
14
  introduction: |
@@ -34,21 +34,27 @@ extensions:
34
34
 
35
35
  Zfhmin:
36
36
  presence: mandatory
37
+ version: ~> 1.0
37
38
 
38
39
  V:
39
40
  presence: mandatory
41
+ version: ~> 1.0
40
42
 
41
43
  Zvfhmin:
42
44
  presence: mandatory
45
+ version: ~> 1.0
43
46
 
44
47
  Zvbb:
45
48
  presence: mandatory
49
+ version: ~> 1.0
46
50
 
47
51
  Zvkt:
48
52
  presence: mandatory
53
+ version: ~> 1.0
49
54
 
50
55
  Supm:
51
56
  presence: mandatory
57
+ version: ~> 1.0
52
58
 
53
59
  #--------------------------------------------
54
60
  # Zvbc is an expansion option in RVB23U64
@@ -60,6 +66,7 @@ extensions:
60
66
  Zvbc:
61
67
  presence:
62
68
  optional: development
69
+ version: ~> 1.0
63
70
 
64
71
  #########################################################################
65
72
  # TRANSITORY EXPANSION extensions in RVA23U64
@@ -68,3 +75,10 @@ extensions:
68
75
  #--------------------------------------------
69
76
  # (there are no Transitory expansion options in RVA23U64)
70
77
  #--------------------------------------------
78
+ requirements:
79
+ param:
80
+ allOf:
81
+ - name: U_MODE_ENDIANNESS
82
+ equal: little
83
+ - name: UXLEN
84
+ includes: 64
@@ -52,7 +52,7 @@ extensions:
52
52
  #########################################################################
53
53
  Zifencei:
54
54
  presence: mandatory
55
- version: "~>1.0"
55
+ version: "~>2.0"
56
56
  note: |
57
57
  Instruction-Fetch fence instruction.
58
58
 
@@ -190,6 +190,7 @@ extensions:
190
190
  Sha:
191
191
  presence:
192
192
  optional: expansion
193
+ version: ~> 1.0
193
194
  note: |
194
195
  The set of augmented hypervisor extensions: H, Ssstateen,
195
196
  Shcounterenw, Shvstvala, Shtvala, Shvstvecd, Shvsatpa, Shgatpa
@@ -215,14 +216,14 @@ extensions:
215
216
  Sv48:
216
217
  presence:
217
218
  optional: expansion
218
- version: "~>1.13"
219
+ version: "~>1.0"
219
220
  note: |
220
221
  Page-based 48-bit virtual-memory system
221
222
 
222
223
  Sv57:
223
224
  presence:
224
225
  optional: expansion
225
- version: "~>1.13"
226
+ version: "~>1.0"
226
227
  note: |
227
228
  Page-based 57-bit virtual-memory system
228
229
 
@@ -297,3 +298,14 @@ recommendations:
297
298
  - text: |
298
299
  Implementations are strongly recommended to raise illegal-instruction
299
300
  exceptions on attempts to execute unimplemented opcodes.
301
+ requirements:
302
+ param:
303
+ allOf:
304
+ - name: U_MODE_ENDIANNESS
305
+ equal: little
306
+ - name: S_MODE_ENDIANNESS
307
+ equal: little
308
+ - name: SXLEN
309
+ includes: 64
310
+ - name: UXLEN
311
+ includes: 64
@@ -8,7 +8,7 @@ kind: profile
8
8
  name: RVB23U64
9
9
  long_name: U-mode extensions for version 23 of the 64-bit Bespoke Apps Processor profile
10
10
  marketing_name: RVB23U64
11
- mode: Unpriv
11
+ mode: U
12
12
  base: 64
13
13
  release: { $ref: profile_release/RVB23.yaml# }
14
14
  introduction: |
@@ -271,3 +271,10 @@ extensions:
271
271
  #--------------------------------------------
272
272
  # (there are no Transitory expansion options in RVB23)
273
273
  #--------------------------------------------
274
+ requirements:
275
+ param:
276
+ allOf:
277
+ - name: U_MODE_ENDIANNESS
278
+ equal: little
279
+ - name: UXLEN
280
+ includes: 64
@@ -8,7 +8,7 @@ kind: profile
8
8
  name: RVI20U32
9
9
  long_name: U-mode extensions for version 20 of a 32-bit processor
10
10
  marketing_name: RVI20U32
11
- mode: Unpriv
11
+ mode: U
12
12
  base: 32
13
13
  release: { $ref: profile_release/RVI20.yaml# }
14
14
  introduction: |
@@ -81,3 +81,10 @@ recommendations:
81
81
  - text: |
82
82
  Implementations are strongly recommended to raise illegal-instruction
83
83
  exceptions on attempts to execute unimplemented opcodes.
84
+ requirements:
85
+ param:
86
+ allOf:
87
+ - name: U_MODE_ENDIANNESS
88
+ equal: little
89
+ - name: UXLEN
90
+ includes: 32
@@ -10,3 +10,10 @@ long_name: U-mode extensions for version 20 of a 64-bit processor
10
10
  $inherits: "profile/RVI20U32.yaml#"
11
11
  base: 64
12
12
  marketing_name: RVI20U64
13
+ requirements:
14
+ param:
15
+ allOf:
16
+ - name: U_MODE_ENDIANNESS
17
+ equal: little
18
+ - name: UXLEN
19
+ includes: 64
@@ -1,7 +1,7 @@
1
1
  # Copyright (c) Animesh Agarwal
2
2
  # SPDX-License-Identifier: BSD-3-Clause-Clear
3
3
 
4
- # yaml-language-server: $schema=../../../../schemas/register_file_schema.json
4
+ # yaml-language-server: $schema=../../../schemas/register_file_schema.json
5
5
 
6
6
  $schema: register_file_schema.json#
7
7
  kind: register_file
@@ -13,7 +13,8 @@ description: |
13
13
  participates in the standard calling convention defined by the RISC-V ABI spec.
14
14
  definedBy: F
15
15
  register_class: floating_point
16
- register_length: FLEN
16
+ register_length(): |
17
+ return implemented?(ExtensionName::Q) ? 128 : (implemented?(ExtensionName::D) ? 64 : 32);
17
18
  registers:
18
19
  - name: f0
19
20
  abi_mnemonics: [ft0]
@@ -1,7 +1,7 @@
1
1
  # Copyright (c) Animesh Agarwal
2
2
  # SPDX-License-Identifier: BSD-3-Clause-Clear
3
3
 
4
- # yaml-language-server: $schema=../../../../schemas/register_file_schema.json
4
+ # yaml-language-server: $schema=../../../schemas/register_file_schema.json
5
5
 
6
6
  $schema: register_file_schema.json#
7
7
  kind: register_file
@@ -14,7 +14,7 @@ description: |
14
14
  participate in argument passing or return values.
15
15
  definedBy: V
16
16
  register_class: vector
17
- register_length: VLEN
17
+ register_length(): return VLEN;
18
18
  registers:
19
19
  - name: v0
20
20
  caller_saved: true
@@ -14,11 +14,12 @@ description: |
14
14
  visible integer state used by the calling convention and execution environment.
15
15
  definedBy: I
16
16
  register_class: general_purpose
17
- register_length: MXLEN
17
+ register_length(): return MXLEN;
18
18
  registers:
19
19
  - name: x0
20
20
  abi_mnemonics: [zero]
21
21
  roles: [zero]
22
+ reset_value: "0"
22
23
  description: |
23
24
  Register x0 is hardwired with all bits equal to 0.
24
25
  arch_read(): |
@@ -6,7 +6,7 @@
6
6
 
7
7
  # The Architecture class is the API to the architecture database.
8
8
  # The "database" contains RISC-V standards including extensions, instructions,
9
- # CSRs, Profiles, and Certificates.
9
+ # CSRs, and Profiles.
10
10
  # The Architecture class is used by backends to export the information in the
11
11
  # architecture database to create various outputs.
12
12
  #
@@ -21,8 +21,6 @@
21
21
  # Instruction instructions() instruction_hash() instruction(name)
22
22
  # Csr csrs() csr_hash() csr(name)
23
23
  # Mmr mmrs() mmr_hash() mmr(name)
24
- # ProcCertClass proc_cert_classes() proc_cert_class_hash() proc_cert_class(name)
25
- # ProcCertModel proc_cert_models() proc_cert_model_hash() proc_cert_model(name)
26
24
  # ProfileFamily profile_families() profile_family_hash() profile_family(name)
27
25
  # ProfileRelease profile_releases() profile_release_hash() profile_release(name)
28
26
  # Profile profiles() profile_hash() profile(name)
@@ -48,7 +46,6 @@ require "pathname"
48
46
  require "sorbet-runtime"
49
47
  require "yaml"
50
48
 
51
- require_relative "obj/certificate"
52
49
  require_relative "obj/csr"
53
50
  require_relative "obj/csr_field"
54
51
  require_relative "obj/register_file"
@@ -128,7 +125,7 @@ module Udb
128
125
  },
129
126
  {
130
127
  fn_name: "register_file",
131
- arch_dir: "register",
128
+ arch_dir: "register_file",
132
129
  klass: RegisterFile,
133
130
  kind: DatabaseObject::Kind::RegisterFile
134
131
  },
@@ -156,18 +153,6 @@ module Udb
156
153
  klass: InterruptCode,
157
154
  kind: DatabaseObject::Kind::InterruptCode
158
155
  },
159
- {
160
- fn_name: "proc_cert_class",
161
- arch_dir: "proc_cert_class",
162
- klass: ProcCertClass,
163
- kind: DatabaseObject::Kind::ProcessorCertificateClass
164
- },
165
- {
166
- fn_name: "proc_cert_model",
167
- arch_dir: "proc_cert_model",
168
- klass: ProcCertModel,
169
- kind: DatabaseObject::Kind::ProcessorCertificateModel
170
- },
171
156
  {
172
157
  fn_name: "manual",
173
158
  arch_dir: "manual",
@@ -229,7 +214,7 @@ module Udb
229
214
  def portfolio_classes
230
215
  return @portfolio_classes unless @portfolio_classes.nil?
231
216
 
232
- @portfolio_classes = profile_families.concat(proc_cert_classes).sort_by!(&:name).freeze
217
+ @portfolio_classes = profile_families.sort_by!(&:name).freeze
233
218
  end
234
219
 
235
220
  # @return Hash of all portfolio classes defined in the architecture
@@ -252,7 +237,7 @@ module Udb
252
237
  def portfolios
253
238
  return @portfolios unless @portfolios.nil?
254
239
 
255
- @portfolios = @profiles.concat(@certificates).sort_by!(&:name)
240
+ @portfolios = profiles.sort_by!(&:name)
256
241
  end
257
242
 
258
243
  # @return [Hash<String, Portfolio>] Hash of all portfolios defined in the architecture
@@ -285,12 +270,6 @@ module Udb
285
270
  obj = T.let(nil, T.untyped)
286
271
  obj =
287
272
  case file_path
288
- when /^proc_cert_class.*/
289
- proc_cert_class_name = File.basename(file_path, ".yaml")
290
- proc_cert_class(proc_cert_class_name)
291
- when /^proc_cert_model.*/
292
- proc_cert_model_name = File.basename(file_path, ".yaml")
293
- proc_cert_model(proc_cert_model_name)
294
273
  when /^csr.*/
295
274
  csr_name = File.basename(file_path, ".yaml")
296
275
  csr(csr_name)