udb 0.1.15 → 0.1.17
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- checksums.yaml +4 -4
- data/.data/cfgs/example_rv64_with_overlay.yaml +21 -0
- data/.data/cfgs/mc100-32-full-example.yaml +7 -0
- data/.data/cfgs/profile/RVA20S64.yaml +2 -0
- data/.data/cfgs/profile/RVA20U64.yaml +2 -0
- data/.data/cfgs/profile/RVA22S64.yaml +2 -0
- data/.data/cfgs/profile/RVA22U64.yaml +2 -0
- data/.data/cfgs/profile/RVA23S64.yaml +2 -0
- data/.data/cfgs/profile/RVA23U64.yaml +2 -0
- data/.data/cfgs/profile/RVB23S64.yaml +2 -0
- data/.data/cfgs/profile/RVB23U64.yaml +2 -0
- data/.data/cfgs/qc_iu.yaml +15 -0
- data/.data/cfgs/rv32-riscv-tests.yaml +10 -0
- data/.data/cfgs/rv32-vector.yaml +11 -1
- data/.data/cfgs/rv64-riscv-tests.yaml +10 -0
- data/.data/cfgs/rv64-vector.yaml +12 -2
- data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.mva01s.yaml +2 -2
- data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.mvsa01.yaml +2 -2
- data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.pop.yaml +2 -2
- data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.popret.yaml +2 -2
- data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.popretz.yaml +2 -2
- data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.push.yaml +2 -2
- data/.data/spec/custom/isa/qc_iu/inst/Xqccmp/qc.cm.pushfp.yaml +2 -2
- data/.data/spec/schemas/README.adoc +4 -1
- data/.data/spec/schemas/csr_schema.json +2 -2
- data/.data/spec/std/isa/csr/H/henvcfg.yaml +1 -1
- data/.data/spec/std/isa/csr/H/hgeie.yaml +38 -0
- data/.data/spec/std/isa/csr/H/hgeip.yaml +33 -0
- data/.data/spec/std/isa/csr/H/hideleg.yaml +120 -0
- data/.data/spec/std/isa/csr/H/hie.yaml +74 -0
- data/.data/spec/std/isa/csr/H/hip.yaml +88 -0
- data/.data/spec/std/isa/csr/H/htimedeltah.yaml +1 -1
- data/.data/spec/std/isa/csr/H/hvip.yaml +46 -0
- data/.data/spec/std/isa/csr/H/vsie.yaml +86 -0
- data/.data/spec/std/isa/csr/H/vsip.yaml +98 -0
- data/.data/spec/std/isa/csr/H/vsscratch.yaml +29 -0
- data/.data/spec/std/isa/csr/I/pmpaddr0.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr1.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr10.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr11.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr12.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr13.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr14.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr15.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr16.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr17.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr18.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr19.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr2.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr20.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr21.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr22.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr23.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr24.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr25.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr26.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr27.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr28.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr29.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr3.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr30.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr31.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr32.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr33.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr34.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr35.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr36.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr37.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr38.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr39.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr4.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr40.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr41.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr42.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr43.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr44.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr45.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr46.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr47.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr48.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr49.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr5.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr50.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr51.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr52.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr53.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr54.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr55.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr56.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr57.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr58.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr59.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr6.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr60.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr61.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr62.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr63.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr7.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr8.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddr9.yaml +7 -7
- data/.data/spec/std/isa/csr/I/pmpaddrN.layout +7 -7
- data/.data/spec/std/isa/csr/Smcsrind/mireg.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/mireg2.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/mireg3.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/mireg4.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/mireg5.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/mireg6.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/sireg.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/sireg2.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/sireg3.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/sireg4.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/sireg5.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/sireg6.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/vsireg.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/vsireg2.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/vsireg3.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/vsireg4.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/vsireg5.yaml +2 -2
- data/.data/spec/std/isa/csr/Smcsrind/vsireg6.yaml +2 -2
- data/.data/spec/std/isa/csr/Smctr/sctrctl.yaml +1 -1
- data/.data/spec/std/isa/csr/Smctr/sctrdepth.yaml +43 -0
- data/.data/spec/std/isa/csr/Smctr/sctrstatus.yaml +37 -0
- data/.data/spec/std/isa/csr/Smctr/vsctrctl.yaml +4 -2
- data/.data/spec/std/isa/csr/Sstc/stimecmp.yaml +42 -0
- data/.data/spec/std/isa/csr/Sstc/stimecmph.yaml +43 -0
- data/.data/spec/std/isa/csr/Sstc/vstimecmp.yaml +45 -0
- data/.data/spec/std/isa/csr/Sstc/vstimecmph.yaml +46 -0
- data/.data/spec/std/isa/csr/V/vcsr.yaml +1 -1
- data/.data/spec/std/isa/csr/V/vl.yaml +1 -1
- data/.data/spec/std/isa/csr/V/vlenb.yaml +1 -1
- data/.data/spec/std/isa/csr/V/vstart.yaml +1 -1
- data/.data/spec/std/isa/csr/V/vtype.yaml +20 -1
- data/.data/spec/std/isa/csr/V/vxrm.yaml +1 -1
- data/.data/spec/std/isa/csr/V/vxsat.yaml +1 -1
- data/.data/spec/std/isa/csr/Zicntr/mcountinhibit.layout +1 -15
- data/.data/spec/std/isa/csr/Zicntr/mcountinhibit.yaml +29 -267
- data/.data/spec/std/isa/csr/hstateen0h.yaml +1 -1
- data/.data/spec/std/isa/csr/hstateen1h.yaml +1 -1
- data/.data/spec/std/isa/csr/hstateen2h.yaml +1 -1
- data/.data/spec/std/isa/csr/hstateen3h.yaml +1 -1
- data/.data/spec/std/isa/csr/instreth.yaml +1 -3
- data/.data/spec/std/isa/csr/mideleg.yaml +57 -9
- data/.data/spec/std/isa/csr/mie.yaml +18 -9
- data/.data/spec/std/isa/csr/minstreth.yaml +1 -1
- data/.data/spec/std/isa/csr/mip.yaml +21 -10
- data/.data/spec/std/isa/csr/misa.yaml +11 -7
- data/.data/spec/std/isa/csr/mstatus.yaml +3 -3
- data/.data/spec/std/isa/csr/mstatush.yaml +1 -1
- data/.data/spec/std/isa/csr/schema.adoc +10 -4
- data/.data/spec/std/isa/csr/senvcfg.yaml +7 -13
- data/.data/spec/std/isa/csr/sepc.yaml +4 -3
- data/.data/spec/std/isa/csr/sip.yaml +1 -1
- data/.data/spec/std/isa/csr/sscratch.yaml +3 -2
- data/.data/spec/std/isa/csr/sstateen0.yaml +1 -1
- data/.data/spec/std/isa/csr/sstateen1.yaml +2 -3
- data/.data/spec/std/isa/csr/sstateen2.yaml +2 -3
- data/.data/spec/std/isa/csr/sstateen3.yaml +2 -3
- data/.data/spec/std/isa/csr/stval.yaml +3 -2
- data/.data/spec/std/isa/csr/stvec.yaml +5 -4
- data/.data/spec/std/isa/csr/tcontrol.yaml +37 -0
- data/.data/spec/std/isa/csr/time.yaml +1 -1
- data/.data/spec/std/isa/csr/timeh.yaml +1 -1
- data/.data/spec/std/isa/csr/tinfo.yaml +44 -0
- data/.data/spec/std/isa/csr/vsepc.yaml +6 -5
- data/.data/spec/std/isa/csr/vstvec.yaml +5 -4
- data/.data/spec/std/isa/ext/M.yaml +4 -0
- data/.data/spec/std/isa/ext/Shgatpa.yaml +1 -0
- data/.data/spec/std/isa/ext/Smctr.yaml +1 -1
- data/.data/spec/std/isa/ext/Ssctr.yaml +1 -1
- data/.data/spec/std/isa/ext/Ssstrict.yaml +2 -2
- data/.data/spec/std/isa/ext/Sv32.yaml +2 -2
- data/.data/spec/std/isa/ext/Svpbmt.yaml +2 -2
- data/.data/spec/std/isa/ext/Zaamo.yaml +1 -1
- data/.data/spec/std/isa/ext/Zbc.yaml +4 -0
- data/.data/spec/std/isa/ext/Zibi.yaml +29 -0
- data/.data/spec/std/isa/ext/Zvfbfa.yaml +24 -0
- data/.data/spec/std/isa/ext/Zvfofp4min.yaml +21 -0
- data/.data/spec/std/isa/ext/Zvfofp8min.yaml +20 -0
- data/.data/spec/std/isa/inst/B/andn.yaml +0 -4
- data/.data/spec/std/isa/inst/B/orn.yaml +0 -4
- data/.data/spec/std/isa/inst/B/rev8.yaml +0 -4
- data/.data/spec/std/isa/inst/B/rol.yaml +0 -4
- data/.data/spec/std/isa/inst/B/rolw.yaml +0 -4
- data/.data/spec/std/isa/inst/B/ror.yaml +0 -4
- data/.data/spec/std/isa/inst/B/rori.yaml +0 -4
- data/.data/spec/std/isa/inst/B/roriw.yaml +1 -5
- data/.data/spec/std/isa/inst/B/rorw.yaml +1 -5
- data/.data/spec/std/isa/inst/B/xnor.yaml +0 -4
- data/.data/spec/std/isa/inst/C/c.addi.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.addi16sp.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.addi4spn.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.addiw.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.beqz.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.bnez.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.ebreak.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.j.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.jal.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.jalr.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.jr.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.ld.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.ldsp.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.li.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.lui.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.lw.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.lwsp.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.mv.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.nop.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.sd.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.sdsp.yaml +5 -5
- data/.data/spec/std/isa/inst/C/c.sw.yaml +2 -2
- data/.data/spec/std/isa/inst/C/c.swsp.yaml +2 -2
- data/.data/spec/std/isa/inst/F/fmv.w.x.yaml +3 -0
- data/.data/spec/std/isa/inst/F/fmv.x.w.yaml +3 -0
- data/.data/spec/std/isa/inst/I/ld.yaml +9 -4
- data/.data/spec/std/isa/inst/I/sd.yaml +9 -4
- data/.data/spec/std/isa/inst/I/wfi.yaml +1 -1
- data/.data/spec/std/isa/inst/M/div.yaml +2 -2
- data/.data/spec/std/isa/inst/M/divu.yaml +2 -2
- data/.data/spec/std/isa/inst/M/divuw.yaml +2 -2
- data/.data/spec/std/isa/inst/M/divw.yaml +2 -2
- data/.data/spec/std/isa/inst/M/mul.yaml +1 -7
- data/.data/spec/std/isa/inst/M/mulh.yaml +1 -7
- data/.data/spec/std/isa/inst/M/mulhsu.yaml +1 -7
- data/.data/spec/std/isa/inst/M/mulhu.yaml +1 -7
- data/.data/spec/std/isa/inst/M/mulw.yaml +1 -7
- data/.data/spec/std/isa/inst/M/rem.yaml +2 -2
- data/.data/spec/std/isa/inst/M/remu.yaml +2 -2
- data/.data/spec/std/isa/inst/M/remuw.yaml +2 -2
- data/.data/spec/std/isa/inst/M/remw.yaml +2 -2
- data/.data/spec/std/isa/inst/V/vfadd.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfadd.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfclass.v.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmacc.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmacc.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmadd.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmadd.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmax.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmax.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmerge.vfm.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmin.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmin.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmsac.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmsac.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmsub.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmsub.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmul.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmul.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmv.f.s.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmv.s.f.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfmv.v.f.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfncvt.f.f.w.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfncvt.rod.f.f.w.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfncvt.rtz.x.f.w.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfncvt.rtz.xu.f.w.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfncvt.x.f.w.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfncvt.xu.f.w.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfnmacc.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfnmacc.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfnmadd.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfnmadd.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfnmsac.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfnmsac.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfnmsub.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfnmsub.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfrec7.v.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfrsqrt7.v.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfrsub.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfsgnj.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfsgnj.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfsgnjn.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfsgnjn.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfsgnjx.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfsgnjx.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfslide1down.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfslide1up.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfsub.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfsub.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwadd.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwadd.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwadd.wf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwadd.wv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwcvt.f.f.v.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwcvt.f.x.v.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwcvt.f.xu.v.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwmacc.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwmacc.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwmsac.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwmsac.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwmul.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwmul.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwnmacc.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwnmacc.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwnmsac.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwnmsac.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwsub.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwsub.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwsub.wf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vfwsub.wv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vmfeq.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vmfeq.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vmfge.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vmfgt.vf.yaml +3 -1
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- data/.data/spec/std/isa/inst/V/vmfle.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vmflt.vf.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vmflt.vv.yaml +3 -1
- data/.data/spec/std/isa/inst/V/vmfne.vf.yaml +3 -1
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- data/.data/spec/std/isa/inst/Zaamo/amomax.w.rl.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zaamo/amomaxu.w.rl.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zaamo/amomin.w.rl.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zaamo/amominu.d.rl.yaml +0 -4
- data/.data/spec/std/isa/inst/Zaamo/amominu.d.yaml +0 -4
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- data/.data/spec/std/isa/inst/Zaamo/amominu.w.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zaamo/amominu.w.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zaamo/amoor.d.aqrl.yaml +0 -4
- data/.data/spec/std/isa/inst/Zaamo/amoor.d.rl.yaml +0 -4
- data/.data/spec/std/isa/inst/Zaamo/amoor.d.yaml +0 -4
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- data/.data/spec/std/isa/inst/Zaamo/amoor.w.aqrl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zaamo/amoor.w.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zaamo/amoor.w.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zaamo/amoswap.d.aqrl.yaml +0 -4
- data/.data/spec/std/isa/inst/Zaamo/amoswap.d.rl.yaml +0 -4
- data/.data/spec/std/isa/inst/Zaamo/amoswap.d.yaml +0 -4
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- data/.data/spec/std/isa/inst/Zaamo/amoswap.w.aqrl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zaamo/amoswap.w.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zaamo/amoswap.w.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zaamo/amoxor.d.aqrl.yaml +0 -4
- data/.data/spec/std/isa/inst/Zaamo/amoxor.d.rl.yaml +0 -4
- data/.data/spec/std/isa/inst/Zaamo/amoxor.d.yaml +0 -4
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- data/.data/spec/std/isa/inst/Zaamo/amoxor.w.aqrl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zaamo/amoxor.w.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zaamo/amoxor.w.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zabha/amoadd.b.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amoadd.b.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zabha/amoadd.h.aqrl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amoadd.h.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amoadd.h.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amoand.b.aq.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zabha/amoand.b.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amoand.b.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zabha/amoand.h.rl.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zabha/amomax.b.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amomax.b.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zabha/amomax.h.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amomax.h.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amomaxu.b.aq.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zabha/amomaxu.b.rl.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zabha/amomaxu.h.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amomaxu.h.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zabha/amomin.b.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amomin.b.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zabha/amomin.h.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amomin.h.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zabha/amominu.b.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amominu.b.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zabha/amominu.h.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amominu.h.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amoor.b.aq.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amoor.b.aqrl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amoor.b.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amoor.b.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zabha/amoor.h.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amoor.h.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amoswap.b.aq.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amoswap.b.aqrl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amoswap.b.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amoswap.b.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zabha/amoswap.h.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amoswap.h.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zabha/amoxor.b.rl.yaml +1 -5
- data/.data/spec/std/isa/inst/Zabha/amoxor.b.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zabha/amoxor.h.rl.yaml +1 -5
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- data/.data/spec/std/isa/inst/Zalrsc/lr.d.aqrl.yaml +0 -6
- data/.data/spec/std/isa/inst/Zalrsc/lr.d.rl.yaml +0 -6
- data/.data/spec/std/isa/inst/Zalrsc/lr.d.yaml +0 -6
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- data/.data/spec/std/isa/inst/Zalrsc/lr.w.aqrl.yaml +1 -11
- data/.data/spec/std/isa/inst/Zalrsc/lr.w.rl.yaml +1 -11
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- data/.data/spec/std/isa/inst/Zalrsc/sc.d.aqrl.yaml +4 -10
- data/.data/spec/std/isa/inst/Zalrsc/sc.d.rl.yaml +4 -10
- data/.data/spec/std/isa/inst/Zalrsc/sc.d.yaml +4 -10
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- data/.data/spec/std/isa/inst/Zalrsc/sc.w.rl.yaml +4 -10
- data/.data/spec/std/isa/inst/Zalrsc/sc.w.yaml +4 -10
- data/.data/spec/std/isa/inst/Zba/add.uw.yaml +0 -4
- data/.data/spec/std/isa/inst/Zba/sh1add.uw.yaml +0 -4
- data/.data/spec/std/isa/inst/Zba/sh1add.yaml +0 -4
- data/.data/spec/std/isa/inst/Zba/sh2add.uw.yaml +0 -4
- data/.data/spec/std/isa/inst/Zba/sh2add.yaml +0 -4
- data/.data/spec/std/isa/inst/Zba/sh3add.uw.yaml +0 -4
- data/.data/spec/std/isa/inst/Zba/sh3add.yaml +0 -4
- data/.data/spec/std/isa/inst/Zba/slli.uw.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbb/clz.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbb/clzw.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbb/cpop.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbb/cpopw.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbb/ctz.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbb/ctzw.yaml +5 -4
- data/.data/spec/std/isa/inst/Zbb/max.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbb/maxu.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbb/min.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbb/minu.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbb/orc.b.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbb/sext.b.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbb/sext.h.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbb/zext.h.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbc/clmulr.yaml +0 -4
- data/.data/spec/std/isa/inst/{B → Zbkc}/clmul.yaml +1 -7
- data/.data/spec/std/isa/inst/{B → Zbkc}/clmulh.yaml +1 -7
- data/.data/spec/std/isa/inst/Zbs/bclr.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbs/bclri.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbs/bext.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbs/bexti.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbs/binv.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbs/binvi.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbs/bset.yaml +0 -4
- data/.data/spec/std/isa/inst/Zbs/bseti.yaml +0 -4
- data/.data/spec/std/isa/inst/Zcb/c.lbu.yaml +2 -2
- data/.data/spec/std/isa/inst/Zcb/c.lh.yaml +2 -2
- data/.data/spec/std/isa/inst/Zcb/c.lhu.yaml +2 -2
- data/.data/spec/std/isa/inst/Zcb/c.mul.yaml +2 -6
- data/.data/spec/std/isa/inst/Zcb/c.not.yaml +2 -2
- data/.data/spec/std/isa/inst/Zcb/c.sb.yaml +2 -2
- data/.data/spec/std/isa/inst/Zcb/c.sext.b.yaml +2 -6
- data/.data/spec/std/isa/inst/Zcb/c.sext.h.yaml +2 -6
- data/.data/spec/std/isa/inst/Zcb/c.sh.yaml +2 -2
- data/.data/spec/std/isa/inst/Zcb/c.zext.b.yaml +2 -2
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- data/.data/spec/std/isa/inst/Zcb/c.zext.w.yaml +2 -6
- data/.data/spec/std/isa/inst/Zcd/c.fld.yaml +3 -3
- data/.data/spec/std/isa/inst/Zcd/c.fldsp.yaml +4 -4
- data/.data/spec/std/isa/inst/Zcd/c.fsd.yaml +3 -3
- data/.data/spec/std/isa/inst/Zcd/c.fsdsp.yaml +4 -4
- data/.data/spec/std/isa/inst/Zcf/c.flw.yaml +3 -3
- data/.data/spec/std/isa/inst/Zcf/c.flwsp.yaml +4 -4
- data/.data/spec/std/isa/inst/Zcf/c.fsw.yaml +3 -3
- data/.data/spec/std/isa/inst/Zcf/c.fswsp.yaml +4 -4
- data/.data/spec/std/isa/inst/Zcmp/cm.mva01s.yaml +2 -2
- data/.data/spec/std/isa/inst/Zcmp/cm.mvsa01.yaml +2 -2
- data/.data/spec/std/isa/inst/Zcmp/cm.pop.yaml +2 -2
- data/.data/spec/std/isa/inst/Zcmp/cm.popret.yaml +2 -2
- data/.data/spec/std/isa/inst/Zcmp/cm.popretz.yaml +2 -2
- data/.data/spec/std/isa/inst/Zcmp/cm.push.yaml +2 -2
- data/.data/spec/std/isa/inst/{Q → Zfa}/fltq.q.yaml +2 -2
- data/.data/spec/std/isa/inst/Zibi/beqi.yaml +45 -0
- data/.data/spec/std/isa/inst/Zibi/bnei.yaml +45 -0
- data/.data/spec/std/isa/inst/Zicbom/cbo.clean.yaml +2 -2
- data/.data/spec/std/isa/inst/Zicbom/cbo.flush.yaml +2 -2
- data/.data/spec/std/isa/inst/Zicbom/cbo.inval.yaml +3 -3
- data/.data/spec/std/isa/inst/Zicboz/cbo.zero.yaml +2 -2
- data/.data/spec/std/isa/inst/Zicfiss/ssamoswap.d.yaml +1 -1
- data/.data/spec/std/isa/inst/Zicfiss/ssamoswap.w.yaml +1 -1
- data/.data/spec/std/isa/inst/Zicfiss/sspopchk.yaml +63 -0
- data/.data/spec/std/isa/inst/Zicfiss/sspush.yaml +63 -0
- data/.data/spec/std/isa/inst/Zimop/mop.r.28.yaml +1 -2
- data/.data/spec/std/isa/inst/Zimop/mop.r.N.layout +1 -2
- data/.data/spec/std/isa/inst/Zimop/mop.rr.7.yaml +1 -2
- data/.data/spec/std/isa/inst/Zimop/mop.rr.N.layout +1 -2
- data/.data/spec/std/isa/inst/Zvfbfmin/vfncvtbf16.f.f.w.yaml +3 -1
- data/.data/spec/std/isa/inst/Zvfbfmin/vfwcvtbf16.f.f.v.yaml +3 -1
- data/.data/spec/std/isa/inst/Zvfofp4min/vfext.vf2.yaml +35 -0
- data/.data/spec/std/isa/inst/Zvfofp8min/vfncvt.f.f.q.yaml +31 -0
- data/.data/spec/std/isa/inst/Zvfofp8min/vfncvt.sat.f.f.q.yaml +32 -0
- data/.data/spec/std/isa/inst/Zvfofp8min/vfncvtbf16.sat.f.f.w.yaml +32 -0
- data/.data/spec/std/isa/inst/{Zvbb → Zvkb}/vandn.vv.yaml +1 -1
- data/.data/spec/std/isa/inst/{Zvbb → Zvkb}/vandn.vx.yaml +1 -1
- data/.data/spec/std/isa/inst/{Zvbb → Zvkb}/vbrev8.v.yaml +1 -1
- data/.data/spec/std/isa/inst/{Zvbb → Zvkb}/vrev8.v.yaml +1 -1
- data/.data/spec/std/isa/inst/{Zvbb → Zvkb}/vrol.vv.yaml +1 -1
- data/.data/spec/std/isa/inst/{Zvbb → Zvkb}/vrol.vx.yaml +1 -1
- data/.data/spec/std/isa/inst/{Zvbb → Zvkb}/vror.vi.yaml +1 -1
- data/.data/spec/std/isa/inst/{Zvbb → Zvkb}/vror.vv.yaml +1 -1
- data/.data/spec/std/isa/inst/{Zvbb → Zvkb}/vror.vx.yaml +1 -1
- data/.data/spec/std/isa/isa/builtin_functions.idl +3 -1
- data/.data/spec/std/isa/isa/globals.isa +1 -1
- data/.data/spec/std/isa/isa/util.idl +4 -3
- data/.data/spec/std/isa/param/COUNTINHIBIT_EN.yaml +3 -2
- data/.data/spec/std/isa/param/HCONTEXT_AVAILABLE.yaml +1 -1
- data/.data/spec/std/isa/param/HCOUNTENABLE_EN.yaml +2 -5
- data/.data/spec/std/isa/param/HPM_COUNTER10_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER11_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER12_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER13_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER14_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER15_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER16_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER17_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER18_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER19_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER20_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER21_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER22_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER23_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER24_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER25_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER26_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER27_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER28_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER29_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER30_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER31_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER3_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER4_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER5_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER6_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER7_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER8_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTER9_WIDTH.yaml +29 -0
- data/.data/spec/std/isa/param/HPM_COUNTERN_WIDTH.layout +27 -0
- data/.data/spec/std/isa/param/HW_MSTATUS_FS_DIRTY_UPDATE.yaml +2 -4
- data/.data/spec/std/isa/param/HW_MSTATUS_VS_DIRTY_UPDATE.yaml +2 -4
- data/.data/spec/std/isa/param/LRSC_FAIL_ON_NON_EXACT_LRSC.yaml +1 -1
- data/.data/spec/std/isa/param/LRSC_FAIL_ON_VA_SYNONYM.yaml +1 -1
- data/.data/spec/std/isa/param/LRSC_MISALIGNED_BEHAVIOR.yaml +4 -4
- data/.data/spec/std/isa/param/LRSC_RESERVATION_STRATEGY.yaml +1 -1
- data/.data/spec/std/isa/param/MCOUNTENABLE_EN.yaml +2 -5
- data/.data/spec/std/isa/param/MEI_INTR_IMPL.yaml +28 -0
- data/.data/spec/std/isa/param/MSI_INTR_IMPL.yaml +28 -0
- data/.data/spec/std/isa/param/MSTATUS_FS_LEGAL_VALUES.yaml +8 -15
- data/.data/spec/std/isa/param/MSTATUS_VS_LEGAL_VALUES.yaml +7 -15
- data/.data/spec/std/isa/param/MTI_INTR_IMPL.yaml +28 -0
- data/.data/spec/std/isa/param/MTVAL_WIDTH.yaml +17 -5
- data/.data/spec/std/isa/param/MUTABLE_MISA_A.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_B.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_C.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_D.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_F.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_H.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_M.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_Q.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_S.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_U.yaml +1 -1
- data/.data/spec/std/isa/param/MUTABLE_MISA_V.yaml +1 -1
- data/.data/spec/std/isa/param/{PMLEN.yaml → NON_STANDARD_EXTENSION_IMPLEMENTED.yaml} +6 -9
- data/.data/spec/std/isa/param/NUM_EXTERNAL_GUEST_INTERRUPTS.yaml +1 -1
- data/.data/spec/std/isa/param/NUM_PMP_ENTRIES.yaml +1 -1
- data/.data/spec/std/isa/param/REPORT_CAUSE_IN_MTVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml +1 -1
- data/.data/spec/std/isa/param/REPORT_CAUSE_IN_STVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml +1 -1
- data/.data/spec/std/isa/param/REPORT_CAUSE_IN_VSTVAL_ON_LANDING_PAD_SOFTWARE_CHECK.yaml +1 -1
- data/.data/spec/std/isa/param/SCOUNTENABLE_EN.yaml +2 -6
- data/.data/spec/std/isa/param/SCTRDEPTH_DEPTH_LEGAL_VALUES.yaml +27 -0
- data/.data/spec/std/isa/param/SEI_INTR_IMPL.yaml +28 -0
- data/.data/spec/std/isa/param/SSI_INTR_IMPL.yaml +28 -0
- data/.data/spec/std/isa/param/STI_INTR_IMPL.yaml +33 -0
- data/.data/spec/std/isa/param/STVAL_WIDTH.yaml +81 -0
- data/.data/spec/std/isa/param/SUPPORTED_PMLEN_SMMPM.yaml +40 -0
- data/.data/spec/std/isa/param/SUPPORTED_PMLEN_SMNPM.yaml +42 -0
- data/.data/spec/std/isa/param/SUPPORTED_PMLEN_SSNPM.yaml +42 -0
- data/.data/spec/std/isa/param/TRAP_ON_ECALL_FROM_S.yaml +1 -1
- data/.data/spec/std/isa/param/TRAP_ON_ECALL_FROM_U.yaml +1 -1
- data/.data/spec/std/isa/param/TRAP_ON_ECALL_FROM_VS.yaml +1 -1
- data/.data/spec/std/isa/param/TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY.yaml +1 -1
- data/.data/spec/std/isa/param/VSEI_INTR_IMPL.yaml +28 -0
- data/.data/spec/std/isa/param/VSSI_INTR_IMPL.yaml +28 -0
- data/.data/spec/std/isa/param/VSTI_INTR_IMPL.yaml +33 -0
- data/.data/spec/std/isa/param/WFI_FINITE.yaml +20 -0
- data/.data/spec/std/isa/param/WFI_U_MODE.yaml +20 -0
- data/lib/udb/Z3_VERSION +1 -1
- data/lib/udb/config.rb +1 -1
- data/lib/udb/log.rb +16 -0
- data/lib/udb/obj/csr.rb +38 -45
- data/lib/udb/obj/database_obj.rb +1 -1
- data/lib/udb/obj/exception_code.rb +3 -3
- data/lib/udb/version.rb +1 -1
- metadata +122 -52
- data/.data/spec/std/isa/inst/Zicfiss/sspopchk.x1.yaml +0 -25
- data/.data/spec/std/isa/inst/Zicfiss/sspopchk.x5.yaml +0 -25
- data/.data/spec/std/isa/inst/Zicfiss/sspush.x1.yaml +0 -25
- data/.data/spec/std/isa/inst/Zicfiss/sspush.x5.yaml +0 -25
- /data/.data/spec/std/isa/inst/{Smdbltrp → Smctr}/sctrclr.yaml +0 -0
- /data/.data/spec/std/isa/inst/{D → Zfa}/fcvtmod.w.d.yaml +0 -0
- /data/.data/spec/std/isa/inst/{D → Zfa}/fleq.d.yaml +0 -0
- /data/.data/spec/std/isa/inst/{Zfh → Zfa}/fleq.h.yaml +0 -0
- /data/.data/spec/std/isa/inst/{Q → Zfa}/fleq.q.yaml +0 -0
- /data/.data/spec/std/isa/inst/{F → Zfa}/fleq.s.yaml +0 -0
- /data/.data/spec/std/isa/inst/{D → Zfa}/fli.d.yaml +0 -0
- /data/.data/spec/std/isa/inst/{Zfh → Zfa}/fli.h.yaml +0 -0
- /data/.data/spec/std/isa/inst/{Q → Zfa}/fli.q.yaml +0 -0
- /data/.data/spec/std/isa/inst/{D → Zfa}/fltq.d.yaml +0 -0
- /data/.data/spec/std/isa/inst/{Zfh → Zfa}/fltq.h.yaml +0 -0
- /data/.data/spec/std/isa/inst/{F → Zfa}/fltq.s.yaml +0 -0
- /data/.data/spec/std/isa/inst/{D → Zfa}/fmaxm.d.yaml +0 -0
- /data/.data/spec/std/isa/inst/{Zfh → Zfa}/fmaxm.h.yaml +0 -0
- /data/.data/spec/std/isa/inst/{Q → Zfa}/fmaxm.q.yaml +0 -0
- /data/.data/spec/std/isa/inst/{D → Zfa}/fminm.d.yaml +0 -0
- /data/.data/spec/std/isa/inst/{Zfh → Zfa}/fminm.h.yaml +0 -0
- /data/.data/spec/std/isa/inst/{Q → Zfa}/fminm.q.yaml +0 -0
- /data/.data/spec/std/isa/inst/{D → Zfa}/fmvh.x.d.yaml +0 -0
- /data/.data/spec/std/isa/inst/{Q → Zfa}/fmvh.x.q.yaml +0 -0
- /data/.data/spec/std/isa/inst/{D → Zfa}/fmvp.d.x.yaml +0 -0
- /data/.data/spec/std/isa/inst/{Q → Zfa}/fmvp.q.x.yaml +0 -0
- /data/.data/spec/std/isa/inst/{D → Zfa}/fround.d.yaml +0 -0
- /data/.data/spec/std/isa/inst/{Zfh → Zfa}/fround.h.yaml +0 -0
- /data/.data/spec/std/isa/inst/{Q → Zfa}/fround.q.yaml +0 -0
- /data/.data/spec/std/isa/inst/{D → Zfa}/froundnx.d.yaml +0 -0
- /data/.data/spec/std/isa/inst/{Zfh → Zfa}/froundnx.h.yaml +0 -0
- /data/.data/spec/std/isa/inst/{Q → Zfa}/froundnx.q.yaml +0 -0
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# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
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name: SUPPORTED_PMLEN_SMMPM
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description: |
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The `PMLEN` values supported by the `Smmpm` pointer masking facility
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for M-mode, selected via the `PMM` field in `mseccfg`. `PMLEN` is the
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number of high-order bits of an address that are masked.
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PMLEN=0 (pointer masking is disabled)
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PMLEN=XLEN-57 (i.e., PMLEN=7 on RV64)
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The current standard only supports these values (`zpm.adoc`, tag
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`norm:pmlen_supported_values`). `PMM`=00 (pointer masking disabled,
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PMLEN=0) is mandatory and always available, so it is mandatory
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here.
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long_name: Pointer mask length for M mode
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contains:
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const: 0
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minItems: 1
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maxItems: 3
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definedBy:
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extension:
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name: Smmpm
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name: SUPPORTED_PMLEN_SMNPM
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description: |
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The `PMLEN` values supported by the `Smnpm` pointer masking facility
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for the next privilege mode below M-mode (S/HS if S-mode is
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implemented, or U-mode otherwise), selected via the `PMM` field in
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`menvcfg`. `PMLEN` is the number of high-order bits of an address
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that are masked.
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PMLEN=XLEN-57 (i.e., PMLEN=7 on RV64)
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PMLEN=XLEN-48 (i.e., PMLEN=16 on RV64)
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The current standard only supports these values (`zpm.adoc`, tag
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`norm:pmlen_supported_values`). `PMM`=00 (pointer masking disabled,
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PMLEN=0) is mandatory and always available, so it is mandatory
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here.
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long_name: Pointer mask length for next mode below M mode
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contains:
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maxItems: 3
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uniqueItems: true
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definedBy:
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extension:
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name: Smnpm
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kind: parameter
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name: SUPPORTED_PMLEN_SSNPM
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description: |
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The `PMLEN` values supported by the `Ssnpm` pointer masking facility
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for the next privilege mode below S-mode (U-mode, and VS-/VU-modes if
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the H extension is present), selected via the `PMM` field in
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`senvcfg`. `PMLEN` is the number of high-order bits of an address
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that are masked.
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PMLEN=0 (pointer masking is disabled)
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PMLEN=XLEN-57 (i.e., PMLEN=7 on RV64)
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PMLEN=XLEN-48 (i.e., PMLEN=16 on RV64)
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The current standard only supports these values (`zpm.adoc`, tag
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`norm:pmlen_supported_values`). `PMM`=00 (pointer masking disabled,
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PMLEN=0) is mandatory and always available, so it is mandatory
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here.
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long_name: Pointer mask length for next mode below S-mode
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schema:
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contains:
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const: 0
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maxItems: 3
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uniqueItems: true
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definedBy:
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extension:
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name: Ssnpm
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TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY has no effect when
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long_name:
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long_name: "Trap on SFENCE.VMA when satp.MODE is read-only"
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type: boolean
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# Copyright (C) Qualcomm Technologies, Inc. and/or its subsidiaries.
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# SPDX-License-Identifier: BSD-3-Clause-Clear
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# yaml-language-server: $schema=../../../schemas/param_schema.json
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$schema: param_schema.json#
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kind: parameter
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name: VSEI_INTR_IMPL
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description: |
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|
+
Whether or not virtual supervisor-level external interrupts are implemented.
|
|
11
|
+
|
|
12
|
+
Possible values:
|
|
13
|
+
|
|
14
|
+
true::
|
|
15
|
+
Virtual supervisor-level external interrupts are implemented.
|
|
16
|
+
`mie.VSEIE` and `mideleg.VSEI` are writable.
|
|
17
|
+
|
|
18
|
+
false::
|
|
19
|
+
Virtual supervisor-level external interrupts are not implemented.
|
|
20
|
+
`mie.VSEIE`, `mip.VSEIP`, and `mideleg.VSEI` are read-only zero.
|
|
21
|
+
long_name: Virtual supervisor-level external interrupts are implemented
|
|
22
|
+
schema:
|
|
23
|
+
type: boolean
|
|
24
|
+
definedBy:
|
|
25
|
+
extension:
|
|
26
|
+
allOf:
|
|
27
|
+
- name: Zicsr
|
|
28
|
+
- name: H
|
|
@@ -0,0 +1,28 @@
|
|
|
1
|
+
# Copyright (C) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
|
2
|
+
# SPDX-License-Identifier: BSD-3-Clause-Clear
|
|
3
|
+
|
|
4
|
+
# yaml-language-server: $schema=../../../schemas/param_schema.json
|
|
5
|
+
|
|
6
|
+
$schema: param_schema.json#
|
|
7
|
+
kind: parameter
|
|
8
|
+
name: VSSI_INTR_IMPL
|
|
9
|
+
description: |
|
|
10
|
+
Whether or not virtual supervisor-level software interrupts are implemented.
|
|
11
|
+
|
|
12
|
+
Possible values:
|
|
13
|
+
|
|
14
|
+
true::
|
|
15
|
+
Virtual supervisor-level software interrupts are implemented.
|
|
16
|
+
`mie.VSSIE` and `mideleg.VSSI` are writable.
|
|
17
|
+
|
|
18
|
+
false::
|
|
19
|
+
Virtual supervisor-level software interrupts are not implemented.
|
|
20
|
+
`mie.VSSIE`, `mip.VSSIP`, and `mideleg.VSSI` are read-only zero.
|
|
21
|
+
long_name: Virtual supervisor-level software interrupts are implemented
|
|
22
|
+
schema:
|
|
23
|
+
type: boolean
|
|
24
|
+
definedBy:
|
|
25
|
+
extension:
|
|
26
|
+
allOf:
|
|
27
|
+
- name: Zicsr
|
|
28
|
+
- name: H
|
|
@@ -0,0 +1,33 @@
|
|
|
1
|
+
# Copyright (C) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
|
2
|
+
# SPDX-License-Identifier: BSD-3-Clause-Clear
|
|
3
|
+
|
|
4
|
+
# yaml-language-server: $schema=../../../schemas/param_schema.json
|
|
5
|
+
|
|
6
|
+
$schema: param_schema.json#
|
|
7
|
+
kind: parameter
|
|
8
|
+
name: VSTI_INTR_IMPL
|
|
9
|
+
description: |
|
|
10
|
+
Whether or not virtual supervisor-level timer interrupts are implemented.
|
|
11
|
+
If Sstc is implemented, then VSTI_INTR_IMPL must be true.
|
|
12
|
+
|
|
13
|
+
Possible values:
|
|
14
|
+
|
|
15
|
+
true::
|
|
16
|
+
Virtual supervisor-level timer interrupts are implemented.
|
|
17
|
+
`mie.VSTIE` and `mdeleg.VSTI` are writable.
|
|
18
|
+
|
|
19
|
+
false::
|
|
20
|
+
Virtual supervisor-level timer interrupts are not implemented.
|
|
21
|
+
`mie.VSTIE`, `mip.VSTIP`, and and `mdeleg.VSTI` are read-only zero.
|
|
22
|
+
long_name: Virtual supervisor-level timer interrupts are implemented.
|
|
23
|
+
schema:
|
|
24
|
+
type: boolean
|
|
25
|
+
requirements:
|
|
26
|
+
idl(): |
|
|
27
|
+
implemented?(ExtensionName::Sstc) -> VSTI_INTR_IMPL;
|
|
28
|
+
reason: "When the Sstc extension is implemented, VSTIP reflects the timer interrupt signal resulting from `vstimecmp`."
|
|
29
|
+
definedBy:
|
|
30
|
+
extension:
|
|
31
|
+
allOf:
|
|
32
|
+
- name: Zicsr
|
|
33
|
+
- name: H
|
|
@@ -0,0 +1,20 @@
|
|
|
1
|
+
# Copyright (c) 2026 Neel Kumar
|
|
2
|
+
# SPDX-License-Identifier: BSD-3-Clause-Clear
|
|
3
|
+
|
|
4
|
+
# yaml-language-server: $schema=../../../schemas/param_schema.json
|
|
5
|
+
|
|
6
|
+
$schema: param_schema.json#
|
|
7
|
+
kind: parameter
|
|
8
|
+
name: WFI_FINITE
|
|
9
|
+
long_name: |
|
|
10
|
+
Whether WFI resumes execution after a finite amount of time
|
|
11
|
+
definedBy:
|
|
12
|
+
extension:
|
|
13
|
+
name: Sm
|
|
14
|
+
description: |
|
|
15
|
+
Options:
|
|
16
|
+
|
|
17
|
+
* true: WFI resumes execution after waiting for a finite amount of time
|
|
18
|
+
* false: WFI may continue waiting until another event causes execution to resume
|
|
19
|
+
schema:
|
|
20
|
+
type: boolean
|
|
@@ -0,0 +1,20 @@
|
|
|
1
|
+
# Copyright (c) 2026 Neel Kumar
|
|
2
|
+
# SPDX-License-Identifier: BSD-3-Clause-Clear
|
|
3
|
+
|
|
4
|
+
# yaml-language-server: $schema=../../../schemas/param_schema.json
|
|
5
|
+
|
|
6
|
+
$schema: param_schema.json#
|
|
7
|
+
kind: parameter
|
|
8
|
+
name: WFI_U_MODE
|
|
9
|
+
long_name: |
|
|
10
|
+
Whether WFI is supported in U mode
|
|
11
|
+
definedBy:
|
|
12
|
+
extension:
|
|
13
|
+
name: Sm
|
|
14
|
+
description: |
|
|
15
|
+
Options:
|
|
16
|
+
|
|
17
|
+
* true: WFI can be executed in U mode
|
|
18
|
+
* false: Executing WFI in U mode raises an illegal instruction exception
|
|
19
|
+
schema:
|
|
20
|
+
type: boolean
|
data/lib/udb/Z3_VERSION
CHANGED
|
@@ -1 +1 @@
|
|
|
1
|
-
z3-5.
|
|
1
|
+
z3-5.1.0
|
data/lib/udb/config.rb
CHANGED
|
@@ -238,7 +238,7 @@ module Udb
|
|
|
238
238
|
def initialize(data, info)
|
|
239
239
|
super(data, info)
|
|
240
240
|
|
|
241
|
-
@param_values = @data.key?("params") ? @data["params"] :
|
|
241
|
+
@param_values = @data.key?("params") ? @data["params"] : {}.freeze
|
|
242
242
|
|
|
243
243
|
@mxlen = @data.dig("params", "MXLEN")
|
|
244
244
|
|
data/lib/udb/log.rb
CHANGED
|
@@ -132,6 +132,8 @@ module Udb
|
|
|
132
132
|
|
|
133
133
|
sig { params(fmt: String, options: T.untyped).returns(T.any(TTY::ProgressBar, DummyProgressBar)) }
|
|
134
134
|
def self.create_progressbar(fmt, **options)
|
|
135
|
+
fmt = progressbar_format_for_terminal(fmt, **options)
|
|
136
|
+
|
|
135
137
|
if @top_level_progressbar.nil?
|
|
136
138
|
|
|
137
139
|
target_level = options.key?(:level) ? LogLevel.deserialize(options[:level].to_s) : LogLevel::Info
|
|
@@ -144,4 +146,18 @@ module Udb
|
|
|
144
146
|
@top_level_progressbar.register(fmt, **options)
|
|
145
147
|
end
|
|
146
148
|
end
|
|
149
|
+
|
|
150
|
+
sig { params(fmt: String, options: T.untyped).returns(String) }
|
|
151
|
+
def self.progressbar_format_for_terminal(fmt, **options)
|
|
152
|
+
return fmt unless fmt.match?(/:bar/i)
|
|
153
|
+
return fmt unless options[:total].nil?
|
|
154
|
+
|
|
155
|
+
inset = options.fetch(:inset, 0).to_i
|
|
156
|
+
without_bar = fmt.gsub(/:bar/i, "")
|
|
157
|
+
available_space = TTY::ProgressBar.max_columns - TTY::ProgressBar.display_columns(without_bar) - inset
|
|
158
|
+
return fmt if available_space >= 1
|
|
159
|
+
|
|
160
|
+
fmt.gsub(/\s*\[:bar\]\s*/i, " ").gsub(/\s*:bar\s*/i, " ").squeeze(" ").strip
|
|
161
|
+
end
|
|
162
|
+
private_class_method :progressbar_format_for_terminal
|
|
147
163
|
end
|
data/lib/udb/obj/csr.rb
CHANGED
|
@@ -20,6 +20,17 @@ module Udb
|
|
|
20
20
|
BITS6_CONST_TYPE = Idl::Type.new(:bits, width: 6, qualifiers: [:const]).freeze
|
|
21
21
|
BITS128_TYPE = Idl::Type.new(:bits, width: 128).freeze
|
|
22
22
|
ENCODING_SIZE_VAR = Idl::Var.new("__instruction_encoding_size", BITS6_TYPE, 32).freeze
|
|
23
|
+
# Privilege mode => IDL expression naming the field that selects the effective
|
|
24
|
+
# XLEN in that mode. Debug mode executes at MXLEN, so it shares M-mode's field.
|
|
25
|
+
MODE_TO_XLEN_FIELD = {
|
|
26
|
+
"M" => "CSR[misa].MXL",
|
|
27
|
+
"D" => "CSR[misa].MXL",
|
|
28
|
+
"S" => "CSR[mstatus].SXL",
|
|
29
|
+
"U" => "CSR[mstatus].UXL",
|
|
30
|
+
"VS" => "CSR[hstatus].VSXL",
|
|
31
|
+
"VU" => "CSR[vsstatus].UXL"
|
|
32
|
+
}.freeze
|
|
33
|
+
XLEN_TO_ENCODING = { 32 => 0, 64 => 1 }.freeze
|
|
23
34
|
# Add all methods in this module to this type of database object.
|
|
24
35
|
include HasFields
|
|
25
36
|
|
|
@@ -193,14 +204,7 @@ module Udb
|
|
|
193
204
|
# dynamic if either we don't know VSXLEN or VSXLEN is explicitly mutable
|
|
194
205
|
!cfg_arch.param_values.key?("VSXLEN") || cfg_arch.param_values["VSXLEN"].size > 1
|
|
195
206
|
when "XLEN"
|
|
196
|
-
|
|
197
|
-
# SXLEN condition applies if S-mode is possible
|
|
198
|
-
# VSXLEN condition applies if VS-mode is possible
|
|
199
|
-
(cfg_arch.mxlen.nil?) || \
|
|
200
|
-
(cfg_arch.possible_extensions.map(&:name).include?("S") && \
|
|
201
|
-
(cfg_arch.param_values["SXLEN"].nil? || cfg_arch.param_values["SXLEN"].size > 1)) || \
|
|
202
|
-
(cfg_arch.possible_extensions.map(&:name).include?("H") && \
|
|
203
|
-
(cfg_arch.param_values["VSXLEN"].nil? || cfg_arch.param_values["VSXLEN"].size > 1))
|
|
207
|
+
modes_with_dynamic_xlen.any?
|
|
204
208
|
else
|
|
205
209
|
raise "Unexpected length"
|
|
206
210
|
end
|
|
@@ -299,7 +303,7 @@ module Udb
|
|
|
299
303
|
64
|
|
300
304
|
end
|
|
301
305
|
when "XLEN"
|
|
302
|
-
if cfg_arch.possible_extensions.map(&:name).include?("
|
|
306
|
+
if cfg_arch.possible_extensions.map(&:name).include?("Sm")
|
|
303
307
|
cfg_arch.mxlen || 64
|
|
304
308
|
elsif cfg_arch.possible_extensions.map(&:name).include?("S")
|
|
305
309
|
if cfg_arch.param_values.key?("SXLEN")
|
|
@@ -341,61 +345,50 @@ module Udb
|
|
|
341
345
|
end
|
|
342
346
|
end
|
|
343
347
|
|
|
344
|
-
# @return [String]
|
|
345
|
-
|
|
348
|
+
# @return [Array<String>] Modes with access to this CSR whose effective XLEN can
|
|
349
|
+
# vary in this configuration
|
|
350
|
+
def modes_with_dynamic_xlen
|
|
351
|
+
modes_with_access.select { |mode| cfg_arch.multi_xlen_in_mode?(mode) }
|
|
352
|
+
end
|
|
353
|
+
|
|
354
|
+
# @param xlen [Integer] 32 or 64
|
|
355
|
+
# @return [String] IDL condition of when the effective xlen is +xlen+
|
|
356
|
+
def length_cond(xlen)
|
|
357
|
+
encoding = XLEN_TO_ENCODING.fetch(xlen)
|
|
346
358
|
case @data["length"]
|
|
347
359
|
when "MXLEN"
|
|
348
|
-
"
|
|
360
|
+
"#{MODE_TO_XLEN_FIELD['M']} == #{encoding}"
|
|
349
361
|
when "SXLEN"
|
|
350
|
-
"
|
|
362
|
+
"#{MODE_TO_XLEN_FIELD['S']} == #{encoding}"
|
|
351
363
|
when "VSXLEN"
|
|
352
|
-
"
|
|
364
|
+
"#{MODE_TO_XLEN_FIELD['VS']} == #{encoding}"
|
|
353
365
|
when "XLEN"
|
|
354
|
-
|
|
366
|
+
modes = modes_with_dynamic_xlen
|
|
367
|
+
raise "No mode with access to #{name} has a dynamic XLEN" if modes.empty?
|
|
368
|
+
|
|
369
|
+
modes.map { |mode|
|
|
370
|
+
"(priv_mode() == PrivilegeMode::#{mode} && #{MODE_TO_XLEN_FIELD.fetch(mode)} == #{encoding})"
|
|
371
|
+
}.join(" || ")
|
|
355
372
|
else
|
|
356
373
|
raise "Unexpected length #{@data['length']} for #{name}"
|
|
357
374
|
end
|
|
358
375
|
end
|
|
359
376
|
|
|
377
|
+
# @return [String] IDL condition of when the effective xlen is 32
|
|
378
|
+
def length_cond32 = length_cond(32)
|
|
379
|
+
|
|
360
380
|
# @return [String] IDL condition of when the effective xlen is 64
|
|
361
|
-
def length_cond64
|
|
362
|
-
case @data["length"]
|
|
363
|
-
when "MXLEN"
|
|
364
|
-
"CSR[misa].MXL == 1"
|
|
365
|
-
when "SXLEN"
|
|
366
|
-
"CSR[mstatus].SXL == 1"
|
|
367
|
-
when "VSXLEN"
|
|
368
|
-
"CSR[hstatus].VSXL == 1"
|
|
369
|
-
when "XLEN"
|
|
370
|
-
"(priv_mode() == PrivilegeMode::M && CSR[misa].MXL == 1) || (priv_mode() == PrivilegeMode::S && CSR[mstatus].SXL == 1) || (priv_mode() == PrivilegeMode::VS && CSR[hstatus].VSXL == 1)"
|
|
371
|
-
else
|
|
372
|
-
raise "Unexpected length"
|
|
373
|
-
end
|
|
374
|
-
end
|
|
381
|
+
def length_cond64 = length_cond(64)
|
|
375
382
|
|
|
376
383
|
# @param effective_xlen [Integer or nil] 32 or 64 for fixed xlen, nil for dynamic
|
|
377
384
|
# @return [String] Pretty-printed length string
|
|
378
385
|
def length_pretty(effective_xlen = nil)
|
|
379
386
|
raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
|
|
380
387
|
if dynamic_length?
|
|
381
|
-
cond =
|
|
382
|
-
case @data["length"]
|
|
383
|
-
when "MXLEN"
|
|
384
|
-
"CSR[misa].MXL == %%"
|
|
385
|
-
when "SXLEN"
|
|
386
|
-
"CSR[mstatus].SXL == %%"
|
|
387
|
-
when "VSXLEN"
|
|
388
|
-
"CSR[hstatus].VSXL == %%"
|
|
389
|
-
when "XLEN"
|
|
390
|
-
"(priv_mode() == PrivilegeMode::M && CSR[misa].MXL == %%) || (priv_mode() == PrivilegeMode::S && CSR[mstatus].SXL == %%) || (priv_mode() == PrivilegeMode::VS && CSR[hstatus].VSXL == %%)"
|
|
391
|
-
else
|
|
392
|
-
raise "Unexpected length '#{@data['length']}'"
|
|
393
|
-
end
|
|
394
|
-
|
|
395
388
|
if effective_xlen.nil?
|
|
396
389
|
[
|
|
397
|
-
"* #{length(32)} when #{
|
|
398
|
-
"* #{length(64)} when #{
|
|
390
|
+
"* #{length(32)} when #{length_cond(32)}",
|
|
391
|
+
"* #{length(64)} when #{length_cond(64)}"
|
|
399
392
|
].join("\n")
|
|
400
393
|
else
|
|
401
394
|
"#{length(effective_xlen)}-bit"
|
data/lib/udb/obj/database_obj.rb
CHANGED
|
@@ -115,7 +115,7 @@ module Udb
|
|
|
115
115
|
sig { override.params(other: T.untyped).returns(T.nilable(Integer)) }
|
|
116
116
|
def <=>(other)
|
|
117
117
|
return nil unless other.is_a?(DatabaseObject)
|
|
118
|
-
return nil unless
|
|
118
|
+
return nil unless kind == other.kind
|
|
119
119
|
|
|
120
120
|
@name <=> other.name
|
|
121
121
|
end
|
|
@@ -82,9 +82,9 @@ module Udb
|
|
|
82
82
|
|
|
83
83
|
sig { override.params(other: BasicObject).returns(T.nilable(Integer)) }
|
|
84
84
|
def <=>(other)
|
|
85
|
-
return nil unless T.cast(other, Object).is_a?(
|
|
85
|
+
return nil unless T.cast(other, Object).is_a?(InterruptCode)
|
|
86
86
|
|
|
87
|
-
num <=> T.cast(other,
|
|
87
|
+
num <=> T.cast(other, InterruptCode).num
|
|
88
88
|
end
|
|
89
89
|
|
|
90
90
|
sig { override.params(other: BasicObject).returns(T::Boolean) }
|
|
@@ -93,6 +93,6 @@ module Udb
|
|
|
93
93
|
end
|
|
94
94
|
|
|
95
95
|
sig { override.returns(Integer) }
|
|
96
|
-
def hash = [
|
|
96
|
+
def hash = [InterruptCode, num].hash
|
|
97
97
|
end
|
|
98
98
|
end
|
data/lib/udb/version.rb
CHANGED