udb 0.1.13 → 0.1.15
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- checksums.yaml +4 -4
- data/.data/cfgs/example_rv64_with_overlay.yaml +20 -24
- data/.data/cfgs/mc100-32-full-example.yaml +2 -2
- data/.data/cfgs/qc_iu.yaml +7 -3
- data/.data/cfgs/rv32-riscv-tests.yaml +8 -5
- data/.data/cfgs/rv32-vector.yaml +8 -5
- data/.data/cfgs/rv64-riscv-tests.yaml +8 -5
- data/.data/cfgs/rv64-vector.yaml +8 -5
- data/.data/spec/custom/isa/qc_iu/ext/Xqccmi.yaml +107 -36
- data/.data/spec/custom/isa/qc_iu/inst/Xqccmi/qc.cm.ilut.yaml +52 -69
- data/.data/spec/custom/isa/qc_iu/isa/globals.isa +27 -5
- data/.data/spec/schemas/README.adoc +3 -0
- data/.data/spec/schemas/config_schema.json +1 -1
- data/.data/spec/schemas/mmr_schema.json +3 -3
- data/.data/spec/schemas/schema_defs.json +8 -3
- data/.data/spec/std/isa/csr/H/hcounteren.layout +3 -3
- data/.data/spec/std/isa/csr/H/hcounteren.yaml +31 -31
- data/.data/spec/std/isa/csr/H/henvcfg.yaml +25 -0
- data/.data/spec/std/isa/csr/H/htinst.yaml +3 -3
- data/.data/spec/std/isa/csr/H/htval.yaml +3 -3
- data/.data/spec/std/isa/csr/H/mtinst.yaml +1 -1
- data/.data/spec/std/isa/csr/I/pmpaddr0.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr1.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr10.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr11.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr12.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr13.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr14.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr15.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr16.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr17.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr18.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr19.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr2.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr20.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr21.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr22.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr23.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr24.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr25.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr26.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr27.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr28.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr29.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr3.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr30.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr31.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr32.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr33.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr34.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr35.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr36.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr37.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr38.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr39.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr4.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr40.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr41.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr42.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr43.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr44.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr45.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr46.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr47.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr48.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr49.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr5.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr50.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr51.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr52.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr53.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr54.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr55.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr56.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr57.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr58.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr59.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr6.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr60.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr61.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr62.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr63.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr7.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr8.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddr9.yaml +6 -4
- data/.data/spec/std/isa/csr/I/pmpaddrN.layout +6 -4
- data/.data/spec/std/isa/csr/I/pmpcfg0.yaml +120 -144
- data/.data/spec/std/isa/csr/I/pmpcfg1.yaml +60 -72
- data/.data/spec/std/isa/csr/I/pmpcfg10.yaml +120 -144
- data/.data/spec/std/isa/csr/I/pmpcfg11.yaml +60 -72
- data/.data/spec/std/isa/csr/I/pmpcfg12.yaml +120 -144
- data/.data/spec/std/isa/csr/I/pmpcfg13.yaml +60 -72
- data/.data/spec/std/isa/csr/I/pmpcfg14.yaml +120 -144
- data/.data/spec/std/isa/csr/I/pmpcfg15.yaml +60 -72
- data/.data/spec/std/isa/csr/I/pmpcfg2.yaml +120 -144
- data/.data/spec/std/isa/csr/I/pmpcfg3.yaml +60 -72
- data/.data/spec/std/isa/csr/I/pmpcfg4.yaml +120 -144
- data/.data/spec/std/isa/csr/I/pmpcfg5.yaml +60 -72
- data/.data/spec/std/isa/csr/I/pmpcfg6.yaml +120 -144
- data/.data/spec/std/isa/csr/I/pmpcfg7.yaml +60 -72
- data/.data/spec/std/isa/csr/I/pmpcfg8.yaml +120 -144
- data/.data/spec/std/isa/csr/I/pmpcfg9.yaml +60 -72
- data/.data/spec/std/isa/csr/I/pmpcfgN.layout +15 -18
- data/.data/spec/std/isa/csr/Smcntrpmf/mcyclecfg.yaml +1 -1
- data/.data/spec/std/isa/csr/Smcntrpmf/mcyclecfgh.yaml +1 -1
- data/.data/spec/std/isa/csr/Smcntrpmf/minstretcfg.yaml +1 -1
- data/.data/spec/std/isa/csr/Smcntrpmf/minstretcfgh.yaml +1 -1
- data/.data/spec/std/isa/csr/Sscofpmf/scountovf.layout +1 -1
- data/.data/spec/std/isa/csr/Sscofpmf/scountovf.yaml +29 -29
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter10.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter10h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter11.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter11h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter12.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter12h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter13.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter13h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter14.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter14h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter15.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter15h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter16.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter16h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter17.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter17h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter18.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter18h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter19.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter19h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter20.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter20h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter21.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter21h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter22.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter22h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter23.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter23h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter24.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter24h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter25.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter25h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter26.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter26h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter27.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter27h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter28.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter28h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter29.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter29h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter3.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter30.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter30h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter31.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter31h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter3h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter4.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter4h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter5.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter5h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter6.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter6h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter7.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter7h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter8.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter8h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter9.yaml +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounter9h.yaml +1 -1
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounterN.layout +4 -4
- data/.data/spec/std/isa/csr/Zihpm/mhpmcounterNh.layout +1 -1
- data/.data/spec/std/isa/csr/hstatus.yaml +1 -1
- data/.data/spec/std/isa/csr/jvt.yaml +1 -0
- data/.data/spec/std/isa/csr/mcycle.yaml +6 -6
- data/.data/spec/std/isa/csr/menvcfg.yaml +20 -0
- data/.data/spec/std/isa/csr/minstret.yaml +3 -3
- data/.data/spec/std/isa/csr/minstreth.yaml +1 -1
- data/.data/spec/std/isa/csr/mstatus.yaml +21 -25
- data/.data/spec/std/isa/csr/mtvec.yaml +16 -57
- data/.data/spec/std/isa/csr/senvcfg.yaml +26 -0
- data/.data/spec/std/isa/csr/sie.yaml +30 -4
- data/.data/spec/std/isa/csr/sip.yaml +16 -2
- data/.data/spec/std/isa/csr/stvec.yaml +11 -12
- data/.data/spec/std/isa/csr/vstval.yaml +1 -1
- data/.data/spec/std/isa/csr/vstvec.yaml +14 -15
- data/.data/spec/std/isa/ext/Q.yaml +1 -1
- data/.data/spec/std/isa/ext/Shlcofideleg.yaml +24 -0
- data/.data/spec/std/isa/ext/Shvstvecd.yaml +2 -2
- data/.data/spec/std/isa/ext/Sspm.yaml +5 -0
- data/.data/spec/std/isa/ext/Sstvecd.yaml +2 -2
- data/.data/spec/std/isa/ext/Sstvecv.yaml +2 -2
- data/.data/spec/std/isa/ext/Supm.yaml +17 -0
- data/.data/spec/std/isa/ext/Zcb.yaml +3 -0
- data/.data/spec/std/isa/ext/Zfbfmin.yaml +3 -5
- data/.data/spec/std/isa/ext/Ziccid.yaml +29 -0
- data/.data/spec/std/isa/ext/Zicfilp.yaml +5 -1
- data/.data/spec/std/isa/ext/Zicfiss.yaml +20 -1
- data/.data/spec/std/isa/ext/Zihpm.yaml +3 -0
- data/.data/spec/std/isa/ext/Zilx.yaml +58 -0
- data/.data/spec/std/isa/ext/Zkt.yaml +33 -1
- data/.data/spec/std/isa/ext/Zvabd.yaml +21 -0
- data/.data/spec/std/isa/ext/Zvbc.yaml +3 -0
- data/.data/spec/std/isa/ext/Zvkb.yaml +3 -0
- data/.data/spec/std/isa/ext/Zvkg.yaml +3 -0
- data/.data/spec/std/isa/ext/Zvkned.yaml +3 -0
- data/.data/spec/std/isa/ext/Zvknha.yaml +3 -0
- data/.data/spec/std/isa/ext/Zvknhb.yaml +4 -2
- data/.data/spec/std/isa/ext/Zvksed.yaml +3 -0
- data/.data/spec/std/isa/ext/Zvksh.yaml +3 -0
- data/.data/spec/std/isa/ext/Zvkt.yaml +3 -0
- data/.data/spec/std/isa/inst/B/andn.yaml +10 -12
- data/.data/spec/std/isa/inst/B/clmul.yaml +9 -11
- data/.data/spec/std/isa/inst/B/clmulh.yaml +9 -11
- data/.data/spec/std/isa/inst/B/orn.yaml +9 -11
- data/.data/spec/std/isa/inst/B/rev8.yaml +1 -1
- data/.data/spec/std/isa/inst/B/rol.yaml +9 -11
- data/.data/spec/std/isa/inst/B/rolw.yaml +9 -11
- data/.data/spec/std/isa/inst/B/ror.yaml +9 -11
- data/.data/spec/std/isa/inst/B/rorw.yaml +9 -11
- data/.data/spec/std/isa/inst/B/xnor.yaml +9 -11
- data/.data/spec/std/isa/inst/C/c.add.yaml +1 -0
- data/.data/spec/std/isa/inst/C/c.addi.yaml +1 -0
- data/.data/spec/std/isa/inst/C/c.addiw.yaml +1 -0
- data/.data/spec/std/isa/inst/C/c.addw.yaml +1 -0
- data/.data/spec/std/isa/inst/C/c.and.yaml +1 -0
- data/.data/spec/std/isa/inst/C/c.andi.yaml +1 -0
- data/.data/spec/std/isa/inst/C/c.ldsp.yaml +3 -3
- data/.data/spec/std/isa/inst/C/c.lui.yaml +1 -0
- data/.data/spec/std/isa/inst/C/c.mv.yaml +1 -0
- data/.data/spec/std/isa/inst/C/c.nop.yaml +13 -2
- data/.data/spec/std/isa/inst/C/c.or.yaml +1 -0
- data/.data/spec/std/isa/inst/C/c.slli.yaml +1 -0
- data/.data/spec/std/isa/inst/C/c.srai.yaml +1 -0
- data/.data/spec/std/isa/inst/C/c.srli.yaml +1 -0
- data/.data/spec/std/isa/inst/C/c.sub.yaml +1 -0
- data/.data/spec/std/isa/inst/C/c.subw.yaml +1 -0
- data/.data/spec/std/isa/inst/C/c.xor.yaml +1 -0
- data/.data/spec/std/isa/inst/D/fld.yaml +1 -0
- data/.data/spec/std/isa/inst/D/fsd.yaml +1 -0
- data/.data/spec/std/isa/inst/F/fadd.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fcvt.l.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fcvt.lu.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fcvt.s.l.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fcvt.s.lu.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fcvt.s.wu.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fcvt.w.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fcvt.wu.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fdiv.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/feq.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fle.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fleq.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/flt.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fltq.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/flw.yaml +2 -1
- data/.data/spec/std/isa/inst/F/fmadd.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fmax.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fmin.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fmsub.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fmul.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fmv.w.x.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fmv.x.w.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fnmadd.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fnmsub.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fsgnj.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fsgnjn.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fsgnjx.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fsqrt.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fsub.s.yaml +1 -1
- data/.data/spec/std/isa/inst/F/fsw.yaml +2 -1
- data/.data/spec/std/isa/inst/I/addi.yaml +1 -0
- data/.data/spec/std/isa/inst/I/addiw.yaml +1 -0
- data/.data/spec/std/isa/inst/I/andi.yaml +1 -0
- data/.data/spec/std/isa/inst/I/auipc.yaml +1 -0
- data/.data/spec/std/isa/inst/I/lb.yaml +1 -0
- data/.data/spec/std/isa/inst/I/lbu.yaml +1 -0
- data/.data/spec/std/isa/inst/I/ld.yaml +2 -0
- data/.data/spec/std/isa/inst/I/lh.yaml +1 -0
- data/.data/spec/std/isa/inst/I/lhu.yaml +1 -0
- data/.data/spec/std/isa/inst/I/lui.yaml +1 -0
- data/.data/spec/std/isa/inst/I/lw.yaml +1 -0
- data/.data/spec/std/isa/inst/I/lwu.yaml +1 -0
- data/.data/spec/std/isa/inst/I/ori.yaml +1 -0
- data/.data/spec/std/isa/inst/I/sb.yaml +1 -0
- data/.data/spec/std/isa/inst/I/sd.yaml +2 -1
- data/.data/spec/std/isa/inst/I/sh.yaml +1 -0
- data/.data/spec/std/isa/inst/I/slti.yaml +1 -0
- data/.data/spec/std/isa/inst/I/sltiu.yaml +1 -0
- data/.data/spec/std/isa/inst/I/sw.yaml +1 -0
- data/.data/spec/std/isa/inst/I/xori.yaml +1 -0
- data/.data/spec/std/isa/inst/Q/fadd.q.yaml +2 -2
- data/.data/spec/std/isa/inst/Q/fclass.q.yaml +5 -5
- data/.data/spec/std/isa/inst/Q/fleq.q.yaml +0 -1
- data/.data/spec/std/isa/inst/Q/fli.q.yaml +1 -1
- data/.data/spec/std/isa/inst/Q/flq.yaml +1 -0
- data/.data/spec/std/isa/inst/Q/fltq.q.yaml +0 -1
- data/.data/spec/std/isa/inst/Q/fmaxm.q.yaml +0 -1
- data/.data/spec/std/isa/inst/Q/fminm.q.yaml +0 -1
- data/.data/spec/std/isa/inst/Q/fmvp.q.x.yaml +1 -1
- data/.data/spec/std/isa/inst/Q/fsq.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vadc.vim.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vadd.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vand.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vle8.v.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmadc.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmadc.vim.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmerge.vim.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmseq.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmsgt.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmsgtu.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmsle.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmsleu.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmsne.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vmv.v.i.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vor.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vrsub.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vsadd.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vsaddu.vi.yaml +1 -0
- data/.data/spec/std/isa/inst/V/vse8.v.yaml +1 -0
- data/.data/spec/std/isa/inst/Zawrs/wrs.nto.yaml +4 -2
- data/.data/spec/std/isa/inst/Zba/add.uw.yaml +9 -11
- data/.data/spec/std/isa/inst/Zbb/orc.b.yaml +1 -1
- data/.data/spec/std/isa/inst/Zbkb/brev8.yaml +3 -3
- data/.data/spec/std/isa/inst/Zbkb/unzip.yaml +2 -2
- data/.data/spec/std/isa/inst/Zbkb/zip.yaml +2 -2
- data/.data/spec/std/isa/inst/Zbkx/xperm4.yaml +2 -2
- data/.data/spec/std/isa/inst/Zbkx/xperm8.yaml +2 -2
- data/.data/spec/std/isa/inst/Zcb/c.mul.yaml +1 -0
- data/.data/spec/std/isa/inst/Zcb/c.not.yaml +1 -0
- data/.data/spec/std/isa/inst/Zcb/c.zext.b.yaml +2 -7
- data/.data/spec/std/isa/inst/Zcb/c.zext.w.yaml +1 -1
- data/.data/spec/std/isa/inst/Zcmop/c.mop.1.yaml +2 -0
- data/.data/spec/std/isa/inst/Zcmop/c.mop.5.yaml +2 -0
- data/.data/spec/std/isa/inst/Zcmop/c.mop.N.layout +7 -0
- data/.data/spec/std/isa/inst/Zfa/fli.s.yaml +1 -1
- data/.data/spec/std/isa/inst/Zfa/fmaxm.s.yaml +1 -1
- data/.data/spec/std/isa/inst/Zfa/fminm.s.yaml +1 -1
- data/.data/spec/std/isa/inst/Zfa/fround.s.yaml +1 -1
- data/.data/spec/std/isa/inst/Zfa/froundnx.s.yaml +1 -1
- data/.data/spec/std/isa/inst/Zfh/flh.yaml +5 -2
- data/.data/spec/std/isa/inst/Zfh/fmv.h.x.yaml +3 -1
- data/.data/spec/std/isa/inst/Zfh/fmv.x.h.yaml +3 -1
- data/.data/spec/std/isa/inst/Zfh/fsh.yaml +4 -1
- data/.data/spec/std/isa/inst/Zicbop/prefetch.i.yaml +2 -0
- data/.data/spec/std/isa/inst/Zicbop/prefetch.r.yaml +2 -0
- data/.data/spec/std/isa/inst/Zicbop/prefetch.w.yaml +2 -0
- data/.data/spec/std/isa/inst/Zicfiss/c.sspopchk.yaml +30 -0
- data/.data/spec/std/isa/inst/Zicfiss/c.sspush.yaml +29 -0
- data/.data/spec/std/isa/inst/Zicond/czero.eqz.yaml +1 -1
- data/.data/spec/std/isa/inst/Zicond/czero.nez.yaml +1 -1
- data/.data/spec/std/isa/inst/Zicsr/csrrw.yaml +12 -0
- data/.data/spec/std/isa/inst/Zilx/lxd.yaml +38 -0
- data/.data/spec/std/isa/inst/Zilx/lxh.yaml +35 -0
- data/.data/spec/std/isa/inst/Zilx/lxhu.yaml +35 -0
- data/.data/spec/std/isa/inst/Zilx/lxsb.yaml +40 -0
- data/.data/spec/std/isa/inst/Zilx/lxsbu.yaml +40 -0
- data/.data/spec/std/isa/inst/Zilx/lxsd.yaml +38 -0
- data/.data/spec/std/isa/inst/Zilx/lxsh.yaml +35 -0
- data/.data/spec/std/isa/inst/Zilx/lxshu.yaml +35 -0
- data/.data/spec/std/isa/inst/Zilx/lxsuwb.yaml +40 -0
- data/.data/spec/std/isa/inst/Zilx/lxsuwbu.yaml +40 -0
- data/.data/spec/std/isa/inst/Zilx/lxsuwd.yaml +39 -0
- data/.data/spec/std/isa/inst/Zilx/lxsuwh.yaml +40 -0
- data/.data/spec/std/isa/inst/Zilx/lxsuwhu.yaml +40 -0
- data/.data/spec/std/isa/inst/Zilx/lxsuww.yaml +40 -0
- data/.data/spec/std/isa/inst/Zilx/lxsuwwu.yaml +40 -0
- data/.data/spec/std/isa/inst/Zilx/lxsw.yaml +35 -0
- data/.data/spec/std/isa/inst/Zilx/lxswu.yaml +39 -0
- data/.data/spec/std/isa/inst/Zilx/lxw.yaml +35 -0
- data/.data/spec/std/isa/inst/Zilx/lxwu.yaml +39 -0
- data/.data/spec/std/isa/inst/Zks/sm3p0.yaml +1 -1
- data/.data/spec/std/isa/inst/Zks/sm3p1.yaml +1 -1
- data/.data/spec/std/isa/inst/Zks/sm4ed.yaml +1 -1
- data/.data/spec/std/isa/inst/Zks/sm4ks.yaml +1 -1
- data/.data/spec/std/isa/inst/Zvabd/vabd.vv.yaml +67 -0
- data/.data/spec/std/isa/inst/Zvabd/vabdu.vv.yaml +67 -0
- data/.data/spec/std/isa/inst/Zvabd/vabs.v.yaml +61 -0
- data/.data/spec/std/isa/inst/Zvabd/vwabda.vv.yaml +72 -0
- data/.data/spec/std/isa/inst/Zvabd/vwabdau.vv.yaml +72 -0
- data/.data/spec/std/isa/isa/builtin_functions.idl +1 -0
- data/.data/spec/std/isa/isa/fp.idl +42 -18
- data/.data/spec/std/isa/isa/globals.isa +27 -7
- data/.data/spec/std/isa/isa/interrupts.idl +1 -0
- data/.data/spec/std/isa/param/CACHE_BLOCK_SIZE.yaml +70 -6
- data/.data/spec/std/isa/param/ELEN.yaml +27 -5
- data/.data/spec/std/isa/param/HCOUNTENABLE_EN.yaml +13 -0
- data/.data/spec/std/isa/param/HPM_COUNTER_EN.yaml +13 -3
- data/.data/spec/std/isa/param/HPM_EVENTS.yaml +0 -3
- data/.data/spec/std/isa/param/HSTATEEN_CONTEXT_TYPE.yaml +1 -0
- data/.data/spec/std/isa/param/MCOUNTENABLE_EN.yaml +8 -0
- data/.data/spec/std/isa/param/MSTATEEN_CONTEXT_TYPE.yaml +1 -0
- data/.data/spec/std/isa/param/MTVEC_BASE_ALIGNMENT_DIRECT.yaml +71 -64
- data/.data/spec/std/isa/param/MTVEC_BASE_ALIGNMENT_VECTORED.yaml +71 -64
- data/.data/spec/std/isa/param/NUM_PMP_ENTRIES.yaml +11 -22
- data/.data/spec/std/isa/param/NUM_USABLE_PMP_ENTRIES.yaml +35 -0
- data/.data/spec/std/isa/param/PMP_NA4_SUPPORTED.yaml +23 -0
- data/.data/spec/std/isa/param/{STVEC_MODE_VECTORED.yaml → PMP_NAPOT_SUPPORTED.yaml} +9 -9
- data/.data/spec/std/isa/param/{MSTATUS_TVM_IMPLEMENTED.yaml → PMP_TOR_SUPPORTED.yaml} +6 -6
- data/.data/spec/std/isa/param/PRECISE_SYNCHRONOUS_EXCEPTIONS.yaml +1 -0
- data/.data/spec/std/isa/param/STVAL_WIDTH.yaml +3 -2
- data/.data/spec/std/isa/param/STVEC_BASE_ALIGNMENT_VECTORED.yaml +100 -0
- data/.data/spec/std/isa/param/STVEC_MODES.yaml +31 -0
- data/.data/spec/std/isa/param/SV32_VSMODE_TRANSLATION.yaml +1 -1
- data/.data/spec/std/isa/param/SXLEN.yaml +2 -2
- data/.data/spec/std/isa/param/TINST_VALUE_ON_FINAL_INSTRUCTION_GUEST_PAGE_FAULT.yaml +1 -1
- data/.data/spec/std/isa/param/TINST_VALUE_ON_FINAL_LOAD_GUEST_PAGE_FAULT.yaml +1 -1
- data/.data/spec/std/isa/param/TINST_VALUE_ON_FINAL_STORE_AMO_GUEST_PAGE_FAULT.yaml +1 -1
- data/.data/spec/std/isa/param/TINST_VALUE_ON_LOAD_ADDRESS_MISALIGNED.yaml +1 -1
- data/.data/spec/std/isa/param/TINST_VALUE_ON_STORE_AMO_ADDRESS_MISALIGNED.yaml +1 -1
- data/.data/spec/std/isa/param/TRAP_ON_EBREAK.yaml +1 -0
- data/.data/spec/std/isa/param/TRAP_ON_ECALL_FROM_M.yaml +1 -0
- data/.data/spec/std/isa/param/TRAP_ON_SFENCE_VMA_WHEN_SATP_MODE_IS_READ_ONLY.yaml +1 -0
- data/.data/spec/std/isa/param/UXLEN.yaml +1 -1
- data/.data/spec/std/isa/param/VLEN.yaml +16 -7
- data/.data/spec/std/isa/param/VSTVEC_MODES.yaml +31 -0
- data/.data/spec/std/isa/param/ZAWRS_NTO_IS_NOP.yaml +19 -0
- data/lib/udb/ESPRESSO_VERSION +1 -1
- data/lib/udb/Z3_VERSION +1 -1
- data/lib/udb/config.rb +14 -2
- data/lib/udb/doc_link.rb +3 -4
- data/lib/udb/obj/csr.rb +1 -1
- data/lib/udb/obj/csr_field.rb +1 -1
- data/lib/udb/obj/extension.rb +1 -1
- data/lib/udb/obj/instruction.rb +1 -1
- data/lib/udb/obj/non_isa_specification.rb +22 -100
- data/lib/udb/version.rb +1 -1
- data/lib/udb/version_spec.rb +1 -1
- data/lib/udb/z3.rb +31 -9
- metadata +42 -9
- data/.data/spec/std/isa/param/STVEC_MODE_DIRECT.yaml +0 -21
- data/.data/spec/std/isa/param/VSTVEC_MODE_DIRECT.yaml +0 -21
- data/.data/spec/std/isa/param/VSTVEC_MODE_VECTORED.yaml +0 -21
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lessThanOrEqual: 0x80000000
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|
+
0x400,
|
|
40
|
+
0x800,
|
|
41
|
+
0x1000,
|
|
42
|
+
0x2000,
|
|
43
|
+
0x4000,
|
|
44
|
+
0x8000,
|
|
45
|
+
0x10000,
|
|
46
|
+
0x20000,
|
|
47
|
+
0x40000,
|
|
48
|
+
0x80000,
|
|
49
|
+
0x100000,
|
|
50
|
+
0x200000,
|
|
51
|
+
0x400000,
|
|
52
|
+
0x800000,
|
|
53
|
+
0x1000000,
|
|
54
|
+
0x2000000,
|
|
55
|
+
0x4000000,
|
|
56
|
+
0x8000000,
|
|
57
|
+
0x10000000,
|
|
58
|
+
0x20000000,
|
|
59
|
+
0x40000000,
|
|
60
|
+
0x80000000,
|
|
61
|
+
0x100000000,
|
|
62
|
+
0x200000000,
|
|
63
|
+
0x400000000,
|
|
64
|
+
0x800000000,
|
|
65
|
+
0x1000000000,
|
|
66
|
+
0x2000000000,
|
|
67
|
+
0x4000000000,
|
|
68
|
+
0x8000000000,
|
|
69
|
+
0x10000000000,
|
|
70
|
+
0x20000000000,
|
|
71
|
+
0x40000000000,
|
|
72
|
+
0x80000000000,
|
|
73
|
+
0x100000000000,
|
|
74
|
+
0x200000000000,
|
|
75
|
+
0x400000000000,
|
|
76
|
+
0x800000000000,
|
|
77
|
+
0x1000000000000,
|
|
78
|
+
0x2000000000000,
|
|
79
|
+
0x4000000000000,
|
|
80
|
+
0x8000000000000,
|
|
81
|
+
0x10000000000000,
|
|
82
|
+
0x20000000000000,
|
|
83
|
+
0x40000000000000,
|
|
84
|
+
0x80000000000000,
|
|
85
|
+
0x100000000000000,
|
|
86
|
+
0x200000000000000,
|
|
87
|
+
0x400000000000000,
|
|
88
|
+
0x800000000000000,
|
|
89
|
+
0x1000000000000000,
|
|
90
|
+
0x2000000000000000,
|
|
91
|
+
0x4000000000000000,
|
|
92
|
+
0x8000000000000000,
|
|
92
93
|
]
|
|
93
94
|
|
|
94
95
|
requirements:
|
|
95
|
-
|
|
96
|
-
|
|
96
|
+
if:
|
|
97
|
+
param:
|
|
98
|
+
name: MXLEN
|
|
99
|
+
equal: 32
|
|
100
|
+
then:
|
|
101
|
+
param:
|
|
102
|
+
name: MTVEC_BASE_ALIGNMENT_VECTORED
|
|
103
|
+
lessThanOrEqual: 0x80000000
|
|
@@ -7,36 +7,25 @@ $schema: param_schema.json#
|
|
|
7
7
|
kind: parameter
|
|
8
8
|
name: NUM_PMP_ENTRIES
|
|
9
9
|
description: |
|
|
10
|
-
Number of implemented PMP entries.
|
|
10
|
+
Number of implemented PMP entries.
|
|
11
11
|
|
|
12
12
|
The architecture mandates that the number of implemented PMP registers
|
|
13
|
-
must appear to be 0, 16, or 64.
|
|
14
|
-
|
|
15
|
-
|
|
16
|
-
|
|
17
|
-
|
|
18
|
-
!===
|
|
19
|
-
! NUM_PMP_ENTRIES ! pmpaddr<0-15> / pmpcfg<0-3> ! pmpaddr<16-63> / pmpcfg<4-15>
|
|
20
|
-
! 0 ! N ! N
|
|
21
|
-
! 1-16 ! Y ! N
|
|
22
|
-
! 17-64 ! Y ! Y
|
|
23
|
-
!===
|
|
24
|
-
|
|
25
|
-
** N = Not implemented; access will cause `IllegalInstruction`
|
|
26
|
-
if TRAP_ON_UNIMPLEMENTED_CSR is true
|
|
27
|
-
** Y = Implemented; access will not cause an exception (from M-mode), but register
|
|
28
|
-
may be read-only-zero if NUM_PMP_ENTRIES is less than the corresponding register
|
|
13
|
+
must appear to be 0, 16, or 64, so NUM_PMP_ENTRIES must be one of those values.
|
|
14
|
+
It directly determines which PMP registers exist: `pmpaddr0`-`pmpaddr<N-1>`
|
|
15
|
+
and their corresponding `pmpNcfg` fields are implemented, and the rest are
|
|
16
|
+
not. Accessing an unimplemented PMP register causes an `IllegalInstruction`
|
|
17
|
+
when TRAP_ON_UNIMPLEMENTED_CSR is true.
|
|
29
18
|
|
|
30
19
|
[NOTE]
|
|
31
|
-
`pmpcfgN` for an odd N never exists when XLEN == 64
|
|
20
|
+
`pmpcfgN` for an odd N never exists when XLEN == 64.
|
|
32
21
|
|
|
33
|
-
|
|
34
|
-
|
|
22
|
+
An implemented entry may still be read-only zero (but will never cause an exception).
|
|
23
|
+
The number of entries that are actually usable is given by
|
|
24
|
+
NUM_USABLE_PMP_ENTRIES.
|
|
35
25
|
long_name: TODO
|
|
36
26
|
schema:
|
|
37
27
|
type: integer
|
|
38
|
-
|
|
39
|
-
maximum: 64
|
|
28
|
+
enum: [0, 16, 64]
|
|
40
29
|
definedBy:
|
|
41
30
|
extension:
|
|
42
31
|
name: Sm
|
|
@@ -0,0 +1,35 @@
|
|
|
1
|
+
# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
|
2
|
+
# SPDX-License-Identifier: BSD-3-Clause-Clear
|
|
3
|
+
|
|
4
|
+
# yaml-language-server: $schema=../../../schemas/param_schema.json
|
|
5
|
+
|
|
6
|
+
$schema: param_schema.json#
|
|
7
|
+
kind: parameter
|
|
8
|
+
name: NUM_USABLE_PMP_ENTRIES
|
|
9
|
+
description: |
|
|
10
|
+
Number of implemented PMP entries that are actually usable.
|
|
11
|
+
|
|
12
|
+
An implementation may implement PMP entries (NUM_PMP_ENTRIES) but hardwire
|
|
13
|
+
some of them to zero (read-only zero). Such entries exist -- their
|
|
14
|
+
`pmpaddrN`/`pmpNcfg` registers are accessible and will not cause an exception
|
|
15
|
+
from M-mode -- but they cannot be configured to guard a region.
|
|
16
|
+
|
|
17
|
+
NUM_USABLE_PMP_ENTRIES gives the number of low-numbered entries that are
|
|
18
|
+
writable/usable. Entries `0` through `NUM_USABLE_PMP_ENTRIES-1` are usable;
|
|
19
|
+
entries `NUM_USABLE_PMP_ENTRIES` through `NUM_PMP_ENTRIES-1` are read-only
|
|
20
|
+
zero.
|
|
21
|
+
|
|
22
|
+
Must be between 0 and NUM_PMP_ENTRIES, inclusive.
|
|
23
|
+
long_name: TODO
|
|
24
|
+
schema:
|
|
25
|
+
type: integer
|
|
26
|
+
minimum: 0
|
|
27
|
+
maximum: 64
|
|
28
|
+
definedBy:
|
|
29
|
+
param:
|
|
30
|
+
name: NUM_PMP_ENTRIES
|
|
31
|
+
greaterThan: 0
|
|
32
|
+
requirements:
|
|
33
|
+
idl(): |
|
|
34
|
+
NUM_PMP_ENTRIES == 16 -> NUM_USABLE_PMP_ENTRIES <= 16;
|
|
35
|
+
reason: Usable PMP entries cannot exceed the number of implemented PMP entries
|
|
@@ -0,0 +1,23 @@
|
|
|
1
|
+
# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
|
2
|
+
# SPDX-License-Identifier: BSD-3-Clause-Clear
|
|
3
|
+
|
|
4
|
+
# yaml-language-server: $schema=../../../schemas/param_schema.json
|
|
5
|
+
|
|
6
|
+
$schema: param_schema.json#
|
|
7
|
+
kind: parameter
|
|
8
|
+
name: PMP_NA4_SUPPORTED
|
|
9
|
+
description: |
|
|
10
|
+
Whether or not the Naturally Aligned four-byte (NA4) PMP address matching
|
|
11
|
+
mode is supported.
|
|
12
|
+
|
|
13
|
+
long_name: PMP NA4 mode supported
|
|
14
|
+
schema:
|
|
15
|
+
type: boolean
|
|
16
|
+
definedBy:
|
|
17
|
+
param:
|
|
18
|
+
name: NUM_PMP_ENTRIES
|
|
19
|
+
greaterThan: 0
|
|
20
|
+
requirements:
|
|
21
|
+
idl(): |
|
|
22
|
+
PMP_NA4_SUPPORTED -> (PMP_GRANULARITY == 2);
|
|
23
|
+
reason: NA4 is not valid when the PMP granularity is larger than 4 bytes
|
|
@@ -5,15 +5,15 @@
|
|
|
5
5
|
|
|
6
6
|
$schema: param_schema.json#
|
|
7
7
|
kind: parameter
|
|
8
|
-
name:
|
|
9
|
-
description:
|
|
10
|
-
|
|
8
|
+
name: PMP_NAPOT_SUPPORTED
|
|
9
|
+
description: |
|
|
10
|
+
Whether or not the Naturally Aligned Power-Of-Two (NAPOT) PMP address
|
|
11
|
+
matching mode is supported.
|
|
12
|
+
|
|
13
|
+
long_name: PMP NAPOT mode supported
|
|
11
14
|
schema:
|
|
12
15
|
type: boolean
|
|
13
|
-
requirements:
|
|
14
|
-
idl(): |
|
|
15
|
-
!STVEC_MODE_DIRECT -> STVEC_MODE_VECTORED;
|
|
16
|
-
reason: stvec must support at least one mode
|
|
17
16
|
definedBy:
|
|
18
|
-
|
|
19
|
-
name:
|
|
17
|
+
param:
|
|
18
|
+
name: NUM_PMP_ENTRIES
|
|
19
|
+
greaterThan: 0
|
|
@@ -5,14 +5,14 @@
|
|
|
5
5
|
|
|
6
6
|
$schema: param_schema.json#
|
|
7
7
|
kind: parameter
|
|
8
|
-
name:
|
|
8
|
+
name: PMP_TOR_SUPPORTED
|
|
9
9
|
description: |
|
|
10
|
-
Whether or not
|
|
10
|
+
Whether or not the Top-of-Range (TOR) PMP address matching mode is supported.
|
|
11
11
|
|
|
12
|
-
|
|
13
|
-
long_name: TODO
|
|
12
|
+
long_name: PMP TOR mode supported
|
|
14
13
|
schema:
|
|
15
14
|
type: boolean
|
|
16
15
|
definedBy:
|
|
17
|
-
|
|
18
|
-
name:
|
|
16
|
+
param:
|
|
17
|
+
name: NUM_PMP_ENTRIES
|
|
18
|
+
greaterThan: 0
|
|
@@ -10,10 +10,11 @@ description: |
|
|
|
10
10
|
The number of implemented bits in `stval`.
|
|
11
11
|
|
|
12
12
|
Must be greater than or equal to _max_(`PHYS_ADDR_WIDTH`, `VA_SIZE`)
|
|
13
|
-
long_name:
|
|
13
|
+
long_name: "`stval` implemented bits"
|
|
14
14
|
schema:
|
|
15
15
|
type: integer
|
|
16
|
-
|
|
16
|
+
minimum: 0
|
|
17
|
+
maximum: 64
|
|
17
18
|
definedBy:
|
|
18
19
|
extension:
|
|
19
20
|
name: S
|
|
@@ -0,0 +1,100 @@
|
|
|
1
|
+
# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
|
2
|
+
# SPDX-License-Identifier: BSD-3-Clause-Clear
|
|
3
|
+
|
|
4
|
+
# yaml-language-server: $schema=../../../schemas/param_schema.json
|
|
5
|
+
|
|
6
|
+
$schema: param_schema.json#
|
|
7
|
+
kind: parameter
|
|
8
|
+
name: STVEC_BASE_ALIGNMENT_VECTORED
|
|
9
|
+
long_name: |
|
|
10
|
+
Minimum alignment of `stvec.BASE` when `stvec.MODE` is 1 (Vectored)
|
|
11
|
+
definedBy:
|
|
12
|
+
allOf:
|
|
13
|
+
- extension:
|
|
14
|
+
name: S
|
|
15
|
+
- param:
|
|
16
|
+
name: STVEC_MODES
|
|
17
|
+
includes: 1
|
|
18
|
+
reason: Only relevant when vectored mode is supported
|
|
19
|
+
description: |
|
|
20
|
+
Minimum alignment of the base pointer when `stvec.MODE` is Vectored. Because
|
|
21
|
+
`stvec` excludes the two least-significant bits of the base, the minimum
|
|
22
|
+
alignment cannot be less than 4 bytes.
|
|
23
|
+
schema:
|
|
24
|
+
description: An unsigned power of 2 greater than or equal to 4 that fits in 64 bits
|
|
25
|
+
default: 0x4
|
|
26
|
+
enum:
|
|
27
|
+
[
|
|
28
|
+
0x4,
|
|
29
|
+
0x8,
|
|
30
|
+
0x10,
|
|
31
|
+
0x20,
|
|
32
|
+
0x40,
|
|
33
|
+
0x80,
|
|
34
|
+
0x100,
|
|
35
|
+
0x200,
|
|
36
|
+
0x400,
|
|
37
|
+
0x800,
|
|
38
|
+
0x1000,
|
|
39
|
+
0x2000,
|
|
40
|
+
0x4000,
|
|
41
|
+
0x8000,
|
|
42
|
+
0x10000,
|
|
43
|
+
0x20000,
|
|
44
|
+
0x40000,
|
|
45
|
+
0x80000,
|
|
46
|
+
0x100000,
|
|
47
|
+
0x200000,
|
|
48
|
+
0x400000,
|
|
49
|
+
0x800000,
|
|
50
|
+
0x1000000,
|
|
51
|
+
0x2000000,
|
|
52
|
+
0x4000000,
|
|
53
|
+
0x8000000,
|
|
54
|
+
0x10000000,
|
|
55
|
+
0x20000000,
|
|
56
|
+
0x40000000,
|
|
57
|
+
0x80000000,
|
|
58
|
+
0x100000000,
|
|
59
|
+
0x200000000,
|
|
60
|
+
0x400000000,
|
|
61
|
+
0x800000000,
|
|
62
|
+
0x1000000000,
|
|
63
|
+
0x2000000000,
|
|
64
|
+
0x4000000000,
|
|
65
|
+
0x8000000000,
|
|
66
|
+
0x10000000000,
|
|
67
|
+
0x20000000000,
|
|
68
|
+
0x40000000000,
|
|
69
|
+
0x80000000000,
|
|
70
|
+
0x100000000000,
|
|
71
|
+
0x200000000000,
|
|
72
|
+
0x400000000000,
|
|
73
|
+
0x800000000000,
|
|
74
|
+
0x1000000000000,
|
|
75
|
+
0x2000000000000,
|
|
76
|
+
0x4000000000000,
|
|
77
|
+
0x8000000000000,
|
|
78
|
+
0x10000000000000,
|
|
79
|
+
0x20000000000000,
|
|
80
|
+
0x40000000000000,
|
|
81
|
+
0x80000000000000,
|
|
82
|
+
0x100000000000000,
|
|
83
|
+
0x200000000000000,
|
|
84
|
+
0x400000000000000,
|
|
85
|
+
0x800000000000000,
|
|
86
|
+
0x1000000000000000,
|
|
87
|
+
0x2000000000000000,
|
|
88
|
+
0x4000000000000000,
|
|
89
|
+
0x8000000000000000,
|
|
90
|
+
]
|
|
91
|
+
|
|
92
|
+
requirements:
|
|
93
|
+
if:
|
|
94
|
+
param:
|
|
95
|
+
name: SXLEN
|
|
96
|
+
includes: 32
|
|
97
|
+
then:
|
|
98
|
+
param:
|
|
99
|
+
name: STVEC_BASE_ALIGNMENT_VECTORED
|
|
100
|
+
lessThanOrEqual: 0x80000000
|
|
@@ -0,0 +1,31 @@
|
|
|
1
|
+
# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
|
2
|
+
# SPDX-License-Identifier: BSD-3-Clause-Clear
|
|
3
|
+
|
|
4
|
+
# yaml-language-server: $schema=../../../schemas/param_schema.json
|
|
5
|
+
|
|
6
|
+
$schema: param_schema.json#
|
|
7
|
+
kind: parameter
|
|
8
|
+
name: STVEC_MODES
|
|
9
|
+
long_name: |
|
|
10
|
+
Modes supported by `stvec.MODE`
|
|
11
|
+
definedBy:
|
|
12
|
+
extension:
|
|
13
|
+
name: S
|
|
14
|
+
description: |
|
|
15
|
+
Options:
|
|
16
|
+
|
|
17
|
+
0::
|
|
18
|
+
Direct; All traps set `pc` to `stvec.BASE`
|
|
19
|
+
1::
|
|
20
|
+
Vectored; Asynchronous interrupts set `pc` to `stvec.BASE` + 4 x cause.
|
|
21
|
+
|
|
22
|
+
If only one mode is given, `stvec.MODE` is assumed to be read-only with that value.
|
|
23
|
+
Otherwise, `stvec.MODE` is read-write.
|
|
24
|
+
schema:
|
|
25
|
+
type: array
|
|
26
|
+
items:
|
|
27
|
+
type: integer
|
|
28
|
+
enum: [0, 1]
|
|
29
|
+
minItems: 1
|
|
30
|
+
maxItems: 2
|
|
31
|
+
uniqueItems: true
|
|
@@ -9,8 +9,8 @@ name: SXLEN
|
|
|
9
9
|
description: |
|
|
10
10
|
Set of XLENs supported in S-mode. Can be one of:
|
|
11
11
|
|
|
12
|
-
* 32:
|
|
13
|
-
* 64:
|
|
12
|
+
* [32]: SXLEN is always 32
|
|
13
|
+
* [64]: SXLEN is always 64
|
|
14
14
|
* [32, 64]: SXLEN can be changed (via mstatus.SXL) between 32 and 64
|
|
15
15
|
long_name: TODO
|
|
16
16
|
schema:
|
|
@@ -7,7 +7,7 @@ $schema: param_schema.json#
|
|
|
7
7
|
kind: parameter
|
|
8
8
|
name: TINST_VALUE_ON_FINAL_INSTRUCTION_GUEST_PAGE_FAULT
|
|
9
9
|
description: |
|
|
10
|
-
Value
|
|
10
|
+
Value written into htinst/mtinst when there is an instruction guest-page fault on a final translation.
|
|
11
11
|
|
|
12
12
|
Possible values:
|
|
13
13
|
* "always zero": Always write the value zero
|