therubyracer 0.4.9-x86-linux

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Files changed (637) hide show
  1. data/.gitignore +11 -0
  2. data/.gitmodules +3 -0
  3. data/Doxyfile +1514 -0
  4. data/History.txt +43 -0
  5. data/README.rdoc +157 -0
  6. data/Rakefile +51 -0
  7. data/docs/data_conversion.txt +18 -0
  8. data/ext/v8/callbacks.cpp +160 -0
  9. data/ext/v8/callbacks.h +14 -0
  10. data/ext/v8/convert_ruby.cpp +8 -0
  11. data/ext/v8/convert_ruby.h +99 -0
  12. data/ext/v8/convert_string.cpp +10 -0
  13. data/ext/v8/convert_string.h +73 -0
  14. data/ext/v8/convert_v8.cpp +9 -0
  15. data/ext/v8/convert_v8.h +121 -0
  16. data/ext/v8/converters.cpp +83 -0
  17. data/ext/v8/converters.h +23 -0
  18. data/ext/v8/extconf.rb +36 -0
  19. data/ext/v8/upstream/2.0.6/.gitignore +26 -0
  20. data/ext/v8/upstream/2.0.6/AUTHORS +23 -0
  21. data/ext/v8/upstream/2.0.6/ChangeLog +1479 -0
  22. data/ext/v8/upstream/2.0.6/LICENSE +55 -0
  23. data/ext/v8/upstream/2.0.6/SConstruct +1028 -0
  24. data/ext/v8/upstream/2.0.6/include/v8-debug.h +275 -0
  25. data/ext/v8/upstream/2.0.6/include/v8.h +3236 -0
  26. data/ext/v8/upstream/2.0.6/src/SConscript +283 -0
  27. data/ext/v8/upstream/2.0.6/src/accessors.cc +695 -0
  28. data/ext/v8/upstream/2.0.6/src/accessors.h +114 -0
  29. data/ext/v8/upstream/2.0.6/src/allocation.cc +198 -0
  30. data/ext/v8/upstream/2.0.6/src/allocation.h +169 -0
  31. data/ext/v8/upstream/2.0.6/src/api.cc +3831 -0
  32. data/ext/v8/upstream/2.0.6/src/api.h +479 -0
  33. data/ext/v8/upstream/2.0.6/src/apinatives.js +110 -0
  34. data/ext/v8/upstream/2.0.6/src/apiutils.h +69 -0
  35. data/ext/v8/upstream/2.0.6/src/arguments.h +97 -0
  36. data/ext/v8/upstream/2.0.6/src/arm/assembler-arm-inl.h +277 -0
  37. data/ext/v8/upstream/2.0.6/src/arm/assembler-arm.cc +1821 -0
  38. data/ext/v8/upstream/2.0.6/src/arm/assembler-arm.h +1027 -0
  39. data/ext/v8/upstream/2.0.6/src/arm/assembler-thumb2-inl.h +267 -0
  40. data/ext/v8/upstream/2.0.6/src/arm/assembler-thumb2.cc +1821 -0
  41. data/ext/v8/upstream/2.0.6/src/arm/assembler-thumb2.h +1027 -0
  42. data/ext/v8/upstream/2.0.6/src/arm/builtins-arm.cc +1271 -0
  43. data/ext/v8/upstream/2.0.6/src/arm/codegen-arm-inl.h +74 -0
  44. data/ext/v8/upstream/2.0.6/src/arm/codegen-arm.cc +6682 -0
  45. data/ext/v8/upstream/2.0.6/src/arm/codegen-arm.h +535 -0
  46. data/ext/v8/upstream/2.0.6/src/arm/constants-arm.cc +112 -0
  47. data/ext/v8/upstream/2.0.6/src/arm/constants-arm.h +347 -0
  48. data/ext/v8/upstream/2.0.6/src/arm/cpu-arm.cc +132 -0
  49. data/ext/v8/upstream/2.0.6/src/arm/debug-arm.cc +213 -0
  50. data/ext/v8/upstream/2.0.6/src/arm/disasm-arm.cc +1166 -0
  51. data/ext/v8/upstream/2.0.6/src/arm/fast-codegen-arm.cc +1698 -0
  52. data/ext/v8/upstream/2.0.6/src/arm/frames-arm.cc +123 -0
  53. data/ext/v8/upstream/2.0.6/src/arm/frames-arm.h +162 -0
  54. data/ext/v8/upstream/2.0.6/src/arm/ic-arm.cc +849 -0
  55. data/ext/v8/upstream/2.0.6/src/arm/jump-target-arm.cc +238 -0
  56. data/ext/v8/upstream/2.0.6/src/arm/macro-assembler-arm.cc +1259 -0
  57. data/ext/v8/upstream/2.0.6/src/arm/macro-assembler-arm.h +423 -0
  58. data/ext/v8/upstream/2.0.6/src/arm/regexp-macro-assembler-arm.cc +1266 -0
  59. data/ext/v8/upstream/2.0.6/src/arm/regexp-macro-assembler-arm.h +282 -0
  60. data/ext/v8/upstream/2.0.6/src/arm/register-allocator-arm-inl.h +103 -0
  61. data/ext/v8/upstream/2.0.6/src/arm/register-allocator-arm.cc +59 -0
  62. data/ext/v8/upstream/2.0.6/src/arm/register-allocator-arm.h +43 -0
  63. data/ext/v8/upstream/2.0.6/src/arm/simulator-arm.cc +2264 -0
  64. data/ext/v8/upstream/2.0.6/src/arm/simulator-arm.h +306 -0
  65. data/ext/v8/upstream/2.0.6/src/arm/stub-cache-arm.cc +1516 -0
  66. data/ext/v8/upstream/2.0.6/src/arm/virtual-frame-arm.cc +412 -0
  67. data/ext/v8/upstream/2.0.6/src/arm/virtual-frame-arm.h +532 -0
  68. data/ext/v8/upstream/2.0.6/src/array.js +1154 -0
  69. data/ext/v8/upstream/2.0.6/src/assembler.cc +772 -0
  70. data/ext/v8/upstream/2.0.6/src/assembler.h +525 -0
  71. data/ext/v8/upstream/2.0.6/src/ast.cc +512 -0
  72. data/ext/v8/upstream/2.0.6/src/ast.h +1820 -0
  73. data/ext/v8/upstream/2.0.6/src/bootstrapper.cc +1680 -0
  74. data/ext/v8/upstream/2.0.6/src/bootstrapper.h +103 -0
  75. data/ext/v8/upstream/2.0.6/src/builtins.cc +851 -0
  76. data/ext/v8/upstream/2.0.6/src/builtins.h +245 -0
  77. data/ext/v8/upstream/2.0.6/src/bytecodes-irregexp.h +104 -0
  78. data/ext/v8/upstream/2.0.6/src/char-predicates-inl.h +86 -0
  79. data/ext/v8/upstream/2.0.6/src/char-predicates.h +65 -0
  80. data/ext/v8/upstream/2.0.6/src/checks.cc +100 -0
  81. data/ext/v8/upstream/2.0.6/src/checks.h +284 -0
  82. data/ext/v8/upstream/2.0.6/src/code-stubs.cc +164 -0
  83. data/ext/v8/upstream/2.0.6/src/code-stubs.h +164 -0
  84. data/ext/v8/upstream/2.0.6/src/code.h +68 -0
  85. data/ext/v8/upstream/2.0.6/src/codegen-inl.h +88 -0
  86. data/ext/v8/upstream/2.0.6/src/codegen.cc +504 -0
  87. data/ext/v8/upstream/2.0.6/src/codegen.h +522 -0
  88. data/ext/v8/upstream/2.0.6/src/compilation-cache.cc +490 -0
  89. data/ext/v8/upstream/2.0.6/src/compilation-cache.h +98 -0
  90. data/ext/v8/upstream/2.0.6/src/compiler.cc +1132 -0
  91. data/ext/v8/upstream/2.0.6/src/compiler.h +107 -0
  92. data/ext/v8/upstream/2.0.6/src/contexts.cc +256 -0
  93. data/ext/v8/upstream/2.0.6/src/contexts.h +345 -0
  94. data/ext/v8/upstream/2.0.6/src/conversions-inl.h +95 -0
  95. data/ext/v8/upstream/2.0.6/src/conversions.cc +709 -0
  96. data/ext/v8/upstream/2.0.6/src/conversions.h +118 -0
  97. data/ext/v8/upstream/2.0.6/src/counters.cc +78 -0
  98. data/ext/v8/upstream/2.0.6/src/counters.h +239 -0
  99. data/ext/v8/upstream/2.0.6/src/cpu.h +65 -0
  100. data/ext/v8/upstream/2.0.6/src/d8-debug.cc +345 -0
  101. data/ext/v8/upstream/2.0.6/src/d8-debug.h +155 -0
  102. data/ext/v8/upstream/2.0.6/src/d8-posix.cc +675 -0
  103. data/ext/v8/upstream/2.0.6/src/d8-readline.cc +128 -0
  104. data/ext/v8/upstream/2.0.6/src/d8-windows.cc +42 -0
  105. data/ext/v8/upstream/2.0.6/src/d8.cc +776 -0
  106. data/ext/v8/upstream/2.0.6/src/d8.h +225 -0
  107. data/ext/v8/upstream/2.0.6/src/d8.js +1625 -0
  108. data/ext/v8/upstream/2.0.6/src/date-delay.js +1138 -0
  109. data/ext/v8/upstream/2.0.6/src/dateparser-inl.h +114 -0
  110. data/ext/v8/upstream/2.0.6/src/dateparser.cc +186 -0
  111. data/ext/v8/upstream/2.0.6/src/dateparser.h +240 -0
  112. data/ext/v8/upstream/2.0.6/src/debug-agent.cc +425 -0
  113. data/ext/v8/upstream/2.0.6/src/debug-agent.h +129 -0
  114. data/ext/v8/upstream/2.0.6/src/debug-delay.js +2073 -0
  115. data/ext/v8/upstream/2.0.6/src/debug.cc +2751 -0
  116. data/ext/v8/upstream/2.0.6/src/debug.h +866 -0
  117. data/ext/v8/upstream/2.0.6/src/disasm.h +77 -0
  118. data/ext/v8/upstream/2.0.6/src/disassembler.cc +318 -0
  119. data/ext/v8/upstream/2.0.6/src/disassembler.h +56 -0
  120. data/ext/v8/upstream/2.0.6/src/dtoa-config.c +91 -0
  121. data/ext/v8/upstream/2.0.6/src/execution.cc +701 -0
  122. data/ext/v8/upstream/2.0.6/src/execution.h +312 -0
  123. data/ext/v8/upstream/2.0.6/src/factory.cc +957 -0
  124. data/ext/v8/upstream/2.0.6/src/factory.h +393 -0
  125. data/ext/v8/upstream/2.0.6/src/fast-codegen.cc +725 -0
  126. data/ext/v8/upstream/2.0.6/src/fast-codegen.h +371 -0
  127. data/ext/v8/upstream/2.0.6/src/flag-definitions.h +426 -0
  128. data/ext/v8/upstream/2.0.6/src/flags.cc +555 -0
  129. data/ext/v8/upstream/2.0.6/src/flags.h +81 -0
  130. data/ext/v8/upstream/2.0.6/src/frame-element.cc +45 -0
  131. data/ext/v8/upstream/2.0.6/src/frame-element.h +235 -0
  132. data/ext/v8/upstream/2.0.6/src/frames-inl.h +215 -0
  133. data/ext/v8/upstream/2.0.6/src/frames.cc +749 -0
  134. data/ext/v8/upstream/2.0.6/src/frames.h +659 -0
  135. data/ext/v8/upstream/2.0.6/src/func-name-inferrer.cc +76 -0
  136. data/ext/v8/upstream/2.0.6/src/func-name-inferrer.h +135 -0
  137. data/ext/v8/upstream/2.0.6/src/global-handles.cc +516 -0
  138. data/ext/v8/upstream/2.0.6/src/global-handles.h +180 -0
  139. data/ext/v8/upstream/2.0.6/src/globals.h +608 -0
  140. data/ext/v8/upstream/2.0.6/src/handles-inl.h +76 -0
  141. data/ext/v8/upstream/2.0.6/src/handles.cc +811 -0
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  143. data/ext/v8/upstream/2.0.6/src/hashmap.cc +226 -0
  144. data/ext/v8/upstream/2.0.6/src/hashmap.h +120 -0
  145. data/ext/v8/upstream/2.0.6/src/heap-inl.h +407 -0
  146. data/ext/v8/upstream/2.0.6/src/heap-profiler.cc +695 -0
  147. data/ext/v8/upstream/2.0.6/src/heap-profiler.h +277 -0
  148. data/ext/v8/upstream/2.0.6/src/heap.cc +4204 -0
  149. data/ext/v8/upstream/2.0.6/src/heap.h +1704 -0
  150. data/ext/v8/upstream/2.0.6/src/ia32/assembler-ia32-inl.h +325 -0
  151. data/ext/v8/upstream/2.0.6/src/ia32/assembler-ia32.cc +2375 -0
  152. data/ext/v8/upstream/2.0.6/src/ia32/assembler-ia32.h +914 -0
  153. data/ext/v8/upstream/2.0.6/src/ia32/builtins-ia32.cc +1222 -0
  154. data/ext/v8/upstream/2.0.6/src/ia32/codegen-ia32-inl.h +46 -0
  155. data/ext/v8/upstream/2.0.6/src/ia32/codegen-ia32.cc +9770 -0
  156. data/ext/v8/upstream/2.0.6/src/ia32/codegen-ia32.h +834 -0
  157. data/ext/v8/upstream/2.0.6/src/ia32/cpu-ia32.cc +79 -0
  158. data/ext/v8/upstream/2.0.6/src/ia32/debug-ia32.cc +208 -0
  159. data/ext/v8/upstream/2.0.6/src/ia32/disasm-ia32.cc +1357 -0
  160. data/ext/v8/upstream/2.0.6/src/ia32/fast-codegen-ia32.cc +1813 -0
  161. data/ext/v8/upstream/2.0.6/src/ia32/frames-ia32.cc +111 -0
  162. data/ext/v8/upstream/2.0.6/src/ia32/frames-ia32.h +135 -0
  163. data/ext/v8/upstream/2.0.6/src/ia32/ic-ia32.cc +1490 -0
  164. data/ext/v8/upstream/2.0.6/src/ia32/jump-target-ia32.cc +432 -0
  165. data/ext/v8/upstream/2.0.6/src/ia32/macro-assembler-ia32.cc +1517 -0
  166. data/ext/v8/upstream/2.0.6/src/ia32/macro-assembler-ia32.h +528 -0
  167. data/ext/v8/upstream/2.0.6/src/ia32/regexp-macro-assembler-ia32.cc +1219 -0
  168. data/ext/v8/upstream/2.0.6/src/ia32/regexp-macro-assembler-ia32.h +230 -0
  169. data/ext/v8/upstream/2.0.6/src/ia32/register-allocator-ia32-inl.h +82 -0
  170. data/ext/v8/upstream/2.0.6/src/ia32/register-allocator-ia32.cc +99 -0
  171. data/ext/v8/upstream/2.0.6/src/ia32/register-allocator-ia32.h +43 -0
  172. data/ext/v8/upstream/2.0.6/src/ia32/simulator-ia32.cc +30 -0
  173. data/ext/v8/upstream/2.0.6/src/ia32/simulator-ia32.h +62 -0
  174. data/ext/v8/upstream/2.0.6/src/ia32/stub-cache-ia32.cc +1961 -0
  175. data/ext/v8/upstream/2.0.6/src/ia32/virtual-frame-ia32.cc +1105 -0
  176. data/ext/v8/upstream/2.0.6/src/ia32/virtual-frame-ia32.h +580 -0
  177. data/ext/v8/upstream/2.0.6/src/ic-inl.h +93 -0
  178. data/ext/v8/upstream/2.0.6/src/ic.cc +1426 -0
  179. data/ext/v8/upstream/2.0.6/src/ic.h +443 -0
  180. data/ext/v8/upstream/2.0.6/src/interpreter-irregexp.cc +646 -0
  181. data/ext/v8/upstream/2.0.6/src/interpreter-irregexp.h +48 -0
  182. data/ext/v8/upstream/2.0.6/src/json-delay.js +254 -0
  183. data/ext/v8/upstream/2.0.6/src/jsregexp.cc +5234 -0
  184. data/ext/v8/upstream/2.0.6/src/jsregexp.h +1439 -0
  185. data/ext/v8/upstream/2.0.6/src/jump-target-inl.h +49 -0
  186. data/ext/v8/upstream/2.0.6/src/jump-target.cc +383 -0
  187. data/ext/v8/upstream/2.0.6/src/jump-target.h +280 -0
  188. data/ext/v8/upstream/2.0.6/src/list-inl.h +166 -0
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  190. data/ext/v8/upstream/2.0.6/src/log-inl.h +126 -0
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  195. data/ext/v8/upstream/2.0.6/src/macro-assembler.h +93 -0
  196. data/ext/v8/upstream/2.0.6/src/macros.py +137 -0
  197. data/ext/v8/upstream/2.0.6/src/mark-compact.cc +2007 -0
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  215. data/ext/v8/upstream/2.0.6/src/platform-freebsd.cc +645 -0
  216. data/ext/v8/upstream/2.0.6/src/platform-linux.cc +808 -0
  217. data/ext/v8/upstream/2.0.6/src/platform-macos.cc +643 -0
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  231. data/ext/v8/upstream/2.0.6/src/regexp-macro-assembler-tracer.cc +356 -0
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@@ -0,0 +1,914 @@
1
+ // Copyright (c) 1994-2006 Sun Microsystems Inc.
2
+ // All Rights Reserved.
3
+ //
4
+ // Redistribution and use in source and binary forms, with or without
5
+ // modification, are permitted provided that the following conditions are
6
+ // met:
7
+ //
8
+ // - Redistributions of source code must retain the above copyright notice,
9
+ // this list of conditions and the following disclaimer.
10
+ //
11
+ // - Redistribution in binary form must reproduce the above copyright
12
+ // notice, this list of conditions and the following disclaimer in the
13
+ // documentation and/or other materials provided with the distribution.
14
+ //
15
+ // - Neither the name of Sun Microsystems or the names of contributors may
16
+ // be used to endorse or promote products derived from this software without
17
+ // specific prior written permission.
18
+ //
19
+ // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
20
+ // IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21
+ // THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22
+ // PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23
+ // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24
+ // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25
+ // PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
26
+ // PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
27
+ // LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
28
+ // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
29
+ // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30
+
31
+ // The original source code covered by the above license above has been
32
+ // modified significantly by Google Inc.
33
+ // Copyright 2006-2008 the V8 project authors. All rights reserved.
34
+
35
+ // A light-weight IA32 Assembler.
36
+
37
+ #ifndef V8_IA32_ASSEMBLER_IA32_H_
38
+ #define V8_IA32_ASSEMBLER_IA32_H_
39
+
40
+ #include "serialize.h"
41
+
42
+ namespace v8 {
43
+ namespace internal {
44
+
45
+ // CPU Registers.
46
+ //
47
+ // 1) We would prefer to use an enum, but enum values are assignment-
48
+ // compatible with int, which has caused code-generation bugs.
49
+ //
50
+ // 2) We would prefer to use a class instead of a struct but we don't like
51
+ // the register initialization to depend on the particular initialization
52
+ // order (which appears to be different on OS X, Linux, and Windows for the
53
+ // installed versions of C++ we tried). Using a struct permits C-style
54
+ // "initialization". Also, the Register objects cannot be const as this
55
+ // forces initialization stubs in MSVC, making us dependent on initialization
56
+ // order.
57
+ //
58
+ // 3) By not using an enum, we are possibly preventing the compiler from
59
+ // doing certain constant folds, which may significantly reduce the
60
+ // code generated for some assembly instructions (because they boil down
61
+ // to a few constants). If this is a problem, we could change the code
62
+ // such that we use an enum in optimized mode, and the struct in debug
63
+ // mode. This way we get the compile-time error checking in debug mode
64
+ // and best performance in optimized code.
65
+ //
66
+ struct Register {
67
+ bool is_valid() const { return 0 <= code_ && code_ < 8; }
68
+ bool is(Register reg) const { return code_ == reg.code_; }
69
+ // eax, ebx, ecx and edx are byte registers, the rest are not.
70
+ bool is_byte_register() const { return code_ <= 3; }
71
+ int code() const {
72
+ ASSERT(is_valid());
73
+ return code_;
74
+ }
75
+ int bit() const {
76
+ ASSERT(is_valid());
77
+ return 1 << code_;
78
+ }
79
+
80
+ // (unfortunately we can't make this private in a struct)
81
+ int code_;
82
+ };
83
+
84
+ const Register eax = { 0 };
85
+ const Register ecx = { 1 };
86
+ const Register edx = { 2 };
87
+ const Register ebx = { 3 };
88
+ const Register esp = { 4 };
89
+ const Register ebp = { 5 };
90
+ const Register esi = { 6 };
91
+ const Register edi = { 7 };
92
+ const Register no_reg = { -1 };
93
+
94
+
95
+ struct XMMRegister {
96
+ bool is_valid() const { return 0 <= code_ && code_ < 2; } // currently
97
+ int code() const {
98
+ ASSERT(is_valid());
99
+ return code_;
100
+ }
101
+
102
+ int code_;
103
+ };
104
+
105
+ const XMMRegister xmm0 = { 0 };
106
+ const XMMRegister xmm1 = { 1 };
107
+ const XMMRegister xmm2 = { 2 };
108
+ const XMMRegister xmm3 = { 3 };
109
+ const XMMRegister xmm4 = { 4 };
110
+ const XMMRegister xmm5 = { 5 };
111
+ const XMMRegister xmm6 = { 6 };
112
+ const XMMRegister xmm7 = { 7 };
113
+
114
+ enum Condition {
115
+ // any value < 0 is considered no_condition
116
+ no_condition = -1,
117
+
118
+ overflow = 0,
119
+ no_overflow = 1,
120
+ below = 2,
121
+ above_equal = 3,
122
+ equal = 4,
123
+ not_equal = 5,
124
+ below_equal = 6,
125
+ above = 7,
126
+ negative = 8,
127
+ positive = 9,
128
+ parity_even = 10,
129
+ parity_odd = 11,
130
+ less = 12,
131
+ greater_equal = 13,
132
+ less_equal = 14,
133
+ greater = 15,
134
+
135
+ // aliases
136
+ carry = below,
137
+ not_carry = above_equal,
138
+ zero = equal,
139
+ not_zero = not_equal,
140
+ sign = negative,
141
+ not_sign = positive
142
+ };
143
+
144
+
145
+ // Returns the equivalent of !cc.
146
+ // Negation of the default no_condition (-1) results in a non-default
147
+ // no_condition value (-2). As long as tests for no_condition check
148
+ // for condition < 0, this will work as expected.
149
+ inline Condition NegateCondition(Condition cc);
150
+
151
+ // Corresponds to transposing the operands of a comparison.
152
+ inline Condition ReverseCondition(Condition cc) {
153
+ switch (cc) {
154
+ case below:
155
+ return above;
156
+ case above:
157
+ return below;
158
+ case above_equal:
159
+ return below_equal;
160
+ case below_equal:
161
+ return above_equal;
162
+ case less:
163
+ return greater;
164
+ case greater:
165
+ return less;
166
+ case greater_equal:
167
+ return less_equal;
168
+ case less_equal:
169
+ return greater_equal;
170
+ default:
171
+ return cc;
172
+ };
173
+ }
174
+
175
+ enum Hint {
176
+ no_hint = 0,
177
+ not_taken = 0x2e,
178
+ taken = 0x3e
179
+ };
180
+
181
+ // The result of negating a hint is as if the corresponding condition
182
+ // were negated by NegateCondition. That is, no_hint is mapped to
183
+ // itself and not_taken and taken are mapped to each other.
184
+ inline Hint NegateHint(Hint hint) {
185
+ return (hint == no_hint)
186
+ ? no_hint
187
+ : ((hint == not_taken) ? taken : not_taken);
188
+ }
189
+
190
+
191
+ // -----------------------------------------------------------------------------
192
+ // Machine instruction Immediates
193
+
194
+ class Immediate BASE_EMBEDDED {
195
+ public:
196
+ inline explicit Immediate(int x);
197
+ inline explicit Immediate(const char* s);
198
+ inline explicit Immediate(const ExternalReference& ext);
199
+ inline explicit Immediate(Handle<Object> handle);
200
+ inline explicit Immediate(Smi* value);
201
+
202
+ static Immediate CodeRelativeOffset(Label* label) {
203
+ return Immediate(label);
204
+ }
205
+
206
+ bool is_zero() const { return x_ == 0 && rmode_ == RelocInfo::NONE; }
207
+ bool is_int8() const {
208
+ return -128 <= x_ && x_ < 128 && rmode_ == RelocInfo::NONE;
209
+ }
210
+ bool is_int16() const {
211
+ return -32768 <= x_ && x_ < 32768 && rmode_ == RelocInfo::NONE;
212
+ }
213
+
214
+ private:
215
+ inline explicit Immediate(Label* value);
216
+
217
+ int x_;
218
+ RelocInfo::Mode rmode_;
219
+
220
+ friend class Assembler;
221
+ };
222
+
223
+
224
+ // -----------------------------------------------------------------------------
225
+ // Machine instruction Operands
226
+
227
+ enum ScaleFactor {
228
+ times_1 = 0,
229
+ times_2 = 1,
230
+ times_4 = 2,
231
+ times_8 = 3,
232
+ times_pointer_size = times_4,
233
+ times_half_pointer_size = times_2
234
+ };
235
+
236
+
237
+ class Operand BASE_EMBEDDED {
238
+ public:
239
+ // reg
240
+ INLINE(explicit Operand(Register reg));
241
+
242
+ // [disp/r]
243
+ INLINE(explicit Operand(int32_t disp, RelocInfo::Mode rmode));
244
+ // disp only must always be relocated
245
+
246
+ // [base + disp/r]
247
+ explicit Operand(Register base, int32_t disp,
248
+ RelocInfo::Mode rmode = RelocInfo::NONE);
249
+
250
+ // [base + index*scale + disp/r]
251
+ explicit Operand(Register base,
252
+ Register index,
253
+ ScaleFactor scale,
254
+ int32_t disp,
255
+ RelocInfo::Mode rmode = RelocInfo::NONE);
256
+
257
+ // [index*scale + disp/r]
258
+ explicit Operand(Register index,
259
+ ScaleFactor scale,
260
+ int32_t disp,
261
+ RelocInfo::Mode rmode = RelocInfo::NONE);
262
+
263
+ static Operand StaticVariable(const ExternalReference& ext) {
264
+ return Operand(reinterpret_cast<int32_t>(ext.address()),
265
+ RelocInfo::EXTERNAL_REFERENCE);
266
+ }
267
+
268
+ static Operand StaticArray(Register index,
269
+ ScaleFactor scale,
270
+ const ExternalReference& arr) {
271
+ return Operand(index, scale, reinterpret_cast<int32_t>(arr.address()),
272
+ RelocInfo::EXTERNAL_REFERENCE);
273
+ }
274
+
275
+ // Returns true if this Operand is a wrapper for the specified register.
276
+ bool is_reg(Register reg) const;
277
+
278
+ private:
279
+ byte buf_[6];
280
+ // The number of bytes in buf_.
281
+ unsigned int len_;
282
+ // Only valid if len_ > 4.
283
+ RelocInfo::Mode rmode_;
284
+
285
+ // Set the ModRM byte without an encoded 'reg' register. The
286
+ // register is encoded later as part of the emit_operand operation.
287
+ inline void set_modrm(int mod, Register rm);
288
+
289
+ inline void set_sib(ScaleFactor scale, Register index, Register base);
290
+ inline void set_disp8(int8_t disp);
291
+ inline void set_dispr(int32_t disp, RelocInfo::Mode rmode);
292
+
293
+ friend class Assembler;
294
+ };
295
+
296
+
297
+ // -----------------------------------------------------------------------------
298
+ // A Displacement describes the 32bit immediate field of an instruction which
299
+ // may be used together with a Label in order to refer to a yet unknown code
300
+ // position. Displacements stored in the instruction stream are used to describe
301
+ // the instruction and to chain a list of instructions using the same Label.
302
+ // A Displacement contains 2 different fields:
303
+ //
304
+ // next field: position of next displacement in the chain (0 = end of list)
305
+ // type field: instruction type
306
+ //
307
+ // A next value of null (0) indicates the end of a chain (note that there can
308
+ // be no displacement at position zero, because there is always at least one
309
+ // instruction byte before the displacement).
310
+ //
311
+ // Displacement _data field layout
312
+ //
313
+ // |31.....2|1......0|
314
+ // [ next | type |
315
+
316
+ class Displacement BASE_EMBEDDED {
317
+ public:
318
+ enum Type {
319
+ UNCONDITIONAL_JUMP,
320
+ CODE_RELATIVE,
321
+ OTHER
322
+ };
323
+
324
+ int data() const { return data_; }
325
+ Type type() const { return TypeField::decode(data_); }
326
+ void next(Label* L) const {
327
+ int n = NextField::decode(data_);
328
+ n > 0 ? L->link_to(n) : L->Unuse();
329
+ }
330
+ void link_to(Label* L) { init(L, type()); }
331
+
332
+ explicit Displacement(int data) { data_ = data; }
333
+
334
+ Displacement(Label* L, Type type) { init(L, type); }
335
+
336
+ void print() {
337
+ PrintF("%s (%x) ", (type() == UNCONDITIONAL_JUMP ? "jmp" : "[other]"),
338
+ NextField::decode(data_));
339
+ }
340
+
341
+ private:
342
+ int data_;
343
+
344
+ class TypeField: public BitField<Type, 0, 2> {};
345
+ class NextField: public BitField<int, 2, 32-2> {};
346
+
347
+ void init(Label* L, Type type);
348
+ };
349
+
350
+
351
+
352
+ // CpuFeatures keeps track of which features are supported by the target CPU.
353
+ // Supported features must be enabled by a Scope before use.
354
+ // Example:
355
+ // if (CpuFeatures::IsSupported(SSE2)) {
356
+ // CpuFeatures::Scope fscope(SSE2);
357
+ // // Generate SSE2 floating point code.
358
+ // } else {
359
+ // // Generate standard x87 floating point code.
360
+ // }
361
+ class CpuFeatures : public AllStatic {
362
+ public:
363
+ // Detect features of the target CPU. Set safe defaults if the serializer
364
+ // is enabled (snapshots must be portable).
365
+ static void Probe();
366
+ // Check whether a feature is supported by the target CPU.
367
+ static bool IsSupported(CpuFeature f) {
368
+ if (f == SSE2 && !FLAG_enable_sse2) return false;
369
+ if (f == SSE3 && !FLAG_enable_sse3) return false;
370
+ if (f == CMOV && !FLAG_enable_cmov) return false;
371
+ if (f == RDTSC && !FLAG_enable_rdtsc) return false;
372
+ return (supported_ & (static_cast<uint64_t>(1) << f)) != 0;
373
+ }
374
+ // Check whether a feature is currently enabled.
375
+ static bool IsEnabled(CpuFeature f) {
376
+ return (enabled_ & (static_cast<uint64_t>(1) << f)) != 0;
377
+ }
378
+ // Enable a specified feature within a scope.
379
+ class Scope BASE_EMBEDDED {
380
+ #ifdef DEBUG
381
+ public:
382
+ explicit Scope(CpuFeature f) {
383
+ uint64_t mask = static_cast<uint64_t>(1) << f;
384
+ ASSERT(CpuFeatures::IsSupported(f));
385
+ ASSERT(!Serializer::enabled() || (found_by_runtime_probing_ & mask) == 0);
386
+ old_enabled_ = CpuFeatures::enabled_;
387
+ CpuFeatures::enabled_ |= mask;
388
+ }
389
+ ~Scope() { CpuFeatures::enabled_ = old_enabled_; }
390
+ private:
391
+ uint64_t old_enabled_;
392
+ #else
393
+ public:
394
+ explicit Scope(CpuFeature f) {}
395
+ #endif
396
+ };
397
+ private:
398
+ static uint64_t supported_;
399
+ static uint64_t enabled_;
400
+ static uint64_t found_by_runtime_probing_;
401
+ };
402
+
403
+
404
+ class Assembler : public Malloced {
405
+ private:
406
+ // We check before assembling an instruction that there is sufficient
407
+ // space to write an instruction and its relocation information.
408
+ // The relocation writer's position must be kGap bytes above the end of
409
+ // the generated instructions. This leaves enough space for the
410
+ // longest possible ia32 instruction, 15 bytes, and the longest possible
411
+ // relocation information encoding, RelocInfoWriter::kMaxLength == 16.
412
+ // (There is a 15 byte limit on ia32 instruction length that rules out some
413
+ // otherwise valid instructions.)
414
+ // This allows for a single, fast space check per instruction.
415
+ static const int kGap = 32;
416
+
417
+ public:
418
+ // Create an assembler. Instructions and relocation information are emitted
419
+ // into a buffer, with the instructions starting from the beginning and the
420
+ // relocation information starting from the end of the buffer. See CodeDesc
421
+ // for a detailed comment on the layout (globals.h).
422
+ //
423
+ // If the provided buffer is NULL, the assembler allocates and grows its own
424
+ // buffer, and buffer_size determines the initial buffer size. The buffer is
425
+ // owned by the assembler and deallocated upon destruction of the assembler.
426
+ //
427
+ // If the provided buffer is not NULL, the assembler uses the provided buffer
428
+ // for code generation and assumes its size to be buffer_size. If the buffer
429
+ // is too small, a fatal error occurs. No deallocation of the buffer is done
430
+ // upon destruction of the assembler.
431
+ Assembler(void* buffer, int buffer_size);
432
+ ~Assembler();
433
+
434
+ // GetCode emits any pending (non-emitted) code and fills the descriptor
435
+ // desc. GetCode() is idempotent; it returns the same result if no other
436
+ // Assembler functions are invoked in between GetCode() calls.
437
+ void GetCode(CodeDesc* desc);
438
+
439
+ // Read/Modify the code target in the branch/call instruction at pc.
440
+ inline static Address target_address_at(Address pc);
441
+ inline static void set_target_address_at(Address pc, Address target);
442
+
443
+ // This sets the branch destination (which is in the instruction on x86).
444
+ // This is for calls and branches within generated code.
445
+ inline static void set_target_at(Address instruction_payload,
446
+ Address target) {
447
+ set_target_address_at(instruction_payload, target);
448
+ }
449
+
450
+ // This sets the branch destination (which is in the instruction on x86).
451
+ // This is for calls and branches to runtime code.
452
+ inline static void set_external_target_at(Address instruction_payload,
453
+ Address target) {
454
+ set_target_address_at(instruction_payload, target);
455
+ }
456
+
457
+ static const int kCallTargetSize = kPointerSize;
458
+ static const int kExternalTargetSize = kPointerSize;
459
+
460
+ // Distance between the address of the code target in the call instruction
461
+ // and the return address
462
+ static const int kCallTargetAddressOffset = kPointerSize;
463
+ // Distance between start of patched return sequence and the emitted address
464
+ // to jump to.
465
+ static const int kPatchReturnSequenceAddressOffset = 1; // JMP imm32.
466
+
467
+ static const int kCallInstructionLength = 5;
468
+ static const int kJSReturnSequenceLength = 6;
469
+
470
+ // ---------------------------------------------------------------------------
471
+ // Code generation
472
+ //
473
+ // - function names correspond one-to-one to ia32 instruction mnemonics
474
+ // - unless specified otherwise, instructions operate on 32bit operands
475
+ // - instructions on 8bit (byte) operands/registers have a trailing '_b'
476
+ // - instructions on 16bit (word) operands/registers have a trailing '_w'
477
+ // - naming conflicts with C++ keywords are resolved via a trailing '_'
478
+
479
+ // NOTE ON INTERFACE: Currently, the interface is not very consistent
480
+ // in the sense that some operations (e.g. mov()) can be called in more
481
+ // the one way to generate the same instruction: The Register argument
482
+ // can in some cases be replaced with an Operand(Register) argument.
483
+ // This should be cleaned up and made more orthogonal. The questions
484
+ // is: should we always use Operands instead of Registers where an
485
+ // Operand is possible, or should we have a Register (overloaded) form
486
+ // instead? We must be careful to make sure that the selected instruction
487
+ // is obvious from the parameters to avoid hard-to-find code generation
488
+ // bugs.
489
+
490
+ // Insert the smallest number of nop instructions
491
+ // possible to align the pc offset to a multiple
492
+ // of m. m must be a power of 2.
493
+ void Align(int m);
494
+
495
+ // Stack
496
+ void pushad();
497
+ void popad();
498
+
499
+ void pushfd();
500
+ void popfd();
501
+
502
+ void push(const Immediate& x);
503
+ void push(Register src);
504
+ void push(const Operand& src);
505
+ void push(Label* label, RelocInfo::Mode relocation_mode);
506
+
507
+ void pop(Register dst);
508
+ void pop(const Operand& dst);
509
+
510
+ void enter(const Immediate& size);
511
+ void leave();
512
+
513
+ // Moves
514
+ void mov_b(Register dst, const Operand& src);
515
+ void mov_b(const Operand& dst, int8_t imm8);
516
+ void mov_b(const Operand& dst, Register src);
517
+
518
+ void mov_w(Register dst, const Operand& src);
519
+ void mov_w(const Operand& dst, Register src);
520
+
521
+ void mov(Register dst, int32_t imm32);
522
+ void mov(Register dst, const Immediate& x);
523
+ void mov(Register dst, Handle<Object> handle);
524
+ void mov(Register dst, const Operand& src);
525
+ void mov(Register dst, Register src);
526
+ void mov(const Operand& dst, const Immediate& x);
527
+ void mov(const Operand& dst, Handle<Object> handle);
528
+ void mov(const Operand& dst, Register src);
529
+
530
+ void movsx_b(Register dst, const Operand& src);
531
+
532
+ void movsx_w(Register dst, const Operand& src);
533
+
534
+ void movzx_b(Register dst, const Operand& src);
535
+
536
+ void movzx_w(Register dst, const Operand& src);
537
+
538
+ // Conditional moves
539
+ void cmov(Condition cc, Register dst, int32_t imm32);
540
+ void cmov(Condition cc, Register dst, Handle<Object> handle);
541
+ void cmov(Condition cc, Register dst, const Operand& src);
542
+
543
+ // Repetitive string instructions.
544
+ void rep_movs();
545
+
546
+ // Exchange two registers
547
+ void xchg(Register dst, Register src);
548
+
549
+ // Arithmetics
550
+ void adc(Register dst, int32_t imm32);
551
+ void adc(Register dst, const Operand& src);
552
+
553
+ void add(Register dst, const Operand& src);
554
+ void add(const Operand& dst, const Immediate& x);
555
+
556
+ void and_(Register dst, int32_t imm32);
557
+ void and_(Register dst, const Operand& src);
558
+ void and_(const Operand& src, Register dst);
559
+ void and_(const Operand& dst, const Immediate& x);
560
+
561
+ void cmpb(const Operand& op, int8_t imm8);
562
+ void cmpb_al(const Operand& op);
563
+ void cmpw_ax(const Operand& op);
564
+ void cmpw(const Operand& op, Immediate imm16);
565
+ void cmp(Register reg, int32_t imm32);
566
+ void cmp(Register reg, Handle<Object> handle);
567
+ void cmp(Register reg, const Operand& op);
568
+ void cmp(const Operand& op, const Immediate& imm);
569
+ void cmp(const Operand& op, Handle<Object> handle);
570
+
571
+ void dec_b(Register dst);
572
+
573
+ void dec(Register dst);
574
+ void dec(const Operand& dst);
575
+
576
+ void cdq();
577
+
578
+ void idiv(Register src);
579
+
580
+ // Signed multiply instructions.
581
+ void imul(Register src); // edx:eax = eax * src.
582
+ void imul(Register dst, const Operand& src); // dst = dst * src.
583
+ void imul(Register dst, Register src, int32_t imm32); // dst = src * imm32.
584
+
585
+ void inc(Register dst);
586
+ void inc(const Operand& dst);
587
+
588
+ void lea(Register dst, const Operand& src);
589
+
590
+ // Unsigned multiply instruction.
591
+ void mul(Register src); // edx:eax = eax * reg.
592
+
593
+ void neg(Register dst);
594
+
595
+ void not_(Register dst);
596
+
597
+ void or_(Register dst, int32_t imm32);
598
+ void or_(Register dst, const Operand& src);
599
+ void or_(const Operand& dst, Register src);
600
+ void or_(const Operand& dst, const Immediate& x);
601
+
602
+ void rcl(Register dst, uint8_t imm8);
603
+
604
+ void sar(Register dst, uint8_t imm8);
605
+ void sar_cl(Register dst);
606
+
607
+ void sbb(Register dst, const Operand& src);
608
+
609
+ void shld(Register dst, const Operand& src);
610
+
611
+ void shl(Register dst, uint8_t imm8);
612
+ void shl_cl(Register dst);
613
+
614
+ void shrd(Register dst, const Operand& src);
615
+
616
+ void shr(Register dst, uint8_t imm8);
617
+ void shr_cl(Register dst);
618
+
619
+ void subb(const Operand& dst, int8_t imm8);
620
+ void subb(Register dst, const Operand& src);
621
+ void sub(const Operand& dst, const Immediate& x);
622
+ void sub(Register dst, const Operand& src);
623
+ void sub(const Operand& dst, Register src);
624
+
625
+ void test(Register reg, const Immediate& imm);
626
+ void test(Register reg, const Operand& op);
627
+ void test(const Operand& op, const Immediate& imm);
628
+
629
+ void xor_(Register dst, int32_t imm32);
630
+ void xor_(Register dst, const Operand& src);
631
+ void xor_(const Operand& src, Register dst);
632
+ void xor_(const Operand& dst, const Immediate& x);
633
+
634
+ // Bit operations.
635
+ void bt(const Operand& dst, Register src);
636
+ void bts(const Operand& dst, Register src);
637
+
638
+ // Miscellaneous
639
+ void hlt();
640
+ void int3();
641
+ void nop();
642
+ void rdtsc();
643
+ void ret(int imm16);
644
+
645
+ // Label operations & relative jumps (PPUM Appendix D)
646
+ //
647
+ // Takes a branch opcode (cc) and a label (L) and generates
648
+ // either a backward branch or a forward branch and links it
649
+ // to the label fixup chain. Usage:
650
+ //
651
+ // Label L; // unbound label
652
+ // j(cc, &L); // forward branch to unbound label
653
+ // bind(&L); // bind label to the current pc
654
+ // j(cc, &L); // backward branch to bound label
655
+ // bind(&L); // illegal: a label may be bound only once
656
+ //
657
+ // Note: The same Label can be used for forward and backward branches
658
+ // but it may be bound only once.
659
+
660
+ void bind(Label* L); // binds an unbound label L to the current code position
661
+
662
+ // Calls
663
+ void call(Label* L);
664
+ void call(byte* entry, RelocInfo::Mode rmode);
665
+ void call(const Operand& adr);
666
+ void call(Handle<Code> code, RelocInfo::Mode rmode);
667
+
668
+ // Jumps
669
+ void jmp(Label* L); // unconditional jump to L
670
+ void jmp(byte* entry, RelocInfo::Mode rmode);
671
+ void jmp(const Operand& adr);
672
+ void jmp(Handle<Code> code, RelocInfo::Mode rmode);
673
+
674
+ // Conditional jumps
675
+ void j(Condition cc, Label* L, Hint hint = no_hint);
676
+ void j(Condition cc, byte* entry, RelocInfo::Mode rmode, Hint hint = no_hint);
677
+ void j(Condition cc, Handle<Code> code, Hint hint = no_hint);
678
+
679
+ // Floating-point operations
680
+ void fld(int i);
681
+
682
+ void fld1();
683
+ void fldz();
684
+
685
+ void fld_s(const Operand& adr);
686
+ void fld_d(const Operand& adr);
687
+
688
+ void fstp_s(const Operand& adr);
689
+ void fstp_d(const Operand& adr);
690
+
691
+ void fild_s(const Operand& adr);
692
+ void fild_d(const Operand& adr);
693
+
694
+ void fist_s(const Operand& adr);
695
+
696
+ void fistp_s(const Operand& adr);
697
+ void fistp_d(const Operand& adr);
698
+
699
+ void fisttp_s(const Operand& adr);
700
+ void fisttp_d(const Operand& adr);
701
+
702
+ void fabs();
703
+ void fchs();
704
+ void fcos();
705
+ void fsin();
706
+
707
+ void fadd(int i);
708
+ void fsub(int i);
709
+ void fmul(int i);
710
+ void fdiv(int i);
711
+
712
+ void fisub_s(const Operand& adr);
713
+
714
+ void faddp(int i = 1);
715
+ void fsubp(int i = 1);
716
+ void fsubrp(int i = 1);
717
+ void fmulp(int i = 1);
718
+ void fdivp(int i = 1);
719
+ void fprem();
720
+ void fprem1();
721
+
722
+ void fxch(int i = 1);
723
+ void fincstp();
724
+ void ffree(int i = 0);
725
+
726
+ void ftst();
727
+ void fucomp(int i);
728
+ void fucompp();
729
+ void fucomi(int i);
730
+ void fucomip();
731
+ void fcompp();
732
+ void fnstsw_ax();
733
+ void fwait();
734
+ void fnclex();
735
+
736
+ void frndint();
737
+
738
+ void sahf();
739
+ void setcc(Condition cc, Register reg);
740
+
741
+ void cpuid();
742
+
743
+ // SSE2 instructions
744
+ void cvttss2si(Register dst, const Operand& src);
745
+ void cvttsd2si(Register dst, const Operand& src);
746
+
747
+ void cvtsi2sd(XMMRegister dst, const Operand& src);
748
+
749
+ void addsd(XMMRegister dst, XMMRegister src);
750
+ void subsd(XMMRegister dst, XMMRegister src);
751
+ void mulsd(XMMRegister dst, XMMRegister src);
752
+ void divsd(XMMRegister dst, XMMRegister src);
753
+ void xorpd(XMMRegister dst, XMMRegister src);
754
+
755
+ void comisd(XMMRegister dst, XMMRegister src);
756
+
757
+ void movdqa(XMMRegister dst, const Operand& src);
758
+ void movdqa(const Operand& dst, XMMRegister src);
759
+ void movdqu(XMMRegister dst, const Operand& src);
760
+ void movdqu(const Operand& dst, XMMRegister src);
761
+
762
+ // Use either movsd or movlpd.
763
+ void movdbl(XMMRegister dst, const Operand& src);
764
+ void movdbl(const Operand& dst, XMMRegister src);
765
+
766
+ // Debugging
767
+ void Print();
768
+
769
+ // Check the code size generated from label to here.
770
+ int SizeOfCodeGeneratedSince(Label* l) { return pc_offset() - l->pos(); }
771
+
772
+ // Mark address of the ExitJSFrame code.
773
+ void RecordJSReturn();
774
+
775
+ // Record a comment relocation entry that can be used by a disassembler.
776
+ // Use --debug_code to enable.
777
+ void RecordComment(const char* msg);
778
+
779
+ void RecordPosition(int pos);
780
+ void RecordStatementPosition(int pos);
781
+ void WriteRecordedPositions();
782
+
783
+ // Writes a single word of data in the code stream.
784
+ // Used for inline tables, e.g., jump-tables.
785
+ void dd(uint32_t data, RelocInfo::Mode reloc_info);
786
+
787
+ int pc_offset() const { return pc_ - buffer_; }
788
+ int current_statement_position() const { return current_statement_position_; }
789
+ int current_position() const { return current_position_; }
790
+
791
+ // Check if there is less than kGap bytes available in the buffer.
792
+ // If this is the case, we need to grow the buffer before emitting
793
+ // an instruction or relocation information.
794
+ inline bool overflow() const { return pc_ >= reloc_info_writer.pos() - kGap; }
795
+
796
+ // Get the number of bytes available in the buffer.
797
+ inline int available_space() const { return reloc_info_writer.pos() - pc_; }
798
+
799
+ // Avoid overflows for displacements etc.
800
+ static const int kMaximalBufferSize = 512*MB;
801
+ static const int kMinimalBufferSize = 4*KB;
802
+
803
+ protected:
804
+ void movsd(XMMRegister dst, const Operand& src);
805
+ void movsd(const Operand& dst, XMMRegister src);
806
+
807
+ void emit_sse_operand(XMMRegister reg, const Operand& adr);
808
+ void emit_sse_operand(XMMRegister dst, XMMRegister src);
809
+
810
+
811
+ private:
812
+ byte* addr_at(int pos) { return buffer_ + pos; }
813
+ byte byte_at(int pos) { return buffer_[pos]; }
814
+ uint32_t long_at(int pos) {
815
+ return *reinterpret_cast<uint32_t*>(addr_at(pos));
816
+ }
817
+ void long_at_put(int pos, uint32_t x) {
818
+ *reinterpret_cast<uint32_t*>(addr_at(pos)) = x;
819
+ }
820
+
821
+ // code emission
822
+ void GrowBuffer();
823
+ inline void emit(uint32_t x);
824
+ inline void emit(Handle<Object> handle);
825
+ inline void emit(uint32_t x, RelocInfo::Mode rmode);
826
+ inline void emit(const Immediate& x);
827
+ inline void emit_w(const Immediate& x);
828
+
829
+ // Emit the code-object-relative offset of the label's position
830
+ inline void emit_code_relative_offset(Label* label);
831
+
832
+ // instruction generation
833
+ void emit_arith_b(int op1, int op2, Register dst, int imm8);
834
+
835
+ // Emit a basic arithmetic instruction (i.e. first byte of the family is 0x81)
836
+ // with a given destination expression and an immediate operand. It attempts
837
+ // to use the shortest encoding possible.
838
+ // sel specifies the /n in the modrm byte (see the Intel PRM).
839
+ void emit_arith(int sel, Operand dst, const Immediate& x);
840
+
841
+ void emit_operand(Register reg, const Operand& adr);
842
+
843
+ void emit_farith(int b1, int b2, int i);
844
+
845
+ // labels
846
+ void print(Label* L);
847
+ void bind_to(Label* L, int pos);
848
+ void link_to(Label* L, Label* appendix);
849
+
850
+ // displacements
851
+ inline Displacement disp_at(Label* L);
852
+ inline void disp_at_put(Label* L, Displacement disp);
853
+ inline void emit_disp(Label* L, Displacement::Type type);
854
+
855
+ // record reloc info for current pc_
856
+ void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0);
857
+
858
+ friend class CodePatcher;
859
+ friend class EnsureSpace;
860
+
861
+ // Code buffer:
862
+ // The buffer into which code and relocation info are generated.
863
+ byte* buffer_;
864
+ int buffer_size_;
865
+ // True if the assembler owns the buffer, false if buffer is external.
866
+ bool own_buffer_;
867
+ // A previously allocated buffer of kMinimalBufferSize bytes, or NULL.
868
+ static byte* spare_buffer_;
869
+
870
+ // code generation
871
+ byte* pc_; // the program counter; moves forward
872
+ RelocInfoWriter reloc_info_writer;
873
+
874
+ // push-pop elimination
875
+ byte* last_pc_;
876
+
877
+ // source position information
878
+ int current_statement_position_;
879
+ int current_position_;
880
+ int written_statement_position_;
881
+ int written_position_;
882
+ };
883
+
884
+
885
+ // Helper class that ensures that there is enough space for generating
886
+ // instructions and relocation information. The constructor makes
887
+ // sure that there is enough space and (in debug mode) the destructor
888
+ // checks that we did not generate too much.
889
+ class EnsureSpace BASE_EMBEDDED {
890
+ public:
891
+ explicit EnsureSpace(Assembler* assembler) : assembler_(assembler) {
892
+ if (assembler_->overflow()) assembler_->GrowBuffer();
893
+ #ifdef DEBUG
894
+ space_before_ = assembler_->available_space();
895
+ #endif
896
+ }
897
+
898
+ #ifdef DEBUG
899
+ ~EnsureSpace() {
900
+ int bytes_generated = space_before_ - assembler_->available_space();
901
+ ASSERT(bytes_generated < assembler_->kGap);
902
+ }
903
+ #endif
904
+
905
+ private:
906
+ Assembler* assembler_;
907
+ #ifdef DEBUG
908
+ int space_before_;
909
+ #endif
910
+ };
911
+
912
+ } } // namespace v8::internal
913
+
914
+ #endif // V8_IA32_ASSEMBLER_IA32_H_