ring-native 0.0.0
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- checksums.yaml +7 -0
- data/.gitignore +9 -0
- data/Gemfile +3 -0
- data/README.md +22 -0
- data/Rakefile +1 -0
- data/ext/ring/extconf.rb +29 -0
- data/lib/ring/native.rb +8 -0
- data/lib/ring/native/version.rb +5 -0
- data/ring-native.gemspec +25 -0
- data/vendor/ring/BUILDING.md +40 -0
- data/vendor/ring/Cargo.toml +43 -0
- data/vendor/ring/LICENSE +185 -0
- data/vendor/ring/Makefile +35 -0
- data/vendor/ring/PORTING.md +163 -0
- data/vendor/ring/README.md +113 -0
- data/vendor/ring/STYLE.md +197 -0
- data/vendor/ring/appveyor.yml +27 -0
- data/vendor/ring/build.rs +108 -0
- data/vendor/ring/crypto/aes/aes.c +1142 -0
- data/vendor/ring/crypto/aes/aes_test.Windows.vcxproj +25 -0
- data/vendor/ring/crypto/aes/aes_test.cc +93 -0
- data/vendor/ring/crypto/aes/asm/aes-586.pl +2368 -0
- data/vendor/ring/crypto/aes/asm/aes-armv4.pl +1249 -0
- data/vendor/ring/crypto/aes/asm/aes-x86_64.pl +2246 -0
- data/vendor/ring/crypto/aes/asm/aesni-x86.pl +1318 -0
- data/vendor/ring/crypto/aes/asm/aesni-x86_64.pl +2084 -0
- data/vendor/ring/crypto/aes/asm/aesv8-armx.pl +675 -0
- data/vendor/ring/crypto/aes/asm/bsaes-armv7.pl +1364 -0
- data/vendor/ring/crypto/aes/asm/bsaes-x86_64.pl +1565 -0
- data/vendor/ring/crypto/aes/asm/vpaes-x86.pl +841 -0
- data/vendor/ring/crypto/aes/asm/vpaes-x86_64.pl +1116 -0
- data/vendor/ring/crypto/aes/internal.h +87 -0
- data/vendor/ring/crypto/aes/mode_wrappers.c +61 -0
- data/vendor/ring/crypto/bn/add.c +394 -0
- data/vendor/ring/crypto/bn/asm/armv4-mont.pl +694 -0
- data/vendor/ring/crypto/bn/asm/armv8-mont.pl +1503 -0
- data/vendor/ring/crypto/bn/asm/bn-586.pl +774 -0
- data/vendor/ring/crypto/bn/asm/co-586.pl +287 -0
- data/vendor/ring/crypto/bn/asm/rsaz-avx2.pl +1882 -0
- data/vendor/ring/crypto/bn/asm/x86-mont.pl +592 -0
- data/vendor/ring/crypto/bn/asm/x86_64-gcc.c +599 -0
- data/vendor/ring/crypto/bn/asm/x86_64-mont.pl +1393 -0
- data/vendor/ring/crypto/bn/asm/x86_64-mont5.pl +3507 -0
- data/vendor/ring/crypto/bn/bn.c +352 -0
- data/vendor/ring/crypto/bn/bn_asn1.c +74 -0
- data/vendor/ring/crypto/bn/bn_test.Windows.vcxproj +25 -0
- data/vendor/ring/crypto/bn/bn_test.cc +1696 -0
- data/vendor/ring/crypto/bn/cmp.c +200 -0
- data/vendor/ring/crypto/bn/convert.c +433 -0
- data/vendor/ring/crypto/bn/ctx.c +311 -0
- data/vendor/ring/crypto/bn/div.c +594 -0
- data/vendor/ring/crypto/bn/exponentiation.c +1335 -0
- data/vendor/ring/crypto/bn/gcd.c +711 -0
- data/vendor/ring/crypto/bn/generic.c +1019 -0
- data/vendor/ring/crypto/bn/internal.h +316 -0
- data/vendor/ring/crypto/bn/montgomery.c +516 -0
- data/vendor/ring/crypto/bn/mul.c +888 -0
- data/vendor/ring/crypto/bn/prime.c +829 -0
- data/vendor/ring/crypto/bn/random.c +334 -0
- data/vendor/ring/crypto/bn/rsaz_exp.c +262 -0
- data/vendor/ring/crypto/bn/rsaz_exp.h +53 -0
- data/vendor/ring/crypto/bn/shift.c +276 -0
- data/vendor/ring/crypto/bytestring/bytestring_test.Windows.vcxproj +25 -0
- data/vendor/ring/crypto/bytestring/bytestring_test.cc +421 -0
- data/vendor/ring/crypto/bytestring/cbb.c +399 -0
- data/vendor/ring/crypto/bytestring/cbs.c +227 -0
- data/vendor/ring/crypto/bytestring/internal.h +46 -0
- data/vendor/ring/crypto/chacha/chacha_generic.c +140 -0
- data/vendor/ring/crypto/chacha/chacha_vec.c +323 -0
- data/vendor/ring/crypto/chacha/chacha_vec_arm.S +1447 -0
- data/vendor/ring/crypto/chacha/chacha_vec_arm_generate.go +153 -0
- data/vendor/ring/crypto/cipher/cipher_test.Windows.vcxproj +25 -0
- data/vendor/ring/crypto/cipher/e_aes.c +390 -0
- data/vendor/ring/crypto/cipher/e_chacha20poly1305.c +208 -0
- data/vendor/ring/crypto/cipher/internal.h +173 -0
- data/vendor/ring/crypto/cipher/test/aes_128_gcm_tests.txt +543 -0
- data/vendor/ring/crypto/cipher/test/aes_128_key_wrap_tests.txt +9 -0
- data/vendor/ring/crypto/cipher/test/aes_256_gcm_tests.txt +475 -0
- data/vendor/ring/crypto/cipher/test/aes_256_key_wrap_tests.txt +23 -0
- data/vendor/ring/crypto/cipher/test/chacha20_poly1305_old_tests.txt +422 -0
- data/vendor/ring/crypto/cipher/test/chacha20_poly1305_tests.txt +484 -0
- data/vendor/ring/crypto/cipher/test/cipher_test.txt +100 -0
- data/vendor/ring/crypto/constant_time_test.Windows.vcxproj +25 -0
- data/vendor/ring/crypto/constant_time_test.c +304 -0
- data/vendor/ring/crypto/cpu-arm-asm.S +32 -0
- data/vendor/ring/crypto/cpu-arm.c +199 -0
- data/vendor/ring/crypto/cpu-intel.c +261 -0
- data/vendor/ring/crypto/crypto.c +151 -0
- data/vendor/ring/crypto/curve25519/asm/x25519-arm.S +2118 -0
- data/vendor/ring/crypto/curve25519/curve25519.c +4888 -0
- data/vendor/ring/crypto/curve25519/x25519_test.cc +128 -0
- data/vendor/ring/crypto/digest/md32_common.h +181 -0
- data/vendor/ring/crypto/ec/asm/p256-x86_64-asm.pl +2725 -0
- data/vendor/ring/crypto/ec/ec.c +193 -0
- data/vendor/ring/crypto/ec/ec_curves.c +61 -0
- data/vendor/ring/crypto/ec/ec_key.c +228 -0
- data/vendor/ring/crypto/ec/ec_montgomery.c +114 -0
- data/vendor/ring/crypto/ec/example_mul.Windows.vcxproj +25 -0
- data/vendor/ring/crypto/ec/internal.h +243 -0
- data/vendor/ring/crypto/ec/oct.c +253 -0
- data/vendor/ring/crypto/ec/p256-64.c +1794 -0
- data/vendor/ring/crypto/ec/p256-x86_64-table.h +9548 -0
- data/vendor/ring/crypto/ec/p256-x86_64.c +509 -0
- data/vendor/ring/crypto/ec/simple.c +1007 -0
- data/vendor/ring/crypto/ec/util-64.c +183 -0
- data/vendor/ring/crypto/ec/wnaf.c +508 -0
- data/vendor/ring/crypto/ecdh/ecdh.c +155 -0
- data/vendor/ring/crypto/ecdsa/ecdsa.c +304 -0
- data/vendor/ring/crypto/ecdsa/ecdsa_asn1.c +193 -0
- data/vendor/ring/crypto/ecdsa/ecdsa_test.Windows.vcxproj +25 -0
- data/vendor/ring/crypto/ecdsa/ecdsa_test.cc +327 -0
- data/vendor/ring/crypto/header_removed.h +17 -0
- data/vendor/ring/crypto/internal.h +495 -0
- data/vendor/ring/crypto/libring.Windows.vcxproj +101 -0
- data/vendor/ring/crypto/mem.c +98 -0
- data/vendor/ring/crypto/modes/asm/aesni-gcm-x86_64.pl +1045 -0
- data/vendor/ring/crypto/modes/asm/ghash-armv4.pl +517 -0
- data/vendor/ring/crypto/modes/asm/ghash-x86.pl +1393 -0
- data/vendor/ring/crypto/modes/asm/ghash-x86_64.pl +1741 -0
- data/vendor/ring/crypto/modes/asm/ghashv8-armx.pl +422 -0
- data/vendor/ring/crypto/modes/ctr.c +226 -0
- data/vendor/ring/crypto/modes/gcm.c +1206 -0
- data/vendor/ring/crypto/modes/gcm_test.Windows.vcxproj +25 -0
- data/vendor/ring/crypto/modes/gcm_test.c +348 -0
- data/vendor/ring/crypto/modes/internal.h +299 -0
- data/vendor/ring/crypto/perlasm/arm-xlate.pl +170 -0
- data/vendor/ring/crypto/perlasm/readme +100 -0
- data/vendor/ring/crypto/perlasm/x86_64-xlate.pl +1164 -0
- data/vendor/ring/crypto/perlasm/x86asm.pl +292 -0
- data/vendor/ring/crypto/perlasm/x86gas.pl +263 -0
- data/vendor/ring/crypto/perlasm/x86masm.pl +200 -0
- data/vendor/ring/crypto/perlasm/x86nasm.pl +187 -0
- data/vendor/ring/crypto/poly1305/poly1305.c +331 -0
- data/vendor/ring/crypto/poly1305/poly1305_arm.c +301 -0
- data/vendor/ring/crypto/poly1305/poly1305_arm_asm.S +2015 -0
- data/vendor/ring/crypto/poly1305/poly1305_test.Windows.vcxproj +25 -0
- data/vendor/ring/crypto/poly1305/poly1305_test.cc +80 -0
- data/vendor/ring/crypto/poly1305/poly1305_test.txt +52 -0
- data/vendor/ring/crypto/poly1305/poly1305_vec.c +892 -0
- data/vendor/ring/crypto/rand/asm/rdrand-x86_64.pl +75 -0
- data/vendor/ring/crypto/rand/internal.h +32 -0
- data/vendor/ring/crypto/rand/rand.c +189 -0
- data/vendor/ring/crypto/rand/urandom.c +219 -0
- data/vendor/ring/crypto/rand/windows.c +56 -0
- data/vendor/ring/crypto/refcount_c11.c +66 -0
- data/vendor/ring/crypto/refcount_lock.c +53 -0
- data/vendor/ring/crypto/refcount_test.Windows.vcxproj +25 -0
- data/vendor/ring/crypto/refcount_test.c +58 -0
- data/vendor/ring/crypto/rsa/blinding.c +462 -0
- data/vendor/ring/crypto/rsa/internal.h +108 -0
- data/vendor/ring/crypto/rsa/padding.c +300 -0
- data/vendor/ring/crypto/rsa/rsa.c +450 -0
- data/vendor/ring/crypto/rsa/rsa_asn1.c +261 -0
- data/vendor/ring/crypto/rsa/rsa_impl.c +944 -0
- data/vendor/ring/crypto/rsa/rsa_test.Windows.vcxproj +25 -0
- data/vendor/ring/crypto/rsa/rsa_test.cc +437 -0
- data/vendor/ring/crypto/sha/asm/sha-armv8.pl +436 -0
- data/vendor/ring/crypto/sha/asm/sha-x86_64.pl +2390 -0
- data/vendor/ring/crypto/sha/asm/sha256-586.pl +1275 -0
- data/vendor/ring/crypto/sha/asm/sha256-armv4.pl +735 -0
- data/vendor/ring/crypto/sha/asm/sha256-armv8.pl +14 -0
- data/vendor/ring/crypto/sha/asm/sha256-x86_64.pl +14 -0
- data/vendor/ring/crypto/sha/asm/sha512-586.pl +911 -0
- data/vendor/ring/crypto/sha/asm/sha512-armv4.pl +666 -0
- data/vendor/ring/crypto/sha/asm/sha512-armv8.pl +14 -0
- data/vendor/ring/crypto/sha/asm/sha512-x86_64.pl +14 -0
- data/vendor/ring/crypto/sha/sha1.c +271 -0
- data/vendor/ring/crypto/sha/sha256.c +204 -0
- data/vendor/ring/crypto/sha/sha512.c +355 -0
- data/vendor/ring/crypto/test/file_test.cc +326 -0
- data/vendor/ring/crypto/test/file_test.h +181 -0
- data/vendor/ring/crypto/test/malloc.cc +150 -0
- data/vendor/ring/crypto/test/scoped_types.h +95 -0
- data/vendor/ring/crypto/test/test.Windows.vcxproj +35 -0
- data/vendor/ring/crypto/test/test_util.cc +46 -0
- data/vendor/ring/crypto/test/test_util.h +41 -0
- data/vendor/ring/crypto/thread_none.c +55 -0
- data/vendor/ring/crypto/thread_pthread.c +165 -0
- data/vendor/ring/crypto/thread_test.Windows.vcxproj +25 -0
- data/vendor/ring/crypto/thread_test.c +200 -0
- data/vendor/ring/crypto/thread_win.c +282 -0
- data/vendor/ring/examples/checkdigest.rs +103 -0
- data/vendor/ring/include/openssl/aes.h +121 -0
- data/vendor/ring/include/openssl/arm_arch.h +129 -0
- data/vendor/ring/include/openssl/base.h +156 -0
- data/vendor/ring/include/openssl/bn.h +794 -0
- data/vendor/ring/include/openssl/buffer.h +18 -0
- data/vendor/ring/include/openssl/bytestring.h +235 -0
- data/vendor/ring/include/openssl/chacha.h +37 -0
- data/vendor/ring/include/openssl/cmac.h +76 -0
- data/vendor/ring/include/openssl/cpu.h +184 -0
- data/vendor/ring/include/openssl/crypto.h +43 -0
- data/vendor/ring/include/openssl/curve25519.h +88 -0
- data/vendor/ring/include/openssl/ec.h +225 -0
- data/vendor/ring/include/openssl/ec_key.h +129 -0
- data/vendor/ring/include/openssl/ecdh.h +110 -0
- data/vendor/ring/include/openssl/ecdsa.h +156 -0
- data/vendor/ring/include/openssl/err.h +201 -0
- data/vendor/ring/include/openssl/mem.h +101 -0
- data/vendor/ring/include/openssl/obj_mac.h +71 -0
- data/vendor/ring/include/openssl/opensslfeatures.h +68 -0
- data/vendor/ring/include/openssl/opensslv.h +18 -0
- data/vendor/ring/include/openssl/ossl_typ.h +18 -0
- data/vendor/ring/include/openssl/poly1305.h +51 -0
- data/vendor/ring/include/openssl/rand.h +70 -0
- data/vendor/ring/include/openssl/rsa.h +399 -0
- data/vendor/ring/include/openssl/thread.h +133 -0
- data/vendor/ring/include/openssl/type_check.h +71 -0
- data/vendor/ring/mk/Common.props +63 -0
- data/vendor/ring/mk/Windows.props +42 -0
- data/vendor/ring/mk/WindowsTest.props +18 -0
- data/vendor/ring/mk/appveyor.bat +62 -0
- data/vendor/ring/mk/bottom_of_makefile.mk +54 -0
- data/vendor/ring/mk/ring.mk +266 -0
- data/vendor/ring/mk/top_of_makefile.mk +214 -0
- data/vendor/ring/mk/travis.sh +40 -0
- data/vendor/ring/mk/update-travis-yml.py +229 -0
- data/vendor/ring/ring.sln +153 -0
- data/vendor/ring/src/aead.rs +682 -0
- data/vendor/ring/src/agreement.rs +248 -0
- data/vendor/ring/src/c.rs +129 -0
- data/vendor/ring/src/constant_time.rs +37 -0
- data/vendor/ring/src/der.rs +96 -0
- data/vendor/ring/src/digest.rs +690 -0
- data/vendor/ring/src/digest_tests.txt +57 -0
- data/vendor/ring/src/ecc.rs +28 -0
- data/vendor/ring/src/ecc_build.rs +279 -0
- data/vendor/ring/src/ecc_curves.rs +117 -0
- data/vendor/ring/src/ed25519_tests.txt +2579 -0
- data/vendor/ring/src/exe_tests.rs +46 -0
- data/vendor/ring/src/ffi.rs +29 -0
- data/vendor/ring/src/file_test.rs +187 -0
- data/vendor/ring/src/hkdf.rs +153 -0
- data/vendor/ring/src/hkdf_tests.txt +59 -0
- data/vendor/ring/src/hmac.rs +414 -0
- data/vendor/ring/src/hmac_tests.txt +97 -0
- data/vendor/ring/src/input.rs +312 -0
- data/vendor/ring/src/lib.rs +41 -0
- data/vendor/ring/src/pbkdf2.rs +265 -0
- data/vendor/ring/src/pbkdf2_tests.txt +113 -0
- data/vendor/ring/src/polyfill.rs +57 -0
- data/vendor/ring/src/rand.rs +28 -0
- data/vendor/ring/src/signature.rs +314 -0
- data/vendor/ring/third-party/NIST/README.md +9 -0
- data/vendor/ring/third-party/NIST/SHAVS/SHA1LongMsg.rsp +263 -0
- data/vendor/ring/third-party/NIST/SHAVS/SHA1Monte.rsp +309 -0
- data/vendor/ring/third-party/NIST/SHAVS/SHA1ShortMsg.rsp +267 -0
- data/vendor/ring/third-party/NIST/SHAVS/SHA224LongMsg.rsp +263 -0
- data/vendor/ring/third-party/NIST/SHAVS/SHA224Monte.rsp +309 -0
- data/vendor/ring/third-party/NIST/SHAVS/SHA224ShortMsg.rsp +267 -0
- data/vendor/ring/third-party/NIST/SHAVS/SHA256LongMsg.rsp +263 -0
- data/vendor/ring/third-party/NIST/SHAVS/SHA256Monte.rsp +309 -0
- data/vendor/ring/third-party/NIST/SHAVS/SHA256ShortMsg.rsp +267 -0
- data/vendor/ring/third-party/NIST/SHAVS/SHA384LongMsg.rsp +519 -0
- data/vendor/ring/third-party/NIST/SHAVS/SHA384Monte.rsp +309 -0
- data/vendor/ring/third-party/NIST/SHAVS/SHA384ShortMsg.rsp +523 -0
- data/vendor/ring/third-party/NIST/SHAVS/SHA512LongMsg.rsp +519 -0
- data/vendor/ring/third-party/NIST/SHAVS/SHA512Monte.rsp +309 -0
- data/vendor/ring/third-party/NIST/SHAVS/SHA512ShortMsg.rsp +523 -0
- data/vendor/ring/third-party/NIST/sha256sums.txt +1 -0
- metadata +333 -0
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/* Copyright (c) 2014, Google Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
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* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
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* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */
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#ifndef OPENSSL_HEADER_BYTESTRING_INTERNAL_H
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* structure itself. However, this sufficies to handle the PKCS#7 and #12 output
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OPENSSL_EXPORT int CBS_asn1_ber_to_der(CBS *in, uint8_t **out, size_t *out_len);
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
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* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
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* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */
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/* Adapted from the public domain, estream code by D. Bernstein. */
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/* sigma contains the ChaCha constants, which happen to be an ASCII string. */
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'2', '-', 'b', 'y', 't', 'e', ' ', 'k' };
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#define ROTATE(v, n) (((v) << (n)) | ((v) >> (32 - (n))))
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#define XOR(v, w) ((v) ^ (w))
|
|
32
|
+
#define PLUS(x, y) ((x) + (y))
|
|
33
|
+
#define PLUSONE(v) (PLUS((v), 1))
|
|
34
|
+
|
|
35
|
+
#define U32TO8_LITTLE(p, v) \
|
|
36
|
+
{ \
|
|
37
|
+
(p)[0] = (v >> 0) & 0xff; \
|
|
38
|
+
(p)[1] = (v >> 8) & 0xff; \
|
|
39
|
+
(p)[2] = (v >> 16) & 0xff; \
|
|
40
|
+
(p)[3] = (v >> 24) & 0xff; \
|
|
41
|
+
}
|
|
42
|
+
|
|
43
|
+
#define U8TO32_LITTLE(p) \
|
|
44
|
+
(((uint32_t)((p)[0])) | ((uint32_t)((p)[1]) << 8) | \
|
|
45
|
+
((uint32_t)((p)[2]) << 16) | ((uint32_t)((p)[3]) << 24))
|
|
46
|
+
|
|
47
|
+
/* QUARTERROUND updates a, b, c, d with a ChaCha "quarter" round. */
|
|
48
|
+
#define QUARTERROUND(a,b,c,d) \
|
|
49
|
+
x[a] = PLUS(x[a],x[b]); x[d] = ROTATE(XOR(x[d],x[a]),16); \
|
|
50
|
+
x[c] = PLUS(x[c],x[d]); x[b] = ROTATE(XOR(x[b],x[c]),12); \
|
|
51
|
+
x[a] = PLUS(x[a],x[b]); x[d] = ROTATE(XOR(x[d],x[a]), 8); \
|
|
52
|
+
x[c] = PLUS(x[c],x[d]); x[b] = ROTATE(XOR(x[b],x[c]), 7);
|
|
53
|
+
|
|
54
|
+
#if defined(OPENSSL_ARM) && !defined(OPENSSL_NO_ASM)
|
|
55
|
+
/* Defined in chacha_vec.c */
|
|
56
|
+
void CRYPTO_chacha_20_neon(uint8_t *out, const uint8_t *in, size_t in_len,
|
|
57
|
+
const uint8_t key[32], const uint8_t nonce[12],
|
|
58
|
+
uint32_t counter);
|
|
59
|
+
#endif
|
|
60
|
+
|
|
61
|
+
/* chacha_core performs 20 rounds of ChaCha on the input words in
|
|
62
|
+
* |input| and writes the 64 output bytes to |output|. */
|
|
63
|
+
static void chacha_core(uint8_t output[64], const uint32_t input[16]) {
|
|
64
|
+
uint32_t x[16];
|
|
65
|
+
int i;
|
|
66
|
+
|
|
67
|
+
memcpy(x, input, sizeof(uint32_t) * 16);
|
|
68
|
+
for (i = 20; i > 0; i -= 2) {
|
|
69
|
+
QUARTERROUND(0, 4, 8, 12)
|
|
70
|
+
QUARTERROUND(1, 5, 9, 13)
|
|
71
|
+
QUARTERROUND(2, 6, 10, 14)
|
|
72
|
+
QUARTERROUND(3, 7, 11, 15)
|
|
73
|
+
QUARTERROUND(0, 5, 10, 15)
|
|
74
|
+
QUARTERROUND(1, 6, 11, 12)
|
|
75
|
+
QUARTERROUND(2, 7, 8, 13)
|
|
76
|
+
QUARTERROUND(3, 4, 9, 14)
|
|
77
|
+
}
|
|
78
|
+
|
|
79
|
+
for (i = 0; i < 16; ++i) {
|
|
80
|
+
x[i] = PLUS(x[i], input[i]);
|
|
81
|
+
}
|
|
82
|
+
for (i = 0; i < 16; ++i) {
|
|
83
|
+
U32TO8_LITTLE(output + 4 * i, x[i]);
|
|
84
|
+
}
|
|
85
|
+
}
|
|
86
|
+
|
|
87
|
+
void CRYPTO_chacha_20(uint8_t *out, const uint8_t *in, size_t in_len,
|
|
88
|
+
const uint8_t key[32], const uint8_t nonce[12],
|
|
89
|
+
uint32_t counter) {
|
|
90
|
+
uint32_t input[16];
|
|
91
|
+
uint8_t buf[64];
|
|
92
|
+
size_t todo, i;
|
|
93
|
+
|
|
94
|
+
#if defined(OPENSSL_ARM) && !defined(OPENSSL_NO_ASM)
|
|
95
|
+
if (CRYPTO_is_NEON_capable()) {
|
|
96
|
+
CRYPTO_chacha_20_neon(out, in, in_len, key, nonce, counter);
|
|
97
|
+
return;
|
|
98
|
+
}
|
|
99
|
+
#endif
|
|
100
|
+
|
|
101
|
+
input[0] = U8TO32_LITTLE(sigma + 0);
|
|
102
|
+
input[1] = U8TO32_LITTLE(sigma + 4);
|
|
103
|
+
input[2] = U8TO32_LITTLE(sigma + 8);
|
|
104
|
+
input[3] = U8TO32_LITTLE(sigma + 12);
|
|
105
|
+
|
|
106
|
+
input[4] = U8TO32_LITTLE(key + 0);
|
|
107
|
+
input[5] = U8TO32_LITTLE(key + 4);
|
|
108
|
+
input[6] = U8TO32_LITTLE(key + 8);
|
|
109
|
+
input[7] = U8TO32_LITTLE(key + 12);
|
|
110
|
+
|
|
111
|
+
input[8] = U8TO32_LITTLE(key + 16);
|
|
112
|
+
input[9] = U8TO32_LITTLE(key + 20);
|
|
113
|
+
input[10] = U8TO32_LITTLE(key + 24);
|
|
114
|
+
input[11] = U8TO32_LITTLE(key + 28);
|
|
115
|
+
|
|
116
|
+
input[12] = counter;
|
|
117
|
+
input[13] = U8TO32_LITTLE(nonce + 0);
|
|
118
|
+
input[14] = U8TO32_LITTLE(nonce + 4);
|
|
119
|
+
input[15] = U8TO32_LITTLE(nonce + 8);
|
|
120
|
+
|
|
121
|
+
while (in_len > 0) {
|
|
122
|
+
todo = sizeof(buf);
|
|
123
|
+
if (in_len < todo) {
|
|
124
|
+
todo = in_len;
|
|
125
|
+
}
|
|
126
|
+
|
|
127
|
+
chacha_core(buf, input);
|
|
128
|
+
for (i = 0; i < todo; i++) {
|
|
129
|
+
out[i] = in[i] ^ buf[i];
|
|
130
|
+
}
|
|
131
|
+
|
|
132
|
+
out += todo;
|
|
133
|
+
in += todo;
|
|
134
|
+
in_len -= todo;
|
|
135
|
+
|
|
136
|
+
input[12]++;
|
|
137
|
+
}
|
|
138
|
+
}
|
|
139
|
+
|
|
140
|
+
#endif /* OPENSSL_WINDOWS || !OPENSSL_X86_64 && !OPENSSL_X86 || !__SSE2__ */
|
|
@@ -0,0 +1,323 @@
|
|
|
1
|
+
/* Copyright (c) 2014, Google Inc.
|
|
2
|
+
*
|
|
3
|
+
* Permission to use, copy, modify, and/or distribute this software for any
|
|
4
|
+
* purpose with or without fee is hereby granted, provided that the above
|
|
5
|
+
* copyright notice and this permission notice appear in all copies.
|
|
6
|
+
*
|
|
7
|
+
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
|
8
|
+
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
|
9
|
+
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
|
|
10
|
+
* SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
|
11
|
+
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
|
|
12
|
+
* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
|
|
13
|
+
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */
|
|
14
|
+
|
|
15
|
+
/* ====================================================================
|
|
16
|
+
*
|
|
17
|
+
* When updating this file, also update chacha_vec_arm.S
|
|
18
|
+
*
|
|
19
|
+
* ==================================================================== */
|
|
20
|
+
|
|
21
|
+
|
|
22
|
+
/* This implementation is by Ted Krovetz and was submitted to SUPERCOP and
|
|
23
|
+
* marked as public domain. It was been altered to allow for non-aligned inputs
|
|
24
|
+
* and to allow the block counter to be passed in specifically. */
|
|
25
|
+
|
|
26
|
+
#include <openssl/chacha.h>
|
|
27
|
+
|
|
28
|
+
#if defined(ASM_GEN) || \
|
|
29
|
+
!defined(OPENSSL_WINDOWS) && \
|
|
30
|
+
(defined(OPENSSL_X86_64) || defined(OPENSSL_X86)) && defined(__SSE2__)
|
|
31
|
+
|
|
32
|
+
#define CHACHA_RNDS 20 /* 8 (high speed), 20 (conservative), 12 (middle) */
|
|
33
|
+
|
|
34
|
+
/* Architecture-neutral way to specify 16-byte vector of ints */
|
|
35
|
+
typedef unsigned vec __attribute__((vector_size(16)));
|
|
36
|
+
|
|
37
|
+
/* This implementation is designed for Neon, SSE and AltiVec machines. The
|
|
38
|
+
* following specify how to do certain vector operations efficiently on
|
|
39
|
+
* each architecture, using intrinsics.
|
|
40
|
+
* This implementation supports parallel processing of multiple blocks,
|
|
41
|
+
* including potentially using general-purpose registers. */
|
|
42
|
+
#if __ARM_NEON__
|
|
43
|
+
#include <string.h>
|
|
44
|
+
#include <arm_neon.h>
|
|
45
|
+
#define GPR_TOO 1
|
|
46
|
+
#define VBPI 2
|
|
47
|
+
#define ONE (vec) vsetq_lane_u32(1, vdupq_n_u32(0), 0)
|
|
48
|
+
#define LOAD_ALIGNED(m) (vec)(*((vec *)(m)))
|
|
49
|
+
#define LOAD(m) ({ \
|
|
50
|
+
memcpy(alignment_buffer, m, 16); \
|
|
51
|
+
LOAD_ALIGNED(alignment_buffer); \
|
|
52
|
+
})
|
|
53
|
+
#define STORE(m, r) ({ \
|
|
54
|
+
(*((vec *)(alignment_buffer))) = (r); \
|
|
55
|
+
memcpy(m, alignment_buffer, 16); \
|
|
56
|
+
})
|
|
57
|
+
#define ROTV1(x) (vec) vextq_u32((uint32x4_t)x, (uint32x4_t)x, 1)
|
|
58
|
+
#define ROTV2(x) (vec) vextq_u32((uint32x4_t)x, (uint32x4_t)x, 2)
|
|
59
|
+
#define ROTV3(x) (vec) vextq_u32((uint32x4_t)x, (uint32x4_t)x, 3)
|
|
60
|
+
#define ROTW16(x) (vec) vrev32q_u16((uint16x8_t)x)
|
|
61
|
+
#if __clang__
|
|
62
|
+
#define ROTW7(x) (x << ((vec) {7, 7, 7, 7})) ^ (x >> ((vec) {25, 25, 25, 25}))
|
|
63
|
+
#define ROTW8(x) (x << ((vec) {8, 8, 8, 8})) ^ (x >> ((vec) {24, 24, 24, 24}))
|
|
64
|
+
#define ROTW12(x) \
|
|
65
|
+
(x << ((vec) {12, 12, 12, 12})) ^ (x >> ((vec) {20, 20, 20, 20}))
|
|
66
|
+
#else
|
|
67
|
+
#define ROTW7(x) \
|
|
68
|
+
(vec) vsriq_n_u32(vshlq_n_u32((uint32x4_t)x, 7), (uint32x4_t)x, 25)
|
|
69
|
+
#define ROTW8(x) \
|
|
70
|
+
(vec) vsriq_n_u32(vshlq_n_u32((uint32x4_t)x, 8), (uint32x4_t)x, 24)
|
|
71
|
+
#define ROTW12(x) \
|
|
72
|
+
(vec) vsriq_n_u32(vshlq_n_u32((uint32x4_t)x, 12), (uint32x4_t)x, 20)
|
|
73
|
+
#endif
|
|
74
|
+
#elif __SSE2__
|
|
75
|
+
#include <emmintrin.h>
|
|
76
|
+
#define GPR_TOO 0
|
|
77
|
+
#if __clang__
|
|
78
|
+
#define VBPI 4
|
|
79
|
+
#else
|
|
80
|
+
#define VBPI 3
|
|
81
|
+
#endif
|
|
82
|
+
#define ONE (vec) _mm_set_epi32(0, 0, 0, 1)
|
|
83
|
+
#define LOAD(m) (vec) _mm_loadu_si128((__m128i *)(m))
|
|
84
|
+
#define LOAD_ALIGNED(m) (vec) _mm_load_si128((__m128i *)(m))
|
|
85
|
+
#define STORE(m, r) _mm_storeu_si128((__m128i *)(m), (__m128i)(r))
|
|
86
|
+
#define ROTV1(x) (vec) _mm_shuffle_epi32((__m128i)x, _MM_SHUFFLE(0, 3, 2, 1))
|
|
87
|
+
#define ROTV2(x) (vec) _mm_shuffle_epi32((__m128i)x, _MM_SHUFFLE(1, 0, 3, 2))
|
|
88
|
+
#define ROTV3(x) (vec) _mm_shuffle_epi32((__m128i)x, _MM_SHUFFLE(2, 1, 0, 3))
|
|
89
|
+
#define ROTW7(x) \
|
|
90
|
+
(vec)(_mm_slli_epi32((__m128i)x, 7) ^ _mm_srli_epi32((__m128i)x, 25))
|
|
91
|
+
#define ROTW12(x) \
|
|
92
|
+
(vec)(_mm_slli_epi32((__m128i)x, 12) ^ _mm_srli_epi32((__m128i)x, 20))
|
|
93
|
+
#if __SSSE3__
|
|
94
|
+
#include <tmmintrin.h>
|
|
95
|
+
#define ROTW8(x) \
|
|
96
|
+
(vec) _mm_shuffle_epi8((__m128i)x, _mm_set_epi8(14, 13, 12, 15, 10, 9, 8, \
|
|
97
|
+
11, 6, 5, 4, 7, 2, 1, 0, 3))
|
|
98
|
+
#define ROTW16(x) \
|
|
99
|
+
(vec) _mm_shuffle_epi8((__m128i)x, _mm_set_epi8(13, 12, 15, 14, 9, 8, 11, \
|
|
100
|
+
10, 5, 4, 7, 6, 1, 0, 3, 2))
|
|
101
|
+
#else
|
|
102
|
+
#define ROTW8(x) \
|
|
103
|
+
(vec)(_mm_slli_epi32((__m128i)x, 8) ^ _mm_srli_epi32((__m128i)x, 24))
|
|
104
|
+
#define ROTW16(x) \
|
|
105
|
+
(vec)(_mm_slli_epi32((__m128i)x, 16) ^ _mm_srli_epi32((__m128i)x, 16))
|
|
106
|
+
#endif
|
|
107
|
+
#else
|
|
108
|
+
#error-- Implementation supports only machines with neon or SSE2
|
|
109
|
+
#endif
|
|
110
|
+
|
|
111
|
+
#ifndef REVV_BE
|
|
112
|
+
#define REVV_BE(x) (x)
|
|
113
|
+
#endif
|
|
114
|
+
|
|
115
|
+
#ifndef REVW_BE
|
|
116
|
+
#define REVW_BE(x) (x)
|
|
117
|
+
#endif
|
|
118
|
+
|
|
119
|
+
#define BPI (VBPI + GPR_TOO) /* Blocks computed per loop iteration */
|
|
120
|
+
|
|
121
|
+
#define DQROUND_VECTORS(a,b,c,d) \
|
|
122
|
+
a += b; d ^= a; d = ROTW16(d); \
|
|
123
|
+
c += d; b ^= c; b = ROTW12(b); \
|
|
124
|
+
a += b; d ^= a; d = ROTW8(d); \
|
|
125
|
+
c += d; b ^= c; b = ROTW7(b); \
|
|
126
|
+
b = ROTV1(b); c = ROTV2(c); d = ROTV3(d); \
|
|
127
|
+
a += b; d ^= a; d = ROTW16(d); \
|
|
128
|
+
c += d; b ^= c; b = ROTW12(b); \
|
|
129
|
+
a += b; d ^= a; d = ROTW8(d); \
|
|
130
|
+
c += d; b ^= c; b = ROTW7(b); \
|
|
131
|
+
b = ROTV3(b); c = ROTV2(c); d = ROTV1(d);
|
|
132
|
+
|
|
133
|
+
#define QROUND_WORDS(a,b,c,d) \
|
|
134
|
+
a = a+b; d ^= a; d = d<<16 | d>>16; \
|
|
135
|
+
c = c+d; b ^= c; b = b<<12 | b>>20; \
|
|
136
|
+
a = a+b; d ^= a; d = d<< 8 | d>>24; \
|
|
137
|
+
c = c+d; b ^= c; b = b<< 7 | b>>25;
|
|
138
|
+
|
|
139
|
+
#define WRITE_XOR(in, op, d, v0, v1, v2, v3) \
|
|
140
|
+
STORE(op + d + 0, LOAD(in + d + 0) ^ REVV_BE(v0)); \
|
|
141
|
+
STORE(op + d + 4, LOAD(in + d + 4) ^ REVV_BE(v1)); \
|
|
142
|
+
STORE(op + d + 8, LOAD(in + d + 8) ^ REVV_BE(v2)); \
|
|
143
|
+
STORE(op + d +12, LOAD(in + d +12) ^ REVV_BE(v3));
|
|
144
|
+
|
|
145
|
+
#if __ARM_NEON__
|
|
146
|
+
/* For ARM, we can't depend on NEON support, so this function is compiled with
|
|
147
|
+
* a different name, along with the generic code, and can be enabled at
|
|
148
|
+
* run-time. */
|
|
149
|
+
void CRYPTO_chacha_20_neon(
|
|
150
|
+
#else
|
|
151
|
+
void CRYPTO_chacha_20(
|
|
152
|
+
#endif
|
|
153
|
+
uint8_t *out,
|
|
154
|
+
const uint8_t *in,
|
|
155
|
+
size_t inlen,
|
|
156
|
+
const uint8_t key[32],
|
|
157
|
+
const uint8_t nonce[12],
|
|
158
|
+
uint32_t counter)
|
|
159
|
+
{
|
|
160
|
+
unsigned iters, i, *op=(unsigned *)out, *ip=(unsigned *)in, *kp;
|
|
161
|
+
#if defined(__ARM_NEON__)
|
|
162
|
+
uint32_t np[3];
|
|
163
|
+
uint8_t alignment_buffer[16] __attribute__((aligned(16)));
|
|
164
|
+
#endif
|
|
165
|
+
vec s0, s1, s2, s3;
|
|
166
|
+
__attribute__ ((aligned (16))) unsigned chacha_const[] =
|
|
167
|
+
{0x61707865,0x3320646E,0x79622D32,0x6B206574};
|
|
168
|
+
kp = (unsigned *)key;
|
|
169
|
+
#if defined(__ARM_NEON__)
|
|
170
|
+
memcpy(np, nonce, 12);
|
|
171
|
+
#endif
|
|
172
|
+
s0 = LOAD_ALIGNED(chacha_const);
|
|
173
|
+
s1 = LOAD(&((vec*)kp)[0]);
|
|
174
|
+
s2 = LOAD(&((vec*)kp)[1]);
|
|
175
|
+
s3 = (vec){
|
|
176
|
+
counter,
|
|
177
|
+
((uint32_t*)nonce)[0],
|
|
178
|
+
((uint32_t*)nonce)[1],
|
|
179
|
+
((uint32_t*)nonce)[2]
|
|
180
|
+
};
|
|
181
|
+
|
|
182
|
+
for (iters = 0; iters < inlen/(BPI*64); iters++)
|
|
183
|
+
{
|
|
184
|
+
#if GPR_TOO
|
|
185
|
+
register unsigned x0, x1, x2, x3, x4, x5, x6, x7, x8,
|
|
186
|
+
x9, x10, x11, x12, x13, x14, x15;
|
|
187
|
+
#endif
|
|
188
|
+
#if VBPI > 2
|
|
189
|
+
vec v8,v9,v10,v11;
|
|
190
|
+
#endif
|
|
191
|
+
#if VBPI > 3
|
|
192
|
+
vec v12,v13,v14,v15;
|
|
193
|
+
#endif
|
|
194
|
+
|
|
195
|
+
vec v0,v1,v2,v3,v4,v5,v6,v7;
|
|
196
|
+
v4 = v0 = s0; v5 = v1 = s1; v6 = v2 = s2; v3 = s3;
|
|
197
|
+
v7 = v3 + ONE;
|
|
198
|
+
#if VBPI > 2
|
|
199
|
+
v8 = v4; v9 = v5; v10 = v6;
|
|
200
|
+
v11 = v7 + ONE;
|
|
201
|
+
#endif
|
|
202
|
+
#if VBPI > 3
|
|
203
|
+
v12 = v8; v13 = v9; v14 = v10;
|
|
204
|
+
v15 = v11 + ONE;
|
|
205
|
+
#endif
|
|
206
|
+
#if GPR_TOO
|
|
207
|
+
x0 = chacha_const[0]; x1 = chacha_const[1];
|
|
208
|
+
x2 = chacha_const[2]; x3 = chacha_const[3];
|
|
209
|
+
x4 = kp[0]; x5 = kp[1]; x6 = kp[2]; x7 = kp[3];
|
|
210
|
+
x8 = kp[4]; x9 = kp[5]; x10 = kp[6]; x11 = kp[7];
|
|
211
|
+
x12 = counter+BPI*iters+(BPI-1); x13 = np[0];
|
|
212
|
+
x14 = np[1]; x15 = np[2];
|
|
213
|
+
#endif
|
|
214
|
+
for (i = CHACHA_RNDS/2; i; i--)
|
|
215
|
+
{
|
|
216
|
+
DQROUND_VECTORS(v0,v1,v2,v3)
|
|
217
|
+
DQROUND_VECTORS(v4,v5,v6,v7)
|
|
218
|
+
#if VBPI > 2
|
|
219
|
+
DQROUND_VECTORS(v8,v9,v10,v11)
|
|
220
|
+
#endif
|
|
221
|
+
#if VBPI > 3
|
|
222
|
+
DQROUND_VECTORS(v12,v13,v14,v15)
|
|
223
|
+
#endif
|
|
224
|
+
#if GPR_TOO
|
|
225
|
+
QROUND_WORDS( x0, x4, x8,x12)
|
|
226
|
+
QROUND_WORDS( x1, x5, x9,x13)
|
|
227
|
+
QROUND_WORDS( x2, x6,x10,x14)
|
|
228
|
+
QROUND_WORDS( x3, x7,x11,x15)
|
|
229
|
+
QROUND_WORDS( x0, x5,x10,x15)
|
|
230
|
+
QROUND_WORDS( x1, x6,x11,x12)
|
|
231
|
+
QROUND_WORDS( x2, x7, x8,x13)
|
|
232
|
+
QROUND_WORDS( x3, x4, x9,x14)
|
|
233
|
+
#endif
|
|
234
|
+
}
|
|
235
|
+
|
|
236
|
+
WRITE_XOR(ip, op, 0, v0+s0, v1+s1, v2+s2, v3+s3)
|
|
237
|
+
s3 += ONE;
|
|
238
|
+
WRITE_XOR(ip, op, 16, v4+s0, v5+s1, v6+s2, v7+s3)
|
|
239
|
+
s3 += ONE;
|
|
240
|
+
#if VBPI > 2
|
|
241
|
+
WRITE_XOR(ip, op, 32, v8+s0, v9+s1, v10+s2, v11+s3)
|
|
242
|
+
s3 += ONE;
|
|
243
|
+
#endif
|
|
244
|
+
#if VBPI > 3
|
|
245
|
+
WRITE_XOR(ip, op, 48, v12+s0, v13+s1, v14+s2, v15+s3)
|
|
246
|
+
s3 += ONE;
|
|
247
|
+
#endif
|
|
248
|
+
ip += VBPI*16;
|
|
249
|
+
op += VBPI*16;
|
|
250
|
+
#if GPR_TOO
|
|
251
|
+
op[0] = REVW_BE(REVW_BE(ip[0]) ^ (x0 + chacha_const[0]));
|
|
252
|
+
op[1] = REVW_BE(REVW_BE(ip[1]) ^ (x1 + chacha_const[1]));
|
|
253
|
+
op[2] = REVW_BE(REVW_BE(ip[2]) ^ (x2 + chacha_const[2]));
|
|
254
|
+
op[3] = REVW_BE(REVW_BE(ip[3]) ^ (x3 + chacha_const[3]));
|
|
255
|
+
op[4] = REVW_BE(REVW_BE(ip[4]) ^ (x4 + kp[0]));
|
|
256
|
+
op[5] = REVW_BE(REVW_BE(ip[5]) ^ (x5 + kp[1]));
|
|
257
|
+
op[6] = REVW_BE(REVW_BE(ip[6]) ^ (x6 + kp[2]));
|
|
258
|
+
op[7] = REVW_BE(REVW_BE(ip[7]) ^ (x7 + kp[3]));
|
|
259
|
+
op[8] = REVW_BE(REVW_BE(ip[8]) ^ (x8 + kp[4]));
|
|
260
|
+
op[9] = REVW_BE(REVW_BE(ip[9]) ^ (x9 + kp[5]));
|
|
261
|
+
op[10] = REVW_BE(REVW_BE(ip[10]) ^ (x10 + kp[6]));
|
|
262
|
+
op[11] = REVW_BE(REVW_BE(ip[11]) ^ (x11 + kp[7]));
|
|
263
|
+
op[12] = REVW_BE(REVW_BE(ip[12]) ^ (x12 + counter+BPI*iters+(BPI-1)));
|
|
264
|
+
op[13] = REVW_BE(REVW_BE(ip[13]) ^ (x13 + np[0]));
|
|
265
|
+
op[14] = REVW_BE(REVW_BE(ip[14]) ^ (x14 + np[1]));
|
|
266
|
+
op[15] = REVW_BE(REVW_BE(ip[15]) ^ (x15 + np[2]));
|
|
267
|
+
s3 += ONE;
|
|
268
|
+
ip += 16;
|
|
269
|
+
op += 16;
|
|
270
|
+
#endif
|
|
271
|
+
}
|
|
272
|
+
|
|
273
|
+
for (iters = inlen%(BPI*64)/64; iters != 0; iters--)
|
|
274
|
+
{
|
|
275
|
+
vec v0 = s0, v1 = s1, v2 = s2, v3 = s3;
|
|
276
|
+
for (i = CHACHA_RNDS/2; i; i--)
|
|
277
|
+
{
|
|
278
|
+
DQROUND_VECTORS(v0,v1,v2,v3);
|
|
279
|
+
}
|
|
280
|
+
WRITE_XOR(ip, op, 0, v0+s0, v1+s1, v2+s2, v3+s3)
|
|
281
|
+
s3 += ONE;
|
|
282
|
+
ip += 16;
|
|
283
|
+
op += 16;
|
|
284
|
+
}
|
|
285
|
+
|
|
286
|
+
inlen = inlen % 64;
|
|
287
|
+
if (inlen)
|
|
288
|
+
{
|
|
289
|
+
__attribute__ ((aligned (16))) vec buf[4];
|
|
290
|
+
vec v0,v1,v2,v3;
|
|
291
|
+
v0 = s0; v1 = s1; v2 = s2; v3 = s3;
|
|
292
|
+
for (i = CHACHA_RNDS/2; i; i--)
|
|
293
|
+
{
|
|
294
|
+
DQROUND_VECTORS(v0,v1,v2,v3);
|
|
295
|
+
}
|
|
296
|
+
|
|
297
|
+
if (inlen >= 16)
|
|
298
|
+
{
|
|
299
|
+
STORE(op + 0, LOAD(ip + 0) ^ REVV_BE(v0 + s0));
|
|
300
|
+
if (inlen >= 32)
|
|
301
|
+
{
|
|
302
|
+
STORE(op + 4, LOAD(ip + 4) ^ REVV_BE(v1 + s1));
|
|
303
|
+
if (inlen >= 48)
|
|
304
|
+
{
|
|
305
|
+
STORE(op + 8, LOAD(ip + 8) ^
|
|
306
|
+
REVV_BE(v2 + s2));
|
|
307
|
+
buf[3] = REVV_BE(v3 + s3);
|
|
308
|
+
}
|
|
309
|
+
else
|
|
310
|
+
buf[2] = REVV_BE(v2 + s2);
|
|
311
|
+
}
|
|
312
|
+
else
|
|
313
|
+
buf[1] = REVV_BE(v1 + s1);
|
|
314
|
+
}
|
|
315
|
+
else
|
|
316
|
+
buf[0] = REVV_BE(v0 + s0);
|
|
317
|
+
|
|
318
|
+
for (i=inlen & ~15; i<inlen; i++)
|
|
319
|
+
((char *)op)[i] = ((char *)ip)[i] ^ ((char *)buf)[i];
|
|
320
|
+
}
|
|
321
|
+
}
|
|
322
|
+
|
|
323
|
+
#endif /* ASM_GEN || !OPENSSL_WINDOWS && (OPENSSL_X86_64 || OPENSSL_X86) && SSE2 */
|